diff --git a/Kbuild b/Kbuild index 6e1698c..ef97787 100644 --- a/Kbuild +++ b/Kbuild @@ -53,7 +53,8 @@ targets += arch/$(ARCH)/lib/asm-offsets.s # Default sed regexp - multiline due to syntax constraints define sed-y - "/^->/{s:->#\(.*\):/* \1 */:; \ + "s:[[:space:]]*\.ascii[[:space:]]*\"\(.*\)\":\1:; \ + /^->/{s:->#\(.*\):/* \1 */:; \ s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \ s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \ s:->::; p;}" diff --git a/Kconfig b/Kconfig index cbb691e..e0c8992 100644 --- a/Kconfig +++ b/Kconfig @@ -91,7 +91,7 @@ config SYS_EXTRA_OPTIONS depends on !SPL_BUILD help The old configuration infrastructure (= mkconfig + boards.cfg) - provided the extra options field. It you have something like + provided the extra options field. If you have something like "HAS_BAR,BAZ=64", the optional options #define CONFIG_HAS #define CONFIG_BAZ 64 @@ -103,3 +103,15 @@ config SYS_EXTRA_OPTIONS endmenu # Boot images source "arch/Kconfig" + +source "common/Kconfig" + +source "dts/Kconfig" + +source "net/Kconfig" + +source "drivers/Kconfig" + +source "fs/Kconfig" + +source "lib/Kconfig" diff --git a/Licenses/README b/Licenses/README index c6ff277..fe6dadc 100644 --- a/Licenses/README +++ b/Licenses/README @@ -66,3 +66,4 @@ BSD 2-Clause License BSD-2-Clause Y bsd-2-clause.txt http://spdx.org/license BSD 3-clause "New" or "Revised" License BSD-3-Clause Y bsd-3-clause.txt http://spdx.org/licenses/BSD-3-Clause#licenseText IBM PIBS (PowerPC Initialization and IBM-pibs ibm-pibs.txt Boot Software) license +ISC License ISC Y isc.txt https://spdx.org/licenses/ISC diff --git a/Licenses/isc.txt b/Licenses/isc.txt new file mode 100644 index 0000000..4b7c2ba --- /dev/null +++ b/Licenses/isc.txt @@ -0,0 +1,17 @@ +ISC License: +Copyright (c) 2004-2010 by Internet Systems Consortium, Inc. ("ISC") +Copyright (c) 1995-2003 by Internet Software Consortium + +Permission to use, copy, modify, and/or distribute this software +for any purpose with or without fee is hereby granted, +provided that the above copyright notice and this permission notice +appear in all copies. + +THE SOFTWARE IS PROVIDED "AS IS" AND ISC DISCLAIMS ALL WARRANTIES +WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL ISC BE LIABLE +FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR +ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, +WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, +ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF +THIS SOFTWARE. diff --git a/Makefile b/Makefile index fdda3ec..6221113 100644 --- a/Makefile +++ b/Makefile @@ -197,8 +197,8 @@ CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \ else if [ -x /bin/bash ]; then echo /bin/bash; \ else echo sh; fi ; fi) -HOSTCC = gcc -HOSTCXX = g++ +HOSTCC = cc +HOSTCXX = c++ HOSTCFLAGS = -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer HOSTCXXFLAGS = -O2 @@ -341,7 +341,7 @@ CHECK = sparse CHECKFLAGS := -D__linux__ -Dlinux -D__STDC__ -Dunix -D__unix__ \ -Wbitwise -Wno-return-void -D__CHECK_ENDIAN__ $(CF) -KBUILD_CPPFLAGS := -D__KERNEL__ +KBUILD_CPPFLAGS := -D__KERNEL__ -D__UBOOT__ KBUILD_CFLAGS := -Wall -Wstrict-prototypes \ -Wno-format-security \ @@ -458,7 +458,7 @@ KBUILD_DEFCONFIG := sandbox_defconfig export KBUILD_DEFCONFIG KBUILD_KCONFIG config: scripts_basic outputmakefile FORCE - (Q)$(MAKE) $(build)=scripts/kconfig $@ + +$(Q)$(CONFIG_SHELL) $(srctree)/scripts/multiconfig.sh $@ %config: scripts_basic outputmakefile FORCE +$(Q)$(CONFIG_SHELL) $(srctree)/scripts/multiconfig.sh $@ @@ -613,11 +613,9 @@ libs-y += fs/ libs-y += net/ libs-y += disk/ libs-y += drivers/ -libs-$(CONFIG_DM) += drivers/core/ libs-y += drivers/dma/ libs-y += drivers/gpio/ libs-y += drivers/i2c/ -libs-y += drivers/input/ libs-y += drivers/mmc/ libs-y += drivers/mtd/ libs-$(CONFIG_CMD_NAND) += drivers/mtd/nand/ @@ -649,7 +647,6 @@ libs-$(CONFIG_API) += api/ libs-$(CONFIG_HAS_POST) += post/ libs-y += test/ libs-y += test/dm/ -libs-$(CONFIG_DM_DEMO) += drivers/demo/ ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx31 mx35 mxs vf610)) libs-y += arch/$(ARCH)/imx-common/ diff --git a/README b/README index 0a0f528..46def00 100644 --- a/README +++ b/README @@ -272,7 +272,7 @@ board. This allows feature development which is not board- or architecture- specific to be undertaken on a native platform. The sandbox is also used to run some of U-Boot's tests. -See board/sandbox/sandbox/README.sandbox for more details. +See board/sandbox/README.sandbox for more details. Configuration Options: @@ -538,6 +538,12 @@ The following options need to be configured: interleaving mode, handled by Dickens for Freescale layerscape SoCs with ARM core. + CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS + Number of controllers used as main memory. + + CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS + Number of controllers used for other than main memory. + - Intel Monahans options: CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO @@ -1629,6 +1635,16 @@ The following options need to be configured: downloads. This buffer should be as large as possible for a platform. Define this to the size available RAM for fastboot. + CONFIG_FASTBOOT_FLASH + The fastboot protocol includes a "flash" command for writing + the downloaded image to a non-volatile storage device. Define + this to enable the "fastboot flash" command. + + CONFIG_FASTBOOT_FLASH_MMC_DEV + The fastboot "flash" command requires additional information + regarding the non-volatile storage device. Define this to + the eMMC device that fastboot should use to store the image. + - Journaling Flash filesystem support: CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE, CONFIG_JFFS2_NAND_DEV @@ -3849,12 +3865,9 @@ Configuration Settings: The memory will be freed (or in fact just forgotton) when U-Boot relocates itself. - Pre-relocation malloc() is only supported on sandbox + Pre-relocation malloc() is only supported on ARM and sandbox at present but is fairly easy to enable for other archs. - Pre-relocation malloc() is only supported on ARM at present - but is fairly easy to enable for other archs. - - CONFIG_SYS_BOOTM_LEN: Normally compressed uImages are limited to an uncompressed size of 8 MBytes. If this is not enough, diff --git a/arch/Kconfig b/arch/Kconfig index 8620a4f..bf26764 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -7,6 +7,7 @@ config ARC config ARM bool "ARM architecture" + select SUPPORT_OF_CONTROL config AVR32 bool "AVR32 architecture" @@ -19,6 +20,7 @@ config M68K config MICROBLAZE bool "MicroBlaze architecture" + select SUPPORT_OF_CONTROL config MIPS bool "MIPS architecture" @@ -37,6 +39,7 @@ config PPC config SANDBOX bool "Sandbox" + select SUPPORT_OF_CONTROL config SH bool "SuperH architecture" @@ -46,9 +49,66 @@ config SPARC config X86 bool "x86 architecture" + select SUPPORT_OF_CONTROL endchoice +config SYS_ARCH + string + help + This option should contain the architecture name to build the + appropriate arch/ directory. + All the architectures should specify this option correctly. + +config SYS_CPU + string + help + This option should contain the CPU name to build the correct + arch//cpu/ directory. + + This is optional. For those targets without the CPU directory, + leave this option empty. + +config SYS_SOC + string + help + This option should contain the SoC name to build the directory + arch//cpu//. + + This is optional. For those targets without the SoC directory, + leave this option empty. + +config SYS_VENDOR + string + help + This option should contain the vendor name of the target board. + If it is set and + board//common/Makefile exists, the vendor common + directory is compiled. + If CONFIG_SYS_BOARD is also set, the sources under + board// directory are compiled. + + This is optional. For those targets without the vendor directory, + leave this option empty. + +config SYS_BOARD + string + help + This option should contain the name of the target board. + If it is set, either board// + or board/ directory is compiled depending on + whether CONFIG_SYS_VENDOR is set or not. + + This is optional. For those targets without the board directory, + leave this option empty. + +config SYS_CONFIG_NAME + string + help + This option should contain the base name of board header file. + The header file include/configs/.h + should be included from include/config.h. + source "arch/arc/Kconfig" source "arch/arm/Kconfig" source "arch/avr32/Kconfig" diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig index 51d5aff..d3ef58b 100644 --- a/arch/arc/Kconfig +++ b/arch/arc/Kconfig @@ -2,7 +2,6 @@ menu "ARC architecture" depends on ARC config SYS_ARCH - string default "arc" choice diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 22f0f09..e3b382c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -2,9 +2,11 @@ menu "ARM architecture" depends on ARM config SYS_ARCH - string default "arm" +config ARM64 + bool + choice prompt "Target select" @@ -376,9 +378,87 @@ config TARGET_WANDBOARD config TARGET_TITANIUM bool "Support titanium" +config TARGET_A + bool "Support A" + +config TARGET_BT + bool "Support BT" + +config TARGET_CAD + bool "Support Cad" + +config TARGET_COB + bool "Support COB" + +config TARGET_DASH + bool "Support dash" + +config TARGET_EO + bool "Support eo" + +config TARGET_H + bool "Support H" + +config TARGET_INSP + bool "Support INSP" + +config TARGET_IOC + bool "Support ioc" + +config TARGET_LS + bool "Support ls" + +config TARGET_MCS + bool "Support mcs" + +config TARGET_MED + bool "Support med" + +config TARGET_MTP + bool "Support mtp" + +config TARGET_MX6_R + bool "Support mx6_r" + +config TARGET_NIT6XLITE + bool "Support nit6xlite" + +config TARGET_NITROGEN6_MAX + bool "Support nitrogen6_max" + +config TARGET_NITROGEN6_VM + bool "Support nitrogen6_vm" + config TARGET_NITROGEN6X bool "Support nitrogen6x" +config TARGET_NW + bool "Support NW" + +config TARGET_OC + bool "Support OC" + +config TARGET_PER + bool "Support Per" + +config TARGET_S + bool "Support S" + +config TARGET_SNAP + bool "Support Snap" + +config TARGET_SP + bool "Support SP" + +config TARGET_TA + bool "Support TA" + +config TARGET_UTC + bool "Support UTC" + +config TARGET_VP + bool "Support VP" + config TARGET_CGTQMX6EVAL bool "Support cgtqmx6eval" @@ -424,6 +504,9 @@ config OMAP54XX config RMOBILE bool "Renesas ARM SoCs" +config TARGET_CM_FX6 + bool "Support cm_fx6" + config TARGET_S5P_GONI bool "Support s5p_goni" @@ -457,18 +540,25 @@ config ZYNQ config TEGRA bool "NVIDIA Tegra" select SPL + select OF_CONTROL if !SPL_BUILD config TARGET_VEXPRESS_AEMV8A bool "Support vexpress_aemv8a" - -config TARGET_VEXPRESS_AEMV8A_SEMI - bool "Support vexpress_aemv8a_semi" + select ARM64 config TARGET_LS2085A_EMU bool "Support ls2085a_emu" + select ARM64 config TARGET_LS2085A_SIMU bool "Support ls2085a_simu" + select ARM64 + +config TARGET_LS1021AQDS + bool "Support ls1021aqds_nor" + +config TARGET_LS1021ATWR + bool "Support ls1021atwr_nor" config TARGET_BALLOON3 bool "Support balloon3" @@ -511,6 +601,8 @@ config TARGET_JORNADA endchoice +source "arch/arm/cpu/armv8/Kconfig" + source "arch/arm/cpu/arm926ejs/davinci/Kconfig" source "arch/arm/cpu/armv7/exynos/Kconfig" @@ -568,7 +660,33 @@ source "board/balloon3/Kconfig" source "board/barco/titanium/Kconfig" source "board/bluegiga/apx4devkit/Kconfig" source "board/bluewater/snapper9260/Kconfig" +source "board/boundary/a/Kconfig" +source "board/boundary/bt/Kconfig" +source "board/boundary/cad/Kconfig" +source "board/boundary/cob/Kconfig" +source "board/boundary/dash/Kconfig" +source "board/boundary/eo/Kconfig" +source "board/boundary/h/Kconfig" +source "board/boundary/insp/Kconfig" +source "board/boundary/ioc/Kconfig" +source "board/boundary/ls/Kconfig" +source "board/boundary/mcs/Kconfig" +source "board/boundary/med/Kconfig" +source "board/boundary/mtp/Kconfig" +source "board/boundary/mx6_r/Kconfig" +source "board/boundary/nit6xlite/Kconfig" +source "board/boundary/nitrogen6_max/Kconfig" +source "board/boundary/nitrogen6_vm/Kconfig" source "board/boundary/nitrogen6x/Kconfig" +source "board/boundary/nw/Kconfig" +source "board/boundary/oc/Kconfig" +source "board/boundary/per/Kconfig" +source "board/boundary/s/Kconfig" +source "board/boundary/snap/Kconfig" +source "board/boundary/sp/Kconfig" +source "board/boundary/ta/Kconfig" +source "board/boundary/utc/Kconfig" +source "board/boundary/vp/Kconfig" source "board/broadcom/bcm28155_ap/Kconfig" source "board/broadcom/bcm958300k/Kconfig" source "board/broadcom/bcm958622hr/Kconfig" @@ -579,6 +697,7 @@ source "board/cirrus/edb93xx/Kconfig" source "board/cm4008/Kconfig" source "board/cm41xx/Kconfig" source "board/compulab/cm_t335/Kconfig" +source "board/compulab/cm_fx6/Kconfig" source "board/congatec/cgtqmx6eval/Kconfig" source "board/creative/xfi3/Kconfig" source "board/davedenx/qong/Kconfig" @@ -594,6 +713,8 @@ source "board/eukrea/cpu9260/Kconfig" source "board/eukrea/cpuat91/Kconfig" source "board/faraday/a320evb/Kconfig" source "board/freescale/ls2085a/Kconfig" +source "board/freescale/ls1021aqds/Kconfig" +source "board/freescale/ls1021atwr/Kconfig" source "board/freescale/mx23evk/Kconfig" source "board/freescale/mx25pdk/Kconfig" source "board/freescale/mx28evk/Kconfig" diff --git a/arch/arm/cpu/arm1176/tnetv107x/clock.c b/arch/arm/cpu/arm1176/tnetv107x/clock.c index 3708b6f..47c23bb 100644 --- a/arch/arm/cpu/arm1176/tnetv107x/clock.c +++ b/arch/arm/cpu/arm1176/tnetv107x/clock.c @@ -362,7 +362,7 @@ static void init_pll(const struct pll_init_data *data) pllctl_reg_write(data->pll, ctl, tmp); mult = data->pll_freq / fpll; - for (mult = MAX(mult, 1); mult <= MAX_MULT; mult++) { + for (mult = max(mult, 1); mult <= MAX_MULT; mult++) { div = (fpll * mult) / data->pll_freq; if (div < 1 || div > MAX_DIV) continue; diff --git a/arch/arm/cpu/arm926ejs/davinci/Kconfig b/arch/arm/cpu/arm926ejs/davinci/Kconfig index be1b0f9..4c18ab6 100644 --- a/arch/arm/cpu/arm926ejs/davinci/Kconfig +++ b/arch/arm/cpu/arm926ejs/davinci/Kconfig @@ -54,11 +54,9 @@ config TARGET_CALIMAIN endchoice config SYS_CPU - string default "arm926ejs" config SYS_SOC - string default "davinci" source "board/enbw/enbw_cmc/Kconfig" diff --git a/arch/arm/cpu/arm926ejs/kirkwood/Kconfig b/arch/arm/cpu/arm926ejs/kirkwood/Kconfig index 58867f3..91ffedf 100644 --- a/arch/arm/cpu/arm926ejs/kirkwood/Kconfig +++ b/arch/arm/cpu/arm926ejs/kirkwood/Kconfig @@ -60,11 +60,9 @@ config TARGET_GOFLEXHOME endchoice config SYS_CPU - string default "arm926ejs" config SYS_SOC - string default "kirkwood" source "board/Marvell/openrd/Kconfig" diff --git a/arch/arm/cpu/arm926ejs/nomadik/Kconfig b/arch/arm/cpu/arm926ejs/nomadik/Kconfig index 7177800..eda51fd 100644 --- a/arch/arm/cpu/arm926ejs/nomadik/Kconfig +++ b/arch/arm/cpu/arm926ejs/nomadik/Kconfig @@ -9,11 +9,9 @@ config NOMADIK_NHK8815 endchoice config SYS_CPU - string default "arm926ejs" config SYS_SOC - string default "nomadik" source "board/st/nhk8815/Kconfig" diff --git a/arch/arm/cpu/arm926ejs/orion5x/Kconfig b/arch/arm/cpu/arm926ejs/orion5x/Kconfig index aa40099..2d0ab2b 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/Kconfig +++ b/arch/arm/cpu/arm926ejs/orion5x/Kconfig @@ -9,11 +9,9 @@ config TARGET_EDMINIV2 endchoice config SYS_CPU - string default "arm926ejs" config SYS_SOC - string default "orion5x" source "board/LaCie/edminiv2/Kconfig" diff --git a/arch/arm/cpu/arm926ejs/versatile/Kconfig b/arch/arm/cpu/arm926ejs/versatile/Kconfig index fc29c98..35c16d8 100644 --- a/arch/arm/cpu/arm926ejs/versatile/Kconfig +++ b/arch/arm/cpu/arm926ejs/versatile/Kconfig @@ -1,23 +1,18 @@ if ARCH_VERSATILE config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "versatile" config SYS_VENDOR - string default "armltd" config SYS_SOC - string default "versatile" config SYS_CONFIG_NAME - string default "versatile" endif diff --git a/arch/arm/cpu/armv7/at91/clock.c b/arch/arm/cpu/armv7/at91/clock.c index 1588e0c..36ed4a6 100644 --- a/arch/arm/cpu/armv7/at91/clock.c +++ b/arch/arm/cpu/armv7/at91/clock.c @@ -114,9 +114,25 @@ int at91_clock_init(unsigned long main_clock) void at91_periph_clk_enable(int id) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + u32 regval; - if (id > 31) - writel(1 << (id - 32), &pmc->pcer1); - else - writel(1 << id, &pmc->pcer); + if (id > AT91_PMC_PCR_PID_MASK) + return; + + regval = AT91_PMC_PCR_EN | AT91_PMC_PCR_CMD_WRITE | id; + + writel(regval, &pmc->pcr); +} + +void at91_periph_clk_disable(int id) +{ + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; + u32 regval; + + if (id > AT91_PMC_PCR_PID_MASK) + return; + + regval = AT91_PMC_PCR_CMD_WRITE | id; + + writel(regval, &pmc->pcr); } diff --git a/arch/arm/cpu/armv7/exynos/Kconfig b/arch/arm/cpu/armv7/exynos/Kconfig index f1cacdc..e7c93d8 100644 --- a/arch/arm/cpu/armv7/exynos/Kconfig +++ b/arch/arm/cpu/armv7/exynos/Kconfig @@ -18,29 +18,35 @@ config TARGET_ORIGEN config TARGET_TRATS2 bool "Exynos4412 Trat2 board" +config TARGET_ODROID + bool "Exynos4412 Odroid board" + config TARGET_ARNDALE bool "Exynos5250 Arndale board" + select OF_CONTROL if !SPL_BUILD config TARGET_SMDK5250 bool "SMDK5250 board" + select OF_CONTROL if !SPL_BUILD config TARGET_SNOW bool "Snow board" + select OF_CONTROL if !SPL_BUILD config TARGET_SMDK5420 bool "SMDK5420 board" + select OF_CONTROL if !SPL_BUILD config TARGET_PEACH_PIT bool "Peach Pi board" + select OF_CONTROL if !SPL_BUILD endchoice config SYS_CPU - string default "armv7" config SYS_SOC - string default "exynos" source "board/samsung/smdkv310/Kconfig" @@ -48,6 +54,7 @@ source "board/samsung/trats/Kconfig" source "board/samsung/universal_c210/Kconfig" source "board/samsung/origen/Kconfig" source "board/samsung/trats2/Kconfig" +source "board/samsung/odroid/Kconfig" source "board/samsung/arndale/Kconfig" source "board/samsung/smdk5250/Kconfig" source "board/samsung/smdk5420/Kconfig" diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c index 400d134..7558eff 100644 --- a/arch/arm/cpu/armv7/exynos/clock.c +++ b/arch/arm/cpu/armv7/exynos/clock.c @@ -82,7 +82,8 @@ static int exynos_get_pll_clk(int pllreg, unsigned int r, unsigned int k) * VPLL_CON: MIDV [24:16] * BPLL_CON: MIDV [25:16]: Exynos5 */ - if (pllreg == APLL || pllreg == MPLL || pllreg == BPLL) + if (pllreg == APLL || pllreg == MPLL || pllreg == BPLL || + pllreg == SPLL) mask = 0x3ff; else mask = 0x1ff; @@ -391,6 +392,9 @@ static unsigned long exynos5420_get_pll_clk(int pllreg) r = readl(&clk->rpll_con0); k = readl(&clk->rpll_con1); break; + case SPLL: + r = readl(&clk->spll_con0); + break; default: printf("Unsupported PLL (%d)\n", pllreg); return 0; @@ -1027,6 +1031,40 @@ static unsigned long exynos5_get_lcd_clk(void) return pclk; } +static unsigned long exynos5420_get_lcd_clk(void) +{ + struct exynos5420_clock *clk = + (struct exynos5420_clock *)samsung_get_base_clock(); + unsigned long pclk, sclk; + unsigned int sel; + unsigned int ratio; + + /* + * CLK_SRC_DISP10 + * FIMD1_SEL [4] + * 0: SCLK_RPLL + * 1: SCLK_SPLL + */ + sel = readl(&clk->src_disp10); + sel &= (1 << 4); + + if (sel) + sclk = get_pll_clk(SPLL); + else + sclk = get_pll_clk(RPLL); + + /* + * CLK_DIV_DISP10 + * FIMD1_RATIO [3:0] + */ + ratio = readl(&clk->div_disp10); + ratio = ratio & 0xf; + + pclk = sclk / (ratio + 1); + + return pclk; +} + void exynos4_set_lcd_clk(void) { struct exynos4_clock *clk = @@ -1131,6 +1169,33 @@ void exynos5_set_lcd_clk(void) clrsetbits_le32(&clk->div_disp1_0, 0xf, 0x0); } +void exynos5420_set_lcd_clk(void) +{ + struct exynos5420_clock *clk = + (struct exynos5420_clock *)samsung_get_base_clock(); + unsigned int cfg; + + /* + * CLK_SRC_DISP10 + * FIMD1_SEL [4] + * 0: SCLK_RPLL + * 1: SCLK_SPLL + */ + cfg = readl(&clk->src_disp10); + cfg &= ~(0x1 << 4); + cfg |= (0 << 4); + writel(cfg, &clk->src_disp10); + + /* + * CLK_DIV_DISP10 + * FIMD1_RATIO [3:0] + */ + cfg = readl(&clk->div_disp10); + cfg &= ~(0xf << 0); + cfg |= (0 << 0); + writel(cfg, &clk->div_disp10); +} + void exynos4_set_mipi_clk(void) { struct exynos4_clock *clk = @@ -1602,16 +1667,24 @@ unsigned long get_lcd_clk(void) { if (cpu_is_exynos4()) return exynos4_get_lcd_clk(); - else - return exynos5_get_lcd_clk(); + else { + if (proid_is_exynos5420()) + return exynos5420_get_lcd_clk(); + else + return exynos5_get_lcd_clk(); + } } void set_lcd_clk(void) { if (cpu_is_exynos4()) exynos4_set_lcd_clk(); - else - exynos5_set_lcd_clk(); + else { + if (proid_is_exynos5250()) + exynos5_set_lcd_clk(); + else if (proid_is_exynos5420()) + exynos5420_set_lcd_clk(); + } } void set_mipi_clk(void) diff --git a/arch/arm/cpu/armv7/exynos/clock_init.h b/arch/arm/cpu/armv7/exynos/clock_init.h index a875d0b..fce502f 100644 --- a/arch/arm/cpu/armv7/exynos/clock_init.h +++ b/arch/arm/cpu/armv7/exynos/clock_init.h @@ -75,6 +75,9 @@ struct mem_timings { unsigned spll_mdiv; unsigned spll_pdiv; unsigned spll_sdiv; + unsigned rpll_mdiv; + unsigned rpll_pdiv; + unsigned rpll_sdiv; unsigned pclk_cdrex_ratio; unsigned direct_cmd_msr[MEM_TIMINGS_MSR_COUNT]; diff --git a/arch/arm/cpu/armv7/exynos/clock_init_exynos5.c b/arch/arm/cpu/armv7/exynos/clock_init_exynos5.c index 1d6977f..b6a9bc1 100644 --- a/arch/arm/cpu/armv7/exynos/clock_init_exynos5.c +++ b/arch/arm/cpu/armv7/exynos/clock_init_exynos5.c @@ -179,6 +179,10 @@ struct mem_timings mem_timings[] = { .spll_mdiv = 0xc8, .spll_pdiv = 0x3, .spll_sdiv = 0x2, + /* RPLL @70.5Mhz */ + .rpll_mdiv = 0x5E, + .rpll_pdiv = 0x2, + .rpll_sdiv = 0x4, .direct_cmd_msr = { 0x00020018, 0x00030000, 0x00010046, 0x00000d70, @@ -800,6 +804,7 @@ static void exynos5420_system_clock_init(void) writel(mem->ipll_pdiv * PLL_LOCK_FACTOR, &clk->ipll_lock); writel(mem->spll_pdiv * PLL_LOCK_FACTOR, &clk->spll_lock); writel(mem->kpll_pdiv * PLL_LOCK_FACTOR, &clk->kpll_lock); + writel(mem->rpll_pdiv * PLL_X_LOCK_FACTOR, &clk->rpll_lock); setbits_le32(&clk->src_cpu, MUX_HPM_SEL_MASK); @@ -898,6 +903,14 @@ static void exynos5420_system_clock_init(void) while ((readl(&clk->spll_con0) & PLL_LOCKED) == 0) ; + /* Set RPLL */ + writel(RPLL_CON2_VAL, &clk->rpll_con2); + writel(RPLL_CON1_VAL, &clk->rpll_con1); + val = set_pll(mem->rpll_mdiv, mem->rpll_pdiv, mem->rpll_sdiv); + writel(val, &clk->rpll_con0); + while ((readl(&clk->rpll_con0) & PLL_LOCKED) == 0) + ; + writel(CLK_DIV_CDREX0_VAL, &clk->div_cdrex0); writel(CLK_DIV_CDREX1_VAL, &clk->div_cdrex1); diff --git a/arch/arm/cpu/armv7/exynos/exynos5_setup.h b/arch/arm/cpu/armv7/exynos/exynos5_setup.h index 3242093..2eea48a 100644 --- a/arch/arm/cpu/armv7/exynos/exynos5_setup.h +++ b/arch/arm/cpu/armv7/exynos/exynos5_setup.h @@ -783,7 +783,7 @@ #define CLK_SRC_TOP2_VAL 0x11101000 #define CLK_SRC_TOP3_VAL 0x11111111 #define CLK_SRC_TOP4_VAL 0x11110111 -#define CLK_SRC_TOP5_VAL 0x11111100 +#define CLK_SRC_TOP5_VAL 0x11111101 #define CLK_SRC_TOP6_VAL 0x11110111 #define CLK_SRC_TOP7_VAL 0x00022200 diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c index 86a0c75..b929486 100644 --- a/arch/arm/cpu/armv7/exynos/pinmux.c +++ b/arch/arm/cpu/armv7/exynos/pinmux.c @@ -704,8 +704,8 @@ static int exynos4x12_mmc_config(int peripheral, int flags) ext_func = S5P_GPIO_FUNC(0x3); break; case PERIPH_ID_SDMMC4: - start = EXYNOS4_GPIO_K00; - start_ext = EXYNOS4_GPIO_K13; + start = EXYNOS4X12_GPIO_K00; + start_ext = EXYNOS4X12_GPIO_K13; func = S5P_GPIO_FUNC(0x3); ext_func = S5P_GPIO_FUNC(0x4); break; diff --git a/arch/arm/cpu/armv7/exynos/power.c b/arch/arm/cpu/armv7/exynos/power.c index 638ee0b..e1ab3d6 100644 --- a/arch/arm/cpu/armv7/exynos/power.c +++ b/arch/arm/cpu/armv7/exynos/power.c @@ -202,3 +202,10 @@ void power_exit_wakeup(void) else exynos4_power_exit_wakeup(); } + +unsigned int get_boot_mode(void) +{ + unsigned int om_pin = samsung_get_base_power(); + + return readl(om_pin) & OM_PIN_MASK; +} diff --git a/arch/arm/cpu/armv7/exynos/spl_boot.c b/arch/arm/cpu/armv7/exynos/spl_boot.c index 7916630..658e4cb 100644 --- a/arch/arm/cpu/armv7/exynos/spl_boot.c +++ b/arch/arm/cpu/armv7/exynos/spl_boot.c @@ -20,7 +20,6 @@ #include "clock_init.h" DECLARE_GLOBAL_DATA_PTR; -#define OM_STAT (0x1f << 1) /* Index into irom ptr table */ enum index { @@ -184,7 +183,7 @@ static void exynos_spi_copy(unsigned int uboot_size, unsigned int uboot_addr) */ void copy_uboot_to_ram(void) { - enum boot_mode bootmode = BOOT_MODE_OM; + unsigned int bootmode = BOOT_MODE_OM; u32 (*copy_bl2)(u32 offset, u32 nblock, u32 dst) = NULL; u32 offset = 0, size = 0; @@ -207,7 +206,7 @@ void copy_uboot_to_ram(void) #endif if (bootmode == BOOT_MODE_OM) - bootmode = readl(samsung_get_base_power()) & OM_STAT; + bootmode = get_boot_mode(); switch (bootmode) { #ifdef CONFIG_SPI_BOOTING @@ -216,7 +215,7 @@ void copy_uboot_to_ram(void) exynos_spi_copy(param->uboot_size, CONFIG_SYS_TEXT_BASE); break; #endif - case BOOT_MODE_MMC: + case BOOT_MODE_SD: offset = BL2_START_OFFSET; size = BL2_SIZE_BLOC_COUNT; copy_bl2 = get_irom_func(MMC_INDEX); diff --git a/arch/arm/cpu/armv7/highbank/Kconfig b/arch/arm/cpu/armv7/highbank/Kconfig index 9527928..29ff995 100644 --- a/arch/arm/cpu/armv7/highbank/Kconfig +++ b/arch/arm/cpu/armv7/highbank/Kconfig @@ -1,19 +1,15 @@ if ARCH_HIGHBANK config SYS_CPU - string default "armv7" config SYS_BOARD - string default "highbank" config SYS_SOC - string default "highbank" config SYS_CONFIG_NAME - string default "highbank" endif diff --git a/arch/arm/cpu/armv7/keystone/Kconfig b/arch/arm/cpu/armv7/keystone/Kconfig index 24d0cbe..8249b5e 100644 --- a/arch/arm/cpu/armv7/keystone/Kconfig +++ b/arch/arm/cpu/armv7/keystone/Kconfig @@ -12,11 +12,9 @@ config TARGET_K2E_EVM endchoice config SYS_CPU - string default "armv7" config SYS_SOC - string default "keystone" source "board/ti/ks2_evm/Kconfig" diff --git a/arch/arm/cpu/armv7/keystone/clock.c b/arch/arm/cpu/armv7/keystone/clock.c index 30d76a6..47fc893 100644 --- a/arch/arm/cpu/armv7/keystone/clock.c +++ b/arch/arm/cpu/armv7/keystone/clock.c @@ -174,7 +174,7 @@ void init_pll(const struct pll_init_data *data) * bypass disabled */ bwadj = pllm >> 1; - tmp |= ((bwadj & PLL_BWADJ_LO_SHIFT) << PLL_BWADJ_LO_SHIFT) | + tmp |= ((bwadj & PLL_BWADJ_LO_MASK) << PLL_BWADJ_LO_SHIFT) | (pllm << PLL_MULT_SHIFT) | (plld & PLL_DIV_MASK) | (pllod << PLL_CLKOD_SHIFT); diff --git a/arch/arm/cpu/armv7/keystone/ddr3.c b/arch/arm/cpu/armv7/keystone/ddr3.c index 2391e79..2eabec1 100644 --- a/arch/arm/cpu/armv7/keystone/ddr3.c +++ b/arch/arm/cpu/armv7/keystone/ddr3.c @@ -10,6 +10,7 @@ #include #include #include +#include void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg) { @@ -86,3 +87,77 @@ void ddr3_reset_ddrphy(void) tmp &= ~KS2_DDR3_PLLCTRL_PHY_RESET; __raw_writel(tmp, KS2_DDR3APLLCTL1); } + +#ifdef CONFIG_SOC_K2HK +/** + * ddr3_reset_workaround - reset workaround in case if leveling error + * detected for PG 1.0 and 1.1 k2hk SoCs + */ +void ddr3_err_reset_workaround(void) +{ + unsigned int tmp; + unsigned int tmp_a; + unsigned int tmp_b; + + /* + * Check for PGSR0 error bits of DDR3 PHY. + * Check for WLERR, QSGERR, WLAERR, + * RDERR, WDERR, REERR, WEERR error to see if they are set or not + */ + tmp_a = __raw_readl(KS2_DDR3A_DDRPHYC + KS2_DDRPHY_PGSR0_OFFSET); + tmp_b = __raw_readl(KS2_DDR3B_DDRPHYC + KS2_DDRPHY_PGSR0_OFFSET); + + if (((tmp_a & 0x0FE00000) != 0) || ((tmp_b & 0x0FE00000) != 0)) { + printf("DDR Leveling Error Detected!\n"); + printf("DDR3A PGSR0 = 0x%x\n", tmp_a); + printf("DDR3B PGSR0 = 0x%x\n", tmp_b); + + /* + * Write Keys to KICK registers to enable writes to registers + * in boot config space + */ + __raw_writel(KS2_KICK0_MAGIC, KS2_KICK0); + __raw_writel(KS2_KICK1_MAGIC, KS2_KICK1); + + /* + * Move DDR3A Module out of reset isolation by setting + * MDCTL23[12] = 0 + */ + tmp_a = __raw_readl(KS2_PSC_BASE + + PSC_REG_MDCTL(KS2_LPSC_EMIF4F_DDR3A)); + + tmp_a = PSC_REG_MDCTL_SET_RESET_ISO(tmp_a, 0); + __raw_writel(tmp_a, KS2_PSC_BASE + + PSC_REG_MDCTL(KS2_LPSC_EMIF4F_DDR3A)); + + /* + * Move DDR3B Module out of reset isolation by setting + * MDCTL24[12] = 0 + */ + tmp_b = __raw_readl(KS2_PSC_BASE + + PSC_REG_MDCTL(KS2_LPSC_EMIF4F_DDR3B)); + tmp_b = PSC_REG_MDCTL_SET_RESET_ISO(tmp_b, 0); + __raw_writel(tmp_b, KS2_PSC_BASE + + PSC_REG_MDCTL(KS2_LPSC_EMIF4F_DDR3B)); + + /* + * Write 0x5A69 Key to RSTCTRL[15:0] to unlock writes + * to RSTCTRL and RSTCFG + */ + tmp = __raw_readl(KS2_RSTCTRL); + tmp &= KS2_RSTCTRL_MASK; + tmp |= KS2_RSTCTRL_KEY; + __raw_writel(tmp, KS2_RSTCTRL); + + /* + * Set PLL Controller to drive hard reset on SW trigger by + * setting RSTCFG[13] = 0 + */ + tmp = __raw_readl(KS2_RSTCTRL_RSCFG); + tmp &= ~KS2_RSTYPE_PLL_SOFT; + __raw_writel(tmp, KS2_RSTCTRL_RSCFG); + + reset_cpu(0); + } +} +#endif diff --git a/arch/arm/cpu/armv7/keystone/psc.c b/arch/arm/cpu/armv7/keystone/psc.c index fa5422f..237e776 100644 --- a/arch/arm/cpu/armv7/keystone/psc.c +++ b/arch/arm/cpu/armv7/keystone/psc.c @@ -13,9 +13,6 @@ #include #include -#define DEVICE_REG32_R(addr) __raw_readl((u32 *)(addr)) -#define DEVICE_REG32_W(addr, val) __raw_writel(val, (u32 *)(addr)) - int psc_delay(void) { udelay(10); @@ -51,7 +48,7 @@ int psc_wait(u32 domain_num) retry = 0; do { - ptstat = DEVICE_REG32_R(KS2_PSC_BASE + PSC_REG_PSTAT); + ptstat = __raw_readl(KS2_PSC_BASE + PSC_REG_PSTAT); ptstat = ptstat & (1 << domain_num); } while ((ptstat != 0) && ((retry += psc_delay()) < PSC_PTSTAT_TIMEOUT_LIMIT)); @@ -67,8 +64,7 @@ u32 psc_get_domain_num(u32 mod_num) u32 domain_num; /* Get the power domain associated with the module number */ - domain_num = DEVICE_REG32_R(KS2_PSC_BASE + - PSC_REG_MDCFG(mod_num)); + domain_num = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCFG(mod_num)); domain_num = PSC_REG_MDCFG_GET_PD(domain_num); return domain_num; @@ -102,7 +98,7 @@ int psc_set_state(u32 mod_num, u32 state) * Get the power domain associated with the module number, and reset * isolation functionality */ - v = DEVICE_REG32_R(KS2_PSC_BASE + PSC_REG_MDCFG(mod_num)); + v = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCFG(mod_num)); domain_num = PSC_REG_MDCFG_GET_PD(v); reset_iso = PSC_REG_MDCFG_GET_RESET_ISO(v); @@ -119,24 +115,22 @@ int psc_set_state(u32 mod_num, u32 state) * change is made if the new state is power down. */ if (state == PSC_REG_VAL_MDCTL_NEXT_ON) { - pdctl = DEVICE_REG32_R(KS2_PSC_BASE + - PSC_REG_PDCTL(domain_num)); + pdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_PDCTL(domain_num)); pdctl = PSC_REG_PDCTL_SET_NEXT(pdctl, PSC_REG_VAL_PDCTL_NEXT_ON); - DEVICE_REG32_W(KS2_PSC_BASE + PSC_REG_PDCTL(domain_num), - pdctl); + __raw_writel(pdctl, KS2_PSC_BASE + PSC_REG_PDCTL(domain_num)); } /* Set the next state for the module to enabled/disabled */ - mdctl = DEVICE_REG32_R(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); + mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); mdctl = PSC_REG_MDCTL_SET_NEXT(mdctl, state); mdctl = PSC_REG_MDCTL_SET_RESET_ISO(mdctl, reset_iso); - DEVICE_REG32_W(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num), mdctl); + __raw_writel(mdctl, KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); /* Trigger the enable */ - ptcmd = DEVICE_REG32_R(KS2_PSC_BASE + PSC_REG_PTCMD); + ptcmd = __raw_readl(KS2_PSC_BASE + PSC_REG_PTCMD); ptcmd |= (u32)(1< +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#ifndef CONFIG_SYS_FSL_NUM_CC_PLLS +#define CONFIG_SYS_FSL_NUM_CC_PLLS 2 +#endif + +void get_sys_info(struct sys_info *sys_info) +{ + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); +#ifdef CONFIG_FSL_IFC + struct fsl_ifc *ifc_regs = (void *)CONFIG_SYS_IFC_ADDR; + u32 ccr; +#endif + struct ccsr_clk *clk = (void *)(CONFIG_SYS_FSL_LS1_CLK_ADDR); + unsigned int cpu; + const u8 core_cplx_pll[6] = { + [0] = 0, /* CC1 PPL / 1 */ + [1] = 0, /* CC1 PPL / 2 */ + [4] = 1, /* CC2 PPL / 1 */ + [5] = 1, /* CC2 PPL / 2 */ + }; + + const u8 core_cplx_pll_div[6] = { + [0] = 1, /* CC1 PPL / 1 */ + [1] = 2, /* CC1 PPL / 2 */ + [4] = 1, /* CC2 PPL / 1 */ + [5] = 2, /* CC2 PPL / 2 */ + }; + + uint i; + uint freq_c_pll[CONFIG_SYS_FSL_NUM_CC_PLLS]; + uint ratio[CONFIG_SYS_FSL_NUM_CC_PLLS]; + unsigned long sysclk = CONFIG_SYS_CLK_FREQ; + + sys_info->freq_systembus = sysclk; +#ifdef CONFIG_DDR_CLK_FREQ + sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ; +#else + sys_info->freq_ddrbus = sysclk; +#endif + + sys_info->freq_systembus *= (in_be32(&gur->rcwsr[0]) >> + RCWSR0_SYS_PLL_RAT_SHIFT) & RCWSR0_SYS_PLL_RAT_MASK; + sys_info->freq_ddrbus *= (in_be32(&gur->rcwsr[0]) >> + RCWSR0_MEM_PLL_RAT_SHIFT) & RCWSR0_MEM_PLL_RAT_MASK; + + for (i = 0; i < CONFIG_SYS_FSL_NUM_CC_PLLS; i++) { + ratio[i] = (in_be32(&clk->pllcgsr[i].pllcngsr) >> 1) & 0x3f; + if (ratio[i] > 4) + freq_c_pll[i] = sysclk * ratio[i]; + else + freq_c_pll[i] = sys_info->freq_systembus * ratio[i]; + } + + for (cpu = 0; cpu < CONFIG_MAX_CPUS; cpu++) { + u32 c_pll_sel = (in_be32(&clk->clkcsr[cpu].clkcncsr) >> 27) + & 0xf; + u32 cplx_pll = core_cplx_pll[c_pll_sel]; + + sys_info->freq_processor[cpu] = + freq_c_pll[cplx_pll] / core_cplx_pll_div[c_pll_sel]; + } + +#if defined(CONFIG_FSL_IFC) + ccr = in_be32(&ifc_regs->ifc_ccr); + ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1; + + sys_info->freq_localbus = sys_info->freq_systembus / ccr; +#endif +} + +int get_clocks(void) +{ + struct sys_info sys_info; + + get_sys_info(&sys_info); + gd->cpu_clk = sys_info.freq_processor[0]; + gd->bus_clk = sys_info.freq_systembus; + gd->mem_clk = sys_info.freq_ddrbus * 2; + +#if defined(CONFIG_FSL_ESDHC) + gd->arch.sdhc_clk = gd->bus_clk; +#endif + + return 0; +} + +ulong get_bus_freq(ulong dummy) +{ + return gd->bus_clk; +} + +ulong get_ddr_freq(ulong dummy) +{ + return gd->mem_clk; +} + +int get_serial_clock(void) +{ + return gd->bus_clk / 2; +} + +unsigned int mxc_get_clock(enum mxc_clock clk) +{ + switch (clk) { + case MXC_I2C_CLK: + return get_bus_freq(0) / 2; + case MXC_ESDHC_CLK: + return get_bus_freq(0); + case MXC_DSPI_CLK: + return get_bus_freq(0) / 2; + case MXC_UART_CLK: + return get_bus_freq(0) / 2; + default: + printf("Unsupported clock\n"); + } + return 0; +} diff --git a/arch/arm/cpu/armv7/ls102xa/cpu.c b/arch/arm/cpu/armv7/ls102xa/cpu.c new file mode 100644 index 0000000..b7dde45 --- /dev/null +++ b/arch/arm/cpu/armv7/ls102xa/cpu.c @@ -0,0 +1,103 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#if defined(CONFIG_DISPLAY_CPUINFO) +int print_cpuinfo(void) +{ + char buf1[32], buf2[32]; + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + unsigned int svr, major, minor, ver, i; + + svr = in_be32(&gur->svr); + major = SVR_MAJ(svr); + minor = SVR_MIN(svr); + + puts("CPU: Freescale LayerScape "); + + ver = SVR_SOC_VER(svr); + switch (ver) { + case SOC_VER_SLS1020: + puts("SLS1020"); + break; + case SOC_VER_LS1020: + puts("LS1020"); + break; + case SOC_VER_LS1021: + puts("LS1021"); + break; + case SOC_VER_LS1022: + puts("LS1022"); + break; + default: + puts("Unknown"); + break; + } + + if (IS_E_PROCESSOR(svr) && (ver != SOC_VER_SLS1020)) + puts("E"); + + printf(", Version: %d.%d, (0x%08x)\n", major, minor, svr); + + puts("Clock Configuration:"); + + printf("\n CPU0(ARMV7):%-4s MHz, ", strmhz(buf1, gd->cpu_clk)); + printf("\n Bus:%-4s MHz, ", strmhz(buf1, gd->bus_clk)); + printf("DDR:%-4s MHz (%s MT/s data rate), ", + strmhz(buf1, gd->mem_clk/2), strmhz(buf2, gd->mem_clk)); + puts("\n"); + + /* Display the RCW, so that no one gets confused as to what RCW + * we're actually using for this boot. + */ + puts("Reset Configuration Word (RCW):"); + for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) { + u32 rcw = in_be32(&gur->rcwsr[i]); + + if ((i % 4) == 0) + printf("\n %08x:", i * 4); + printf(" %08x", rcw); + } + puts("\n"); + + return 0; +} +#endif + +void enable_caches(void) +{ +#ifndef CONFIG_SYS_ICACHE_OFF + icache_enable(); +#endif +#ifndef CONFIG_SYS_DCACHE_OFF + dcache_enable(); +#endif +} + +#ifdef CONFIG_FSL_ESDHC +int cpu_mmc_init(bd_t *bis) +{ + return fsl_esdhc_mmc_init(bis); +} +#endif + +int cpu_eth_init(bd_t *bis) +{ +#ifdef CONFIG_TSEC_ENET + tsec_standard_init(bis); +#endif + + return 0; +} diff --git a/arch/arm/cpu/armv7/ls102xa/fdt.c b/arch/arm/cpu/armv7/ls102xa/fdt.c new file mode 100644 index 0000000..4ce3808 --- /dev/null +++ b/arch/arm/cpu/armv7/ls102xa/fdt.c @@ -0,0 +1,136 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_FSL_ESDHC +#include +#endif +#include + +DECLARE_GLOBAL_DATA_PTR; + +void ft_fixup_enet_phy_connect_type(void *fdt) +{ + struct eth_device *dev; + struct tsec_private *priv; + const char *enet_path, *phy_path; + char enet[16]; + char phy[16]; + int phy_node; + int i = 0; + int enet_id = 0; + uint32_t ph; + + while ((dev = eth_get_dev_by_index(i++)) != NULL) { + if (strstr(dev->name, "eTSEC1")) + enet_id = 0; + else if (strstr(dev->name, "eTSEC2")) + enet_id = 1; + else if (strstr(dev->name, "eTSEC3")) + enet_id = 2; + else + continue; + + priv = dev->priv; + if (priv->flags & TSEC_SGMII) + continue; + + sprintf(enet, "ethernet%d", enet_id); + enet_path = fdt_get_alias(fdt, enet); + if (!enet_path) + continue; + + sprintf(phy, "enet%d_rgmii_phy", enet_id); + phy_path = fdt_get_alias(fdt, phy); + if (!phy_path) + continue; + + phy_node = fdt_path_offset(fdt, phy_path); + if (phy_node < 0) + continue; + + ph = fdt_create_phandle(fdt, phy_node); + if (ph) + do_fixup_by_path_u32(fdt, enet_path, + "phy-handle", ph, 1); + + do_fixup_by_path(fdt, enet_path, "phy-connection-type", + phy_string_for_interface( + PHY_INTERFACE_MODE_RGMII_ID), + sizeof(phy_string_for_interface( + PHY_INTERFACE_MODE_RGMII_ID)), + 1); + } +} + +void ft_cpu_setup(void *blob, bd_t *bd) +{ + int off; + int val; + const char *sysclk_path; + + unsigned long busclk = get_bus_freq(0); + + fdt_fixup_ethernet(blob); + + off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); + while (off != -FDT_ERR_NOTFOUND) { + val = gd->cpu_clk; + fdt_setprop(blob, off, "clock-frequency", &val, 4); + off = fdt_node_offset_by_prop_value(blob, off, + "device_type", "cpu", 4); + } + + do_fixup_by_prop_u32(blob, "device_type", "soc", + 4, "bus-frequency", busclk / 2, 1); + + ft_fixup_enet_phy_connect_type(blob); + +#ifdef CONFIG_SYS_NS16550 + do_fixup_by_compat_u32(blob, "fsl,16550-FIFO64", + "clock-frequency", CONFIG_SYS_NS16550_CLK, 1); +#endif + + sysclk_path = fdt_get_alias(blob, "sysclk"); + if (sysclk_path) + do_fixup_by_path_u32(blob, sysclk_path, "clock-frequency", + CONFIG_SYS_CLK_FREQ, 1); + do_fixup_by_compat_u32(blob, "fsl,qoriq-sysclk-2.0", + "clock-frequency", CONFIG_SYS_CLK_FREQ, 1); + +#if defined(CONFIG_FSL_ESDHC) + fdt_fixup_esdhc(blob, bd); +#endif + + /* + * platform bus clock = system bus clock/2 + * Here busclk = system bus clock + * We are using the platform bus clock as 1588 Timer reference + * clock source select + */ + do_fixup_by_compat_u32(blob, "fsl, gianfar-ptp-timer", + "timer-frequency", busclk / 2, 1); + + /* + * clock-freq should change to clock-frequency and + * flexcan-v1.0 should change to p1010-flexcan respectively + * in the future. + */ + do_fixup_by_compat_u32(blob, "fsl, flexcan-v1.0", + "clock_freq", busclk / 2, 1); + + do_fixup_by_compat_u32(blob, "fsl, flexcan-v1.0", + "clock-frequency", busclk / 2, 1); + + do_fixup_by_compat_u32(blob, "fsl, ls1021a-flexcan", + "clock-frequency", busclk / 2, 1); +} diff --git a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c new file mode 100644 index 0000000..9b78acb --- /dev/null +++ b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.c @@ -0,0 +1,120 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include "fsl_ls1_serdes.h" + +#ifdef CONFIG_SYS_FSL_SRDS_1 +static u64 serdes1_prtcl_map; +#endif +#ifdef CONFIG_SYS_FSL_SRDS_2 +static u64 serdes2_prtcl_map; +#endif + +int is_serdes_configured(enum srds_prtcl device) +{ + u64 ret = 0; + +#ifdef CONFIG_SYS_FSL_SRDS_1 + ret |= (1ULL << device) & serdes1_prtcl_map; +#endif +#ifdef CONFIG_SYS_FSL_SRDS_2 + ret |= (1ULL << device) & serdes2_prtcl_map; +#endif + + return !!ret; +} + +int serdes_get_first_lane(u32 sd, enum srds_prtcl device) +{ + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + u32 cfg = in_be32(&gur->rcwsr[4]); + int i; + + switch (sd) { +#ifdef CONFIG_SYS_FSL_SRDS_1 + case FSL_SRDS_1: + cfg &= RCWSR4_SRDS1_PRTCL_MASK; + cfg >>= RCWSR4_SRDS1_PRTCL_SHIFT; + break; +#endif +#ifdef CONFIG_SYS_FSL_SRDS_2 + case FSL_SRDS_2: + cfg &= RCWSR4_SRDS2_PRTCL_MASK; + cfg >>= RCWSR4_SRDS2_PRTCL_SHIFT; + break; +#endif + default: + printf("invalid SerDes%d\n", sd); + break; + } + /* Is serdes enabled at all? */ + if (unlikely(cfg == 0)) + return -ENODEV; + + for (i = 0; i < SRDS_MAX_LANES; i++) { + if (serdes_get_prtcl(sd, cfg, i) == device) + return i; + } + + return -ENODEV; +} + +u64 serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift) +{ + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + u64 serdes_prtcl_map = 0; + u32 cfg; + int lane; + + cfg = in_be32(&gur->rcwsr[4]) & sd_prctl_mask; + cfg >>= sd_prctl_shift; + printf("Using SERDES%d Protocol: %d (0x%x)\n", sd + 1, cfg, cfg); + + if (!is_serdes_prtcl_valid(sd, cfg)) + printf("SERDES%d[PRTCL] = 0x%x is not valid\n", sd + 1, cfg); + + for (lane = 0; lane < SRDS_MAX_LANES; lane++) { + enum srds_prtcl lane_prtcl = serdes_get_prtcl(sd, cfg, lane); + + serdes_prtcl_map |= (1ULL << lane_prtcl); + } + + return serdes_prtcl_map; +} + +void fsl_serdes_init(void) +{ +#ifdef CONFIG_SYS_FSL_SRDS_1 + serdes1_prtcl_map = serdes_init(FSL_SRDS_1, + CONFIG_SYS_FSL_SERDES_ADDR, + RCWSR4_SRDS1_PRTCL_MASK, + RCWSR4_SRDS1_PRTCL_SHIFT); +#endif +#ifdef CONFIG_SYS_FSL_SRDS_2 + serdes2_prtcl_map = serdes_init(FSL_SRDS_2, + CONFIG_SYS_FSL_SERDES_ADDR + + FSL_SRDS_2 * 0x1000, + RCWSR4_SRDS2_PRTCL_MASK, + RCWSR4_SRDS2_PRTCL_SHIFT); +#endif +} + +const char *serdes_clock_to_string(u32 clock) +{ + switch (clock) { + case SRDS_PLLCR0_RFCK_SEL_100: + return "100"; + case SRDS_PLLCR0_RFCK_SEL_125: + return "125"; + default: + return "100"; + } +} diff --git a/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.h b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.h new file mode 100644 index 0000000..834aa53 --- /dev/null +++ b/arch/arm/cpu/armv7/ls102xa/fsl_ls1_serdes.h @@ -0,0 +1,12 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __FSL_LS1_SERDES_H +#define __FSL_LS1_SERDES_H + +int is_serdes_prtcl_valid(int serdes, u32 prtcl); +int serdes_lane_enabled(int lane); +#endif /* __FSL_LS1_SERDES_H */ diff --git a/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c b/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c new file mode 100644 index 0000000..cc53910 --- /dev/null +++ b/arch/arm/cpu/armv7/ls102xa/ls102xa_serdes.c @@ -0,0 +1,41 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include + +static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = { + [0x00] = {PCIE1, PCIE1, PCIE1, PCIE1}, + [0x10] = {PCIE1, SATA1, PCIE2, PCIE2}, + [0x20] = {PCIE1, SGMII_TSEC1, PCIE2, SGMII_TSEC2}, + [0x30] = {PCIE1, SATA1, SGMII_TSEC1, SGMII_TSEC2}, + [0x40] = {PCIE1, PCIE1, SATA1, SGMII_TSEC2}, + [0x50] = {PCIE1, PCIE1, PCIE2, SGMII_TSEC2}, + [0x60] = {PCIE1, PCIE1, SGMII_TSEC1, SGMII_TSEC2}, + [0x70] = {PCIE1, SATA1, PCIE2, SGMII_TSEC2}, + [0x80] = {PCIE2, PCIE2, PCIE2, PCIE2}, +}; + +enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane) +{ + return serdes_cfg_tbl[cfg][lane]; +} + +int is_serdes_prtcl_valid(int serdes, u32 prtcl) +{ + int i; + + if (prtcl >= ARRAY_SIZE(serdes_cfg_tbl)) + return 0; + + for (i = 0; i < SRDS_MAX_LANES; i++) { + if (serdes_cfg_tbl[prtcl][i] != NONE) + return 1; + } + + return 0; +} diff --git a/arch/arm/cpu/armv7/ls102xa/timer.c b/arch/arm/cpu/armv7/ls102xa/timer.c new file mode 100644 index 0000000..11b17b2 --- /dev/null +++ b/arch/arm/cpu/armv7/ls102xa/timer.c @@ -0,0 +1,127 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/* + * This function is intended for SHORT delays only. + * It will overflow at around 10 seconds @ 400MHz, + * or 20 seconds @ 200MHz. + */ +unsigned long usec2ticks(unsigned long usec) +{ + ulong ticks; + + if (usec < 1000) + ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000; + else + ticks = ((usec / 10) * (get_tbclk() / 100000)); + + return ticks; +} + +static inline unsigned long long tick_to_time(unsigned long long tick) +{ + unsigned long freq; + + asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq)); + + tick *= CONFIG_SYS_HZ; + do_div(tick, freq); + + return tick; +} + +static inline unsigned long long us_to_tick(unsigned long long usec) +{ + unsigned long freq; + + asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq)); + + usec = usec * freq + 999999; + do_div(usec, 1000000); + + return usec; +} + +int timer_init(void) +{ + struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR; + unsigned long ctrl, val, freq; + + /* Enable System Counter */ + writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr); + + freq = GENERIC_TIMER_CLK; + asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq)); + + /* Set PL1 Physical Timer Ctrl */ + ctrl = ARCH_TIMER_CTRL_ENABLE; + asm("mcr p15, 0, %0, c14, c2, 1" : : "r" (ctrl)); + + /* Set PL1 Physical Comp Value */ + val = TIMER_COMP_VAL; + asm("mcrr p15, 2, %Q0, %R0, c14" : : "r" (val)); + + gd->arch.tbl = 0; + gd->arch.tbu = 0; + + return 0; +} + +unsigned long long get_ticks(void) +{ + unsigned long long now; + + asm("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now)); + + gd->arch.tbl = (unsigned long)(now & 0xffffffff); + gd->arch.tbu = (unsigned long)(now >> 32); + + return now; +} + +unsigned long get_timer_masked(void) +{ + return tick_to_time(get_ticks()); +} + +unsigned long get_timer(ulong base) +{ + return get_timer_masked() - base; +} + +/* delay x useconds and preserve advance timstamp value */ +void __udelay(unsigned long usec) +{ + unsigned long long start; + unsigned long tmo; + + start = get_ticks(); /* get current timestamp */ + tmo = us_to_tick(usec); /* convert usecs to ticks */ + + while ((get_ticks() - start) < tmo) + ; /* loop till time has passed */ +} + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +unsigned long get_tbclk(void) +{ + unsigned long freq; + + asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq)); + + return freq; +} diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index 820b8d5..336e557 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -36,6 +36,35 @@ void enable_ocotp_clk(unsigned char enable) } #endif +#ifdef CONFIG_NAND_MXS +void setup_gpmi_io_clk(u32 cfg) +{ + /* Disable clocks per ERR007177 from MX6 errata */ + clrbits_le32(&imx_ccm->CCGR4, + MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | + MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); + + clrbits_le32(&imx_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); + + clrsetbits_le32(&imx_ccm->cs2cdr, + MXC_CCM_CS2CDR_ENFC_CLK_PODF_MASK | + MXC_CCM_CS2CDR_ENFC_CLK_PRED_MASK | + MXC_CCM_CS2CDR_ENFC_CLK_SEL_MASK, + cfg); + + setbits_le32(&imx_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); + setbits_le32(&imx_ccm->CCGR4, + MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_GPMI_IO_MASK | + MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | + MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); +} +#endif + void enable_usboh3_clk(unsigned char enable) { u32 reg; @@ -49,6 +78,67 @@ void enable_usboh3_clk(unsigned char enable) } +#if defined(CONFIG_FEC_MXC) && !defined(CONFIG_MX6SX) +void enable_enet_clk(unsigned char enable) +{ + u32 mask = MXC_CCM_CCGR1_ENET_CLK_ENABLE_MASK; + + if (enable) + setbits_le32(&imx_ccm->CCGR1, mask); + else + clrbits_le32(&imx_ccm->CCGR1, mask); +} +#endif + +#ifdef CONFIG_MXC_UART +void enable_uart_clk(unsigned char enable) +{ + u32 mask = MXC_CCM_CCGR5_UART_MASK | MXC_CCM_CCGR5_UART_SERIAL_MASK; + + if (enable) + setbits_le32(&imx_ccm->CCGR5, mask); + else + clrbits_le32(&imx_ccm->CCGR5, mask); +} +#endif + +#ifdef CONFIG_SPI +/* spi_num can be from 0 - 4 */ +int enable_cspi_clock(unsigned char enable, unsigned spi_num) +{ + u32 mask; + + if (spi_num > 4) + return -EINVAL; + + mask = MXC_CCM_CCGR_CG_MASK << (spi_num * 2); + if (enable) + setbits_le32(&imx_ccm->CCGR1, mask); + else + clrbits_le32(&imx_ccm->CCGR1, mask); + + return 0; +} +#endif + +#ifdef CONFIG_MMC +int enable_usdhc_clk(unsigned char enable, unsigned bus_num) +{ + u32 mask; + + if (bus_num > 3) + return -EINVAL; + + mask = MXC_CCM_CCGR_CG_MASK << (bus_num * 2 + 2); + if (enable) + setbits_le32(&imx_ccm->CCGR6, mask); + else + clrbits_le32(&imx_ccm->CCGR6, mask); + + return 0; +} +#endif + #ifdef CONFIG_SYS_I2C_MXC /* i2c_num can be from 0 - 2 */ int enable_i2c_clk(unsigned char enable, unsigned i2c_num) @@ -509,6 +599,7 @@ int enable_pcie_clock(void) struct anatop_regs *anatop_regs = (struct anatop_regs *)ANATOP_BASE_ADDR; struct mxc_ccm_reg *ccm_regs = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + u32 lvds1_clk_sel; /* * Here be dragons! @@ -518,17 +609,25 @@ int enable_pcie_clock(void) * marked as ANATOP_MISC1 is actually documented in the PMU section * of the datasheet as PMU_MISC1. * - * Switch LVDS clock source to SATA (0xb), disable clock INPUT and - * enable clock OUTPUT. This is important for PCI express link that - * is clocked from the i.MX6. + * Switch LVDS clock source to SATA (0xb) on mx6q/dl or PCI (0xa) on + * mx6sx, disable clock INPUT and enable clock OUTPUT. This is important + * for PCI express link that is clocked from the i.MX6. */ #define ANADIG_ANA_MISC1_LVDSCLK1_IBEN (1 << 12) #define ANADIG_ANA_MISC1_LVDSCLK1_OBEN (1 << 10) #define ANADIG_ANA_MISC1_LVDS1_CLK_SEL_MASK 0x0000001F +#define ANADIG_ANA_MISC1_LVDS1_CLK_SEL_PCIE_REF 0xa +#define ANADIG_ANA_MISC1_LVDS1_CLK_SEL_SATA_REF 0xb + + if (is_cpu_type(MXC_CPU_MX6SX)) + lvds1_clk_sel = ANADIG_ANA_MISC1_LVDS1_CLK_SEL_PCIE_REF; + else + lvds1_clk_sel = ANADIG_ANA_MISC1_LVDS1_CLK_SEL_SATA_REF; + clrsetbits_le32(&anatop_regs->ana_misc1, ANADIG_ANA_MISC1_LVDSCLK1_IBEN | ANADIG_ANA_MISC1_LVDS1_CLK_SEL_MASK, - ANADIG_ANA_MISC1_LVDSCLK1_OBEN | 0xb); + ANADIG_ANA_MISC1_LVDSCLK1_OBEN | lvds1_clk_sel); /* PCIe reference clock sourced from AXI. */ clrbits_le32(&ccm_regs->cbcmr, MXC_CCM_CBCMR_PCIE_AXI_CLK_SEL); diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c index 1ab69f6..7a9b03a 100644 --- a/arch/arm/cpu/armv7/mx6/ddr.c +++ b/arch/arm/cpu/armv7/mx6/ddr.c @@ -184,18 +184,18 @@ void mx6sdl_dram_iocfg(unsigned width, */ #define MR(val, ba, cmd, cs1) \ ((val << 16) | (1 << 15) | (cmd << 4) | (cs1 << 3) | ba) -void mx6_dram_cfg(const struct mx6_ddr_sysinfo *i, - const struct mx6_mmdc_calibration *c, - const struct mx6_ddr3_cfg *m) +void mx6_dram_cfg(const struct mx6_ddr_sysinfo *sysinfo, + const struct mx6_mmdc_calibration *calib, + const struct mx6_ddr3_cfg *ddr3_cfg) { volatile struct mmdc_p_regs *mmdc0; volatile struct mmdc_p_regs *mmdc1; - u32 reg; + u32 val; u8 tcke, tcksrx, tcksre, txpdll, taofpd, taonpd, trrd; u8 todtlon, taxpd, tanpd, tcwl, txp, tfaw, tcl; u8 todt_idle_off = 0x4; /* from DDR3 Script Aid spreadsheet */ u16 trcd, trc, tras, twr, tmrd, trtp, trp, twtr, trfc, txs, txpr; - u16 CS0_END; + u16 cs0_end; u16 tdllk = 0x1ff; /* DLL locking time: 512 cycles (JEDEC DDR3) */ u8 coladdr; int clkper; /* clock period in picoseconds */ @@ -215,13 +215,12 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *i, clock = 400; tcwl = 3; } - clkper = (1000*1000)/clock; /* ps */ + clkper = (1000 * 1000) / clock; /* pico seconds */ todtlon = tcwl; taxpd = tcwl; tanpd = tcwl; - tcwl = tcwl; - switch (m->density) { + switch (ddr3_cfg->density) { case 1: /* 1Gb per chip */ trfc = DIV_ROUND_UP(110000, clkper) - 1; txs = DIV_ROUND_UP(120000, clkper) - 1; @@ -240,80 +239,82 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *i, break; default: /* invalid density */ - printf("invalid chip density\n"); + puts("invalid chip density\n"); hang(); break; } txpr = txs; - switch (m->mem_speed) { + switch (ddr3_cfg->mem_speed) { case 800: - txp = DIV_ROUND_UP(MAX(3*clkper, 7500), clkper) - 1; - tcke = DIV_ROUND_UP(MAX(3*clkper, 7500), clkper) - 1; - if (m->pagesz == 1) { + txp = DIV_ROUND_UP(max(3 * clkper, 7500), clkper) - 1; + tcke = DIV_ROUND_UP(max(3 * clkper, 7500), clkper) - 1; + if (ddr3_cfg->pagesz == 1) { tfaw = DIV_ROUND_UP(40000, clkper) - 1; - trrd = DIV_ROUND_UP(MAX(4*clkper, 10000), clkper) - 1; + trrd = DIV_ROUND_UP(max(4 * clkper, 10000), clkper) - 1; } else { tfaw = DIV_ROUND_UP(50000, clkper) - 1; - trrd = DIV_ROUND_UP(MAX(4*clkper, 10000), clkper) - 1; + trrd = DIV_ROUND_UP(max(4 * clkper, 10000), clkper) - 1; } break; case 1066: - txp = DIV_ROUND_UP(MAX(3*clkper, 7500), clkper) - 1; - tcke = DIV_ROUND_UP(MAX(3*clkper, 5625), clkper) - 1; - if (m->pagesz == 1) { + txp = DIV_ROUND_UP(max(3 * clkper, 7500), clkper) - 1; + tcke = DIV_ROUND_UP(max(3 * clkper, 5625), clkper) - 1; + if (ddr3_cfg->pagesz == 1) { tfaw = DIV_ROUND_UP(37500, clkper) - 1; - trrd = DIV_ROUND_UP(MAX(4*clkper, 7500), clkper) - 1; + trrd = DIV_ROUND_UP(max(4 * clkper, 7500), clkper) - 1; } else { tfaw = DIV_ROUND_UP(50000, clkper) - 1; - trrd = DIV_ROUND_UP(MAX(4*clkper, 10000), clkper) - 1; + trrd = DIV_ROUND_UP(max(4 * clkper, 10000), clkper) - 1; } break; case 1333: - txp = DIV_ROUND_UP(MAX(3*clkper, 6000), clkper) - 1; - tcke = DIV_ROUND_UP(MAX(3*clkper, 5625), clkper) - 1; - if (m->pagesz == 1) { + txp = DIV_ROUND_UP(max(3 * clkper, 6000), clkper) - 1; + tcke = DIV_ROUND_UP(max(3 * clkper, 5625), clkper) - 1; + if (ddr3_cfg->pagesz == 1) { tfaw = DIV_ROUND_UP(30000, clkper) - 1; - trrd = DIV_ROUND_UP(MAX(4*clkper, 6000), clkper) - 1; + trrd = DIV_ROUND_UP(max(4 * clkper, 6000), clkper) - 1; } else { tfaw = DIV_ROUND_UP(45000, clkper) - 1; - trrd = DIV_ROUND_UP(MAX(4*clkper, 7500), clkper) - 1; + trrd = DIV_ROUND_UP(max(4 * clkper, 7500), clkper) - 1; } break; case 1600: - txp = DIV_ROUND_UP(MAX(3*clkper, 6000), clkper) - 1; - tcke = DIV_ROUND_UP(MAX(3*clkper, 5000), clkper) - 1; - if (m->pagesz == 1) { + txp = DIV_ROUND_UP(max(3 * clkper, 6000), clkper) - 1; + tcke = DIV_ROUND_UP(max(3 * clkper, 5000), clkper) - 1; + if (ddr3_cfg->pagesz == 1) { tfaw = DIV_ROUND_UP(30000, clkper) - 1; - trrd = DIV_ROUND_UP(MAX(4*clkper, 6000), clkper) - 1; + trrd = DIV_ROUND_UP(max(4 * clkper, 6000), clkper) - 1; } else { tfaw = DIV_ROUND_UP(40000, clkper) - 1; - trrd = DIV_ROUND_UP(MAX(4*clkper, 7500), clkper) - 1; + trrd = DIV_ROUND_UP(max(4 * clkper, 7500), clkper) - 1; } break; default: - printf("invalid memory speed\n"); + puts("invalid memory speed\n"); hang(); break; } - txpdll = DIV_ROUND_UP(MAX(10*clkper, 24000), clkper) - 1; - tcl = DIV_ROUND_UP(m->trcd, clkper/10) - 3; - tcksre = DIV_ROUND_UP(MAX(5*clkper, 10000), clkper); - tcksrx = tcksre; + txpdll = DIV_ROUND_UP(max(10 * clkper, 24000), clkper) - 1; + tcksre = DIV_ROUND_UP(max(5 * clkper, 10000), clkper); taonpd = DIV_ROUND_UP(2000, clkper) - 1; + tcksrx = tcksre; taofpd = taonpd; - trp = DIV_ROUND_UP(m->trcd, clkper/10) - 1; + twr = DIV_ROUND_UP(15000, clkper) - 1; + tmrd = DIV_ROUND_UP(max(12 * clkper, 15000), clkper) - 1; + trc = DIV_ROUND_UP(ddr3_cfg->trcmin, clkper / 10) - 1; + tras = DIV_ROUND_UP(ddr3_cfg->trasmin, clkper / 10) - 1; + tcl = DIV_ROUND_UP(ddr3_cfg->trcd, clkper / 10) - 3; + trp = DIV_ROUND_UP(ddr3_cfg->trcd, clkper / 10) - 1; + twtr = ROUND(max(4 * clkper, 7500) / clkper, 1) - 1; trcd = trp; - trc = DIV_ROUND_UP(m->trcmin, clkper/10) - 1; - tras = DIV_ROUND_UP(m->trasmin, clkper/10) - 1; - twr = DIV_ROUND_UP(15000, clkper) - 1; - tmrd = DIV_ROUND_UP(MAX(12*clkper, 15000), clkper) - 1; - twtr = ROUND(MAX(4*clkper, 7500)/clkper, 1) - 1; trtp = twtr; - CS0_END = ((4*i->cs_density) <= 120) ? (4*i->cs_density)+7 : 127; - debug("density:%d Gb (%d Gb per chip)\n", i->cs_density, m->density); + cs0_end = 4 * sysinfo->cs_density - 1; + + debug("density:%d Gb (%d Gb per chip)\n", + sysinfo->cs_density, ddr3_cfg->density); debug("clock: %dMHz (%d ps)\n", clock, clkper); - debug("memspd:%d\n", m->mem_speed); + debug("memspd:%d\n", ddr3_cfg->mem_speed); debug("tcke=%d\n", tcke); debug("tcksrx=%d\n", tcksrx); debug("tcksre=%d\n", tcksre); @@ -340,11 +341,11 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *i, debug("twtr=%d\n", twtr); debug("trrd=%d\n", trrd); debug("txpr=%d\n", txpr); - debug("CS0_END=%d\n", CS0_END); - debug("ncs=%d\n", i->ncs); - debug("Rtt_wr=%d\n", i->rtt_wr); - debug("Rtt_nom=%d\n", i->rtt_nom); - debug("SRT=%d\n", m->SRT); + debug("cs0_end=%d\n", cs0_end); + debug("ncs=%d\n", sysinfo->ncs); + debug("Rtt_wr=%d\n", sysinfo->rtt_wr); + debug("Rtt_nom=%d\n", sysinfo->rtt_nom); + debug("SRT=%d\n", ddr3_cfg->SRT); debug("tcl=%d\n", tcl); debug("twr=%d\n", twr); @@ -354,142 +355,136 @@ void mx6_dram_cfg(const struct mx6_ddr_sysinfo *i, * see: * appnote, ddr3 spreadsheet */ - mmdc0->mpwldectrl0 = c->p0_mpwldectrl0; - mmdc0->mpwldectrl1 = c->p0_mpwldectrl1; - mmdc0->mpdgctrl0 = c->p0_mpdgctrl0; - mmdc0->mpdgctrl1 = c->p0_mpdgctrl1; - mmdc0->mprddlctl = c->p0_mprddlctl; - mmdc0->mpwrdlctl = c->p0_mpwrdlctl; - if (i->dsize > 1) { - mmdc1->mpwldectrl0 = c->p1_mpwldectrl0; - mmdc1->mpwldectrl1 = c->p1_mpwldectrl1; - mmdc1->mpdgctrl0 = c->p1_mpdgctrl0; - mmdc1->mpdgctrl1 = c->p1_mpdgctrl1; - mmdc1->mprddlctl = c->p1_mprddlctl; - mmdc1->mpwrdlctl = c->p1_mpwrdlctl; + mmdc0->mpwldectrl0 = calib->p0_mpwldectrl0; + mmdc0->mpwldectrl1 = calib->p0_mpwldectrl1; + mmdc0->mpdgctrl0 = calib->p0_mpdgctrl0; + mmdc0->mpdgctrl1 = calib->p0_mpdgctrl1; + mmdc0->mprddlctl = calib->p0_mprddlctl; + mmdc0->mpwrdlctl = calib->p0_mpwrdlctl; + if (sysinfo->dsize > 1) { + mmdc1->mpwldectrl0 = calib->p1_mpwldectrl0; + mmdc1->mpwldectrl1 = calib->p1_mpwldectrl1; + mmdc1->mpdgctrl0 = calib->p1_mpdgctrl0; + mmdc1->mpdgctrl1 = calib->p1_mpdgctrl1; + mmdc1->mprddlctl = calib->p1_mprddlctl; + mmdc1->mpwrdlctl = calib->p1_mpwrdlctl; } /* Read data DQ Byte0-3 delay */ - mmdc0->mprddqby0dl = (u32)0x33333333; - mmdc0->mprddqby1dl = (u32)0x33333333; - if (i->dsize > 0) { - mmdc0->mprddqby2dl = (u32)0x33333333; - mmdc0->mprddqby3dl = (u32)0x33333333; + mmdc0->mprddqby0dl = 0x33333333; + mmdc0->mprddqby1dl = 0x33333333; + if (sysinfo->dsize > 0) { + mmdc0->mprddqby2dl = 0x33333333; + mmdc0->mprddqby3dl = 0x33333333; } - if (i->dsize > 1) { - mmdc1->mprddqby0dl = (u32)0x33333333; - mmdc1->mprddqby1dl = (u32)0x33333333; - mmdc1->mprddqby2dl = (u32)0x33333333; - mmdc1->mprddqby3dl = (u32)0x33333333; + + if (sysinfo->dsize > 1) { + mmdc1->mprddqby0dl = 0x33333333; + mmdc1->mprddqby1dl = 0x33333333; + mmdc1->mprddqby2dl = 0x33333333; + mmdc1->mprddqby3dl = 0x33333333; } /* MMDC Termination: rtt_nom:2 RZQ/2(120ohm), rtt_nom:1 RZQ/4(60ohm) */ - reg = (i->rtt_nom == 2) ? 0x00011117 : 0x00022227; - mmdc0->mpodtctrl = reg; - if (i->dsize > 1) - mmdc1->mpodtctrl = reg; + val = (sysinfo->rtt_nom == 2) ? 0x00011117 : 0x00022227; + mmdc0->mpodtctrl = val; + if (sysinfo->dsize > 1) + mmdc1->mpodtctrl = val; /* complete calibration */ - reg = (1 << 11); /* Force measurement on delay-lines */ - mmdc0->mpmur0 = reg; - if (i->dsize > 1) - mmdc1->mpmur0 = reg; + val = (1 << 11); /* Force measurement on delay-lines */ + mmdc0->mpmur0 = val; + if (sysinfo->dsize > 1) + mmdc1->mpmur0 = val; /* Step 1: configuration request */ mmdc0->mdscr = (u32)(1 << 15); /* config request */ /* Step 2: Timing configuration */ - reg = (trfc << 24) | (txs << 16) | (txp << 13) | (txpdll << 9) | - (tfaw << 4) | tcl; - mmdc0->mdcfg0 = reg; - reg = (trcd << 29) | (trp << 26) | (trc << 21) | (tras << 16) | - (1 << 15) | /* trpa */ - (twr << 9) | (tmrd << 5) | tcwl; - mmdc0->mdcfg1 = reg; - reg = (tdllk << 16) | (trtp << 6) | (twtr << 3) | trrd; - mmdc0->mdcfg2 = reg; - reg = (taofpd << 27) | (taonpd << 24) | (tanpd << 20) | (taxpd << 16) | - (todtlon << 12) | (todt_idle_off << 4); - mmdc0->mdotc = reg; - mmdc0->mdasp = CS0_END; /* CS addressing */ + mmdc0->mdcfg0 = (trfc << 24) | (txs << 16) | (txp << 13) | + (txpdll << 9) | (tfaw << 4) | tcl; + mmdc0->mdcfg1 = (trcd << 29) | (trp << 26) | (trc << 21) | + (tras << 16) | (1 << 15) /* trpa */ | + (twr << 9) | (tmrd << 5) | tcwl; + mmdc0->mdcfg2 = (tdllk << 16) | (trtp << 6) | (twtr << 3) | trrd; + mmdc0->mdotc = (taofpd << 27) | (taonpd << 24) | (tanpd << 20) | + (taxpd << 16) | (todtlon << 12) | (todt_idle_off << 4); + mmdc0->mdasp = cs0_end; /* CS addressing */ /* Step 3: Configure DDR type */ - reg = (i->cs1_mirror << 19) | (i->walat << 16) | (i->bi_on << 12) | - (i->mif3_mode << 9) | (i->ralat << 6); - mmdc0->mdmisc = reg; + mmdc0->mdmisc = (sysinfo->cs1_mirror << 19) | (sysinfo->walat << 16) | + (sysinfo->bi_on << 12) | (sysinfo->mif3_mode << 9) | + (sysinfo->ralat << 6); /* Step 4: Configure delay while leaving reset */ - reg = (txpr << 16) | (i->sde_to_rst << 8) | (i->rst_to_cke << 0); - mmdc0->mdor = reg; + mmdc0->mdor = (txpr << 16) | (sysinfo->sde_to_rst << 8) | + (sysinfo->rst_to_cke << 0); /* Step 5: Configure DDR physical parameters (density and burst len) */ - coladdr = m->coladdr; - if (m->coladdr == 8) /* 8-bit COL is 0x3 */ + coladdr = ddr3_cfg->coladdr; + if (ddr3_cfg->coladdr == 8) /* 8-bit COL is 0x3 */ coladdr += 4; - else if (m->coladdr == 12) /* 12-bit COL is 0x4 */ + else if (ddr3_cfg->coladdr == 12) /* 12-bit COL is 0x4 */ coladdr += 1; - reg = (m->rowaddr - 11) << 24 | /* ROW */ - (coladdr - 9) << 20 | /* COL */ - (1 << 19) | /* Burst Length = 8 for DDR3 */ - (i->dsize << 16); /* DDR data bus size */ - mmdc0->mdctl = reg; + mmdc0->mdctl = (ddr3_cfg->rowaddr - 11) << 24 | /* ROW */ + (coladdr - 9) << 20 | /* COL */ + (1 << 19) | /* Burst Length = 8 for DDR3 */ + (sysinfo->dsize << 16); /* DDR data bus size */ /* Step 6: Perform ZQ calibration */ - reg = (u32)0xa1390001; /* one-time HW ZQ calib */ - mmdc0->mpzqhwctrl = reg; - if (i->dsize > 1) - mmdc1->mpzqhwctrl = reg; + val = 0xa1390001; /* one-time HW ZQ calib */ + mmdc0->mpzqhwctrl = val; + if (sysinfo->dsize > 1) + mmdc1->mpzqhwctrl = val; /* Step 7: Enable MMDC with desired chip select */ - reg = mmdc0->mdctl | - (1 << 31) | /* SDE_0 for CS0 */ - ((i->ncs == 2) ? 1 : 0) << 30; /* SDE_1 for CS1 */ - mmdc0->mdctl = reg; + mmdc0->mdctl |= (1 << 31) | /* SDE_0 for CS0 */ + ((sysinfo->ncs == 2) ? 1 : 0) << 30; /* SDE_1 for CS1 */ /* Step 8: Write Mode Registers to Init DDR3 devices */ - for (cs = 0; cs < i->ncs; cs++) { + for (cs = 0; cs < sysinfo->ncs; cs++) { /* MR2 */ - reg = (i->rtt_wr & 3) << 9 | (m->SRT & 1) << 7 | + val = (sysinfo->rtt_wr & 3) << 9 | (ddr3_cfg->SRT & 1) << 7 | ((tcwl - 3) & 3) << 3; - mmdc0->mdscr = (u32)MR(reg, 2, 3, cs); + mmdc0->mdscr = MR(val, 2, 3, cs); /* MR3 */ - mmdc0->mdscr = (u32)MR(0, 3, 3, cs); + mmdc0->mdscr = MR(0, 3, 3, cs); /* MR1 */ - reg = ((i->rtt_nom & 1) ? 1 : 0) << 2 | - ((i->rtt_nom & 2) ? 1 : 0) << 6; - mmdc0->mdscr = (u32)MR(reg, 1, 3, cs); - reg = ((tcl - 1) << 4) | /* CAS */ + val = ((sysinfo->rtt_nom & 1) ? 1 : 0) << 2 | + ((sysinfo->rtt_nom & 2) ? 1 : 0) << 6; + mmdc0->mdscr = MR(val, 1, 3, cs); + /* MR0 */ + val = ((tcl - 1) << 4) | /* CAS */ (1 << 8) | /* DLL Reset */ ((twr - 3) << 9); /* Write Recovery */ - /* MR0 */ - mmdc0->mdscr = (u32)MR(reg, 0, 3, cs); + mmdc0->mdscr = MR(val, 0, 3, cs); /* ZQ calibration */ - reg = (1 << 10); - mmdc0->mdscr = (u32)MR(reg, 0, 4, cs); + val = (1 << 10); + mmdc0->mdscr = MR(val, 0, 4, cs); } /* Step 10: Power down control and self-refresh */ - reg = (tcke & 0x7) << 16 | - 5 << 12 | /* PWDT_1: 256 cycles */ - 5 << 8 | /* PWDT_0: 256 cycles */ - 1 << 6 | /* BOTH_CS_PD */ - (tcksrx & 0x7) << 3 | - (tcksre & 0x7); - mmdc0->mdpdc = reg; - mmdc0->mapsr = (u32)0x00011006; /* ADOPT power down enabled */ + mmdc0->mdpdc = (tcke & 0x7) << 16 | + 5 << 12 | /* PWDT_1: 256 cycles */ + 5 << 8 | /* PWDT_0: 256 cycles */ + 1 << 7 | /* SLOW_PD */ + 1 << 6 | /* BOTH_CS_PD */ + (tcksrx & 0x7) << 3 | + (tcksre & 0x7); + mmdc0->mapsr = 0x00001006; /* ADOPT power down enabled */ /* Step 11: Configure ZQ calibration: one-time and periodic 1ms */ - mmdc0->mpzqhwctrl = (u32)0xa1390003; - if (i->dsize > 1) - mmdc1->mpzqhwctrl = (u32)0xa1390003; + val = 0xa1390003; + mmdc0->mpzqhwctrl = val; + if (sysinfo->dsize > 1) + mmdc1->mpzqhwctrl = val; /* Step 12: Configure and activate periodic refresh */ - reg = (1 << 14) | /* REF_SEL: Periodic refresh cycles of 32kHz */ - (7 << 11); /* REFR: Refresh Rate - 8 refreshes */ - mmdc0->mdref = reg; + mmdc0->mdref = (1 << 14) | /* REF_SEL: Periodic refresh cycle: 32kHz */ + (7 << 11); /* REFR: Refresh Rate - 8 refreshes */ /* Step 13: Deassert config request - init complete */ - mmdc0->mdscr = (u32)0x00000000; + mmdc0->mdscr = 0x00000000; /* wait for auto-ZQ calibration to complete */ mdelay(1); diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index ac84a1f..acf66e3 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -20,6 +20,7 @@ #include #include #include +#include enum ldo_reg { LDO_ARM, @@ -92,7 +93,7 @@ void init_aips(void) aips1 = (struct aipstz_regs *)AIPS1_BASE_ADDR; aips2 = (struct aipstz_regs *)AIPS2_BASE_ADDR; #ifdef CONFIG_MX6SX - aips3 = (struct aipstz_regs *)AIPS3_BASE_ADDR; + aips3 = (struct aipstz_regs *)AIPS3_CONFIG_BASE_ADDR; #endif /* @@ -280,7 +281,7 @@ void enable_caches(void) } #endif -#if defined(CONFIG_FEC_MXC) +#if defined(CONFIG_FEC_MXC) || defined(CONFIG_FEC_MAC_FUSE) void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) { struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; @@ -293,6 +294,8 @@ void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) mac[1] = value ; value = readl(&fuse->mac_addr_low); + if ((dev_id > 0) && value) + value += dev_id; mac[2] = value >> 24 ; mac[3] = value >> 16 ; mac[4] = value >> 8 ; @@ -324,10 +327,10 @@ const struct boot_mode soc_boot_modes[] = { /* reserved value should start rom usb */ {"usb", MAKE_CFGVAL(0x01, 0x00, 0x00, 0x00)}, {"sata", MAKE_CFGVAL(0x20, 0x00, 0x00, 0x00)}, - {"escpi1:0", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x08)}, - {"escpi1:1", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x18)}, - {"escpi1:2", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x28)}, - {"escpi1:3", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x38)}, + {"ecspi1:0", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x08)}, + {"ecspi1:1", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x18)}, + {"ecspi1:2", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x28)}, + {"ecspi1:3", MAKE_CFGVAL(0x30, 0x00, 0x00, 0x38)}, /* 4 bit bus width */ {"esdhc1", MAKE_CFGVAL(0x40, 0x20, 0x00, 0x00)}, {"esdhc2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, @@ -430,6 +433,9 @@ void v7_outer_cache_enable(void) } #endif + /* Must disable the L2 before changing the latency parameters */ + clrbits_le32(&pl310->pl310_ctrl, L2X0_CTRL_EN); + writel(0x132, &pl310->pl310_tag_latency_ctrl); writel(0x132, &pl310->pl310_data_latency_ctrl); diff --git a/arch/arm/cpu/armv7/omap3/Kconfig b/arch/arm/cpu/armv7/omap3/Kconfig index 6578f0c..6fae1e5 100644 --- a/arch/arm/cpu/armv7/omap3/Kconfig +++ b/arch/arm/cpu/armv7/omap3/Kconfig @@ -75,11 +75,9 @@ config TARGET_TWISTER endchoice config SYS_CPU - string default "armv7" config SYS_SOC - string default "omap3" source "board/logicpd/am3517evm/Kconfig" diff --git a/arch/arm/cpu/armv7/omap4/Kconfig b/arch/arm/cpu/armv7/omap4/Kconfig index 20d2c11..e270895 100644 --- a/arch/arm/cpu/armv7/omap4/Kconfig +++ b/arch/arm/cpu/armv7/omap4/Kconfig @@ -15,11 +15,9 @@ config TARGET_OMAP4_SDP4430 endchoice config SYS_CPU - string default "armv7" config SYS_SOC - string default "omap4" source "board/gumstix/duovero/Kconfig" diff --git a/arch/arm/cpu/armv7/omap5/Kconfig b/arch/arm/cpu/armv7/omap5/Kconfig index be80393..2ccf5b9 100644 --- a/arch/arm/cpu/armv7/omap5/Kconfig +++ b/arch/arm/cpu/armv7/omap5/Kconfig @@ -15,11 +15,9 @@ config TARGET_DRA7XX_EVM endchoice config SYS_CPU - string default "armv7" config SYS_SOC - string default "omap5" source "board/compulab/cm_t54/Kconfig" diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index ed89f85..0257383 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -227,6 +227,16 @@ static const struct dpll_params usb_dpll_params_1920mhz[NUM_SYS_CLKS] = { {400, 15, 2, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 38.4 MHz */ }; +static const struct dpll_params ddr_dpll_params_2664mhz[NUM_SYS_CLKS] = { + {111, 0, 2, 1, 8, -1, -1, -1, -1, -1, -1, -1}, /* 12 MHz */ + {333, 4, 2, 1, 8, -1, -1, -1, -1, -1, -1, -1}, /* 20 MHz */ + {555, 6, 2, 1, 8, -1, -1, -1, -1, -1, -1, -1}, /* 16.8 MHz */ + {555, 7, 2, 1, 8, -1, -1, -1, -1, -1, -1, -1}, /* 19.2 MHz */ + {666, 12, 2, 1, 8, -1, -1, -1, -1, -1, -1, -1}, /* 26 MHz */ + {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 27 MHz */ + {555, 15, 2, 1, 8, -1, -1, -1, -1, -1, -1, -1}, /* 38.4 MHz */ +}; + static const struct dpll_params ddr_dpll_params_2128mhz[NUM_SYS_CLKS] = { {266, 2, 2, 1, 8, -1, -1, -1, -1, -1, -1, -1}, /* 12 MHz */ {266, 4, 2, 1, 8, -1, -1, -1, -1, -1, -1, -1}, /* 20 MHz */ @@ -286,6 +296,17 @@ struct dplls dra7xx_dplls = { .gmac = gmac_dpll_params_2000mhz, }; +struct dplls dra72x_dplls = { + .mpu = mpu_dpll_params_1ghz, + .core = core_dpll_params_2128mhz_dra7xx, + .per = per_dpll_params_768mhz_dra7xx, + .abe = abe_dpll_params_sysclk2_361267khz, + .iva = iva_dpll_params_2330mhz_dra7xx, + .usb = usb_dpll_params_1920mhz, + .ddr = ddr_dpll_params_2664mhz, + .gmac = gmac_dpll_params_2000mhz, +}; + struct pmic_data palmas = { .base_offset = PALMAS_SMPS_BASE_VOLT_UV, .step = 10000, /* 10 mV represented in uV */ @@ -560,6 +581,18 @@ const struct ctrl_ioregs ioregs_dra7xx_es1 = { .ctrl_ddr_ctrl_ext_0 = 0xA2000000, }; +const struct ctrl_ioregs ioregs_dra72x_es1 = { + .ctrl_ddrch = 0x40404040, + .ctrl_lpddr2ch = 0x40404040, + .ctrl_ddr3ch = 0x60606080, + .ctrl_ddrio_0 = 0xA2084210, + .ctrl_ddrio_1 = 0x84210840, + .ctrl_ddrio_2 = 0x84210000, + .ctrl_emif_sdram_config_ext = 0x0001C1A7, + .ctrl_emif_sdram_config_ext_final = 0x0001C1A7, + .ctrl_ddr_ctrl_ext_0 = 0xA2000000, +}; + void hw_data_init(void) { u32 omap_rev = omap_revision(); @@ -592,7 +625,7 @@ void hw_data_init(void) case DRA722_ES1_0: *prcm = &dra7xx_prcm; - *dplls_data = &dra7xx_dplls; + *dplls_data = &dra72x_dplls; *omap_vcores = &dra722_volts; *ctrl = &dra7xx_ctrl; break; @@ -619,9 +652,11 @@ void get_ioregs(const struct ctrl_ioregs **regs) break; case DRA752_ES1_0: case DRA752_ES1_1: - case DRA722_ES1_0: *regs = &ioregs_dra7xx_es1; break; + case DRA722_ES1_0: + *regs = &ioregs_dra72x_es1; + break; default: printf("\n INVALID OMAP REVISION "); diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c index 9105121..065199b 100644 --- a/arch/arm/cpu/armv7/omap5/sdram.c +++ b/arch/arm/cpu/armv7/omap5/sdram.c @@ -185,6 +185,30 @@ const struct emif_regs emif_2_regs_ddr3_532_mhz_1cs_dra_es1 = { .emif_rd_wr_exec_thresh = 0x00000305 }; +const struct emif_regs emif_1_regs_ddr3_666_mhz_1cs_dra_es1 = { + .sdram_config_init = 0x61851AB2, + .sdram_config = 0x61851AB2, + .sdram_config2 = 0x08000000, + .ref_ctrl = 0x00001035, + .sdram_tim1 = 0xCCCF36B3, + .sdram_tim2 = 0x308F7FDA, + .sdram_tim3 = 0x027F88A8, + .read_idle_ctrl = 0x00050000, + .zq_config = 0x0007190B, + .temp_alert_config = 0x00000000, + .emif_ddr_phy_ctlr_1_init = 0x0024400A, + .emif_ddr_phy_ctlr_1 = 0x0024400A, + .emif_ddr_ext_phy_ctrl_1 = 0x10040100, + .emif_ddr_ext_phy_ctrl_2 = 0x00A400A4, + .emif_ddr_ext_phy_ctrl_3 = 0x00A900A9, + .emif_ddr_ext_phy_ctrl_4 = 0x00B000B0, + .emif_ddr_ext_phy_ctrl_5 = 0x00B000B0, + .emif_rd_wr_lvl_rmp_win = 0x00000000, + .emif_rd_wr_lvl_rmp_ctl = 0x00000000, + .emif_rd_wr_lvl_ctl = 0x00000000, + .emif_rd_wr_exec_thresh = 0x00000305 +}; + const struct dmm_lisa_map_regs lisa_map_4G_x_2_x_2 = { .dmm_lisa_map_0 = 0x0, .dmm_lisa_map_1 = 0x0, @@ -267,6 +291,8 @@ static void emif_get_reg_dump_sdp(u32 emif_nr, const struct emif_regs **regs) } break; case DRA722_ES1_0: + *regs = &emif_1_regs_ddr3_666_mhz_1cs_dra_es1; + break; default: *regs = &emif_1_regs_ddr3_532_mhz_1cs_dra_es1; } @@ -450,6 +476,35 @@ dra_ddr3_ext_phy_ctrl_const_base_es1_emif2[] = { 0x0 }; +const u32 +dra_ddr3_ext_phy_ctrl_const_base_666MHz[] = { + 0x00A400A4, + 0x00390039, + 0x00320032, + 0x00320032, + 0x00320032, + 0x00440044, + 0x00550055, + 0x00550055, + 0x00550055, + 0x00550055, + 0x007F007F, + 0x004D004D, + 0x00430043, + 0x00560056, + 0x00540054, + 0x00600060, + 0x0, + 0x00600020, + 0x40010080, + 0x08102040, + 0x0, + 0x0, + 0x0, + 0x0, + 0x0 +}; + const struct lpddr2_mr_regs mr_regs = { .mr1 = MR1_BL_8_BT_SEQ_WRAP_EN_NWR_8, .mr2 = 0x6, @@ -478,7 +533,6 @@ static void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr, break; case DRA752_ES1_0: case DRA752_ES1_1: - case DRA722_ES1_0: if (emif_nr == 1) { *regs = dra_ddr3_ext_phy_ctrl_const_base_es1_emif1; *size = @@ -489,6 +543,10 @@ static void emif_get_ext_phy_ctrl_const_regs(u32 emif_nr, ARRAY_SIZE(dra_ddr3_ext_phy_ctrl_const_base_es1_emif2); } break; + case DRA722_ES1_0: + *regs = dra_ddr3_ext_phy_ctrl_const_base_666MHz; + *size = ARRAY_SIZE(dra_ddr3_ext_phy_ctrl_const_base_666MHz); + break; default: *regs = ddr3_ext_phy_ctrl_const_base_es2; *size = ARRAY_SIZE(ddr3_ext_phy_ctrl_const_base_es2); diff --git a/arch/arm/cpu/armv7/rmobile/Kconfig b/arch/arm/cpu/armv7/rmobile/Kconfig index 55c620a..6c2bb22 100644 --- a/arch/arm/cpu/armv7/rmobile/Kconfig +++ b/arch/arm/cpu/armv7/rmobile/Kconfig @@ -21,11 +21,9 @@ config TARGET_ALT endchoice config SYS_CPU - string default "armv7" config SYS_SOC - string default "rmobile" source "board/atmark-techno/armadillo-800eva/Kconfig" diff --git a/arch/arm/cpu/armv7/tegra-common/Kconfig b/arch/arm/cpu/armv7/tegra-common/Kconfig index 8e2153b..bcae2d6 100644 --- a/arch/arm/cpu/armv7/tegra-common/Kconfig +++ b/arch/arm/cpu/armv7/tegra-common/Kconfig @@ -18,7 +18,6 @@ config TEGRA124 endchoice config SYS_CPU - string default "arm720t" if SPL_BUILD default "armv7" if !SPL_BUILD diff --git a/arch/arm/cpu/armv7/tegra114/Kconfig b/arch/arm/cpu/armv7/tegra114/Kconfig index 33a22da..31012bc 100644 --- a/arch/arm/cpu/armv7/tegra114/Kconfig +++ b/arch/arm/cpu/armv7/tegra114/Kconfig @@ -9,7 +9,6 @@ config TARGET_DALMORE endchoice config SYS_SOC - string default "tegra114" source "board/nvidia/dalmore/Kconfig" diff --git a/arch/arm/cpu/armv7/tegra124/Kconfig b/arch/arm/cpu/armv7/tegra124/Kconfig index 753f511..6a1c83a 100644 --- a/arch/arm/cpu/armv7/tegra124/Kconfig +++ b/arch/arm/cpu/armv7/tegra124/Kconfig @@ -12,7 +12,6 @@ config TARGET_VENICE2 endchoice config SYS_SOC - string default "tegra124" source "board/nvidia/jetson-tk1/Kconfig" diff --git a/arch/arm/cpu/armv7/tegra20/Kconfig b/arch/arm/cpu/armv7/tegra20/Kconfig index e2e0890..a354e2a 100644 --- a/arch/arm/cpu/armv7/tegra20/Kconfig +++ b/arch/arm/cpu/armv7/tegra20/Kconfig @@ -36,7 +36,6 @@ config TARGET_COLIBRI_T20_IRIS endchoice config SYS_SOC - string default "tegra20" source "board/nvidia/harmony/Kconfig" diff --git a/arch/arm/cpu/armv7/tegra30/Kconfig b/arch/arm/cpu/armv7/tegra30/Kconfig index 694e1cd..54aec4e 100644 --- a/arch/arm/cpu/armv7/tegra30/Kconfig +++ b/arch/arm/cpu/armv7/tegra30/Kconfig @@ -18,7 +18,6 @@ config TARGET_TEC_NG endchoice config SYS_SOC - string default "tegra30" source "board/nvidia/beaver/Kconfig" diff --git a/arch/arm/cpu/armv7/zynq/Kconfig b/arch/arm/cpu/armv7/zynq/Kconfig index 6b88f18..d6655a9 100644 --- a/arch/arm/cpu/armv7/zynq/Kconfig +++ b/arch/arm/cpu/armv7/zynq/Kconfig @@ -18,23 +18,18 @@ config TARGET_ZYNQ_ZC770 endchoice config SYS_CPU - string default "armv7" config SYS_BOARD - string default "zynq" config SYS_VENDOR - string default "xilinx" config SYS_SOC - string default "zynq" config SYS_CONFIG_NAME - string default "zynq_zed" if TARGET_ZYNQ_ZED default "zynq_microzed" if TARGET_ZYNQ_MICROZED default "zynq_zc70x" if TARGET_ZYNQ_ZC70X diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig new file mode 100644 index 0000000..3d1655b --- /dev/null +++ b/arch/arm/cpu/armv8/Kconfig @@ -0,0 +1,6 @@ +if ARM64 + +config SYS_CPU + default "armv8" + +endif diff --git a/arch/arm/cpu/armv8/fsl-lsch3/Makefile b/arch/arm/cpu/armv8/fsl-lsch3/Makefile index 9249537..f920eeb 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/Makefile +++ b/arch/arm/cpu/armv8/fsl-lsch3/Makefile @@ -7,3 +7,5 @@ obj-y += cpu.o obj-y += lowlevel.o obj-y += speed.o +obj-$(CONFIG_MP) += mp.o +obj-$(CONFIG_OF_LIBFDT) += fdt.o diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c index c129d03..47b947f 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.c +++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.c @@ -11,6 +11,7 @@ #include #include #include "cpu.h" +#include "mp.h" #include "speed.h" #include @@ -434,3 +435,15 @@ int cpu_eth_init(bd_t *bis) #endif return error; } + + +int arch_early_init_r(void) +{ + int rv; + rv = fsl_lsch3_wake_seconday_cores(); + + if (rv) + printf("Did not wake secondary cores\n"); + + return 0; +} diff --git a/arch/arm/cpu/armv8/fsl-lsch3/cpu.h b/arch/arm/cpu/armv8/fsl-lsch3/cpu.h index 28544d7..2e3312b 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/cpu.h +++ b/arch/arm/cpu/armv8/fsl-lsch3/cpu.h @@ -5,3 +5,4 @@ */ int fsl_qoriq_core_to_cluster(unsigned int core); +u32 cpu_mask(void); diff --git a/arch/arm/cpu/armv8/fsl-lsch3/fdt.c b/arch/arm/cpu/armv8/fsl-lsch3/fdt.c new file mode 100644 index 0000000..e392eb9 --- /dev/null +++ b/arch/arm/cpu/armv8/fsl-lsch3/fdt.c @@ -0,0 +1,58 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include "mp.h" + +#ifdef CONFIG_MP +void ft_fixup_cpu(void *blob) +{ + int off; + __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr(); + fdt32_t *reg; + int addr_cells; + u64 val; + size_t *boot_code_size = &(__secondary_boot_code_size); + + off = fdt_path_offset(blob, "/cpus"); + if (off < 0) { + puts("couldn't find /cpus node\n"); + return; + } + of_bus_default_count_cells(blob, off, &addr_cells, NULL); + + off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4); + while (off != -FDT_ERR_NOTFOUND) { + reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0); + if (reg) { + val = spin_tbl_addr; + val += id_to_core(of_read_number(reg, addr_cells)) + * SPIN_TABLE_ELEM_SIZE; + val = cpu_to_fdt64(val); + fdt_setprop_string(blob, off, "enable-method", + "spin-table"); + fdt_setprop(blob, off, "cpu-release-addr", + &val, sizeof(val)); + } else { + puts("Warning: found cpu node without reg property\n"); + } + off = fdt_node_offset_by_prop_value(blob, off, "device_type", + "cpu", 4); + } + + fdt_add_mem_rsv(blob, (uintptr_t)&secondary_boot_code, + *boot_code_size); +} +#endif + +void ft_cpu_setup(void *blob, bd_t *bd) +{ +#ifdef CONFIG_MP + ft_fixup_cpu(blob); +#endif +} diff --git a/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S b/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S index ad32b6c..2a88aab 100644 --- a/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S +++ b/arch/arm/cpu/armv8/fsl-lsch3/lowlevel.S @@ -8,7 +8,9 @@ #include #include +#include #include +#include "mp.h" ENTRY(lowlevel_init) mov x29, lr /* Save LR */ @@ -35,31 +37,114 @@ ENTRY(lowlevel_init) #endif #endif - branch_if_master x0, x1, 1f + branch_if_master x0, x1, 2f + ldr x0, =secondary_boot_func + blr x0 +2: + mov lr, x29 /* Restore LR */ + ret +ENDPROC(lowlevel_init) + + /* Keep literals not used by the secondary boot code outside it */ + .ltorg + + /* Using 64 bit alignment since the spin table is accessed as data */ + .align 4 + .global secondary_boot_code + /* Secondary Boot Code starts here */ +secondary_boot_code: + .global __spin_table +__spin_table: + .space CONFIG_MAX_CPUS*SPIN_TABLE_ELEM_SIZE + + .align 2 +ENTRY(secondary_boot_func) /* - * Slave should wait for master clearing spin table. - * This sync prevent salves observing incorrect - * value of spin table and jumping to wrong place. + * MPIDR_EL1 Fields: + * MPIDR[1:0] = AFF0_CPUID <- Core ID (0,1) + * MPIDR[7:2] = AFF0_RES + * MPIDR[15:8] = AFF1_CLUSTERID <- Cluster ID (0,1,2,3) + * MPIDR[23:16] = AFF2_CLUSTERID + * MPIDR[24] = MT + * MPIDR[29:25] = RES0 + * MPIDR[30] = U + * MPIDR[31] = ME + * MPIDR[39:32] = AFF3 + * + * Linear Processor ID (LPID) calculation from MPIDR_EL1: + * (We only use AFF0_CPUID and AFF1_CLUSTERID for now + * until AFF2_CLUSTERID and AFF3 have non-zero values) + * + * LPID = MPIDR[15:8] | MPIDR[1:0] */ -#if defined(CONFIG_GICV2) || defined(CONFIG_GICV3) -#ifdef CONFIG_GICV2 - ldr x0, =GICC_BASE -#endif - bl gic_wait_for_interrupt -#endif - + mrs x0, mpidr_el1 + ubfm x1, x0, #8, #15 + ubfm x2, x0, #0, #1 + orr x10, x2, x1, lsl #2 /* x10 has LPID */ + ubfm x9, x0, #0, #15 /* x9 contains MPIDR[15:0] */ /* - * All processors will enter EL2 and optionally EL1. + * offset of the spin table element for this core from start of spin + * table (each elem is padded to 64 bytes) */ - bl armv8_switch_to_el2 + lsl x1, x10, #6 + ldr x0, =__spin_table + /* physical address of this cpus spin table element */ + add x11, x1, x0 + + str x9, [x11, #16] /* LPID */ + mov x4, #1 + str x4, [x11, #8] /* STATUS */ + dsb sy +#if defined(CONFIG_GICV3) + gic_wait_for_interrupt_m x0 +#elif defined(CONFIG_GICV2) + ldr x0, =GICC_BASE + gic_wait_for_interrupt_m x0, w1 +#endif + + bl secondary_switch_to_el2 #ifdef CONFIG_ARMV8_SWITCH_TO_EL1 - bl armv8_switch_to_el1 + bl secondary_switch_to_el1 #endif - b 2f -1: -2: - mov lr, x29 /* Restore LR */ - ret -ENDPROC(lowlevel_init) +slave_cpu: + wfe + ldr x0, [x11] + cbz x0, slave_cpu +#ifndef CONFIG_ARMV8_SWITCH_TO_EL1 + mrs x1, sctlr_el2 +#else + mrs x1, sctlr_el1 +#endif + tbz x1, #25, cpu_is_le + rev x0, x0 /* BE to LE conversion */ +cpu_is_le: + br x0 /* branch to the given address */ +ENDPROC(secondary_boot_func) + +ENTRY(secondary_switch_to_el2) + switch_el x0, 1f, 0f, 0f +0: ret +1: armv8_switch_to_el2_m x0 +ENDPROC(secondary_switch_to_el2) + +ENTRY(secondary_switch_to_el1) + switch_el x0, 0f, 1f, 0f +0: ret +1: armv8_switch_to_el1_m x0, x1 +ENDPROC(secondary_switch_to_el1) + + /* Ensure that the literals used by the secondary boot code are + * assembled within it (this is required so that we can protect + * this area with a single memreserve region + */ + .ltorg + + /* 64 bit alignment for elements accessed as data */ + .align 4 + .globl __secondary_boot_code_size + .type __secondary_boot_code_size, %object + /* Secondary Boot Code ends here */ +__secondary_boot_code_size: + .quad .-secondary_boot_code diff --git a/arch/arm/cpu/armv8/fsl-lsch3/mp.c b/arch/arm/cpu/armv8/fsl-lsch3/mp.c new file mode 100644 index 0000000..94998bf --- /dev/null +++ b/arch/arm/cpu/armv8/fsl-lsch3/mp.c @@ -0,0 +1,168 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include "mp.h" + +DECLARE_GLOBAL_DATA_PTR; + +void *get_spin_tbl_addr(void) +{ + return &__spin_table; +} + +phys_addr_t determine_mp_bootpg(void) +{ + return (phys_addr_t)&secondary_boot_code; +} + +int fsl_lsch3_wake_seconday_cores(void) +{ + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + struct ccsr_reset __iomem *rst = (void *)(CONFIG_SYS_FSL_RST_ADDR); + u32 cores, cpu_up_mask = 1; + int i, timeout = 10; + u64 *table = get_spin_tbl_addr(); + + cores = cpu_mask(); + /* Clear spin table so that secondary processors + * observe the correct value after waking up from wfe. + */ + memset(table, 0, CONFIG_MAX_CPUS*SPIN_TABLE_ELEM_SIZE); + flush_dcache_range((unsigned long)table, + (unsigned long)table + + (CONFIG_MAX_CPUS*SPIN_TABLE_ELEM_SIZE)); + + printf("Waking secondary cores to start from %lx\n", gd->relocaddr); + out_le32(&gur->bootlocptrh, (u32)(gd->relocaddr >> 32)); + out_le32(&gur->bootlocptrl, (u32)gd->relocaddr); + out_le32(&gur->scratchrw[6], 1); + asm volatile("dsb st" : : : "memory"); + rst->brrl = cores; + asm volatile("dsb st" : : : "memory"); + + /* This is needed as a precautionary measure. + * If some code before this has accidentally released the secondary + * cores then the pre-bootloader code will trap them in a "wfe" unless + * the scratchrw[6] is set. In this case we need a sev here to get these + * cores moving again. + */ + asm volatile("sev"); + + while (timeout--) { + flush_dcache_range((unsigned long)table, (unsigned long)table + + CONFIG_MAX_CPUS * 64); + for (i = 1; i < CONFIG_MAX_CPUS; i++) { + if (table[i * WORDS_PER_SPIN_TABLE_ENTRY + + SPIN_TABLE_ELEM_STATUS_IDX]) + cpu_up_mask |= 1 << i; + } + if (hweight32(cpu_up_mask) == hweight32(cores)) + break; + udelay(10); + } + if (timeout <= 0) { + printf("Not all cores (0x%x) are up (0x%x)\n", + cores, cpu_up_mask); + return 1; + } + printf("All (%d) cores are up.\n", hweight32(cores)); + + return 0; +} + +int is_core_valid(unsigned int core) +{ + return !!((1 << core) & cpu_mask()); +} + +int cpu_reset(int nr) +{ + puts("Feature is not implemented.\n"); + + return 0; +} + +int cpu_disable(int nr) +{ + puts("Feature is not implemented.\n"); + + return 0; +} + +int core_to_pos(int nr) +{ + u32 cores = cpu_mask(); + int i, count = 0; + + if (nr == 0) { + return 0; + } else if (nr >= hweight32(cores)) { + puts("Not a valid core number.\n"); + return -1; + } + + for (i = 1; i < 32; i++) { + if (is_core_valid(i)) { + count++; + if (count == nr) + break; + } + } + + return count; +} + +int cpu_status(int nr) +{ + u64 *table; + int pos; + + if (nr == 0) { + table = (u64 *)get_spin_tbl_addr(); + printf("table base @ 0x%p\n", table); + } else { + pos = core_to_pos(nr); + if (pos < 0) + return -1; + table = (u64 *)get_spin_tbl_addr() + pos * + WORDS_PER_SPIN_TABLE_ENTRY; + printf("table @ 0x%p\n", table); + printf(" addr - 0x%016llx\n", + table[SPIN_TABLE_ELEM_ENTRY_ADDR_IDX]); + printf(" status - 0x%016llx\n", + table[SPIN_TABLE_ELEM_STATUS_IDX]); + printf(" lpid - 0x%016llx\n", + table[SPIN_TABLE_ELEM_LPID_IDX]); + } + + return 0; +} + +int cpu_release(int nr, int argc, char * const argv[]) +{ + u64 boot_addr; + u64 *table = (u64 *)get_spin_tbl_addr(); + int pos; + + pos = core_to_pos(nr); + if (pos <= 0) + return -1; + + table += pos * WORDS_PER_SPIN_TABLE_ENTRY; + boot_addr = simple_strtoull(argv[0], NULL, 16); + table[SPIN_TABLE_ELEM_ENTRY_ADDR_IDX] = boot_addr; + flush_dcache_range((unsigned long)table, + (unsigned long)table + SPIN_TABLE_ELEM_SIZE); + asm volatile("dsb st"); + smp_kick_all_cpus(); /* only those with entry addr set will run */ + + return 0; +} diff --git a/arch/arm/cpu/armv8/fsl-lsch3/mp.h b/arch/arm/cpu/armv8/fsl-lsch3/mp.h new file mode 100644 index 0000000..06ac0bc --- /dev/null +++ b/arch/arm/cpu/armv8/fsl-lsch3/mp.h @@ -0,0 +1,36 @@ +/* + * Copyright 2014, Freescale Semiconductor + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _FSL_CH3_MP_H +#define _FSL_CH3_MP_H + +/* +* Each spin table element is defined as +* struct { +* uint64_t entry_addr; +* uint64_t status; +* uint64_t lpid; +* }; +* we pad this struct to 64 bytes so each entry is in its own cacheline +* the actual spin table is an array of these structures +*/ +#define SPIN_TABLE_ELEM_ENTRY_ADDR_IDX 0 +#define SPIN_TABLE_ELEM_STATUS_IDX 1 +#define SPIN_TABLE_ELEM_LPID_IDX 2 +#define WORDS_PER_SPIN_TABLE_ENTRY 8 /* pad to 64 bytes */ +#define SPIN_TABLE_ELEM_SIZE 64 + +#define id_to_core(x) ((x & 3) | (x >> 6)) +#ifndef __ASSEMBLY__ +extern u64 __spin_table[]; +extern u64 *secondary_boot_code; +extern size_t __secondary_boot_code_size; +int fsl_lsch3_wake_seconday_cores(void); +void *get_spin_tbl_addr(void); +phys_addr_t determine_mp_bootpg(void); +void secondary_boot_func(void); +#endif +#endif /* _FSL_CH3_MP_H */ diff --git a/arch/arm/cpu/armv8/transition.S b/arch/arm/cpu/armv8/transition.S index 38dea5c..ade1cde 100644 --- a/arch/arm/cpu/armv8/transition.S +++ b/arch/arm/cpu/armv8/transition.S @@ -14,70 +14,11 @@ ENTRY(armv8_switch_to_el2) switch_el x0, 1f, 0f, 0f 0: ret -1: - mov x0, #0x5b1 /* Non-secure EL0/EL1 | HVC | 64bit EL2 */ - msr scr_el3, x0 - msr cptr_el3, xzr /* Disable coprocessor traps to EL3 */ - mov x0, #0x33ff - msr cptr_el2, x0 /* Disable coprocessor traps to EL2 */ - - /* Initialize SCTLR_EL2 */ - msr sctlr_el2, xzr - - /* Return to the EL2_SP2 mode from EL3 */ - mov x0, sp - msr sp_el2, x0 /* Migrate SP */ - mrs x0, vbar_el3 - msr vbar_el2, x0 /* Migrate VBAR */ - mov x0, #0x3c9 - msr spsr_el3, x0 /* EL2_SP2 | D | A | I | F */ - msr elr_el3, lr - eret +1: armv8_switch_to_el2_m x0 ENDPROC(armv8_switch_to_el2) ENTRY(armv8_switch_to_el1) switch_el x0, 0f, 1f, 0f 0: ret -1: - /* Initialize Generic Timers */ - mrs x0, cnthctl_el2 - orr x0, x0, #0x3 /* Enable EL1 access to timers */ - msr cnthctl_el2, x0 - msr cntvoff_el2, xzr - mrs x0, cntkctl_el1 - orr x0, x0, #0x3 /* Enable EL0 access to timers */ - msr cntkctl_el1, x0 - - /* Initilize MPID/MPIDR registers */ - mrs x0, midr_el1 - mrs x1, mpidr_el1 - msr vpidr_el2, x0 - msr vmpidr_el2, x1 - - /* Disable coprocessor traps */ - mov x0, #0x33ff - msr cptr_el2, x0 /* Disable coprocessor traps to EL2 */ - msr hstr_el2, xzr /* Disable coprocessor traps to EL2 */ - mov x0, #3 << 20 - msr cpacr_el1, x0 /* Enable FP/SIMD at EL1 */ - - /* Initialize HCR_EL2 */ - mov x0, #(1 << 31) /* 64bit EL1 */ - orr x0, x0, #(1 << 29) /* Disable HVC */ - msr hcr_el2, x0 - - /* SCTLR_EL1 initialization */ - mov x0, #0x0800 - movk x0, #0x30d0, lsl #16 - msr sctlr_el1, x0 - - /* Return to the EL1_SP1 mode from EL2 */ - mov x0, sp - msr sp_el1, x0 /* Migrate SP */ - mrs x0, vbar_el2 - msr vbar_el1, x0 /* Migrate VBAR */ - mov x0, #0x3c5 - msr spsr_el2, x0 /* EL1_SP1 | D | A | I | F */ - msr elr_el2, lr - eret +1: armv8_switch_to_el1_m x0, x1 ENDPROC(armv8_switch_to_el1) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index c46b7be..5f2b946 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1,14 +1,14 @@ dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \ exynos4210-universal_c210.dtb \ exynos4210-trats.dtb \ - exynos4412-trats2.dtb + exynos4412-trats2.dtb \ + exynos4412-odroid.dtb dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \ exynos5250-snow.dtb \ exynos5250-smdk5250.dtb \ exynos5420-smdk5420.dtb \ exynos5420-peach-pit.dtb -dtb-$(CONFIG_MX6) += imx6q-sabreauto.dtb dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ tegra20-medcom-wide.dtb \ tegra20-paz00.dtb \ diff --git a/arch/arm/dts/exynos4412-odroid.dts b/arch/arm/dts/exynos4412-odroid.dts new file mode 100644 index 0000000..24d0bf1 --- /dev/null +++ b/arch/arm/dts/exynos4412-odroid.dts @@ -0,0 +1,70 @@ +/* + * Odroid-U3/X2 board device tree source + * + * Copyright (c) 2014 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; +/include/ "exynos4.dtsi" + +/ { + model = "Odroid based on Exynos4412"; + compatible = "samsung,odroid", "samsung,exynos4412"; + + aliases { + i2c0 = "/i2c@13860000"; + serial0 = "/serial@13800000"; + console = "/serial@13810000"; + mmc2 = "sdhci@12530000"; + mmc4 = "dwmmc@12550000"; + }; + + i2c@13860000 { + samsung,i2c-sda-delay = <100>; + samsung,i2c-slave-addr = <0x10>; + samsung,i2c-max-bus-freq = <100000>; + status = "okay"; + + max77686_pmic@09 { + compatible = "maxim,max77686_pmic"; + interrupts = <7 0>; + reg = <0x09 0 0>; + #clock-cells = <1>; + }; + }; + + serial@13810000 { + status = "okay"; + }; + + sdhci@12510000 { + status = "disabled"; + }; + + sdhci@12520000 { + status = "disabled"; + }; + + sdhci@12530000 { + samsung,bus-width = <4>; + samsung,timing = <1 2 3>; + cd-gpios = <&gpio 0xC2 0>; + }; + + sdhci@12540000 { + status = "disabled"; + }; + + dwmmc@12550000 { + samsung,bus-width = <8>; + samsung,timing = <2 1 0>; + samsung,removable = <0>; + fifoth_val = <0x203f0040>; + bus_hz = <400000000>; + div = <0x3>; + index = <4>; + }; +}; diff --git a/arch/arm/dts/exynos5420-peach-pit.dts b/arch/arm/dts/exynos5420-peach-pit.dts index 8d148af..3ed70a8 100644 --- a/arch/arm/dts/exynos5420-peach-pit.dts +++ b/arch/arm/dts/exynos5420-peach-pit.dts @@ -63,6 +63,11 @@ reg = <0x20>; compatible = "maxim,max98090-codec"; }; + + edp-lvds-bridge@48 { + compatible = "parade,ps8625"; + reg = <0x48>; + }; }; sound@3830000 { @@ -124,4 +129,29 @@ xhci@12400000 { samsung,vbus-gpio = <&gpio 0x41 0>; /* H01 */ }; + + fimd@14400000 { + samsung,vl-freq = <60>; + samsung,vl-col = <1366>; + samsung,vl-row = <768>; + samsung,vl-width = <1366>; + samsung,vl-height = <768>; + + samsung,vl-clkp; + samsung,vl-dp; + samsung,vl-bpix = <4>; + + samsung,vl-hspw = <32>; + samsung,vl-hbpd = <40>; + samsung,vl-hfpd = <40>; + samsung,vl-vspw = <6>; + samsung,vl-vbpd = <10>; + samsung,vl-vfpd = <12>; + samsung,vl-cmd-allow-len = <0xf>; + + samsung,winid = <3>; + samsung,interface-mode = <1>; + samsung,dp-enabled = <1>; + samsung,dual-lcd-enabled = <0>; + }; }; diff --git a/arch/arm/dts/exynos54xx.dtsi b/arch/arm/dts/exynos54xx.dtsi index b9f8e0b..c21d798 100644 --- a/arch/arm/dts/exynos54xx.dtsi +++ b/arch/arm/dts/exynos54xx.dtsi @@ -113,6 +113,16 @@ status = "disabled"; }; + fimdm0_sysmmu@0x14640000 { + compatible = "samsung,sysmmu-v3.3"; + reg = <0x14640000 0x100>; + }; + + fimdm1_sysmmu@0x14680000 { + compatible = "samsung,sysmmu-v3.3"; + reg = <0x14680000 0x100>; + }; + fimd@14400000 { /* sysmmu is not used in U-Boot */ samsung,disable-sysmmu; diff --git a/arch/arm/dts/imx6q-sabreauto.dts b/arch/arm/dts/imx6q-sabreauto.dts deleted file mode 100644 index 7af2a88..0000000 --- a/arch/arm/dts/imx6q-sabreauto.dts +++ /dev/null @@ -1,13 +0,0 @@ -/* - * Copyright 2012 Freescale Semiconductor, Inc. - * Copyright 2011 Linaro Ltd. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/dts-v1/; - -/ { - model = "Freescale i.MX6 Quad SABRE Automotive Board"; - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; -}; diff --git a/arch/arm/dts/tegra114-dalmore.dts b/arch/arm/dts/tegra114-dalmore.dts index 435c01e..81ad212 100644 --- a/arch/arm/dts/tegra114-dalmore.dts +++ b/arch/arm/dts/tegra114-dalmore.dts @@ -6,6 +6,10 @@ model = "NVIDIA Dalmore"; compatible = "nvidia,dalmore", "nvidia,tegra114"; + chosen { + stdout-path = &uartd; + }; + aliases { i2c0 = "/i2c@7000d000"; i2c1 = "/i2c@7000c000"; diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi index 59434e0..88bdc49 100644 --- a/arch/arm/dts/tegra114.dtsi +++ b/arch/arm/dts/tegra114.dtsi @@ -1,3 +1,4 @@ +#include #include #include @@ -116,6 +117,58 @@ status = "disabled"; }; + uarta: serial@70006000 { + compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; + reg = <0x70006000 0x40>; + reg-shift = <2>; + interrupts = ; + clocks = <&tegra_car TEGRA114_CLK_UARTA>; + resets = <&tegra_car 6>; + reset-names = "serial"; + dmas = <&apbdma 8>, <&apbdma 8>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uartb: serial@70006040 { + compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; + reg = <0x70006040 0x40>; + reg-shift = <2>; + interrupts = ; + clocks = <&tegra_car TEGRA114_CLK_UARTB>; + resets = <&tegra_car 7>; + reset-names = "serial"; + dmas = <&apbdma 9>, <&apbdma 9>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uartc: serial@70006200 { + compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; + reg = <0x70006200 0x100>; + reg-shift = <2>; + interrupts = ; + clocks = <&tegra_car TEGRA114_CLK_UARTC>; + resets = <&tegra_car 55>; + reset-names = "serial"; + dmas = <&apbdma 10>, <&apbdma 10>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uartd: serial@70006300 { + compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; + reg = <0x70006300 0x100>; + reg-shift = <2>; + interrupts = ; + clocks = <&tegra_car TEGRA114_CLK_UARTD>; + resets = <&tegra_car 65>; + reset-names = "serial"; + dmas = <&apbdma 19>, <&apbdma 19>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + spi@7000d400 { compatible = "nvidia,tegra114-spi"; reg = <0x7000d400 0x200>; diff --git a/arch/arm/dts/tegra124-jetson-tk1.dts b/arch/arm/dts/tegra124-jetson-tk1.dts index 464287e..ffad116 100644 --- a/arch/arm/dts/tegra124-jetson-tk1.dts +++ b/arch/arm/dts/tegra124-jetson-tk1.dts @@ -6,6 +6,10 @@ model = "NVIDIA Jetson TK1"; compatible = "nvidia,jetson-tk1", "nvidia,tegra124"; + chosen { + stdout-path = &uartd; + }; + aliases { i2c0 = "/i2c@7000d000"; i2c1 = "/i2c@7000c000"; diff --git a/arch/arm/dts/tegra124-venice2.dts b/arch/arm/dts/tegra124-venice2.dts index f003413..f7ccfc5 100644 --- a/arch/arm/dts/tegra124-venice2.dts +++ b/arch/arm/dts/tegra124-venice2.dts @@ -6,6 +6,10 @@ model = "NVIDIA Venice2"; compatible = "nvidia,venice2", "nvidia,tegra124"; + chosen { + stdout-path = &uarta; + }; + aliases { i2c0 = "/i2c@7000d000"; i2c1 = "/i2c@7000c000"; diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi index 4561c5f..3288f28 100644 --- a/arch/arm/dts/tegra124.dtsi +++ b/arch/arm/dts/tegra124.dtsi @@ -1,3 +1,4 @@ +#include #include #include @@ -126,6 +127,71 @@ status = "disabled"; }; + uarta: serial@70006000 { + compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; + reg = <0x70006000 0x40>; + reg-shift = <2>; + interrupts = ; + clocks = <&tegra_car TEGRA124_CLK_UARTA>; + resets = <&tegra_car 6>; + reset-names = "serial"; + dmas = <&apbdma 8>, <&apbdma 8>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uartb: serial@70006040 { + compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; + reg = <0x70006040 0x40>; + reg-shift = <2>; + interrupts = ; + clocks = <&tegra_car TEGRA124_CLK_UARTB>; + resets = <&tegra_car 7>; + reset-names = "serial"; + dmas = <&apbdma 9>, <&apbdma 9>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uartc: serial@70006200 { + compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; + reg = <0x70006200 0x40>; + reg-shift = <2>; + interrupts = ; + clocks = <&tegra_car TEGRA124_CLK_UARTC>; + resets = <&tegra_car 55>; + reset-names = "serial"; + dmas = <&apbdma 10>, <&apbdma 10>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uartd: serial@70006300 { + compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; + reg = <0x70006300 0x40>; + reg-shift = <2>; + interrupts = ; + clocks = <&tegra_car TEGRA124_CLK_UARTD>; + resets = <&tegra_car 65>; + reset-names = "serial"; + dmas = <&apbdma 19>, <&apbdma 19>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uarte: serial@70006400 { + compatible = "nvidia,tegra124-uart", "nvidia,tegra20-uart"; + reg = <0x70006400 0x40>; + reg-shift = <2>; + interrupts = ; + clocks = <&tegra_car TEGRA124_CLK_UARTE>; + resets = <&tegra_car 66>; + reset-names = "serial"; + dmas = <&apbdma 20>, <&apbdma 20>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + spi@7000d400 { compatible = "nvidia,tegra124-spi", "nvidia,tegra114-spi"; reg = <0x7000d400 0x200>; diff --git a/arch/arm/dts/tegra20-colibri_t20_iris.dts b/arch/arm/dts/tegra20-colibri_t20_iris.dts index c0e54af..7cf08f4 100644 --- a/arch/arm/dts/tegra20-colibri_t20_iris.dts +++ b/arch/arm/dts/tegra20-colibri_t20_iris.dts @@ -6,6 +6,10 @@ model = "Toradex Colibri T20"; compatible = "toradex,t20", "nvidia,tegra20"; + chosen { + stdout-path = &uarta; + }; + aliases { usb0 = "/usb@c5008000"; usb1 = "/usb@c5000000"; diff --git a/arch/arm/dts/tegra20-harmony.dts b/arch/arm/dts/tegra20-harmony.dts index b115f87..982a14c 100644 --- a/arch/arm/dts/tegra20-harmony.dts +++ b/arch/arm/dts/tegra20-harmony.dts @@ -6,6 +6,10 @@ model = "NVIDIA Tegra20 Harmony evaluation board"; compatible = "nvidia,harmony", "nvidia,tegra20"; + chosen { + stdout-path = &uartd; + }; + aliases { usb0 = "/usb@c5008000"; usb1 = "/usb@c5004000"; diff --git a/arch/arm/dts/tegra20-medcom-wide.dts b/arch/arm/dts/tegra20-medcom-wide.dts index a9a07f9..be2ed42 100644 --- a/arch/arm/dts/tegra20-medcom-wide.dts +++ b/arch/arm/dts/tegra20-medcom-wide.dts @@ -6,6 +6,10 @@ model = "Avionic Design Medcom-Wide"; compatible = "ad,medcom-wide", "nvidia,tegra20"; + chosen { + stdout-path = &uartd; + }; + aliases { usb0 = "/usb@c5008000"; sdhci0 = "/sdhci@c8000600"; diff --git a/arch/arm/dts/tegra20-paz00.dts b/arch/arm/dts/tegra20-paz00.dts index 780203c..9d735b5 100644 --- a/arch/arm/dts/tegra20-paz00.dts +++ b/arch/arm/dts/tegra20-paz00.dts @@ -6,6 +6,10 @@ model = "Toshiba AC100 / Dynabook AZ"; compatible = "compal,paz00", "nvidia,tegra20"; + chosen { + stdout-path = &uarta; + }; + aliases { usb0 = "/usb@c5008000"; sdhci0 = "/sdhci@c8000600"; diff --git a/arch/arm/dts/tegra20-plutux.dts b/arch/arm/dts/tegra20-plutux.dts index 20016f2..e5562a9 100644 --- a/arch/arm/dts/tegra20-plutux.dts +++ b/arch/arm/dts/tegra20-plutux.dts @@ -6,6 +6,10 @@ model = "Avionic Design Plutux"; compatible = "ad,plutux", "nvidia,tegra20"; + chosen { + stdout-path = &uartd; + }; + aliases { usb0 = "/usb@c5008000"; sdhci0 = "/sdhci@c8000600"; diff --git a/arch/arm/dts/tegra20-seaboard.dts b/arch/arm/dts/tegra20-seaboard.dts index c0e2e1e..43b9911 100644 --- a/arch/arm/dts/tegra20-seaboard.dts +++ b/arch/arm/dts/tegra20-seaboard.dts @@ -10,6 +10,10 @@ bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait"; }; + chosen { + stdout-path = &uartd; + }; + aliases { /* This defines the order of our ports */ usb0 = "/usb@c5008000"; diff --git a/arch/arm/dts/tegra20-tec.dts b/arch/arm/dts/tegra20-tec.dts index 4c1b08d..e99bd44 100644 --- a/arch/arm/dts/tegra20-tec.dts +++ b/arch/arm/dts/tegra20-tec.dts @@ -6,6 +6,10 @@ model = "Avionic Design Tamonten Evaluation Carrier"; compatible = "ad,tec", "nvidia,tegra20"; + chosen { + stdout-path = &uartd; + }; + aliases { usb0 = "/usb@c5008000"; sdhci0 = "/sdhci@c8000600"; diff --git a/arch/arm/dts/tegra20-trimslice.dts b/arch/arm/dts/tegra20-trimslice.dts index ee31476..cee5cfe 100644 --- a/arch/arm/dts/tegra20-trimslice.dts +++ b/arch/arm/dts/tegra20-trimslice.dts @@ -6,6 +6,10 @@ model = "Compulab TrimSlice board"; compatible = "compulab,trimslice", "nvidia,tegra20"; + chosen { + stdout-path = &uarta; + }; + aliases { usb0 = "/usb@c5008000"; usb1 = "/usb@c5000000"; diff --git a/arch/arm/dts/tegra20-ventana.dts b/arch/arm/dts/tegra20-ventana.dts index 1a526ba..6812203 100644 --- a/arch/arm/dts/tegra20-ventana.dts +++ b/arch/arm/dts/tegra20-ventana.dts @@ -6,6 +6,10 @@ model = "NVIDIA Tegra20 Ventana evaluation board"; compatible = "nvidia,ventana", "nvidia,tegra20"; + chosen { + stdout-path = &uartd; + }; + aliases { usb0 = "/usb@c5008000"; sdhci0 = "/sdhci@c8000600"; diff --git a/arch/arm/dts/tegra20-whistler.dts b/arch/arm/dts/tegra20-whistler.dts index eb92264..4fd2496 100644 --- a/arch/arm/dts/tegra20-whistler.dts +++ b/arch/arm/dts/tegra20-whistler.dts @@ -6,6 +6,10 @@ model = "NVIDIA Tegra20 Whistler evaluation board"; compatible = "nvidia,whistler", "nvidia,tegra20"; + chosen { + stdout-path = &uarta; + }; + aliases { i2c0 = "/i2c@7000d000"; usb0 = "/usb@c5008000"; diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi index a524f6e..5f927f7 100644 --- a/arch/arm/dts/tegra20.dtsi +++ b/arch/arm/dts/tegra20.dtsi @@ -1,3 +1,4 @@ +#include #include #include @@ -189,39 +190,69 @@ dma-channel = < 1 >; }; - serial@70006000 { + uarta: serial@70006000 { compatible = "nvidia,tegra20-uart"; reg = <0x70006000 0x40>; reg-shift = <2>; - interrupts = < 68 >; + interrupts = ; + clocks = <&tegra_car TEGRA20_CLK_UARTA>; + resets = <&tegra_car 6>; + reset-names = "serial"; + dmas = <&apbdma 8>, <&apbdma 8>; + dma-names = "rx", "tx"; + status = "disabled"; }; - serial@70006040 { + uartb: serial@70006040 { compatible = "nvidia,tegra20-uart"; reg = <0x70006040 0x40>; reg-shift = <2>; - interrupts = < 69 >; + interrupts = ; + clocks = <&tegra_car TEGRA20_CLK_UARTB>; + resets = <&tegra_car 7>; + reset-names = "serial"; + dmas = <&apbdma 9>, <&apbdma 9>; + dma-names = "rx", "tx"; + status = "disabled"; }; - serial@70006200 { + uartc: serial@70006200 { compatible = "nvidia,tegra20-uart"; reg = <0x70006200 0x100>; reg-shift = <2>; - interrupts = < 78 >; + interrupts = ; + clocks = <&tegra_car TEGRA20_CLK_UARTC>; + resets = <&tegra_car 55>; + reset-names = "serial"; + dmas = <&apbdma 10>, <&apbdma 10>; + dma-names = "rx", "tx"; + status = "disabled"; }; - serial@70006300 { + uartd: serial@70006300 { compatible = "nvidia,tegra20-uart"; reg = <0x70006300 0x100>; reg-shift = <2>; - interrupts = < 122 >; + interrupts = ; + clocks = <&tegra_car TEGRA20_CLK_UARTD>; + resets = <&tegra_car 65>; + reset-names = "serial"; + dmas = <&apbdma 19>, <&apbdma 19>; + dma-names = "rx", "tx"; + status = "disabled"; }; - serial@70006400 { + uarte: serial@70006400 { compatible = "nvidia,tegra20-uart"; reg = <0x70006400 0x100>; reg-shift = <2>; - interrupts = < 123 >; + interrupts = ; + clocks = <&tegra_car TEGRA20_CLK_UARTE>; + resets = <&tegra_car 66>; + reset-names = "serial"; + dmas = <&apbdma 20>, <&apbdma 20>; + dma-names = "rx", "tx"; + status = "disabled"; }; nand: nand-controller@70008000 { diff --git a/arch/arm/dts/tegra30-beaver.dts b/arch/arm/dts/tegra30-beaver.dts index 85e62e9..ad140de 100644 --- a/arch/arm/dts/tegra30-beaver.dts +++ b/arch/arm/dts/tegra30-beaver.dts @@ -6,6 +6,10 @@ model = "NVIDIA Beaver"; compatible = "nvidia,beaver", "nvidia,tegra30"; + chosen { + stdout-path = &uarta; + }; + aliases { i2c0 = "/i2c@7000d000"; i2c1 = "/i2c@7000c000"; diff --git a/arch/arm/dts/tegra30-cardhu.dts b/arch/arm/dts/tegra30-cardhu.dts index ea2cf76..b4fbe71 100644 --- a/arch/arm/dts/tegra30-cardhu.dts +++ b/arch/arm/dts/tegra30-cardhu.dts @@ -6,6 +6,10 @@ model = "NVIDIA Cardhu"; compatible = "nvidia,cardhu", "nvidia,tegra30"; + chosen { + stdout-path = &uarta; + }; + aliases { i2c0 = "/i2c@7000d000"; i2c1 = "/i2c@7000c000"; diff --git a/arch/arm/dts/tegra30-tamonten.dtsi b/arch/arm/dts/tegra30-tamonten.dtsi index 50d5762..c73afef 100644 --- a/arch/arm/dts/tegra30-tamonten.dtsi +++ b/arch/arm/dts/tegra30-tamonten.dtsi @@ -8,6 +8,10 @@ reg = <0x80000000 0x40000000>; }; + chosen { + stdout-path = &uartd; + }; + aliases { i2c0 = "/i2c@7000c000"; i2c1 = "/i2c@7000c700"; diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi index 7be3791..fb92a0f 100644 --- a/arch/arm/dts/tegra30.dtsi +++ b/arch/arm/dts/tegra30.dtsi @@ -1,3 +1,4 @@ +#include #include #include @@ -122,6 +123,71 @@ status = "disabled"; }; + uarta: serial@70006000 { + compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; + reg = <0x70006000 0x40>; + reg-shift = <2>; + interrupts = ; + clocks = <&tegra_car TEGRA30_CLK_UARTA>; + resets = <&tegra_car 6>; + reset-names = "serial"; + dmas = <&apbdma 8>, <&apbdma 8>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uartb: serial@70006040 { + compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; + reg = <0x70006040 0x40>; + reg-shift = <2>; + interrupts = ; + clocks = <&tegra_car TEGRA30_CLK_UARTB>; + resets = <&tegra_car 7>; + reset-names = "serial"; + dmas = <&apbdma 9>, <&apbdma 9>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uartc: serial@70006200 { + compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; + reg = <0x70006200 0x100>; + reg-shift = <2>; + interrupts = ; + clocks = <&tegra_car TEGRA30_CLK_UARTC>; + resets = <&tegra_car 55>; + reset-names = "serial"; + dmas = <&apbdma 10>, <&apbdma 10>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uartd: serial@70006300 { + compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; + reg = <0x70006300 0x100>; + reg-shift = <2>; + interrupts = ; + clocks = <&tegra_car TEGRA30_CLK_UARTD>; + resets = <&tegra_car 65>; + reset-names = "serial"; + dmas = <&apbdma 19>, <&apbdma 19>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uarte: serial@70006400 { + compatible = "nvidia,tegra30-uart", "nvidia,tegra20-uart"; + reg = <0x70006400 0x100>; + reg-shift = <2>; + interrupts = ; + clocks = <&tegra_car TEGRA30_CLK_UARTE>; + resets = <&tegra_car 66>; + reset-names = "serial"; + dmas = <&apbdma 20>, <&apbdma 20>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + spi@7000d400 { compatible = "nvidia,tegra30-slink", "nvidia,tegra20-slink"; reg = <0x7000d400 0x200>; diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c index ed826a0..91f0953 100644 --- a/arch/arm/imx-common/cpu.c +++ b/arch/arm/imx-common/cpu.c @@ -28,6 +28,14 @@ char *get_reset_cause(void) cause = readl(&src_regs->srsr); writel(cause, &src_regs->srsr); +#ifdef CONFIG_RESET_CAUSE_ADDR + { + unsigned *p = (unsigned *)CONFIG_RESET_CAUSE_ADDR; + *p++ = 0x12345678; /* magic value to check for */ + *p = cause; + } +#endif + switch (cause) { case 0x00001: case 0x00011: @@ -148,7 +156,7 @@ int cpu_eth_init(bd_t *bis) { int rc = -ENODEV; -#if defined(CONFIG_FEC_MXC) +#if defined(CONFIG_FEC_MXC) && defined(CONFIG_FEC_MXC_PHYADDR) rc = fecmxc_initialize(bis); #endif diff --git a/arch/arm/imx-common/video.c b/arch/arm/imx-common/video.c index 0121cd7..21c908e 100644 --- a/arch/arm/imx-common/video.c +++ b/arch/arm/imx-common/video.c @@ -4,56 +4,610 @@ #include #include +#include +#include +#include +#include #include +#include +#include +#include +#include +#include +/* + * This creates commands strings to work on dtb files. + * i.e. if you define the following environment variables + * + * setenv fb_hdmi 1920x1080M@60 + * setenv fb_lcd *off + * setenv fb_lvds lg1280x800 + * + * Note: the "*" means u-boot should enable this display, in this case none. + * + * you'll get the follow strings if cmd_frozen is not defined. + * cmd_hdmi=fdt set fb_hdmi status okay;fdt set fb_hdmi mode_str 1920x1080M@60; + * + * cmd_lcd=fdt set fb_lcd status disabled + * + * cmd_lvds=fdt set fb_lvds status okay; + * fdt set fb_lvds interface_pix_fmt RGB24; + * fdt set ldb/lvds-channel@0 fsl,data-width <24>; + * fdt set ldb/lvds-channel@0 fsl,data-mapping jeida; + * fdt rm ldb split-mode; + * fdt set t_lvds clock-frequency <71107200>; + * fdt set t_lvds hactive <1280>; + * fdt set t_lvds vactive <800>; + * fdt set t_lvds hback-porch <48>; + * fdt set t_lvds hfront-porch <80>; + * fdt set t_lvds vback-porch <15>; + * fdt set t_lvds vfront-porch <2>; + * fdt set t_lvds hsync-len <32>; + * fdt set t_lvds vsync-len <6>; + * + * cmd_lvds2=fdt set fb_lvds2 status disabled + * + * + * These strings are then used in 6x_bootscript to configure displays + * + * The following aliases should be defined in the dtb if possible + * fb_hdmi, fb_lcd, fb_lvds, fb_lvds2 + * lcd + * ldb + * t_lvds, t_lvds2 + */ +static const char *const fbnames[] = { +[FB_HDMI] = "fb_hdmi", +[FB_LCD] = "fb_lcd", +[FB_LVDS] = "fb_lvds", +[FB_LVDS2] = "fb_lvds2" +}; -extern struct display_info_t const displays[]; -extern size_t display_count; +static const char *const timings_names[] = { +[FB_HDMI] = "t_hdmi", +[FB_LCD] = "t_lcd", +[FB_LVDS] = "t_lvds", +[FB_LVDS2] = "t_lvds2" +}; -int board_video_skip(void) +static const char *const ch_names[] = { +[FB_HDMI] = "", +[FB_LCD] = "", +[FB_LVDS] = "ldb/lvds-channel@0", +[FB_LVDS2] = "ldb/lvds-channel@1" +}; + +static const char *const cmd_fbnames[] = { +[FB_HDMI] = "cmd_hdmi", +[FB_LCD] = "cmd_lcd", +[FB_LVDS] = "cmd_lvds", +[FB_LVDS2] = "cmd_lvds2" +}; + +static const char *const short_names[] = { +[FB_HDMI] = "hdmi", +[FB_LCD] = "lcd", +[FB_LVDS] = "lvds", +[FB_LVDS2] = "lvds2" +}; + +static const char *const timings_properties[] = { +"clock-frequency", +"hactive", +"vactive", +"hback-porch", +"hfront-porch", +"vback-porch", +"vfront-porch", +"hsync-len", +"vsync-len", +}; + +static const int timings_offsets[] = { + offsetof(struct fb_videomode, pixclock), + offsetof(struct fb_videomode, xres), + offsetof(struct fb_videomode, yres), + offsetof(struct fb_videomode, left_margin), + offsetof(struct fb_videomode, right_margin), + offsetof(struct fb_videomode, upper_margin), + offsetof(struct fb_videomode, lower_margin), + offsetof(struct fb_videomode, hsync_len), + offsetof(struct fb_videomode, vsync_len), +}; + +static void __board_enable_hdmi(const struct display_info_t *di) +{ +} + +static void __board_enable_lcd(const struct display_info_t *di) { +} + +static void __board_enable_lvds(const struct display_info_t *di) +{ +} + +static void __board_enable_lvds2(const struct display_info_t *di) +{ +} + +void board_enable_hdmi(const struct display_info_t *di) + __attribute__((weak, alias("__board_enable_hdmi"))); +void board_enable_lcd(const struct display_info_t *di) + __attribute__((weak, alias("__board_enable_lcd"))); +void board_enable_lvds(const struct display_info_t *di) + __attribute__((weak, alias("__board_enable_lvds"))); +void board_enable_lvds2(const struct display_info_t *di) + __attribute__((weak, alias("__board_enable_lvds2"))); + +static unsigned get_fb_available_mask(void) +{ + unsigned mask = 0; + const struct display_info_t *di = displays; int i; - int ret; - char const *panel = getenv("panel"); - if (!panel) { - for (i = 0; i < display_count; i++) { - struct display_info_t const *dev = displays+i; - if (dev->detect && dev->detect(dev)) { - panel = dev->mode.name; - printf("auto-detected panel %s\n", panel); - break; + + for (i = 0; i < display_count; i++, di++) + mask |= (1 << di->fbtype); + + return mask; +} + +static void setup_cmd_fb(unsigned fb, const struct display_info_t *di, char *buf, int size) +{ + const char *mode_str = NULL; + int i; + int sz; + const char *buf_start = buf; + const struct fb_videomode *mode; + + if (getenv("cmd_frozen") && getenv(cmd_fbnames[fb])) + return; /* don't override if already set */ + + if (!di) { + const char *name = getenv(fbnames[fb]); + if (name) { + if (name[0] == '*') + name++; + if (strcmp(name, "off")) { + /* Not off and not in list, assume mode_str value */ + mode_str = name; } } - if (!panel) { - panel = displays[0].mode.name; - printf("No panel detected: default to %s\n", panel); - i = 0; + if (!mode_str) { + snprintf(buf, size, "fdt set %s status disabled", fbnames[fb]); + setenv(cmd_fbnames[fb], buf); + return; } } else { - for (i = 0; i < display_count; i++) { - if (!strcmp(panel, displays[i].mode.name)) - break; - } - } - if (i < display_count) { - ret = ipuv3_fb_init(&displays[i].mode, 0, - displays[i].pixfmt); - if (!ret) { - displays[i].enable(displays+i); - printf("Display: %s (%ux%u)\n", - displays[i].mode.name, - displays[i].mode.xres, - displays[i].mode.yres); - } else - printf("LCD %s cannot be configured: %d\n", - displays[i].mode.name, ret); - } else { - printf("unsupported panel %s\n", panel); - return -EINVAL; + if (di->fbflags & FBF_MODESTR) + mode_str = di->mode.name; + } + + sz = snprintf(buf, size, "fdt set %s status okay;", fbnames[fb]); + buf += sz; + size -= sz; + + if (di && ((fb == FB_LCD) || (fb == FB_LVDS) || (fb == FB_LVDS2))) { + sz = snprintf(buf, size, "fdt set %s interface_pix_fmt %s;", fbnames[fb], + (di->pixfmt == IPU_PIX_FMT_RGB24) ? "RGB24" : "RGB666"); + buf += sz; + size -= sz; + } + + if (di && (fb == FB_LCD)) { + sz = snprintf(buf, size, "fdt set lcd interface_pix_fmt %s;", + (di->pixfmt == IPU_PIX_FMT_RGB24) ? "RGB24" : "RGB666"); + buf += sz; + size -= sz; } + if (di && ((fb == FB_LVDS) || (fb == FB_LVDS2))) { + + sz = snprintf(buf, size, "fdt set %s fsl,data-width <%u>;", + ch_names[fb], + (di->pixfmt == IPU_PIX_FMT_LVDS666) ? 18 : 24); + buf += sz; + size -= sz; + + sz = snprintf(buf, size, "fdt set %s fsl,data-mapping %s;", + ch_names[fb], + (di->fbflags & FBF_JEIDA) ? "jeida" : "spwg"); + buf += sz; + size -= sz; + + if (di->fbflags & FBF_SPLITMODE) { + sz = snprintf(buf, size, "fdt set ldb split-mode 1;"); + buf += sz; + size -= sz; + } + } + + if (mode_str) { + snprintf(buf, size, "fdt set %s mode_str %s;", fbnames[fb], mode_str); + setenv(cmd_fbnames[fb], buf_start); + return; + } + + mode = &di->mode; + for (i = 0; i < ARRAY_SIZE(timings_properties); i++) { + u32 *p = (u32 *)((char *)mode + timings_offsets[i]); + u32 val; + + if (i == 0) { + u64 lval = 1000000000000ULL; + + do_div(lval, mode->pixclock); + val = (u32)lval; + } else { + val = *p; + } + sz = snprintf(buf, size, "fdt set %s %s <%u>;", timings_names[fb], timings_properties[i], val); + buf += sz; + size -= sz; + } + setenv(cmd_fbnames[fb], buf_start); +} + +static const struct display_info_t *find_panel(unsigned fb, const char *name) +{ + const struct display_info_t *di = displays; + int i; + + for (i = 0; i < display_count; i++, di++) { + if ((fb == di->fbtype) && !strcmp(name, di->mode.name)) + return di; + } + return NULL; +} + +static char g_mode_str[4][80]; +static struct display_info_t g_di_temp[FB_COUNT]; + +int imx_detect_i2c(struct display_info_t const *di) +{ + int ret; + int gp = di->bus >> 8; + + if (gp) + gpio_set_value(gp, 1); + ret = i2c_set_bus_num(di->bus & 0xff); + if (ret == 0) + ret = i2c_probe(di->addr); + if (gp) + gpio_set_value(gp, 0); + return (ret == 0); +} + +void imx_setup_display(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + int reg; + + enable_ipu_clock(); +#ifdef CONFIG_IMX_HDMI + imx_setup_hdmi(); +#endif + /* Turn on LDB0,IPU,IPU DI0 clocks */ + reg = __raw_readl(&mxc_ccm->CCGR3); + reg |= MXC_CCM_CCGR3_LDB_DI0_MASK; + writel(reg, &mxc_ccm->CCGR3); + + /* set LDB0, LDB1 clk select to 011/011 */ + reg = readl(&mxc_ccm->cs2cdr); + reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK + |MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK); + reg |= (3<cs2cdr); + + reg = readl(&mxc_ccm->chsccdr); + reg &= ~MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_MASK; + reg |= (CHSCCDR_CLK_SEL_LDB_DI0 + <chsccdr); + + reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES + |IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_LOW + |IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW + |IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG + |IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT + |IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG + |IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT; + writel(reg, &iomux->gpr[2]); + + reg = readl(&iomux->gpr[3]); + reg = (reg & ~(IOMUXC_GPR3_LVDS0_MUX_CTL_MASK + |IOMUXC_GPR3_HDMI_MUX_CTL_MASK)) + | (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 + <gpr[3]); +} + +void imx_enable_fb(struct display_info_t const *di) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + u32 reg, cscmr2; + u32 tmp; + + switch (di->fbtype) { +#ifdef CONFIG_IMX_HDMI + case FB_HDMI: + imx_enable_hdmi_phy(); + board_enable_hdmi(di); + break; +#endif + case FB_LCD: + board_enable_lcd(di); + break; + case FB_LVDS: + reg = readl(&iomux->gpr[2]); + cscmr2 = readl(&mxc_ccm->cscmr2); + reg &= ~(IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT | + IOMUXC_GPR2_BIT_MAPPING_CH0_JEIDA | + IOMUXC_GPR2_DATA_WIDTH_CH1_24BIT | + IOMUXC_GPR2_BIT_MAPPING_CH1_JEIDA | + IOMUXC_GPR2_LVDS_CH0_MODE_MASK | + IOMUXC_GPR2_LVDS_CH1_MODE_MASK | + IOMUXC_GPR2_SPLIT_MODE_EN_MASK); + tmp = 0; + if (di->pixfmt == IPU_PIX_FMT_RGB24) + tmp |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT; + if (di->fbflags & FBF_JEIDA) + tmp |= IOMUXC_GPR2_BIT_MAPPING_CH0_JEIDA; + if (di->fbflags & FBF_SPLITMODE) { + tmp |= tmp << 2; + tmp |= IOMUXC_GPR2_SPLIT_MODE_EN_MASK | + IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI0; + + cscmr2 &= ~(MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV | + MXC_CCM_CSCMR2_LDB_DI1_IPU_DIV); + + } else { + cscmr2 |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV; + } + writel(cscmr2, &mxc_ccm->cscmr2); + reg |= tmp | IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; + writel(reg, &iomux->gpr[2]); + board_enable_lvds(di); + break; + case FB_LVDS2: + reg = readl(&iomux->gpr[2]); + cscmr2 = readl(&mxc_ccm->cscmr2); + reg &= ~(IOMUXC_GPR2_DATA_WIDTH_CH1_24BIT | + IOMUXC_GPR2_BIT_MAPPING_CH1_JEIDA | + IOMUXC_GPR2_LVDS_CH0_MODE_MASK | + IOMUXC_GPR2_LVDS_CH1_MODE_MASK); + if (di->pixfmt == IPU_PIX_FMT_RGB24) + reg |= IOMUXC_GPR2_DATA_WIDTH_CH1_24BIT; + if (di->fbflags & FBF_JEIDA) + reg |= IOMUXC_GPR2_BIT_MAPPING_CH1_JEIDA; + + cscmr2 |= MXC_CCM_CSCMR2_LDB_DI1_IPU_DIV; + writel(cscmr2, &mxc_ccm->cscmr2); + + reg |= IOMUXC_GPR2_LVDS_CH1_MODE_ENABLED_DI0; + writel(reg, &iomux->gpr[2]); + board_enable_lvds2(di); + break; + } + +} + +static const struct display_info_t * parse_mode(const char *p, unsigned fb, unsigned *prefer) +{ + char c; + char *endp; + unsigned value; + int i; + struct display_info_t *di; + char *mode_str = g_mode_str[fb]; + + if (*p == '*') { + p++; + *prefer = 1; + } + if (!strcmp(p, "off")) { + *prefer |= 2; + return NULL; + } + + i = 0; + while (i < 80 - 1) { + c = *p; + if (c) + p++; + if (!c || (c == ':')) { + break; + } + mode_str[i++] = c; + } + mode_str[i] = 0; + c = *p; + if (!c) { + return find_panel(fb, mode_str); + } + di = &g_di_temp[fb]; + memset(di, 0, sizeof(*di)); + + di->fbtype = fb; + di->mode.name = mode_str; + di->enable = imx_enable_fb; + + if (c == 'm') { + di->fbflags |= FBF_MODESTR; + p++; + c = *p; + } + if (c == 'j') { + di->fbflags |= FBF_JEIDA; + p++; + c = *p; + } + if (c == 's') { + di->fbflags |= FBF_SPLITMODE; + p++; + c = *p; + } + value = simple_strtoul(p, &endp, 10); + if (endp <= p) { + printf("expecting 18|24\n"); + return NULL; + } + if ((value != 18) && (value != 24)) { + printf("expecting 18|24, found %d\n", value); + return NULL; + } + p = endp; + di->pixfmt = (value == 24) ? IPU_PIX_FMT_RGB24 : (di->fbtype >= FB_LVDS) ? + IPU_PIX_FMT_LVDS666 : IPU_PIX_FMT_RGB666; + c = *p; + if (*p != ':') { + printf("expected ':', %s\n", p); + return NULL; + } + p++; + + for (i = 0; i < ARRAY_SIZE(timings_properties); i++) { + u32 *dest = (u32 *)((char *)&di->mode + timings_offsets[i]); + u32 val; + + val = simple_strtoul(p, &endp, 10); + if (endp <= p) { + printf("expecting integer:%s\n", p); + return NULL; + } + if (i == 0) { + u64 lval = 1000000000000ULL; + + do_div(lval, val); + val = (u32)lval; + } + *dest = val; + p = endp; + if (*p == ',') + p++; + if (*p == ' ') + p++; + } + if (*p) { + printf("extra parameters found:%s\n", p); + return NULL; + } + return di; +} + +static const struct display_info_t *find_disp(unsigned fb, unsigned *prefer) +{ + int i; + const char *name = getenv(fbnames[fb]); + const struct display_info_t *di = displays; + + if (name) { + di = parse_mode(name, fb, prefer); + if (di) + return di; + if (!(*prefer & 2)) + printf("No match, assuming mode_str: %s\n", name); + return NULL; + } + /* No specific name requested, lets probe */ + di = displays; + for (i = 0; i < display_count; i++, di++) { + if (fb == di->fbtype) { + if (di->detect && di->detect(di)) { + printf("auto-detected panel %s\n", di->mode.name); + return di; + } + } + } + return NULL; +} + +static const struct display_info_t *find_first_disp(void) +{ + int i; + unsigned skip_mask = 0; + const struct display_info_t *di = displays; + + for (i = 0; i < display_count; i++, di++) { + if (di->fbtype >= FB_COUNT) + continue; + if (skip_mask & (1 << di->fbtype)) + continue; + if (getenv(fbnames[di->fbtype])) { + skip_mask |= (1 << di->fbtype); + continue; + } + return di; + } + return NULL; +} + +int init_display(const struct display_info_t *di) +{ + int ret = ipuv3_fb_init(&di->mode, 0, di->pixfmt); + if (ret) { + printf("LCD %s cannot be configured: %d\n", di->mode.name, ret); + return -EINVAL; + } + di->enable(di); + printf("Display: %s:%s (%ux%u)\n", short_names[di->fbtype], + di->mode.name, di->mode.xres, di->mode.yres); return 0; } +int board_video_skip(void) +{ + const struct display_info_t *disp[FB_COUNT]; + const struct display_info_t *di = NULL; + unsigned prefer_mask = 0; + unsigned fb; + char *buf = malloc(4096); + + for (fb = 0; fb < ARRAY_SIZE(disp); fb++) { + unsigned prefer = 0; + + disp[fb] = find_disp(fb, &prefer); + if (prefer & 1) + prefer_mask |= (1 << fb); + } + fb = ffs(prefer_mask) - 1; + if (fb < ARRAY_SIZE(disp)) { + di = disp[fb]; + } else { + /* default to the 1st one in the list*/ + for (fb = 0; fb < ARRAY_SIZE(disp); fb++) { + if (!di) { + di = disp[fb]; + } else { + if (disp[fb] && ((unsigned)disp[fb] + < (unsigned)di)) + di = disp[fb]; + } + } + if (!di) { + di = find_first_disp(); + if (di) + disp[di->fbtype] = di; + } + } + + if (buf) { + unsigned mask = get_fb_available_mask(); + + for (fb = 0; fb < ARRAY_SIZE(disp); fb++) { + if (mask & (1 << fb)) + setup_cmd_fb(fb, disp[fb], buf, 4096); + } + free(buf); + } + if (!di) + return -EINVAL; + + return init_display(di); +} + #ifdef CONFIG_IMX_HDMI #include #include @@ -63,3 +617,179 @@ int detect_hdmi(struct display_info_t const *dev) return readb(&hdmi->phy_stat0) & HDMI_DVI_STAT; } #endif + +static void str_mode(char *p, int size, const struct display_info_t *di, unsigned prefer) +{ + int count; + int i; + + if (prefer) { + *p++ = '*'; + size--; + } + if (!di) { + count = snprintf(p, size, "off"); + if (size > count) { + p += count; + size -= count; + } + *p = 0; + return; + } + count = snprintf(p, size, "%s:", di->mode.name); + if (size > count) { + p += count; + size -= count; + } + if (di->fbflags & FBF_MODESTR) { + *p++ = 'm'; + size--; + } + if (di->fbflags & FBF_JEIDA) { + *p++ = 'j'; + size--; + } + if (di->fbflags & FBF_SPLITMODE) { + *p++ = 's'; + size--; + } + count = snprintf(p, size, "%d:", (di->pixfmt == IPU_PIX_FMT_RGB24) ? 24 : 18); + if (size > count) { + p += count; + size -= count; + } + + for (i = 0; i < ARRAY_SIZE(timings_properties); i++) { + u32 *src = (u32 *)((char *)&di->mode + timings_offsets[i]); + u32 val; + + if (i == 0) { + u64 lval = 1000000000000ULL; + + do_div(lval, di->mode.pixclock); + val = (u32)lval; + } else { + val = *src; + if (size > 1) { + *p++ = ','; + size--; + } + } + count = snprintf(p, size, "%d", val); + if (size > count) { + p += count; + size -= count; + } + } + *p = 0; +} + +static void print_mode(const struct display_info_t *di, int *len) +{ + int i; + char format_buf[16]; + const struct fb_videomode* mode = &di->mode; + int fb = di->fbtype; + char buf[256]; + + str_mode(buf, sizeof(buf), di, 0); + printf("%s: %s\n\x09", short_names[fb], buf); + + + for (i = 0; i < ARRAY_SIZE(timings_properties); i++) { + u32 *p = (u32 *)((char *)mode + timings_offsets[i]); + u32 val; + + if (i == 0) { + u64 lval = 1000000000000ULL; + + do_div(lval, mode->pixclock); + val = (u32)lval; + } else { + val = *p; + } + snprintf(format_buf, sizeof(format_buf), " %c%du", '%', len[i]); + printf(format_buf, val); + } + printf("\n"); +} + +void print_modes(unsigned mask) +{ + const struct display_info_t *di = displays; + int i; + int len[ARRAY_SIZE(timings_properties)]; + + /* Print heading */ + printf("\x09"); + for (i = 0; i < ARRAY_SIZE(timings_properties); i++) { + printf(" %s", timings_properties[i]); + len[i] = strlen(timings_properties[i]); + } + printf("\n"); + + for (i = 0; i < display_count; i++, di++) { + if (mask & (1 << di->fbtype)) + print_mode(di, len); + } +} + +static int do_fbpanel(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + int i; + const char *fbname; + int fb = -1; + const char *p; + const struct display_info_t* di; + char *buf; + unsigned prefer; + int ret; + + if (argc < 2) { + print_modes(0xf); + return 0; + } + fbname = argv[1]; + for (i = 0; i < ARRAY_SIZE(short_names); i++) { + if (!strcmp(short_names[i], fbname)) { + fb = i; + break; + } + } + if (fb < 0) + return CMD_RET_USAGE; + + if (argc < 3) { + print_modes(1 << fb); + return 0; + } + p = argv[2]; + di = parse_mode(p, fb, &prefer); + if (!di && !(prefer & 2)) + return 1; + + buf = malloc(4096); + if (buf) { + str_mode(buf, 256, di, prefer & 1); + setenv(fbnames[fb], buf); + + setup_cmd_fb(fb, di, buf, 4096); + free(buf); + } + if (!(prefer & 1)) + return 0; + ipuv3_fb_shutdown(); + if (!di) + return 0; + ret = init_display(di); + if (ret) + return ret; + ipuv3_fb_init2(); + return ret; +} + +U_BOOT_CMD(fbpanel, 3, 0, do_fbpanel, + "show/set panel names available", + "fbpanel [hdmi|lcd|lvds|lvds2] [\"[*]mode_str[:[m][j][s][18|24]:pixclkfreq,xres,yres,hback-porch,hfront-porch,vback-porch,vfront-porch,hsync,vsync]\"]\n" + "\n" + "fbpanel - show all panels"); diff --git a/arch/arm/include/asm/arch-at91/at91_pmc.h b/arch/arm/include/asm/arch-at91/at91_pmc.h index 04f6239..27331ff 100644 --- a/arch/arm/include/asm/arch-at91/at91_pmc.h +++ b/arch/arm/include/asm/arch-at91/at91_pmc.h @@ -54,7 +54,7 @@ typedef struct at91_pmc { u32 reserved5[21]; u32 wpmr; /* 0xE4 Write Protect Mode Register (CAP0) */ u32 wpsr; /* 0xE8 Write Protect Status Register (CAP0) */ -#ifdef CONFIG_SAMA5D3 +#ifdef CPU_HAS_PCR u32 reserved6[8]; u32 pcer1; /* 0x100 Periperial Clock Enable Register 1 */ u32 pcdr1; /* 0x104 Periperial Clock Disable Register 1 */ @@ -147,6 +147,10 @@ typedef struct at91_pmc { #define AT91_PMC_IXR_PCKRDY3 0x00000800 #define AT91_PMC_IXR_MOSCSELS 0x00010000 +#define AT91_PMC_PCR_PID_MASK (0x3f) +#define AT91_PMC_PCR_CMD_WRITE (0x1 << 12) +#define AT91_PMC_PCR_EN (0x1 << 28) + #define AT91_PMC_PCK (1 << 0) /* Processor Clock */ #define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ #define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ diff --git a/arch/arm/include/asm/arch-at91/clk.h b/arch/arm/include/asm/arch-at91/clk.h index ce9e28f..4076a78 100644 --- a/arch/arm/include/asm/arch-at91/clk.h +++ b/arch/arm/include/asm/arch-at91/clk.h @@ -80,4 +80,5 @@ static inline unsigned long get_mci_clk_rate(void) int at91_clock_init(unsigned long main_clock); void at91_periph_clk_enable(int id); +void at91_periph_clk_disable(int id); #endif /* __ASM_ARM_ARCH_CLK_H__ */ diff --git a/arch/arm/include/asm/arch-at91/sama5d3.h b/arch/arm/include/asm/arch-at91/sama5d3.h index 6d936f4..f7bc4ad 100644 --- a/arch/arm/include/asm/arch-at91/sama5d3.h +++ b/arch/arm/include/asm/arch-at91/sama5d3.h @@ -188,6 +188,7 @@ #define ATMEL_PIO_PORTS 5 #define CPU_HAS_PIO3 #define PIO_SCDR_DIV 0x3fff +#define CPU_HAS_PCR /* * PMECC table in ROM diff --git a/arch/arm/include/asm/arch-at91/sama5d3_smc.h b/arch/arm/include/asm/arch-at91/sama5d3_smc.h index 6caa9b6..a859b6d 100644 --- a/arch/arm/include/asm/arch-at91/sama5d3_smc.h +++ b/arch/arm/include/asm/arch-at91/sama5d3_smc.h @@ -14,7 +14,8 @@ #define AT91_ASM_SMC_SETUP0 (ATMEL_BASE_SMC + 0x600) #define AT91_ASM_SMC_PULSE0 (ATMEL_BASE_SMC + 0x604) #define AT91_ASM_SMC_CYCLE0 (ATMEL_BASE_SMC + 0x608) -#define AT91_ASM_SMC_MODE0 (ATMEL_BASE_SMC + 0x60C) +#define AT91_ASM_SMC_TIMINGS0 (ATMEL_BASE_SMC + 0x60c) +#define AT91_ASM_SMC_MODE0 (ATMEL_BASE_SMC + 0x610) #else struct at91_cs { u32 setup; /* 0x600 SMC Setup Register */ diff --git a/arch/arm/include/asm/arch-exynos/clk.h b/arch/arm/include/asm/arch-exynos/clk.h index ffbc07e..db24dc0 100644 --- a/arch/arm/include/asm/arch-exynos/clk.h +++ b/arch/arm/include/asm/arch-exynos/clk.h @@ -15,6 +15,7 @@ #define VPLL 4 #define BPLL 5 #define RPLL 6 +#define SPLL 7 #define MASK_PRE_RATIO(x) (0xff << ((x << 4) + 8)) #define MASK_RATIO(x) (0xf << (x << 4)) diff --git a/arch/arm/include/asm/arch-exynos/gpio.h b/arch/arm/include/asm/arch-exynos/gpio.h index be5113f..8fb5c23 100644 --- a/arch/arm/include/asm/arch-exynos/gpio.h +++ b/arch/arm/include/asm/arch-exynos/gpio.h @@ -1504,6 +1504,7 @@ static const struct gpio_name_num_table exynos5420_gpio_table[] = { void gpio_cfg_pin(int gpio, int cfg); void gpio_set_pull(int gpio, int mode); void gpio_set_drv(int gpio, int mode); +int gpio_direction_input(unsigned gpio); int gpio_direction_output(unsigned gpio, int value); int gpio_set_value(unsigned gpio, int value); int gpio_get_value(unsigned gpio); diff --git a/arch/arm/include/asm/arch-exynos/power.h b/arch/arm/include/asm/arch-exynos/power.h index 4f2447b..e8a98a5 100644 --- a/arch/arm/include/asm/arch-exynos/power.h +++ b/arch/arm/include/asm/arch-exynos/power.h @@ -1670,6 +1670,27 @@ struct exynos5420_power { }; #endif /* __ASSEMBLY__ */ +#define OM_PIN_BITS 0x1f +#define OM_PIN_SHIFT 0x1 +#define OM_PIN_MASK (OM_PIN_BITS << OM_PIN_SHIFT) + +enum { + /* + * Assign the OM pin values for respective boot modes. + * Exynos4 does not support spi boot and the mmc boot OM + * pin values are the same across Exynos4 and Exynos5. + */ + BOOT_MODE_SD = 4, /* SD_CH2 | USB */ + BOOT_MODE_EMMC = 8, /* EMMC4.4 | USB */ + BOOT_MODE_EMMC_SD = 40, /* EMMC4.4 | SD_CH2 */ + BOOT_MODE_SERIAL = 20, + /* Boot based on Operating Mode pin settings */ + BOOT_MODE_OM = 32, + BOOT_MODE_USB, /* Boot using USB download */ +}; + +unsigned int get_boot_mode(void); + void set_mipi_phy_ctrl(unsigned int dev_index, unsigned int enable); #define EXYNOS_MIPI_PHY_ENABLE (1 << 0) diff --git a/arch/arm/include/asm/arch-exynos/spl.h b/arch/arm/include/asm/arch-exynos/spl.h index b1d68c3..cdcb2bc 100644 --- a/arch/arm/include/asm/arch-exynos/spl.h +++ b/arch/arm/include/asm/arch-exynos/spl.h @@ -8,20 +8,7 @@ #define __ASM_ARCH_EXYNOS_SPL_H__ #include - -enum boot_mode { - /* - * Assign the OM pin values for respective boot modes. - * Exynos4 does not support spi boot and the mmc boot OM - * pin values are the same across Exynos4 and Exynos5. - */ - BOOT_MODE_MMC = 4, - BOOT_MODE_EMMC = 8, /* EMMC4.4 */ - BOOT_MODE_SERIAL = 20, - /* Boot based on Operating Mode pin settings */ - BOOT_MODE_OM = 32, - BOOT_MODE_USB, /* Boot using USB download */ -}; +#include #ifndef __ASSEMBLY__ /* Parameters of early board initialization in SPL */ @@ -62,7 +49,7 @@ struct spl_machine_param { * table only for mmc boot. */ u32 uboot_size; - enum boot_mode boot_source; /* Boot device */ + unsigned boot_source; /* Boot device */ unsigned frequency_mhz; /* Frequency of memory in MHz */ unsigned arm_freq_mhz; /* ARM Frequency in MHz */ u32 serial_base; /* Serial base address */ diff --git a/arch/arm/include/asm/arch-exynos/system.h b/arch/arm/include/asm/arch-exynos/system.h index 7e2057c..320763f 100644 --- a/arch/arm/include/asm/arch-exynos/system.h +++ b/arch/arm/include/asm/arch-exynos/system.h @@ -39,5 +39,9 @@ struct exynos5_sysreg { void set_usbhost_mode(unsigned int mode); void set_system_display_ctrl(void); +int exynos_lcd_early_init(const void *blob); + +/* Initialize the Parade dP<->LVDS bridge if present */ +int parade_init(const void *blob); #endif /* _EXYNOS4_SYSTEM_H */ diff --git a/arch/arm/include/asm/arch-fsl-lsch3/config.h b/arch/arm/include/asm/arch-fsl-lsch3/config.h index b17410a..da551e8 100644 --- a/arch/arm/include/asm/arch-fsl-lsch3/config.h +++ b/arch/arm/include/asm/arch-fsl-lsch3/config.h @@ -8,7 +8,7 @@ #define _ASM_ARMV8_FSL_LSCH3_CONFIG_ #include - +#define CONFIG_MP #define CONFIG_SYS_FSL_OCRAM_BASE 0x18000000 /* initial RAM */ /* Link Definitions */ #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) @@ -16,8 +16,10 @@ #define CONFIG_SYS_IMMR 0x01000000 #define CONFIG_SYS_FSL_DDR_ADDR (CONFIG_SYS_IMMR + 0x00080000) #define CONFIG_SYS_FSL_DDR2_ADDR (CONFIG_SYS_IMMR + 0x00090000) +#define CONFIG_SYS_FSL_DDR3_ADDR 0x08210000 #define CONFIG_SYS_FSL_GUTS_ADDR (CONFIG_SYS_IMMR + 0x00E00000) #define CONFIG_SYS_FSL_PMU_ADDR (CONFIG_SYS_IMMR + 0x00E30000) +#define CONFIG_SYS_FSL_RST_ADDR (CONFIG_SYS_IMMR + 0x00E60000) #define CONFIG_SYS_FSL_CH3_CLK_GRPA_ADDR (CONFIG_SYS_IMMR + 0x00300000) #define CONFIG_SYS_FSL_CH3_CLK_GRPB_ADDR (CONFIG_SYS_IMMR + 0x00310000) #define CONFIG_SYS_FSL_CH3_CLK_CTRL_ADDR (CONFIG_SYS_IMMR + 0x00370000) @@ -60,7 +62,7 @@ #ifdef CONFIG_LS2085A #define CONFIG_MAX_CPUS 16 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 -#define CONFIG_NUM_DDR_CONTROLLERS 2 +#define CONFIG_NUM_DDR_CONTROLLERS 3 #define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 4, 4 } #else #error SoC not defined diff --git a/arch/arm/include/asm/arch-fsl-lsch3/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-lsch3/immap_lsch3.h index 18e66bd..ee1d651 100644 --- a/arch/arm/include/asm/arch-fsl-lsch3/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-lsch3/immap_lsch3.h @@ -113,4 +113,39 @@ struct ccsr_clk_ctrl { u8 res_04[0x20-0x04]; } clkcncsr[8]; }; + +struct ccsr_reset { + u32 rstcr; /* 0x000 */ + u32 rstcrsp; /* 0x004 */ + u8 res_008[0x10-0x08]; /* 0x008 */ + u32 rstrqmr1; /* 0x010 */ + u32 rstrqmr2; /* 0x014 */ + u32 rstrqsr1; /* 0x018 */ + u32 rstrqsr2; /* 0x01c */ + u32 rstrqwdtmrl; /* 0x020 */ + u32 rstrqwdtmru; /* 0x024 */ + u8 res_028[0x30-0x28]; /* 0x028 */ + u32 rstrqwdtsrl; /* 0x030 */ + u32 rstrqwdtsru; /* 0x034 */ + u8 res_038[0x60-0x38]; /* 0x038 */ + u32 brrl; /* 0x060 */ + u32 brru; /* 0x064 */ + u8 res_068[0x80-0x68]; /* 0x068 */ + u32 pirset; /* 0x080 */ + u32 pirclr; /* 0x084 */ + u8 res_088[0x90-0x88]; /* 0x088 */ + u32 brcorenbr; /* 0x090 */ + u8 res_094[0x100-0x94]; /* 0x094 */ + u32 rcw_reqr; /* 0x100 */ + u32 rcw_completion; /* 0x104 */ + u8 res_108[0x110-0x108]; /* 0x108 */ + u32 pbi_reqr; /* 0x110 */ + u32 pbi_completion; /* 0x114 */ + u8 res_118[0xa00-0x118]; /* 0x118 */ + u32 qmbm_warmrst; /* 0xa00 */ + u32 soc_warmrst; /* 0xa04 */ + u8 res_a08[0xbf8-0xa08]; /* 0xa08 */ + u32 ip_rev1; /* 0xbf8 */ + u32 ip_rev2; /* 0xbfc */ +}; #endif /* __ARCH_FSL_LSCH3_IMMAP_H */ diff --git a/arch/arm/include/asm/arch-keystone/ddr3.h b/arch/arm/include/asm/arch-keystone/ddr3.h index 4d229a2..6bf35d3 100644 --- a/arch/arm/include/asm/arch-keystone/ddr3.h +++ b/arch/arm/include/asm/arch-keystone/ddr3.h @@ -50,6 +50,7 @@ struct ddr3_emif_config { void ddr3_init(void); void ddr3_reset_ddrphy(void); +void ddr3_err_reset_workaround(void); void ddr3_init_ddrphy(u32 base, struct ddr3_phy_config *phy_cfg); void ddr3_init_ddremif(u32 base, struct ddr3_emif_config *emif_cfg); diff --git a/arch/arm/include/asm/arch-keystone/emac_defs.h b/arch/arm/include/asm/arch-keystone/emac_defs.h index 0aa2f89..9cd8925 100644 --- a/arch/arm/include/asm/arch-keystone/emac_defs.h +++ b/arch/arm/include/asm/arch-keystone/emac_defs.h @@ -13,9 +13,6 @@ #include #include -#define DEVICE_REG32_R(a) readl(a) -#define DEVICE_REG32_W(a, v) writel(v, a) - #define EMAC_EMACSL_BASE_ADDR (KS2_PASS_BASE + 0x00090900) #define EMAC_MDIO_BASE_ADDR (KS2_PASS_BASE + 0x00090300) #define EMAC_SGMII_BASE_ADDR (KS2_PASS_BASE + 0x00090100) @@ -182,8 +179,8 @@ struct mac_sl_cfg { #endif #define hw_config_streaming_switch() \ - DEVICE_REG32_W(DEVICE_PSTREAM_CFG_REG_ADDR, \ - DEVICE_PSTREAM_CFG_REG_VAL_ROUTE_CPPI); + writel(DEVICE_PSTREAM_CFG_REG_VAL_ROUTE_CPPI,\ + DEVICE_PSTREAM_CFG_REG_ADDR); /* EMAC MDIO Registers Structure */ struct mdio_regs { diff --git a/arch/arm/include/asm/arch-keystone/hardware.h b/arch/arm/include/asm/arch-keystone/hardware.h index d6726a1..76e6441 100644 --- a/arch/arm/include/asm/arch-keystone/hardware.h +++ b/arch/arm/include/asm/arch-keystone/hardware.h @@ -121,9 +121,11 @@ typedef volatile unsigned int *dv_reg_p; #define KS2_CLOCK_BASE KS2_PLL_CNTRL_BASE #define KS2_RSTCTRL_RSTYPE (KS2_PLL_CNTRL_BASE + 0xe4) #define KS2_RSTCTRL (KS2_PLL_CNTRL_BASE + 0xe8) +#define KS2_RSTCTRL_RSCFG (KS2_PLL_CNTRL_BASE + 0xec) #define KS2_RSTCTRL_KEY 0x5a69 #define KS2_RSTCTRL_MASK 0xffff0000 #define KS2_RSTCTRL_SWRST 0xfffe0000 +#define KS2_RSTYPE_PLL_SOFT BIT(13) /* SPI */ #define KS2_SPI0_BASE 0x21000400 diff --git a/arch/arm/include/asm/arch-kirkwood/spi.h b/arch/arm/include/asm/arch-kirkwood/spi.h index b1cf614..e512dce 100644 --- a/arch/arm/include/asm/arch-kirkwood/spi.h +++ b/arch/arm/include/asm/arch-kirkwood/spi.h @@ -43,10 +43,10 @@ struct kwspi_registers { #define KWSPI_XFERLEN_2BYTE (1 << 5) #define KWSPI_XFERLEN_MASK (1 << 5) #define KWSPI_ADRLEN_1BYTE 0 -#define KWSPI_ADRLEN_2BYTE 1 << 8 -#define KWSPI_ADRLEN_3BYTE 2 << 8 -#define KWSPI_ADRLEN_4BYTE 3 << 8 -#define KWSPI_ADRLEN_MASK 3 << 8 +#define KWSPI_ADRLEN_2BYTE (1 << 8) +#define KWSPI_ADRLEN_3BYTE (2 << 8) +#define KWSPI_ADRLEN_4BYTE (3 << 8) +#define KWSPI_ADRLEN_MASK (3 << 8) #define KWSPI_TIMEOUT 10000 #endif /* __KW_SPI_H__ */ diff --git a/arch/arm/include/asm/arch-ls102xa/clock.h b/arch/arm/include/asm/arch-ls102xa/clock.h new file mode 100644 index 0000000..fd36bb0 --- /dev/null +++ b/arch/arm/include/asm/arch-ls102xa/clock.h @@ -0,0 +1,23 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * + */ + +#ifndef __ASM_ARCH_LS102XA_CLOCK_H_ +#define __ASM_ARCH_LS102XA_CLOCK_H_ + +#include + +enum mxc_clock { + MXC_ARM_CLK = 0, + MXC_UART_CLK, + MXC_ESDHC_CLK, + MXC_I2C_CLK, + MXC_DSPI_CLK, +}; + +unsigned int mxc_get_clock(enum mxc_clock clk); + +#endif /* __ASM_ARCH_LS102XA_CLOCK_H_ */ diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h new file mode 100644 index 0000000..a500b5b --- /dev/null +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -0,0 +1,83 @@ +/* + * Copyright 2014, Freescale Semiconductor + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _ASM_ARMV7_LS102XA_CONFIG_ +#define _ASM_ARMV7_LS102XA_CONFIG_ + +#define CONFIG_SYS_CACHELINE_SIZE 64 + +#define OCRAM_BASE_ADDR 0x10000000 +#define OCRAM_SIZE 0x00020000 + +#define CONFIG_SYS_IMMR 0x01000000 + +#define CONFIG_SYS_FSL_DDR_ADDR (CONFIG_SYS_IMMR + 0x00080000) +#define CONFIG_SYS_CCI400_ADDR (CONFIG_SYS_IMMR + 0x00180000) +#define CONFIG_SYS_IFC_ADDR (CONFIG_SYS_IMMR + 0x00530000) +#define CONFIG_SYS_FSL_ESDHC_ADDR (CONFIG_SYS_IMMR + 0x00560000) +#define CONFIG_SYS_FSL_SCFG_ADDR (CONFIG_SYS_IMMR + 0x00570000) +#define CONFIG_SYS_FSL_SERDES_ADDR (CONFIG_SYS_IMMR + 0x00ea0000) +#define CONFIG_SYS_FSL_GUTS_ADDR (CONFIG_SYS_IMMR + 0x00ee0000) +#define CONFIG_SYS_FSL_LS1_CLK_ADDR (CONFIG_SYS_IMMR + 0x00ee1000) +#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011c0500) +#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR + 0x011d0500) +#define CONFIG_SYS_DCU_ADDR (CONFIG_SYS_IMMR + 0x01ce0000) + +#define CONFIG_SYS_TSEC1_OFFSET 0x01d10000 +#define CONFIG_SYS_TSEC2_OFFSET 0x01d50000 +#define CONFIG_SYS_TSEC3_OFFSET 0x01d90000 +#define CONFIG_SYS_MDIO1_OFFSET 0x01d24000 + +#define TSEC_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_TSEC1_OFFSET) +#define MDIO_BASE_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MDIO1_OFFSET) + +#define SCTR_BASE_ADDR (CONFIG_SYS_IMMR + 0x01b00000) + +#define I2C1_BASE_ADDR (CONFIG_SYS_IMMR + 0x01180000) +#define I2C2_BASE_ADDR (CONFIG_SYS_IMMR + 0x01190000) +#define I2C3_BASE_ADDR (CONFIG_SYS_IMMR + 0x011a0000) + +#define WDOG1_BASE_ADDR (CONFIG_SYS_IMMR + 0x01ad0000) + +#define QSPI0_BASE_ADDR (CONFIG_SYS_IMMR + 0x00550000) +#define DSPI1_BASE_ADDR (CONFIG_SYS_IMMR + 0x01100000) + +#define LPUART_BASE (CONFIG_SYS_IMMR + 0x01950000) + +#ifdef CONFIG_DDR_SPD +#define CONFIG_SYS_FSL_DDR_BE +#define CONFIG_VERY_BIG_RAM +#ifdef CONFIG_SYS_FSL_DDR4 +#define CONFIG_SYS_FSL_DDRC_GEN4 +#else +#define CONFIG_SYS_FSL_DDRC_ARM_GEN3 +#endif +#define CONFIG_SYS_FSL_DDR +#define CONFIG_SYS_LS1_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30) +#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_LS1_DDR_BLOCK1_SIZE +#endif + +#define CONFIG_SYS_FSL_IFC_BE +#define CONFIG_SYS_FSL_ESDHC_BE +#define CONFIG_SYS_FSL_WDOG_BE +#define CONFIG_SYS_FSL_DSPI_BE +#define CONFIG_SYS_FSL_QSPI_BE +#define CONFIG_SYS_FSL_DCU_BE + +#define DCU_LAYER_MAX_NUM 16 + +#define CONFIG_SYS_FSL_SRDS_1 + +#ifdef CONFIG_LS102XA +#define CONFIG_MAX_CPUS 2 +#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 +#define CONFIG_NUM_DDR_CONTROLLERS 1 +#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0 +#else +#error SoC not defined +#endif + +#endif /* _ASM_ARMV7_LS102XA_CONFIG_ */ diff --git a/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h b/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h new file mode 100644 index 0000000..3a92f5a --- /dev/null +++ b/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h @@ -0,0 +1,33 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __FSL_SERDES_H +#define __FSL_SERDES_H + +#include + +enum srds_prtcl { + NONE = 0, + PCIE1, + PCIE2, + SATA1, + SGMII_TSEC1, + SGMII_TSEC2, +}; + +enum srds { + FSL_SRDS_1 = 0, + FSL_SRDS_2 = 1, +}; + +int is_serdes_configured(enum srds_prtcl device); +void fsl_serdes_init(void); +const char *serdes_clock_to_string(u32 clock); + +int serdes_get_first_lane(u32 sd, enum srds_prtcl device); +enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane); + +#endif /* __FSL_SERDES_H */ diff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h new file mode 100644 index 0000000..7995fe2 --- /dev/null +++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h @@ -0,0 +1,493 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ASM_ARCH_LS102XA_IMMAP_H_ +#define __ASM_ARCH_LS102XA_IMMAP_H_ + +#define SVR_MAJ(svr) (((svr) >> 4) & 0xf) +#define SVR_MIN(svr) (((svr) >> 0) & 0xf) +#define SVR_SOC_VER(svr) (((svr) >> 8) & 0x7ff) +#define IS_E_PROCESSOR(svr) (svr & 0x80000) + +#define SOC_VER_SLS1020 0x00 +#define SOC_VER_LS1020 0x10 +#define SOC_VER_LS1021 0x11 +#define SOC_VER_LS1022 0x12 + +#define RCWSR0_SYS_PLL_RAT_SHIFT 25 +#define RCWSR0_SYS_PLL_RAT_MASK 0x1f +#define RCWSR0_MEM_PLL_RAT_SHIFT 16 +#define RCWSR0_MEM_PLL_RAT_MASK 0x3f + +#define RCWSR4_SRDS1_PRTCL_SHIFT 24 +#define RCWSR4_SRDS1_PRTCL_MASK 0xff000000 + +#define TIMER_COMP_VAL 0xffffffff +#define ARCH_TIMER_CTRL_ENABLE (1 << 0) +#define SYS_COUNTER_CTRL_ENABLE (1 << 24) + +struct sys_info { + unsigned long freq_processor[CONFIG_MAX_CPUS]; + unsigned long freq_systembus; + unsigned long freq_ddrbus; + unsigned long freq_localbus; +}; + +/* Device Configuration and Pin Control */ +struct ccsr_gur { + u32 porsr1; /* POR status 1 */ + u32 porsr2; /* POR status 2 */ + u8 res_008[0x20-0x8]; + u32 gpporcr1; /* General-purpose POR configuration */ + u32 gpporcr2; + u32 dcfg_fusesr; /* Fuse status register */ + u8 res_02c[0x70-0x2c]; + u32 devdisr; /* Device disable control */ + u32 devdisr2; /* Device disable control 2 */ + u32 devdisr3; /* Device disable control 3 */ + u32 devdisr4; /* Device disable control 4 */ + u32 devdisr5; /* Device disable control 5 */ + u8 res_084[0x94-0x84]; + u32 coredisru; /* uppper portion for support of 64 cores */ + u32 coredisrl; /* lower portion for support of 64 cores */ + u8 res_09c[0xa4-0x9c]; + u32 svr; /* System version */ + u8 res_0a8[0xb0-0xa8]; + u32 rstcr; /* Reset control */ + u32 rstrqpblsr; /* Reset request preboot loader status */ + u8 res_0b8[0xc0-0xb8]; + u32 rstrqmr1; /* Reset request mask */ + u8 res_0c4[0xc8-0xc4]; + u32 rstrqsr1; /* Reset request status */ + u8 res_0cc[0xd4-0xcc]; + u32 rstrqwdtmrl; /* Reset request WDT mask */ + u8 res_0d8[0xdc-0xd8]; + u32 rstrqwdtsrl; /* Reset request WDT status */ + u8 res_0e0[0xe4-0xe0]; + u32 brrl; /* Boot release */ + u8 res_0e8[0x100-0xe8]; + u32 rcwsr[16]; /* Reset control word status */ + u8 res_140[0x200-0x140]; + u32 scratchrw[4]; /* Scratch Read/Write */ + u8 res_210[0x300-0x210]; + u32 scratchw1r[4]; /* Scratch Read (Write once) */ + u8 res_310[0x400-0x310]; + u32 crstsr; + u8 res_404[0x550-0x404]; + u32 sataliodnr; + u8 res_554[0x604-0x554]; + u32 pamubypenr; + u32 dmacr1; + u8 res_60c[0x740-0x60c]; /* add more registers when needed */ + u32 tp_ityp[64]; /* Topology Initiator Type Register */ + struct { + u32 upper; + u32 lower; + } tp_cluster[1]; /* Core Cluster n Topology Register */ + u8 res_848[0xe60-0x848]; + u32 ddrclkdr; + u8 res_e60[0xe68-0xe64]; + u32 ifcclkdr; + u8 res_e68[0xe80-0xe6c]; + u32 sdhcpcr; +}; + +#define SCFG_SCFGREVCR_REV 0xffffffff +#define SCFG_SCFGREVCR_NOREV 0 +#define SCFG_ETSECDMAMCR_LE_BD_FR 0xf8001a0f +#define SCFG_ETSECCMCR_GE2_CLK125 0x04000000 +#define SCFG_PIXCLKCR_PXCKEN 0x80000000 + +/* Supplemental Configuration Unit */ +struct ccsr_scfg { + u32 dpslpcr; + u32 resv0[2]; + u32 etsecclkdpslpcr; + u32 resv1[5]; + u32 fuseovrdcr; + u32 pixclkcr; + u32 resv2[5]; + u32 spimsicr; + u32 resv3[6]; + u32 pex1pmwrcr; + u32 pex1pmrdsr; + u32 resv4[3]; + u32 usb3prm1cr; + u32 usb4prm2cr; + u32 pex1rdmsgpldlsbsr; + u32 pex1rdmsgpldmsbsr; + u32 pex2rdmsgpldlsbsr; + u32 pex2rdmsgpldmsbsr; + u32 pex1rdmmsgrqsr; + u32 pex2rdmmsgrqsr; + u32 spimsiclrcr; + u32 pex1mscportsr; + u32 pex2mscportsr; + u32 pex2pmwrcr; + u32 resv5[24]; + u32 mac1_streamid; + u32 mac2_streamid; + u32 mac3_streamid; + u32 pex1_streamid; + u32 pex2_streamid; + u32 dma_streamid; + u32 sata_streamid; + u32 usb3_streamid; + u32 qe_streamid; + u32 sdhc_streamid; + u32 adma_streamid; + u32 letechsftrstcr; + u32 core0_sft_rst; + u32 core1_sft_rst; + u32 resv6[1]; + u32 usb_hi_addr; + u32 etsecclkadjcr; + u32 sai_clk; + u32 resv7[1]; + u32 dcu_streamid; + u32 usb2_streamid; + u32 ftm_reset; + u32 altcbar; + u32 qspi_cfg; + u32 pmcintecr; + u32 pmcintlecr; + u32 pmcintsr; + u32 qos1; + u32 qos2; + u32 qos3; + u32 cci_cfg; + u32 resv8[1]; + u32 etsecdmamcr; + u32 usb3prm3cr; + u32 resv9[1]; + u32 debug_streamid; + u32 resv10[5]; + u32 snpcnfgcr; + u32 resv11[1]; + u32 intpcr; + u32 resv12[20]; + u32 scfgrevcr; + u32 coresrencr; + u32 pex2pmrdsr; + u32 ddrc1cr; + u32 ddrc2cr; + u32 ddrc3cr; + u32 ddrc4cr; + u32 ddrgcr; + u32 resv13[120]; + u32 qeioclkcr; + u32 etsecmcr; + u32 sdhciovserlcr; + u32 resv14[61]; + u32 sparecr; +}; + +/* Clocking */ +struct ccsr_clk { + struct { + u32 clkcncsr; /* core cluster n clock control status */ + u8 res_004[0x1c]; + } clkcsr[2]; + u8 res_040[0x7c0]; /* 0x100 */ + struct { + u32 pllcngsr; + u8 res_804[0x1c]; + } pllcgsr[2]; + u8 res_840[0x1c0]; + u32 clkpcsr; /* 0xa00 Platform clock domain control/status */ + u8 res_a04[0x1fc]; + u32 pllpgsr; /* 0xc00 Platform PLL General Status */ + u8 res_c04[0x1c]; + u32 plldgsr; /* 0xc20 DDR PLL General Status */ + u8 res_c24[0x3dc]; +}; + +/* System Counter */ +struct sctr_regs { + u32 cntcr; + u32 cntsr; + u32 cntcv1; + u32 cntcv2; + u32 resv1[4]; + u32 cntfid0; + u32 cntfid1; + u32 resv2[1002]; + u32 counterid[12]; +}; + +#define MAX_SERDES 1 +#define SRDS_MAX_LANES 4 +#define SRDS_MAX_BANK 2 + +#define SRDS_RSTCTL_RST 0x80000000 +#define SRDS_RSTCTL_RSTDONE 0x40000000 +#define SRDS_RSTCTL_RSTERR 0x20000000 +#define SRDS_RSTCTL_SWRST 0x10000000 +#define SRDS_RSTCTL_SDEN 0x00000020 +#define SRDS_RSTCTL_SDRST_B 0x00000040 +#define SRDS_RSTCTL_PLLRST_B 0x00000080 +#define SRDS_PLLCR0_POFF 0x80000000 +#define SRDS_PLLCR0_RFCK_SEL_MASK 0x70000000 +#define SRDS_PLLCR0_RFCK_SEL_100 0x00000000 +#define SRDS_PLLCR0_RFCK_SEL_125 0x10000000 +#define SRDS_PLLCR0_RFCK_SEL_156_25 0x20000000 +#define SRDS_PLLCR0_RFCK_SEL_150 0x30000000 +#define SRDS_PLLCR0_RFCK_SEL_161_13 0x40000000 +#define SRDS_PLLCR0_RFCK_SEL_122_88 0x50000000 +#define SRDS_PLLCR0_PLL_LCK 0x00800000 +#define SRDS_PLLCR0_FRATE_SEL_MASK 0x000f0000 +#define SRDS_PLLCR0_FRATE_SEL_5 0x00000000 +#define SRDS_PLLCR0_FRATE_SEL_3_75 0x00050000 +#define SRDS_PLLCR0_FRATE_SEL_5_15 0x00060000 +#define SRDS_PLLCR0_FRATE_SEL_4 0x00070000 +#define SRDS_PLLCR0_FRATE_SEL_3_12 0x00090000 +#define SRDS_PLLCR0_FRATE_SEL_3 0x000a0000 +#define SRDS_PLLCR1_PLL_BWSEL 0x08000000 + +struct ccsr_serdes { + struct { + u32 rstctl; /* Reset Control Register */ + + u32 pllcr0; /* PLL Control Register 0 */ + + u32 pllcr1; /* PLL Control Register 1 */ + u32 res_0c; /* 0x00c */ + u32 pllcr3; + u32 pllcr4; + u8 res_18[0x20-0x18]; + } bank[2]; + u8 res_40[0x90-0x40]; + u32 srdstcalcr; /* 0x90 TX Calibration Control */ + u8 res_94[0xa0-0x94]; + u32 srdsrcalcr; /* 0xa0 RX Calibration Control */ + u8 res_a4[0xb0-0xa4]; + u32 srdsgr0; /* 0xb0 General Register 0 */ + u8 res_b4[0xe0-0xb4]; + u32 srdspccr0; /* 0xe0 Protocol Converter Config 0 */ + u32 srdspccr1; /* 0xe4 Protocol Converter Config 1 */ + u32 srdspccr2; /* 0xe8 Protocol Converter Config 2 */ + u32 srdspccr3; /* 0xec Protocol Converter Config 3 */ + u32 srdspccr4; /* 0xf0 Protocol Converter Config 4 */ + u8 res_f4[0x100-0xf4]; + struct { + u32 lnpssr; /* 0x100, 0x120, ..., 0x1e0 */ + u8 res_104[0x120-0x104]; + } srdslnpssr[4]; + u8 res_180[0x300-0x180]; + u32 srdspexeqcr; + u32 srdspexeqpcr[11]; + u8 res_330[0x400-0x330]; + u32 srdspexapcr; + u8 res_404[0x440-0x404]; + u32 srdspexbpcr; + u8 res_444[0x800-0x444]; + struct { + u32 gcr0; /* 0x800 General Control Register 0 */ + u32 gcr1; /* 0x804 General Control Register 1 */ + u32 gcr2; /* 0x808 General Control Register 2 */ + u32 sscr0; + u32 recr0; /* 0x810 Receive Equalization Control */ + u32 recr1; + u32 tecr0; /* 0x818 Transmit Equalization Control */ + u32 sscr1; + u32 ttlcr0; /* 0x820 Transition Tracking Loop Ctrl 0 */ + u8 res_824[0x83c-0x824]; + u32 tcsr3; + } lane[4]; /* Lane A, B, C, D, E, F, G, H */ + u8 res_a00[0x1000-0xa00]; /* from 0xa00 to 0xfff */ +}; + +#define DDR_SDRAM_CFG 0x470c0008 +#define DDR_CS0_BNDS 0x008000bf +#define DDR_CS0_CONFIG 0x80014302 +#define DDR_TIMING_CFG_0 0x50550004 +#define DDR_TIMING_CFG_1 0xbcb38c56 +#define DDR_TIMING_CFG_2 0x0040d120 +#define DDR_TIMING_CFG_3 0x010e1000 +#define DDR_TIMING_CFG_4 0x00000001 +#define DDR_TIMING_CFG_5 0x03401400 +#define DDR_SDRAM_CFG_2 0x00401010 +#define DDR_SDRAM_MODE 0x00061c60 +#define DDR_SDRAM_MODE_2 0x00180000 +#define DDR_SDRAM_INTERVAL 0x18600618 +#define DDR_DDR_WRLVL_CNTL 0x8655f605 +#define DDR_DDR_WRLVL_CNTL_2 0x05060607 +#define DDR_DDR_WRLVL_CNTL_3 0x05050505 +#define DDR_DDR_CDR1 0x80040000 +#define DDR_DDR_CDR2 0x00000001 +#define DDR_SDRAM_CLK_CNTL 0x02000000 +#define DDR_DDR_ZQ_CNTL 0x89080600 +#define DDR_CS0_CONFIG_2 0 +#define DDR_SDRAM_CFG_MEM_EN 0x80000000 + +/* DDR memory controller registers */ +struct ccsr_ddr { + u32 cs0_bnds; /* Chip Select 0 Memory Bounds */ + u32 resv1[1]; + u32 cs1_bnds; /* Chip Select 1 Memory Bounds */ + u32 resv2[1]; + u32 cs2_bnds; /* Chip Select 2 Memory Bounds */ + u32 resv3[1]; + u32 cs3_bnds; /* Chip Select 3 Memory Bounds */ + u32 resv4[25]; + u32 cs0_config; /* Chip Select Configuration */ + u32 cs1_config; /* Chip Select Configuration */ + u32 cs2_config; /* Chip Select Configuration */ + u32 cs3_config; /* Chip Select Configuration */ + u32 resv5[12]; + u32 cs0_config_2; /* Chip Select Configuration 2 */ + u32 cs1_config_2; /* Chip Select Configuration 2 */ + u32 cs2_config_2; /* Chip Select Configuration 2 */ + u32 cs3_config_2; /* Chip Select Configuration 2 */ + u32 resv6[12]; + u32 timing_cfg_3; /* SDRAM Timing Configuration 3 */ + u32 timing_cfg_0; /* SDRAM Timing Configuration 0 */ + u32 timing_cfg_1; /* SDRAM Timing Configuration 1 */ + u32 timing_cfg_2; /* SDRAM Timing Configuration 2 */ + u32 sdram_cfg; /* SDRAM Control Configuration */ + u32 sdram_cfg_2; /* SDRAM Control Configuration 2 */ + u32 sdram_mode; /* SDRAM Mode Configuration */ + u32 sdram_mode_2; /* SDRAM Mode Configuration 2 */ + u32 sdram_md_cntl; /* SDRAM Mode Control */ + u32 sdram_interval; /* SDRAM Interval Configuration */ + u32 sdram_data_init; /* SDRAM Data initialization */ + u32 resv7[1]; + u32 sdram_clk_cntl; /* SDRAM Clock Control */ + u32 resv8[5]; + u32 init_addr; /* training init addr */ + u32 init_ext_addr; /* training init extended addr */ + u32 resv9[4]; + u32 timing_cfg_4; /* SDRAM Timing Configuration 4 */ + u32 timing_cfg_5; /* SDRAM Timing Configuration 5 */ + u32 timing_cfg_6; /* SDRAM Timing Configuration 6 */ + u32 timing_cfg_7; /* SDRAM Timing Configuration 7 */ + u32 ddr_zq_cntl; /* ZQ calibration control*/ + u32 ddr_wrlvl_cntl; /* write leveling control*/ + u32 resv10[1]; + u32 ddr_sr_cntr; /* self refresvh counter */ + u32 ddr_sdram_rcw_1; /* Control Words 1 */ + u32 ddr_sdram_rcw_2; /* Control Words 2 */ + u32 resv11[2]; + u32 ddr_wrlvl_cntl_2; /* write leveling control 2 */ + u32 ddr_wrlvl_cntl_3; /* write leveling control 3 */ + u32 resv12[2]; + u32 ddr_sdram_rcw_3; /* Control Words 3 */ + u32 ddr_sdram_rcw_4; /* Control Words 4 */ + u32 ddr_sdram_rcw_5; /* Control Words 5 */ + u32 ddr_sdram_rcw_6; /* Control Words 6 */ + u32 resv13[20]; + u32 sdram_mode_3; /* SDRAM Mode Configuration 3 */ + u32 sdram_mode_4; /* SDRAM Mode Configuration 4 */ + u32 sdram_mode_5; /* SDRAM Mode Configuration 5 */ + u32 sdram_mode_6; /* SDRAM Mode Configuration 6 */ + u32 sdram_mode_7; /* SDRAM Mode Configuration 7 */ + u32 sdram_mode_8; /* SDRAM Mode Configuration 8 */ + u32 sdram_mode_9; /* SDRAM Mode Configuration 9 */ + u32 sdram_mode_10; /* SDRAM Mode Configuration 10 */ + u32 sdram_mode_11; /* SDRAM Mode Configuration 11 */ + u32 sdram_mode_12; /* SDRAM Mode Configuration 12 */ + u32 sdram_mode_13; /* SDRAM Mode Configuration 13 */ + u32 sdram_mode_14; /* SDRAM Mode Configuration 14 */ + u32 sdram_mode_15; /* SDRAM Mode Configuration 15 */ + u32 sdram_mode_16; /* SDRAM Mode Configuration 16 */ + u32 resv14[4]; + u32 timing_cfg_8; /* SDRAM Timing Configuration 8 */ + u32 timing_cfg_9; /* SDRAM Timing Configuration 9 */ + u32 resv15[2]; + u32 sdram_cfg_3; /* SDRAM Control Configuration 3 */ + u32 resv16[15]; + u32 deskew_cntl; /* SDRAM Deskew Control */ + u32 resv17[545]; + u32 ddr_dsr1; /* Debug Status 1 */ + u32 ddr_dsr2; /* Debug Status 2 */ + u32 ddr_cdr1; /* Control Driver 1 */ + u32 ddr_cdr2; /* Control Driver 2 */ + u32 resv18[50]; + u32 ip_rev1; /* IP Block Revision 1 */ + u32 ip_rev2; /* IP Block Revision 2 */ + u32 eor; /* Enhanced Optimization Register */ + u32 resv19[63]; + u32 mtcr; /* Memory Test Control Register */ + u32 resv20[7]; + u32 mtp1; /* Memory Test Pattern 1 */ + u32 mtp2; /* Memory Test Pattern 2 */ + u32 mtp3; /* Memory Test Pattern 3 */ + u32 mtp4; /* Memory Test Pattern 4 */ + u32 mtp5; /* Memory Test Pattern 5 */ + u32 mtp6; /* Memory Test Pattern 6 */ + u32 mtp7; /* Memory Test Pattern 7 */ + u32 mtp8; /* Memory Test Pattern 8 */ + u32 mtp9; /* Memory Test Pattern 9 */ + u32 mtp10; /* Memory Test Pattern 10 */ + u32 resv21[6]; + u32 ddr_mt_st_ext_addr; /* Memory Test Start Extended Address */ + u32 ddr_mt_st_addr; /* Memory Test Start Address */ + u32 ddr_mt_end_ext_addr; /* Memory Test End Extended Address */ + u32 ddr_mt_end_addr; /* Memory Test End Address */ + u32 resv22[36]; + u32 data_err_inject_hi; /* Data Path Err Injection Mask High */ + u32 data_err_inject_lo; /* Data Path Err Injection Mask Low */ + u32 ecc_err_inject; /* Data Path Err Injection Mask ECC */ + u32 resv23[5]; + u32 capture_data_hi; /* Data Path Read Capture High */ + u32 capture_data_lo; /* Data Path Read Capture Low */ + u32 capture_ecc; /* Data Path Read Capture ECC */ + u32 resv24[5]; + u32 err_detect; /* Error Detect */ + u32 err_disable; /* Error Disable */ + u32 err_int_en; + u32 capture_attributes; /* Error Attrs Capture */ + u32 capture_address; /* Error Addr Capture */ + u32 capture_ext_address; /* Error Extended Addr Capture */ + u32 err_sbe; /* Single-Bit ECC Error Management */ + u32 resv25[105]; +}; + +#define CCI400_CTRLORD_TERM_BARRIER 0x00000008 +#define CCI400_CTRLORD_EN_BARRIER 0 + +/* CCI-400 registers */ +struct ccsr_cci400 { + u32 ctrl_ord; /* Control Override */ + u32 spec_ctrl; /* Speculation Control */ + u32 secure_access; /* Secure Access */ + u32 status; /* Status */ + u32 impr_err; /* Imprecise Error */ + u8 res_14[0x100 - 0x14]; + u32 pmcr; /* Performance Monitor Control */ + u8 res_104[0xfd0 - 0x104]; + u32 pid[8]; /* Peripheral ID */ + u32 cid[4]; /* Component ID */ + struct { + u32 snoop_ctrl; /* Snoop Control */ + u32 sha_ord; /* Shareable Override */ + u8 res_1008[0x1100 - 0x1008]; + u32 rc_qos_ord; /* read channel QoS Value Override */ + u32 wc_qos_ord; /* read channel QoS Value Override */ + u8 res_1108[0x110c - 0x1108]; + u32 qos_ctrl; /* QoS Control */ + u32 max_ot; /* Max OT */ + u8 res_1114[0x1130 - 0x1114]; + u32 target_lat; /* Target Latency */ + u32 latency_regu; /* Latency Regulation */ + u32 qos_range; /* QoS Range */ + u8 res_113c[0x2000 - 0x113c]; + } slave[5]; /* Slave Interface */ + u8 res_6000[0x9004 - 0x6000]; + u32 cycle_counter; /* Cycle counter */ + u32 count_ctrl; /* Count Control */ + u32 overflow_status; /* Overflow Flag Status */ + u8 res_9010[0xa000 - 0x9010]; + struct { + u32 event_select; /* Event Select */ + u32 event_count; /* Event Count */ + u32 counter_ctrl; /* Counter Control */ + u32 overflow_status; /* Overflow Flag Status */ + u8 res_a010[0xb000 - 0xa010]; + } pcounter[4]; /* Performance Counter */ + u8 res_e004[0x10000 - 0xe004]; +}; +#endif /* __ASM_ARCH_LS102XA_IMMAP_H_ */ diff --git a/arch/arm/include/asm/arch-ls102xa/imx-regs.h b/arch/arm/include/asm/arch-ls102xa/imx-regs.h new file mode 100644 index 0000000..f9cd75b --- /dev/null +++ b/arch/arm/include/asm/arch-ls102xa/imx-regs.h @@ -0,0 +1,53 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * + */ + +#ifndef __ASM_ARCH_IMX_REGS_H__ +#define __ASM_ARCH_IMX_REGS_H__ + +#define I2C_QUIRK_REG /* enable 8-bit driver */ + +#ifdef CONFIG_LPUART_32B_REG +struct lpuart_fsl { + u32 baud; + u32 stat; + u32 ctrl; + u32 data; + u32 match; + u32 modir; + u32 fifo; + u32 water; +}; +#else +struct lpuart_fsl { + u8 ubdh; + u8 ubdl; + u8 uc1; + u8 uc2; + u8 us1; + u8 us2; + u8 uc3; + u8 ud; + u8 uma1; + u8 uma2; + u8 uc4; + u8 uc5; + u8 ued; + u8 umodem; + u8 uir; + u8 reserved; + u8 upfifo; + u8 ucfifo; + u8 usfifo; + u8 utwfifo; + u8 utcfifo; + u8 urwfifo; + u8 urcfifo; + u8 rsvd[28]; +}; +#endif + +#endif /* __ASM_ARCH_IMX_REGS_H__ */ diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h index 339c789..c11674f 100644 --- a/arch/arm/include/asm/arch-mx6/clock.h +++ b/arch/arm/include/asm/arch-mx6/clock.h @@ -52,12 +52,17 @@ enum enet_freq { u32 imx_get_uartclk(void); u32 imx_get_fecclk(void); unsigned int mxc_get_clock(enum mxc_clock clk); +void setup_gpmi_io_clk(u32 cfg); void enable_ocotp_clk(unsigned char enable); void enable_usboh3_clk(unsigned char enable); +void enable_uart_clk(unsigned char enable); +int enable_cspi_clock(unsigned char enable, unsigned spi_num); +int enable_usdhc_clk(unsigned char enable, unsigned bus_num); int enable_sata_clock(void); int enable_pcie_clock(void); int enable_i2c_clk(unsigned char enable, unsigned i2c_num); int enable_spi_clk(unsigned char enable, unsigned spi_num); void enable_ipu_clock(void); int enable_fec_anatop_clock(enum enet_freq freq); +void enable_enet_clk(unsigned char enable); #endif /* __ASM_ARCH_CLOCK_H */ diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 2631beb..40d50cc 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -88,8 +88,8 @@ #define AIPS2_ARB_BASE_ADDR 0x02100000 #define AIPS2_ARB_END_ADDR 0x021FFFFF #ifdef CONFIG_MX6SX -#define AIPS3_BASE_ADDR 0x02200000 -#define AIPS3_END_ADDR 0x022FFFFF +#define AIPS3_ARB_BASE_ADDR 0x02200000 +#define AIPS3_ARB_END_ADDR 0x022FFFFF #define WEIM_ARB_BASE_ADDR 0x50000000 #define WEIM_ARB_END_ADDR 0x57FFFFFF #define QSPI1_ARB_BASE_ADDR 0x60000000 @@ -358,6 +358,39 @@ struct src { u32 gpr10; }; +struct snvs_regs { + u32 hplr; /* 0x00 */ + u32 hpcomr; /* 0x04 */ + u32 hpcr; /* 0x08 */ + u32 spare1; /* 0x0c */ + u32 spare2; /* 0x10 */ + u32 hpsr; /* 0x14 */ + u32 spare3; /* 0x18 */ + u32 spare4; /* 0x1c */ + u32 spare5; /* 0x20 */ + u32 hprtcmr; /* 0x24 */ + u32 hprtclr; /* 0x28 */ + u32 hptamr; /* 0x2c */ + u32 hptalr; /* 0x30 */ + u32 lplr; /* 0x34 */ + u32 lpcr; /* 0x38 */ + u32 spare6; /* 0x3c */ + u32 spare7; /* 0x40 */ + u32 spare8; /* 0x44 */ + u32 spare9; /* 0x48 */ + u32 lpsr; /* 0x4c */ + u32 spare10; /* 0x50 */ + u32 spare11; /* 0x54 */ + u32 spare12; /* 0x58 */ + u32 lpsmcmr; /* 0x5c */ + u32 lpsmclr; /* 0x60 */ + u32 spare13; /* 0x64 */ + u32 lpgpr; /* 0x68 */ + u8 spare_block[0xbf8 - 0x6c]; /* 0x6c */ + u32 hpvidr1; /* 0xbf8 */ + u32 hpvidr2; /* 0xbfc */ +}; + /* GPR1 bitfields */ #define IOMUXC_GPR1_ENET_CLK_SEL_OFFSET 21 #define IOMUXC_GPR1_ENET_CLK_SEL_MASK (1 << IOMUXC_GPR1_ENET_CLK_SEL_OFFSET) @@ -419,6 +452,19 @@ struct iomuxc { u32 gpr[14]; }; +struct gpc { + u32 cntr; + u32 pgr; + u32 imr1; + u32 imr2; + u32 imr3; + u32 imr4; + u32 isr1; + u32 isr2; + u32 isr3; + u32 isr4; +}; + #define IOMUXC_GPR2_COUNTER_RESET_VAL_OFFSET 20 #define IOMUXC_GPR2_COUNTER_RESET_VAL_MASK (3<> 12)&0xff) -/* use with MXC_CPU_ constants */ -#define is_cpu_type(cpu) (cpu_type(get_cpu_rev()) == cpu) +/* both macros return/take MXC_CPU_ constants */ +#define get_cpu_type() (cpu_type(get_cpu_rev())) +#define is_cpu_type(cpu) (get_cpu_type() == cpu) const char *get_imx_type(u32 imxtype); unsigned imx_ddr_size(void); diff --git a/arch/arm/include/asm/arch-tegra/gpio.h b/arch/arm/include/asm/arch-tegra/gpio.h index 44cd455..7334e0c 100644 --- a/arch/arm/include/asm/arch-tegra/gpio.h +++ b/arch/arm/include/asm/arch-tegra/gpio.h @@ -6,6 +6,8 @@ #ifndef _TEGRA_GPIO_H_ #define _TEGRA_GPIO_H_ +#define TEGRA_GPIOS_PER_PORT 8 +#define TEGRA_PORTS_PER_BANK 4 #define MAX_NUM_GPIOS (TEGRA_GPIO_PORTS * TEGRA_GPIO_BANKS * 8) #define GPIO_NAME_SIZE 20 /* gpio_request max label len */ @@ -25,9 +27,14 @@ struct tegra_gpio_config { u32 init:2; }; -/* - * Tegra-specific GPIO API +/** + * tegra_spl_gpio_direction_output() - set the output value of a GPIO + * + * This function is only used from SPL on seaboard, which needs to enable a + * GPIO to get the UART running. It could be done in U-Boot rather than SPL, + * but for now, this gets it working */ +int tegra_spl_gpio_direction_output(int gpio, int value); /** * Configure a list of GPIOs @@ -37,8 +44,4 @@ struct tegra_gpio_config { */ void gpio_config_table(const struct tegra_gpio_config *config, int len); -void gpio_info(void); - -#define gpio_status() gpio_info() - #endif /* TEGRA_GPIO_H_ */ diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h index 5f2a5f4..be80434 100644 --- a/arch/arm/include/asm/config.h +++ b/arch/arm/include/asm/config.h @@ -23,4 +23,8 @@ #include #endif +#ifdef CONFIG_LS102XA +#include +#endif + #endif diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index 63e4ad5..c69d064 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -44,10 +44,35 @@ struct arch_global_data { #include +#ifdef __clang__ + +#define DECLARE_GLOBAL_DATA_PTR +#define gd get_gd() + +static inline gd_t *get_gd(void) +{ + gd_t *gd_ptr; + +#ifdef CONFIG_ARM64 + /* + * Make will already error that reserving x18 is not supported at the + * time of writing, clang: error: unknown argument: '-ffixed-x18' + */ + __asm__ volatile("mov %0, x18\n" : "=r" (gd_ptr)); +#else + __asm__ volatile("mov %0, r9\n" : "=r" (gd_ptr)); +#endif + + return gd_ptr; +} + +#else + #ifdef CONFIG_ARM64 #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("x18") #else #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r9") #endif +#endif #endif /* __ASM_GBL_DATA_H */ diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h b/arch/arm/include/asm/imx-common/iomux-v3.h index 70ee86c..36db6ea 100644 --- a/arch/arm/include/asm/imx-common/iomux-v3.h +++ b/arch/arm/include/asm/imx-common/iomux-v3.h @@ -206,4 +206,12 @@ if (is_cpu_type(MXC_CPU_MX6Q)) { \ imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x)) #endif + +#if defined(CONFIG_MX6QDL) +#define IOMUX_PAD_CTRL(name, ctrl) NEW_PAD_CTRL(MX6Q_PAD_##name, ctrl), \ + NEW_PAD_CTRL(MX6DL_PAD_##name, ctrl) +#else +#define IOMUX_PAD_CTRL(name, ctrl) NEW_PAD_CTRL(MX6_PAD_##name, ctrl) +#endif + #endif /* __MACH_IOMUX_V3_H__*/ diff --git a/arch/arm/include/asm/imx-common/mxc_i2c.h b/arch/arm/include/asm/imx-common/mxc_i2c.h index 47a9edc..31eb063 100644 --- a/arch/arm/include/asm/imx-common/mxc_i2c.h +++ b/arch/arm/include/asm/imx-common/mxc_i2c.h @@ -6,6 +6,7 @@ #ifndef __ASM_ARCH_MXC_MXC_I2C_H__ #define __ASM_ARCH_MXC_MXC_I2C_H__ #include +#include struct i2c_pin_ctrl { iomux_v3_cfg_t i2c_mode; @@ -19,6 +20,72 @@ struct i2c_pads_info { struct i2c_pin_ctrl sda; }; +#define I2C_PADS_INFO_CPU(cpu, i2cnum, scl_pad, scl_bank, scl_gp, \ + sda_pad, sda_bank, sda_gp, ctrl) { \ + .scl = { \ + .i2c_mode = NEW_PAD_CTRL(cpu##_PAD_##scl_pad##__##i2cnum##_SCL, ctrl), \ + .gpio_mode = NEW_PAD_CTRL( \ + cpu##_PAD_##scl_pad##__GPIO##scl_bank##_IO##scl_gp, ctrl), \ + .gp = IMX_GPIO_NR(scl_bank, scl_gp) \ + }, \ + .sda = { \ + .i2c_mode = NEW_PAD_CTRL(cpu##_PAD_##sda_pad##__##i2cnum##_SDA, ctrl), \ + .gpio_mode = NEW_PAD_CTRL( \ + cpu##_PAD_##sda_pad##__GPIO##sda_bank##_IO##sda_gp, ctrl), \ + .gp = IMX_GPIO_NR(sda_bank, sda_gp) \ + } \ +} + +#if defined(CONFIG_MX6QDL) +#define I2C_PADS_INFO_ENTRY(i2cnum, scl_pad, scl_bank, scl_gp, \ + sda_pad, sda_bank, sda_gp, ctrl) \ + I2C_PADS_INFO_CPU(MX6Q, i2cnum, scl_pad, scl_bank, scl_gp, \ + sda_pad, sda_bank, sda_gp, ctrl), \ + I2C_PADS_INFO_CPU(MX6DL, i2cnum, scl_pad, scl_bank, scl_gp, \ + sda_pad, sda_bank, sda_gp, ctrl) +#define I2C_PADS_INFO_ENTRY_SPACING 2 +#else +#define I2C_PADS_INFO_ENTRY(i2cnum, scl_pad, scl_bank, scl_gp, \ + sda_pad, sda_bank, sda_gp, ctrl) \ + I2C_PADS_INFO_CPU(MX6, i2cnum, scl_pad, scl_bank, scl_gp, \ + sda_pad, sda_bank, sda_gp, ctrl) +#define I2C_PADS_INFO_ENTRY_SPACING 1 +#endif + + +#if defined(CONFIG_MX6QDL) +#define I2C_PADS(name, scl_i2c, scl_gpio, scl_gp, sda_i2c, sda_gpio, sda_gp) \ + struct i2c_pads_info mx6q_##name = { \ + .scl = { \ + .i2c_mode = MX6Q_##scl_i2c, \ + .gpio_mode = MX6Q_##scl_gpio, \ + .gp = scl_gp, \ + }, \ + .sda = { \ + .i2c_mode = MX6Q_##sda_i2c, \ + .gpio_mode = MX6Q_##sda_gpio, \ + .gp = sda_gp, \ + } \ + }; \ + struct i2c_pads_info mx6s_##name = { \ + .scl = { \ + .i2c_mode = MX6DL_##scl_i2c, \ + .gpio_mode = MX6DL_##scl_gpio, \ + .gp = scl_gp, \ + }, \ + .sda = { \ + .i2c_mode = MX6DL_##sda_i2c, \ + .gpio_mode = MX6DL_##sda_gpio, \ + .gp = sda_gp, \ + } \ + }; + + +#define I2C_PADS_INFO(name) \ + (is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) ? \ + &mx6q_##name : &mx6s_##name +#endif + void setup_i2c(unsigned i2c_index, int speed, int slave_addr, struct i2c_pads_info *p); void bus_i2c_init(void *base, int speed, int slave_addr, @@ -27,4 +94,15 @@ int bus_i2c_read(void *base, uchar chip, uint addr, int alen, uchar *buf, int len); int bus_i2c_write(void *base, uchar chip, uint addr, int alen, const uchar *buf, int len); + +static inline int i2c_get_info_entry_offset(void) { +#if defined(CONFIG_MX6QDL) + int cpu = get_cpu_type(); + + if ((cpu != MXC_CPU_MX6Q) && (cpu != MXC_CPU_MX6D)) + return 1; +#endif + return 0; +} + #endif diff --git a/arch/arm/include/asm/imx-common/spi.h b/arch/arm/include/asm/imx-common/spi.h new file mode 100644 index 0000000..1d4473a --- /dev/null +++ b/arch/arm/include/asm/imx-common/spi.h @@ -0,0 +1,17 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MXC_SPI_H_ +#define __MXC_SPI_H_ + +/* + * Board-level chip-select callback + * Should return GPIO # to be used for chip-select + */ + +int board_spi_cs_gpio(unsigned bus, unsigned cs); + +#endif diff --git a/arch/arm/include/asm/imx-common/video.h b/arch/arm/include/asm/imx-common/video.h index 2d94850..c0c4ed3 100644 --- a/arch/arm/include/asm/imx-common/video.h +++ b/arch/arm/include/asm/imx-common/video.h @@ -9,11 +9,24 @@ #include struct display_info_t { - int bus; + int bus; /* (bus >> 8) is gpio to enable bus if <>0 */ int addr; int pixfmt; int (*detect)(struct display_info_t const *dev); void (*enable)(struct display_info_t const *dev); + +#define FB_HDMI 0 +#define FB_LCD 1 +#define FB_LVDS 2 +#define FB_LVDS2 3 +#define FB_COUNT 4 + int fbtype; + +#define FBF_MODESTR 1 +#define FBF_JEIDA 2 +#define FBF_SPLITMODE 4 +#define FBF_SPI 8 + int fbflags; struct fb_videomode mode; }; @@ -21,4 +34,837 @@ struct display_info_t { extern int detect_hdmi(struct display_info_t const *dev); #endif +#ifdef CONFIG_IMX_VIDEO_SKIP +extern const struct display_info_t displays[]; +extern size_t display_count; +#endif + +void board_enable_hdmi(const struct display_info_t *di); +void board_enable_lcd(const struct display_info_t *di); +void board_enable_lvds(const struct display_info_t *di); +void board_enable_lvds2(const struct display_info_t *di); + +void imx_enable_fb(struct display_info_t const *di); +int imx_detect_i2c(struct display_info_t const *di); +void imx_setup_display(void); + +/* hdmi settings */ +#define IMX_VD50_1280_720M_60(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x50,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_MODESTR,\ + .mode = {\ + .name = "1280x720M@60",\ + .refresh = 60,\ + .xres = 1280,\ + .yres = 720,\ + .pixclock = 1000000000000ULL/((1280+216+72+80)*(720+22+3+5)*60),\ + .left_margin = 220,\ + .right_margin = 110,\ + .upper_margin = 20,\ + .lower_margin = 5,\ + .hsync_len = 40,\ + .vsync_len = 5,\ + .sync = FB_SYNC_EXT,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +#define IMX_VD50_1920_1080M_60(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x50,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_MODESTR,\ + .mode = {\ + .name = "1920x1080M@60",\ + .refresh = 60,\ + .xres = 1920,\ + .yres = 1080,\ + .pixclock = 1000000000000ULL/((1920+148+88+44)*(1080+36+4+5)*60),\ + .left_margin = 148,\ + .right_margin = 88,\ + .upper_margin = 36,\ + .lower_margin = 4,\ + .hsync_len = 44,\ + .vsync_len = 5,\ + .sync = 0,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + + +#define IMX_VD50_1024_768M_60(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x50,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_MODESTR,\ + .mode = {\ + .name = "1024x768M@60",\ + .refresh = 60,\ + .xres = 1024,\ + .yres = 768,\ + .pixclock = 1000000000000ULL/((1024+220+40+60)*(768+21+7+10)*60),\ + .left_margin = 220,\ + .right_margin = 40,\ + .upper_margin = 21,\ + .lower_margin = 7,\ + .hsync_len = 60,\ + .vsync_len = 10,\ + .sync = FB_SYNC_EXT,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +/* tsc2004 */ +#define IMX_VD48_CLAA_WVGA(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x48,\ + .pixfmt = IPU_PIX_FMT_RGB666,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_MODESTR,\ + .mode = {\ + .name = "CLAA-WVGA",\ + .refresh = 57,\ + .xres = 800,\ + .yres = 480,\ + .pixclock = 37037,\ + .left_margin = 40,\ + .right_margin = 60,\ + .upper_margin = 10,\ + .lower_margin = 10,\ + .hsync_len = 20,\ + .vsync_len = 10,\ + .sync = FB_SYNC_CLK_LAT_FALL,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +/* tsc2004 */ +#define IMX_VD48_SHARP_WVGA(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x48,\ + .pixfmt = IPU_PIX_FMT_RGB666,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_MODESTR,\ + .mode = {\ + .name = "sharp-wvga",\ + .refresh = 60,\ + .xres = 800,\ + .yres = 480,\ + .pixclock = 1000000000000ULL/((800+40+40+48)*(480+31+11+3)*60),\ + .left_margin = 40,\ + .right_margin = 40,\ + .upper_margin = 31,\ + .lower_margin = 11,\ + .hsync_len = 48,\ + .vsync_len = 3,\ + .sync = FB_SYNC_CLK_LAT_FALL,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +/* + * hitachi 640x240 + * vsync = 60 + * hsync = 260 * vsync = 15.6 Khz + * pixclk = 800 * hsync = 12.48 MHz + */ +#define IMX_VD48_HITACHI_HVGA(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x48,\ + .pixfmt = IPU_PIX_FMT_RGB666,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_MODESTR,\ + .mode = {\ + .name = "hitachi_hvga",\ + .refresh = 60,\ + .xres = 640,\ + .yres = 240,\ + .pixclock = 1000000000000ULL / (640+34+1+125) / (240+8+3+9) / 60,\ + .left_margin = 34,\ + .right_margin = 1,\ + .upper_margin = 8,\ + .lower_margin = 3,\ + .hsync_len = 125,\ + .vsync_len = 9,\ + .sync = FB_SYNC_CLK_LAT_FALL,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +/* tsc2004 */ +#define IMX_VD48_DC050WX(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x48,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_MODESTR,\ + .mode = {\ + .name = "DC050WX",\ + .refresh = 60,\ + .xres = 800,\ + .yres = 480,\ + .pixclock = 33898,\ + .left_margin = 96,\ + .right_margin = 24,\ + .upper_margin = 3,\ + .lower_margin = 10,\ + .hsync_len = 40,\ + .vsync_len = 32,\ + .sync = FB_SYNC_CLK_LAT_FALL,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +#define IMX_VD48_INNOLUX_WVGA(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x48,\ + .pixfmt = IPU_PIX_FMT_LVDS666,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .mode = {\ + .name = "INNOLUX-WVGA",\ + .refresh = 57,\ + .xres = 800,\ + .yres = 480,\ + .pixclock = 25000,\ + .left_margin = 45,\ + .right_margin = 1056 - 1 - 45 - 800,\ + .upper_margin = 22,\ + .lower_margin = 635 - 1 - 22 - 480,\ + .hsync_len = 1,\ + .vsync_len = 1,\ + .sync = 0,\ + .vmode = FB_VMODE_NONINTERLACED,\ + }\ +} + +#define IMX_VD48_OKAYA_480_272(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x48,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_MODESTR,\ + .mode = {\ + .name = "okaya_480x272",\ + .refresh = 57,\ + .xres = 480,\ + .yres = 272,\ + .pixclock = 97786,\ + .left_margin = 2,\ + .right_margin = 1,\ + .upper_margin = 3,\ + .lower_margin = 2,\ + .hsync_len = 41,\ + .vsync_len = 10,\ + .sync = FB_SYNC_CLK_LAT_FALL,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +/* tsc2004 */ +#define IMX_VD48_QVGA(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x48,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_MODESTR,\ + .mode = {\ + .name = "qvga",\ + .refresh = 60,\ + .xres = 320,\ + .yres = 240,\ + .pixclock = 37037,\ + .left_margin = 38,\ + .right_margin = 37,\ + .upper_margin = 16,\ + .lower_margin = 15,\ + .hsync_len = 30,\ + .vsync_len = 3,\ + .sync = 0,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +/* tsc2004 */ +#define IMX_VD48_AT035GT_07ET3(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x48,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_MODESTR,\ + .mode = {\ + .name = "AT035GT-07ET3",\ + .refresh = 60,\ + .xres = 320,\ + .yres = 240,\ + .pixclock = 1000000000000ULL/((320+40+18+30)*(240+10+9+3)*60),\ + .left_margin = 40,\ + .right_margin = 18,\ + .upper_margin = 10,\ + .lower_margin = 9,\ + .hsync_len = 30,\ + .vsync_len = 3,\ + .sync = 0,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +/* ili210x touch screen */ +#define IMX_VD41_AMP1024_600(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x41,\ + .pixfmt = IPU_PIX_FMT_LVDS666,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .mode = {\ + .name = "amp1024x600",\ + .refresh = 60,\ + .xres = 1024,\ + .yres = 600,\ + .pixclock = 1000000000000ULL/((1024+220+40+60)*(600+21+7+10)*60),\ + .left_margin = 220,\ + .right_margin = 40,\ + .upper_margin = 21,\ + .lower_margin = 7,\ + .hsync_len = 60,\ + .vsync_len = 10,\ + .sync = FB_SYNC_EXT,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +/* ft5x06 touch screen */ +#define IMX_VD38_LG1280_800(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x38,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_JEIDA,\ + .mode = {\ + .name = "lg1280x800",\ + .refresh = 60,\ + .xres = 1280,\ + .yres = 800,\ + .pixclock = 1000000000000ULL/((1280+48+80+32)*(800+15+2+6)*60),\ + .left_margin = 48,\ + .right_margin = 80,\ + .upper_margin = 15,\ + .lower_margin = 2,\ + .hsync_len = 32,\ + .vsync_len = 6,\ + .sync = FB_SYNC_EXT,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +/* ft5x06_ts */ +/* lg1280x800 is Jeida, this is not */ +#define IMX_VD38_HANNSTAR7(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x38,\ + .pixfmt = IPU_PIX_FMT_LVDS666,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = 0,\ + .mode = {\ + .name = "hannstar7",\ + .refresh = 60,\ + .xres = 1280,\ + .yres = 800,\ + .pixclock = 1000000000000ULL/((1280+48+80+32)*(800+15+2+6)*60),\ + .left_margin = 48,\ + .right_margin = 80,\ + .upper_margin = 15,\ + .lower_margin = 2,\ + .hsync_len = 32,\ + .vsync_len = 6,\ + .sync = FB_SYNC_EXT,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +/* ft5x06_ts */ +#define IMX_VD38_WSVGA(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x38,\ + .pixfmt = IPU_PIX_FMT_LVDS666,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .mode = {\ + .name = "wsvga",\ + .refresh = 60,\ + .xres = 1024,\ + .yres = 600,\ + .pixclock = 1000000000000ULL/((1024+220+40+60)*(600+21+7+10)*60),\ + .left_margin = 220,\ + .right_margin = 40,\ + .upper_margin = 21,\ + .lower_margin = 7,\ + .hsync_len = 60,\ + .vsync_len = 10,\ + .sync = FB_SYNC_EXT,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +/* fusion7 */ +#define IMX_VD10_FUSION7(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x10,\ + .pixfmt = IPU_PIX_FMT_RGB666,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_MODESTR,\ + .mode = {\ + .name = "fusion7",\ + .refresh = 60,\ + .xres = 800,\ + .yres = 480,\ + .pixclock = 1000000000000ULL/((800+96+24+136)*(480+31+11+3)*60),\ + .left_margin = 96,\ + .right_margin = 24,\ + .upper_margin = 31,\ + .lower_margin = 11,\ + .hsync_len = 136,\ + .vsync_len = 3,\ + .sync = FB_SYNC_CLK_LAT_FALL,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +/* egalax_ts */ +#define IMX_VD04_HANNSTAR(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x4,\ + .pixfmt = IPU_PIX_FMT_LVDS666,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .mode = {\ + .name = "hannstar",\ + .refresh = 60,\ + .xres = 1024,\ + .yres = 768,\ + .pixclock = 1000000000000ULL/((1024+220+40+60)*(768+21+7+10)*60),\ + .left_margin = 220,\ + .right_margin = 40,\ + .upper_margin = 21,\ + .lower_margin = 7,\ + .hsync_len = 60,\ + .vsync_len = 10,\ + .sync = FB_SYNC_EXT,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +#define IMX_VD04_1024_600(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x4,\ + .pixfmt = IPU_PIX_FMT_LVDS666,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .mode = {\ + .name = "1024x600",\ + .refresh = 60,\ + .xres = 1024,\ + .yres = 600,\ + .pixclock = 20408,\ + .left_margin = 144,\ + .right_margin = 40,\ + .upper_margin = 3,\ + .lower_margin = 11,\ + .hsync_len = 104,\ + .vsync_len = 10,\ + .sync = FB_SYNC_EXT,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +/* egalax_ts */ +#define IMX_VD04_LG9_7(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x4,\ + .pixfmt = IPU_PIX_FMT_LVDS666,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .mode = {\ + .name = "lg9.7",\ + .refresh = 60,\ + .xres = 1024,\ + .yres = 768,\ + .pixclock = 1000000000000ULL/((1024+480+260+250)*(768+16+6+10)*60),\ + .left_margin = 480,\ + .right_margin = 260,\ + .upper_margin = 16,\ + .lower_margin = 6,\ + .hsync_len = 250,\ + .vsync_len = 10,\ + .sync = FB_SYNC_EXT,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +#define IMX_VD_1080P60(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_SPLITMODE,\ + .mode = {\ + .name = "1080P60",\ + .refresh = 60,\ + .xres = 1920,\ + .yres = 1080,\ + .pixclock = 1000000000000ULL/((1920+148+88+44)*(1080+36+4+5)*60),\ + .left_margin = 148,\ + .right_margin = 88,\ + .upper_margin = 36,\ + .lower_margin = 4,\ + .hsync_len = 44,\ + .vsync_len = 5,\ + .sync = FB_SYNC_EXT,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +#define IMX_VD_SHARP_LQ101K1LY04(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_JEIDA,\ + .mode = {\ + .name = "sharp-LQ101K1LY04",\ + .refresh = 60,\ + .xres = 1280,\ + .yres = 800,\ + .pixclock = 1000000000000ULL/((1280+20+20+10)*(800+4+4+4)*60),\ + .left_margin = 20,\ + .right_margin = 20,\ + .upper_margin = 4,\ + .lower_margin = 4,\ + .hsync_len = 10,\ + .vsync_len = 4,\ + .sync = FB_SYNC_EXT,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +#define IMX_VD_WXGA(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .mode = {\ + .name = "wxga",\ + .refresh = 60,\ + .xres = 1280,\ + .yres = 800,\ + .pixclock = 1000000000000ULL/((1280+40+40+10)*(800+3+80+10)*60),\ + .left_margin = 40,\ + .right_margin = 40,\ + .upper_margin = 3,\ + .lower_margin = 80,\ + .hsync_len = 10,\ + .vsync_len = 10,\ + .sync = FB_SYNC_EXT,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +#define IMX_VD_WXGA_J(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_JEIDA,\ + .mode = {\ + .name = "wxga_j",\ + .refresh = 60,\ + .xres = 1280,\ + .yres = 800,\ + .pixclock = 1000000000000ULL/((1280+40+40+10)*(800+3+80+10)*60),\ + .left_margin = 40,\ + .right_margin = 40,\ + .upper_margin = 3,\ + .lower_margin = 80,\ + .hsync_len = 10,\ + .vsync_len = 10,\ + .sync = FB_SYNC_EXT,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +#define IMX_VD_SVGA(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0,\ + .pixfmt = IPU_PIX_FMT_RGB666,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_MODESTR,\ + .mode = {\ + .name = "svga",\ + .refresh = 60,\ + .xres = 800,\ + .yres = 600,\ + .pixclock = 15385,\ + .left_margin = 220,\ + .right_margin = 40,\ + .upper_margin = 21,\ + .lower_margin = 7,\ + .hsync_len = 60,\ + .vsync_len = 10,\ + .sync = 0,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +#define IMX_VD_WVGA(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0,\ + .pixfmt = IPU_PIX_FMT_LVDS666,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .mode = {\ + .name = "wvga",\ + .refresh = 60,\ + .xres = 800,\ + .yres = 480,\ + .pixclock = 1000000000000ULL/((800+220+40+60)*(480+21+7+10)*60),\ + .left_margin = 220,\ + .right_margin = 40,\ + .upper_margin = 21,\ + .lower_margin = 7,\ + .hsync_len = 60,\ + .vsync_len = 10,\ + .sync = FB_SYNC_EXT,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +#define IMX_VD_WVGA_J(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_JEIDA,\ + .mode = {\ + .name = "wvga_j",\ + .refresh = 60,\ + .xres = 800,\ + .yres = 480,\ + .pixclock = 1000000000000ULL/((800+220+40+60)*(480+21+7+10)*60),\ + .left_margin = 220,\ + .right_margin = 40,\ + .upper_margin = 21,\ + .lower_margin = 7,\ + .hsync_len = 60,\ + .vsync_len = 10,\ + .sync = FB_SYNC_EXT,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +#define IMX_VD_AA065VE11(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .mode = {\ + .name = "AA065VE11",\ + .refresh = 70,\ + .xres = 640,\ + .yres = 480,\ + .pixclock = 22858, /* 23000 works 23100 doesn't */\ + .left_margin = 48 + 100,\ + .right_margin = 16 + 100,\ + .upper_margin = 33 + 50,\ + .lower_margin = 10 + 50,\ + .hsync_len = 96,\ + .vsync_len = 2,\ + .sync = FB_SYNC_EXT,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +#define IMX_VD_VGA(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .mode = {\ + .name = "vga",\ + .refresh = 60,\ + .xres = 640,\ + .yres = 480,\ + .pixclock = 1000000000000ULL/((640+48+16+96)*(480+33+10+2)*60),\ + .left_margin = 48,\ + .right_margin = 16,\ + .upper_margin = 33,\ + .lower_margin = 10,\ + .hsync_len = 96,\ + .vsync_len = 2,\ + .sync = FB_SYNC_EXT,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +#define IMX_VD_LSA40AT9001(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0,\ + .pixfmt = IPU_PIX_FMT_RGB666,\ + .detect = _detect ? imx_detect_i2c : NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_MODESTR,\ + .mode = {\ + .name = "LSA40AT9001",\ + .refresh = 60,\ + .xres = 800,\ + .yres = 600,\ + .pixclock = (800+46+210+10) * 1000 / (600+23+12+1) / 60,\ + .left_margin = 46,\ + .right_margin = 210,\ + .upper_margin = 23,\ + .lower_margin = 12,\ + .hsync_len = 10,\ + .vsync_len = 1,\ + .sync = FB_SYNC_CLK_LAT_FALL,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +/* spi panels */ +#define IMX_VD_AUO_G050(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_MODESTR | FBF_SPI,\ + .mode = {\ + .name = "AUO_G050",\ + .refresh = 60,\ + .xres = 480,\ + .yres = 800,\ + .pixclock = 1000000000000ULL/((480+18+16+2)*(800+18+16+2)*60),\ + .left_margin = 18,\ + .right_margin = 16,\ + .upper_margin = 18,\ + .lower_margin = 16,\ + .hsync_len = 2,\ + .vsync_len = 2,\ + .sync = 0,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +//640 * 3/2 = 960, (1.5 clocks per pixel) +//33.7M +#define IMX_VD_A030JN01_UPS051(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 2,\ + .pixfmt = IPU_PIX_FMT_UPS051,\ + .detect = NULL,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_MODESTR | FBF_SPI,\ + .mode = {\ + .name = "A030JN01_UPS051",\ + .refresh = 60,\ + .xres = 640,\ + .yres = 480,\ + .pixclock = 29668,1000000000000ULL/((960+40+48+20)*(480+27+18+1)*60),\ + .left_margin = 40,\ + .right_margin = 48,\ + .upper_margin = 27,\ + .lower_margin = 18,\ + .hsync_len = 20,\ + .vsync_len = 1,\ + .sync = 0,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} #endif diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h index 88ecddb..bfbe0a0 100644 --- a/arch/arm/include/asm/io.h +++ b/arch/arm/include/asm/io.h @@ -376,7 +376,12 @@ out: return retval; } -#elif !defined(readb) +#else +#define memset_io(a, b, c) memset((void *)(a), (b), (c)) +#define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c)) +#define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c)) + +#if !defined(readb) #define readb(addr) (__readwrite_bug("readb"),0) #define readw(addr) (__readwrite_bug("readw"),0) @@ -389,6 +394,7 @@ out: #define check_signature(io,sig,len) (0) +#endif #endif /* __mem_pci */ /* diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h index f77e4b8..541b443 100644 --- a/arch/arm/include/asm/macro.h +++ b/arch/arm/include/asm/macro.h @@ -105,6 +105,99 @@ lr .req x30 cbz \xreg1, \master_label .endm +.macro armv8_switch_to_el2_m, xreg1 + /* 64bit EL2 | HCE | SMD | RES1 (Bits[5:4]) | Non-secure EL0/EL1 */ + mov \xreg1, #0x5b1 + msr scr_el3, \xreg1 + msr cptr_el3, xzr /* Disable coprocessor traps to EL3 */ + mov \xreg1, #0x33ff + msr cptr_el2, \xreg1 /* Disable coprocessor traps to EL2 */ + + /* Initialize SCTLR_EL2 + * + * setting RES1 bits (29,28,23,22,18,16,11,5,4) to 1 + * and RES0 bits (31,30,27,26,24,21,20,17,15-13,10-6) + + * EE,WXN,I,SA,C,A,M to 0 + */ + mov \xreg1, #0x0830 + movk \xreg1, #0x30C5, lsl #16 + msr sctlr_el2, \xreg1 + + /* Return to the EL2_SP2 mode from EL3 */ + mov \xreg1, sp + msr sp_el2, \xreg1 /* Migrate SP */ + mrs \xreg1, vbar_el3 + msr vbar_el2, \xreg1 /* Migrate VBAR */ + mov \xreg1, #0x3c9 + msr spsr_el3, \xreg1 /* EL2_SP2 | D | A | I | F */ + msr elr_el3, lr + eret +.endm + +.macro armv8_switch_to_el1_m, xreg1, xreg2 + /* Initialize Generic Timers */ + mrs \xreg1, cnthctl_el2 + orr \xreg1, \xreg1, #0x3 /* Enable EL1 access to timers */ + msr cnthctl_el2, \xreg1 + msr cntvoff_el2, xzr + + /* Initilize MPID/MPIDR registers */ + mrs \xreg1, midr_el1 + mrs \xreg2, mpidr_el1 + msr vpidr_el2, \xreg1 + msr vmpidr_el2, \xreg2 + + /* Disable coprocessor traps */ + mov \xreg1, #0x33ff + msr cptr_el2, \xreg1 /* Disable coprocessor traps to EL2 */ + msr hstr_el2, xzr /* Disable coprocessor traps to EL2 */ + mov \xreg1, #3 << 20 + msr cpacr_el1, \xreg1 /* Enable FP/SIMD at EL1 */ + + /* Initialize HCR_EL2 */ + mov \xreg1, #(1 << 31) /* 64bit EL1 */ + orr \xreg1, \xreg1, #(1 << 29) /* Disable HVC */ + msr hcr_el2, \xreg1 + + /* SCTLR_EL1 initialization + * + * setting RES1 bits (29,28,23,22,20,11) to 1 + * and RES0 bits (31,30,27,21,17,13,10,6) + + * UCI,EE,EOE,WXN,nTWE,nTWI,UCT,DZE,I,UMA,SED,ITD, + * CP15BEN,SA0,SA,C,A,M to 0 + */ + mov \xreg1, #0x0800 + movk \xreg1, #0x30d0, lsl #16 + msr sctlr_el1, \xreg1 + + /* Return to the EL1_SP1 mode from EL2 */ + mov \xreg1, sp + msr sp_el1, \xreg1 /* Migrate SP */ + mrs \xreg1, vbar_el2 + msr vbar_el1, \xreg1 /* Migrate VBAR */ + mov \xreg1, #0x3c5 + msr spsr_el2, \xreg1 /* EL1_SP1 | D | A | I | F */ + msr elr_el2, lr + eret +.endm + +#if defined(CONFIG_GICV3) +.macro gic_wait_for_interrupt_m xreg1 +0 : wfi + mrs \xreg1, ICC_IAR1_EL1 + msr ICC_EOIR1_EL1, \xreg1 + cbnz \xreg1, 0b +.endm +#elif defined(CONFIG_GICV2) +.macro gic_wait_for_interrupt_m xreg1, wreg2 +0 : wfi + ldr \wreg2, [\xreg1, GICC_AIAR] + str \wreg2, [\xreg1, GICC_AEOIR] + and \wreg2, \wreg2, #3ff + cbnz \wreg2, 0b +.endm +#endif + #endif /* CONFIG_ARM64 */ #endif /* __ASSEMBLY__ */ diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index 39fe7a1..4949d57 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -22,6 +22,8 @@ #include #include #include +#include +#include #if defined(CONFIG_ARMV7_NONSEC) || defined(CONFIG_ARMV7_VIRT) #include @@ -299,7 +301,8 @@ static void boot_jump_linux(bootm_headers_t *images, int flag) * DIFFERENCE: Instead of calling prep and go at the end * they are called if subcommand is equal 0. */ -int do_bootm_linux(int flag, int argc, char *argv[], bootm_headers_t *images) +int do_bootm_linux(int flag, int argc, char * const argv[], + bootm_headers_t *images) { /* No need for those on ARM */ if (flag & BOOTM_STATE_OS_BD_T || flag & BOOTM_STATE_OS_CMDLINE) diff --git a/arch/arm/lib/eabi_compat.c b/arch/arm/lib/eabi_compat.c index 10d1933..a2cb06e 100644 --- a/arch/arm/lib/eabi_compat.c +++ b/arch/arm/lib/eabi_compat.c @@ -20,8 +20,19 @@ int raise (int signum) /* Dummy function to avoid linker complaints */ void __aeabi_unwind_cpp_pr0(void) { -}; +} void __aeabi_unwind_cpp_pr1(void) { -}; +} + +/* Copy memory like memcpy, but no return value required. */ +void __aeabi_memcpy(void *dest, const void *src, size_t n) +{ + (void) memcpy(dest, src, n); +} + +void __aeabi_memset(void *dest, size_t n, int c) +{ + (void) memset(dest, c, n); +} diff --git a/arch/arm/lib/gic_64.S b/arch/arm/lib/gic_64.S index d56396e..a3e18f7 100644 --- a/arch/arm/lib/gic_64.S +++ b/arch/arm/lib/gic_64.S @@ -10,8 +10,8 @@ #include #include #include -#include #include +#include /************************************************************************* @@ -181,14 +181,10 @@ ENDPROC(gic_kick_secondary_cpus) * *************************************************************************/ ENTRY(gic_wait_for_interrupt) -0: wfi #if defined(CONFIG_GICV3) - mrs x9, ICC_IAR1_EL1 - msr ICC_EOIR1_EL1, x9 + gic_wait_for_interrupt_m x9 #elif defined(CONFIG_GICV2) - ldr w9, [x0, GICC_AIAR] - str w9, [x0, GICC_AEOIR] + gic_wait_for_interrupt_m x0, w9 #endif - cbnz w9, 0b ret ENDPROC(gic_wait_for_interrupt) diff --git a/arch/arm/lib/reset.c b/arch/arm/lib/reset.c index 7a03580..9a95f08 100644 --- a/arch/arm/lib/reset.c +++ b/arch/arm/lib/reset.c @@ -23,6 +23,10 @@ #include +__weak void reset_misc(void) +{ +} + int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { puts ("resetting ...\n"); @@ -30,6 +34,8 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) udelay (50000); /* wait 50 ms */ disable_interrupts(); + + reset_misc(); reset_cpu(0); /*NOTREACHED*/ diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib/vectors.S index 493f337..0cb87ce 100644 --- a/arch/arm/lib/vectors.S +++ b/arch/arm/lib/vectors.S @@ -45,12 +45,13 @@ ************************************************************************* */ +_start: + #ifdef CONFIG_SYS_DV_NOR_BOOT_CFG .word CONFIG_SYS_DV_NOR_BOOT_CFG #endif -_start: - ldr pc, _reset + b reset ldr pc, _undefined_instruction ldr pc, _software_interrupt ldr pc, _prefetch_abort @@ -77,7 +78,6 @@ _start: .globl _irq .globl _fiq -_reset: .word reset _undefined_instruction: .word undefined_instruction _software_interrupt: .word software_interrupt _prefetch_abort: .word prefetch_abort diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig index 46337ae..66de2ad 100644 --- a/arch/avr32/Kconfig +++ b/arch/avr32/Kconfig @@ -2,7 +2,6 @@ menu "AVR32 architecture" depends on AVR32 config SYS_ARCH - string default "avr32" choice diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index bb8a133..31913fe 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -2,7 +2,6 @@ menu "Blackfin architecture" depends on BLACKFIN config SYS_ARCH - string default "blackfin" choice diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index 6cda7db..5374b4d 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -2,7 +2,6 @@ menu "M68000 architecture" depends on M68K config SYS_ARCH - string default "m68k" choice diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index ddaa45f..33bfd9f 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig @@ -2,7 +2,6 @@ menu "MicroBlaze architecture" depends on MICROBLAZE config SYS_ARCH - string default "microblaze" choice diff --git a/arch/microblaze/include/asm/posix_types.h b/arch/microblaze/include/asm/posix_types.h index 38dc5aa..ccc6235 100644 --- a/arch/microblaze/include/asm/posix_types.h +++ b/arch/microblaze/include/asm/posix_types.h @@ -27,7 +27,11 @@ typedef int __kernel_pid_t; typedef unsigned short __kernel_ipc_pid_t; typedef unsigned int __kernel_uid_t; typedef unsigned int __kernel_gid_t; +#ifdef __GNUC__ +typedef __SIZE_TYPE__ __kernel_size_t; +#else typedef unsigned int __kernel_size_t; +#endif typedef int __kernel_ssize_t; typedef int __kernel_ptrdiff_t; typedef long __kernel_time_t; diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 5bf0df4..7686b77 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -2,7 +2,6 @@ menu "MIPS architecture" depends on MIPS config SYS_ARCH - string default "mips" choice diff --git a/arch/nds32/Kconfig b/arch/nds32/Kconfig index 743a8fe..81b0a01 100644 --- a/arch/nds32/Kconfig +++ b/arch/nds32/Kconfig @@ -2,7 +2,6 @@ menu "NDS32 architecture" depends on NDS32 config SYS_ARCH - string default "nds32" choice diff --git a/arch/nios2/Kconfig b/arch/nios2/Kconfig index 0cba45b..b3be7b5 100644 --- a/arch/nios2/Kconfig +++ b/arch/nios2/Kconfig @@ -2,7 +2,6 @@ menu "Nios II architecture" depends on NIOS2 config SYS_ARCH - string default "nios2" choice diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig index cc54a2e..4d62b4c 100644 --- a/arch/openrisc/Kconfig +++ b/arch/openrisc/Kconfig @@ -2,7 +2,6 @@ menu "OpenRISC architecture" depends on OPENRISC config SYS_ARCH - string default "openrisc" choice diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 3325af3..6f96c7c 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -2,7 +2,6 @@ menu "PowerPC architecture" depends on PPC config SYS_ARCH - string default "powerpc" choice diff --git a/arch/powerpc/config.mk b/arch/powerpc/config.mk index 6329b6c..fec02f2 100644 --- a/arch/powerpc/config.mk +++ b/arch/powerpc/config.mk @@ -11,6 +11,7 @@ endif CONFIG_STANDALONE_LOAD_ADDR ?= 0x40000 LDFLAGS_FINAL += --gc-sections +LDFLAGS_FINAL += --bss-plt PLATFORM_RELFLAGS += -fpic -mrelocatable -ffunction-sections -fdata-sections \ -meabi PLATFORM_CPPFLAGS += -D__powerpc__ -ffixed-r2 diff --git a/arch/powerpc/cpu/74xx_7xx/Kconfig b/arch/powerpc/cpu/74xx_7xx/Kconfig index 6ce464d..3378c91 100644 --- a/arch/powerpc/cpu/74xx_7xx/Kconfig +++ b/arch/powerpc/cpu/74xx_7xx/Kconfig @@ -2,7 +2,6 @@ menu "74xx_7xx CPU" depends on 74xx_7xx config SYS_CPU - string default "74xx_7xx" choice diff --git a/arch/powerpc/cpu/mpc512x/Kconfig b/arch/powerpc/cpu/mpc512x/Kconfig index bfc4eae..a0f0ede 100644 --- a/arch/powerpc/cpu/mpc512x/Kconfig +++ b/arch/powerpc/cpu/mpc512x/Kconfig @@ -2,7 +2,6 @@ menu "mpc512x CPU" depends on MPC512X config SYS_CPU - string default "mpc512x" choice diff --git a/arch/powerpc/cpu/mpc5xx/Kconfig b/arch/powerpc/cpu/mpc5xx/Kconfig index 79579d7..aad4a7c 100644 --- a/arch/powerpc/cpu/mpc5xx/Kconfig +++ b/arch/powerpc/cpu/mpc5xx/Kconfig @@ -2,7 +2,6 @@ menu "mpc5xx CPU" depends on 5xx config SYS_CPU - string default "mpc5xx" choice diff --git a/arch/powerpc/cpu/mpc5xxx/Kconfig b/arch/powerpc/cpu/mpc5xxx/Kconfig index b2f0bad..cca58e5 100644 --- a/arch/powerpc/cpu/mpc5xxx/Kconfig +++ b/arch/powerpc/cpu/mpc5xxx/Kconfig @@ -2,7 +2,6 @@ menu "mpc5xxx CPU" depends on MPC5xxx config SYS_CPU - string default "mpc5xxx" choice diff --git a/arch/powerpc/cpu/mpc824x/Kconfig b/arch/powerpc/cpu/mpc824x/Kconfig index 309833f..4f98423 100644 --- a/arch/powerpc/cpu/mpc824x/Kconfig +++ b/arch/powerpc/cpu/mpc824x/Kconfig @@ -2,7 +2,6 @@ menu "mpc824x CPU" depends on MPC824X config SYS_CPU - string default "mpc824x" choice diff --git a/arch/powerpc/cpu/mpc8260/Kconfig b/arch/powerpc/cpu/mpc8260/Kconfig index 1a8707d..41e4e5f 100644 --- a/arch/powerpc/cpu/mpc8260/Kconfig +++ b/arch/powerpc/cpu/mpc8260/Kconfig @@ -2,7 +2,6 @@ menu "mpc8260 CPU" depends on MPC8260 config SYS_CPU - string default "mpc8260" choice diff --git a/arch/powerpc/cpu/mpc83xx/Kconfig b/arch/powerpc/cpu/mpc83xx/Kconfig index 5fd3393..6de9265 100644 --- a/arch/powerpc/cpu/mpc83xx/Kconfig +++ b/arch/powerpc/cpu/mpc83xx/Kconfig @@ -2,7 +2,6 @@ menu "mpc83xx CPU" depends on MPC83xx config SYS_CPU - string default "mpc83xx" choice diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 0f70380..8c1c01c 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -2,7 +2,6 @@ menu "mpc85xx CPU" depends on MPC85xx config SYS_CPU - string default "mpc85xx" choice diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index 6274f92..3d6ec84 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -441,7 +441,7 @@ phys_size_t initdram(int board_type) /* Board-specific functions defined in each board's ddr.c */ void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd, - unsigned int ctrl_num); + unsigned int ctrl_num, unsigned int dimm_slots_per_ctrl); void read_tlbcam_entry(int idx, u32 *valid, u32 *tsize, unsigned long *epn, phys_addr_t *rpn); unsigned int @@ -459,7 +459,7 @@ static void dump_spd_ddr_reg(void) spd[CONFIG_NUM_DDR_CONTROLLERS][CONFIG_DIMM_SLOTS_PER_CTLR]; for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) - fsl_ddr_get_spd(spd[i], i); + fsl_ddr_get_spd(spd[i], i, CONFIG_DIMM_SLOTS_PER_CTLR); puts("SPD data of all dimms (zero vaule is omitted)...\n"); puts("Byte (hex) "); diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c index d1fc76a..8edf5bb 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet2_serdes.c @@ -186,11 +186,6 @@ u64 serdes_init(u32 sd, u32 sd_addr, u32 sd_prctl_mask, u32 sd_prctl_shift) #endif cfg = in_be32(&gur->rcwsr[4]) & sd_prctl_mask; - /* Is serdes enabled at all? */ - if (!cfg) { - printf("SERDES%d is not enabled\n", sd + 1); - return 0; - } /* Erratum A-007186 * Freescale Scratch Pad Fuse Register n (SFP_FSPFR0) diff --git a/arch/powerpc/cpu/mpc86xx/Kconfig b/arch/powerpc/cpu/mpc86xx/Kconfig index f0ff441..14e8b1a 100644 --- a/arch/powerpc/cpu/mpc86xx/Kconfig +++ b/arch/powerpc/cpu/mpc86xx/Kconfig @@ -2,7 +2,6 @@ menu "mpc86xx CPU" depends on MPC86xx config SYS_CPU - string default "mpc86xx" choice diff --git a/arch/powerpc/cpu/mpc8xx/Kconfig b/arch/powerpc/cpu/mpc8xx/Kconfig index 2c39244..f1dca90 100644 --- a/arch/powerpc/cpu/mpc8xx/Kconfig +++ b/arch/powerpc/cpu/mpc8xx/Kconfig @@ -2,7 +2,6 @@ menu "mpc8xx CPU" depends on 8xx config SYS_CPU - string default "mpc8xx" choice diff --git a/arch/powerpc/cpu/mpc8xx/u-boot.lds b/arch/powerpc/cpu/mpc8xx/u-boot.lds new file mode 100644 index 0000000..0eb2fba --- /dev/null +++ b/arch/powerpc/cpu/mpc8xx/u-boot.lds @@ -0,0 +1,82 @@ +/* + * (C) Copyright 2000-2010 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +OUTPUT_ARCH(powerpc) + +SECTIONS +{ + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .text : + { + arch/powerpc/cpu/mpc8xx/start.o (.text*) + arch/powerpc/cpu/mpc8xx/traps.o (.text*) + + *(.text*) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) + } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + _GOT2_TABLE_ = .; + KEEP(*(.got2)) + KEEP(*(.got)) + PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); + _FIXUP_TABLE_ = .; + KEEP(*(.fixup)) + } + __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data*) + *(.sdata*) + } + _edata = .; + PROVIDE (edata = .); + + . = .; + + . = ALIGN(4); + .u_boot_list : { + KEEP(*(SORT(.u_boot_list*))); + } + + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss (NOLOAD) : + { + *(.bss*) + *(.sbss*) + *(COMMON) + . = ALIGN(4); + } + __bss_end = . ; + PROVIDE (end = .); +} diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index 9273745..4cec5e1 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -1,5 +1,5 @@ /* - * Copyright 2009-2012 Freescale Semiconductor, Inc. + * Copyright 2009-2014 Freescale Semiconductor, Inc. * * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains @@ -123,14 +123,14 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd) { const char *modes[] = { "host", "peripheral", "otg" }; const char *phys[] = { "ulpi", "utmi" }; - const char *dr_mode_type = NULL; - const char *dr_phy_type = NULL; int usb_mode_off = -1; int usb_phy_off = -1; char str[5]; int i, j; for (i = 1; i <= CONFIG_USB_MAX_CONTROLLER_COUNT; i++) { + const char *dr_mode_type = NULL; + const char *dr_phy_type = NULL; int mode_idx = -1, phy_idx = -1; snprintf(str, 5, "%s%d", "usb", i); if (hwconfig(str)) { @@ -150,18 +150,16 @@ void fdt_fixup_dr_usb(void *blob, bd_t *bd) } } - if (mode_idx < 0 || phy_idx < 0) { - puts("ERROR: wrong usb mode/phy defined!!\n"); - return; - } - - dr_mode_type = modes[mode_idx]; - dr_phy_type = phys[phy_idx]; - if (mode_idx < 0 && phy_idx < 0) { printf("WARNING: invalid phy or mode\n"); return; } + + if (mode_idx > -1) + dr_mode_type = modes[mode_idx]; + + if (phy_idx > -1) + dr_phy_type = phys[phy_idx]; } usb_mode_off = fdt_fixup_usb_mode_phy_type(blob, diff --git a/arch/powerpc/cpu/ppc4xx/Kconfig b/arch/powerpc/cpu/ppc4xx/Kconfig index 2d15dd1..41b525c 100644 --- a/arch/powerpc/cpu/ppc4xx/Kconfig +++ b/arch/powerpc/cpu/ppc4xx/Kconfig @@ -2,7 +2,6 @@ menu "ppc4xx CPU" depends on 4xx config SYS_CPU - string default "ppc4xx" choice diff --git a/arch/powerpc/include/asm/fsl_enet.h b/arch/powerpc/include/asm/fsl_enet.h deleted file mode 100644 index 96146b6..0000000 --- a/arch/powerpc/include/asm/fsl_enet.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright 2010 Freescale Semiconductor, Inc. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __ASM_PPC_FSL_ENET_H -#define __ASM_PPC_FSL_ENET_H - -#include - -struct tsec_mii_mng { - u32 miimcfg; /* MII management configuration reg */ - u32 miimcom; /* MII management command reg */ - u32 miimadd; /* MII management address reg */ - u32 miimcon; /* MII management control reg */ - u32 miimstat; /* MII management status reg */ - u32 miimind; /* MII management indication reg */ - u32 ifstat; /* Interface Status Register */ -} __attribute__ ((packed)); - -int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc); - -#endif /* __ASM_PPC_FSL_ENET_H */ diff --git a/arch/sandbox/Kconfig b/arch/sandbox/Kconfig index c393550..3057325 100644 --- a/arch/sandbox/Kconfig +++ b/arch/sandbox/Kconfig @@ -2,15 +2,12 @@ menu "Sandbox architecture" depends on SANDBOX config SYS_ARCH - string default "sandbox" config SYS_BOARD - string default "sandbox" config SYS_CONFIG_NAME - string default "sandbox" endmenu diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts index efffacb..797478a 100644 --- a/arch/sandbox/dts/sandbox.dts +++ b/arch/sandbox/dts/sandbox.dts @@ -1,6 +1,16 @@ /dts-v1/; / { + chosen { + stdout-path = "/serial"; + }; + + /* Needs to be available prior to relocation */ + uart0: serial { + compatible = "sandbox,serial"; + sandbox,text-colour = "cyan"; + }; + triangle { compatible = "demo-shape"; colour = "cyan"; diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index e6ded16..4bf9afc 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -2,7 +2,6 @@ menu "SuperH architecture" depends on SH config SYS_ARCH - string default "sh" choice diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index fc92910..733334f 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -2,7 +2,6 @@ menu "SPARC architecture" depends on SPARC config SYS_ARCH - string default "sparc" choice diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 8fc619a..ff9935a 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2,7 +2,6 @@ menu "x86 architecture" depends on X86 config SYS_ARCH - string default "x86" choice diff --git a/arch/x86/lib/physmem.c b/arch/x86/lib/physmem.c index 59b3fe9..b57b2c3 100644 --- a/arch/x86/lib/physmem.c +++ b/arch/x86/lib/physmem.c @@ -189,7 +189,7 @@ phys_addr_t arch_phys_memset(phys_addr_t start, int c, phys_size_t size) /* Handle memory below 4GB. */ if (start <= max_addr) { - phys_size_t low_size = MIN(max_addr + 1 - start, size); + phys_size_t low_size = min(max_addr + 1 - start, size); void *start_ptr = (void *)(uintptr_t)start; assert(((phys_addr_t)(uintptr_t)start) == start); @@ -208,7 +208,7 @@ phys_addr_t arch_phys_memset(phys_addr_t start, int c, phys_size_t size) /* Handle the first partial page. */ if (offset) { phys_addr_t end = - MIN(map_addr + LARGE_PAGE_SIZE, start + size); + min(map_addr + LARGE_PAGE_SIZE, start + size); phys_size_t cur_size = end - start; x86_phys_memset_page(map_addr, offset, c, cur_size); size -= cur_size; diff --git a/board/8dtech/eco5pk/Kconfig b/board/8dtech/eco5pk/Kconfig index 0af1b30..5553566 100644 --- a/board/8dtech/eco5pk/Kconfig +++ b/board/8dtech/eco5pk/Kconfig @@ -1,15 +1,12 @@ if TARGET_ECO5PK config SYS_BOARD - string default "eco5pk" config SYS_VENDOR - string default "8dtech" config SYS_CONFIG_NAME - string default "eco5pk" endif diff --git a/board/AndesTech/adp-ag101/Kconfig b/board/AndesTech/adp-ag101/Kconfig index 3567543..8f0197a 100644 --- a/board/AndesTech/adp-ag101/Kconfig +++ b/board/AndesTech/adp-ag101/Kconfig @@ -1,23 +1,18 @@ if TARGET_ADP_AG101 config SYS_CPU - string default "n1213" config SYS_BOARD - string default "adp-ag101" config SYS_VENDOR - string default "AndesTech" config SYS_SOC - string default "ag101" config SYS_CONFIG_NAME - string default "adp-ag101" endif diff --git a/board/AndesTech/adp-ag101p/Kconfig b/board/AndesTech/adp-ag101p/Kconfig index ee551a6..5e8aa22 100644 --- a/board/AndesTech/adp-ag101p/Kconfig +++ b/board/AndesTech/adp-ag101p/Kconfig @@ -1,23 +1,18 @@ if TARGET_ADP_AG101P config SYS_CPU - string default "n1213" config SYS_BOARD - string default "adp-ag101p" config SYS_VENDOR - string default "AndesTech" config SYS_SOC - string default "ag101" config SYS_CONFIG_NAME - string default "adp-ag101p" endif diff --git a/board/AndesTech/adp-ag102/Kconfig b/board/AndesTech/adp-ag102/Kconfig index 34566bd..fc17be3 100644 --- a/board/AndesTech/adp-ag102/Kconfig +++ b/board/AndesTech/adp-ag102/Kconfig @@ -1,23 +1,18 @@ if TARGET_ADP_AG102 config SYS_CPU - string default "n1213" config SYS_BOARD - string default "adp-ag102" config SYS_VENDOR - string default "AndesTech" config SYS_SOC - string default "ag102" config SYS_CONFIG_NAME - string default "adp-ag102" endif diff --git a/board/Barix/ipam390/Kconfig b/board/Barix/ipam390/Kconfig index 588ee73..b85d4da 100644 --- a/board/Barix/ipam390/Kconfig +++ b/board/Barix/ipam390/Kconfig @@ -1,15 +1,12 @@ if TARGET_IPAM390 config SYS_BOARD - string default "ipam390" config SYS_VENDOR - string default "Barix" config SYS_CONFIG_NAME - string default "ipam390" endif diff --git a/board/BuR/kwb/Kconfig b/board/BuR/kwb/Kconfig index 5676c4f..f9107a9 100644 --- a/board/BuR/kwb/Kconfig +++ b/board/BuR/kwb/Kconfig @@ -1,23 +1,18 @@ if TARGET_KWB config SYS_CPU - string default "armv7" config SYS_BOARD - string default "kwb" config SYS_VENDOR - string default "BuR" config SYS_SOC - string default "am33xx" config SYS_CONFIG_NAME - string default "kwb" endif diff --git a/board/BuR/tseries/Kconfig b/board/BuR/tseries/Kconfig index f452023..ee510d3 100644 --- a/board/BuR/tseries/Kconfig +++ b/board/BuR/tseries/Kconfig @@ -1,23 +1,18 @@ if TARGET_TSERIES config SYS_CPU - string default "armv7" config SYS_BOARD - string default "tseries" config SYS_VENDOR - string default "BuR" config SYS_SOC - string default "am33xx" config SYS_CONFIG_NAME - string default "tseries" endif diff --git a/board/BuS/eb_cpu5282/Kconfig b/board/BuS/eb_cpu5282/Kconfig index f53f295..237dc1b 100644 --- a/board/BuS/eb_cpu5282/Kconfig +++ b/board/BuS/eb_cpu5282/Kconfig @@ -1,19 +1,15 @@ if TARGET_EB_CPU5282 config SYS_CPU - string default "mcf52x2" config SYS_BOARD - string default "eb_cpu5282" config SYS_VENDOR - string default "BuS" config SYS_CONFIG_NAME - string default "eb_cpu5282" endif diff --git a/board/BuS/eb_cpux9k2/Kconfig b/board/BuS/eb_cpux9k2/Kconfig index 3a36cf3..85d335a 100644 --- a/board/BuS/eb_cpux9k2/Kconfig +++ b/board/BuS/eb_cpux9k2/Kconfig @@ -1,23 +1,18 @@ if TARGET_EB_CPUX9K2 config SYS_CPU - string default "arm920t" config SYS_BOARD - string default "eb_cpux9k2" config SYS_VENDOR - string default "BuS" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "eb_cpux9k2" endif diff --git a/board/BuS/vl_ma2sc/Kconfig b/board/BuS/vl_ma2sc/Kconfig index d4a6e52..bb6a7e7 100644 --- a/board/BuS/vl_ma2sc/Kconfig +++ b/board/BuS/vl_ma2sc/Kconfig @@ -1,23 +1,18 @@ if TARGET_VL_MA2SC config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "vl_ma2sc" config SYS_VENDOR - string default "BuS" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "vl_ma2sc" endif diff --git a/board/CarMediaLab/flea3/Kconfig b/board/CarMediaLab/flea3/Kconfig index cbc004a..1448703 100644 --- a/board/CarMediaLab/flea3/Kconfig +++ b/board/CarMediaLab/flea3/Kconfig @@ -1,23 +1,18 @@ if TARGET_FLEA3 config SYS_CPU - string default "arm1136" config SYS_BOARD - string default "flea3" config SYS_VENDOR - string default "CarMediaLab" config SYS_SOC - string default "mx35" config SYS_CONFIG_NAME - string default "flea3" endif diff --git a/board/LEOX/elpt860/Kconfig b/board/LEOX/elpt860/Kconfig index 2cfa5bc..ed74956 100644 --- a/board/LEOX/elpt860/Kconfig +++ b/board/LEOX/elpt860/Kconfig @@ -1,15 +1,12 @@ if TARGET_ELPT860 config SYS_BOARD - string default "elpt860" config SYS_VENDOR - string default "LEOX" config SYS_CONFIG_NAME - string default "ELPT860" endif diff --git a/board/LaCie/edminiv2/Kconfig b/board/LaCie/edminiv2/Kconfig index 9675a9e..ac3fe3f 100644 --- a/board/LaCie/edminiv2/Kconfig +++ b/board/LaCie/edminiv2/Kconfig @@ -1,15 +1,12 @@ if TARGET_EDMINIV2 config SYS_BOARD - string default "edminiv2" config SYS_VENDOR - string default "LaCie" config SYS_CONFIG_NAME - string default "edminiv2" endif diff --git a/board/LaCie/net2big_v2/Kconfig b/board/LaCie/net2big_v2/Kconfig index e8eb9ad..ba460db 100644 --- a/board/LaCie/net2big_v2/Kconfig +++ b/board/LaCie/net2big_v2/Kconfig @@ -1,15 +1,12 @@ if TARGET_NET2BIG_V2 config SYS_BOARD - string default "net2big_v2" config SYS_VENDOR - string default "LaCie" config SYS_CONFIG_NAME - string default "lacie_kw" endif diff --git a/board/LaCie/net2big_v2/MAINTAINERS b/board/LaCie/net2big_v2/MAINTAINERS index 1afaa5c..205c75e 100644 --- a/board/LaCie/net2big_v2/MAINTAINERS +++ b/board/LaCie/net2big_v2/MAINTAINERS @@ -1,5 +1,5 @@ NET2BIG_V2 BOARD -M: - +#M: - S: Maintained F: board/LaCie/net2big_v2/ F: include/configs/lacie_kw.h diff --git a/board/LaCie/netspace_v2/Kconfig b/board/LaCie/netspace_v2/Kconfig index 6242a42..930b822 100644 --- a/board/LaCie/netspace_v2/Kconfig +++ b/board/LaCie/netspace_v2/Kconfig @@ -1,15 +1,12 @@ if TARGET_NETSPACE_V2 config SYS_BOARD - string default "netspace_v2" config SYS_VENDOR - string default "LaCie" config SYS_CONFIG_NAME - string default "lacie_kw" endif diff --git a/board/LaCie/netspace_v2/MAINTAINERS b/board/LaCie/netspace_v2/MAINTAINERS index ad3dfa1..55fd50d 100644 --- a/board/LaCie/netspace_v2/MAINTAINERS +++ b/board/LaCie/netspace_v2/MAINTAINERS @@ -8,7 +8,7 @@ F: configs/netspace_max_v2_defconfig F: configs/netspace_v2_defconfig NETSPACE_LITE_V2 BOARD -M: - +#M: - S: Maintained F: configs/netspace_lite_v2_defconfig F: configs/netspace_mini_v2_defconfig diff --git a/board/LaCie/wireless_space/Kconfig b/board/LaCie/wireless_space/Kconfig index ea6850f..75a2fc5 100644 --- a/board/LaCie/wireless_space/Kconfig +++ b/board/LaCie/wireless_space/Kconfig @@ -1,15 +1,12 @@ if TARGET_WIRELESS_SPACE config SYS_BOARD - string default "wireless_space" config SYS_VENDOR - string default "LaCie" config SYS_CONFIG_NAME - string default "wireless_space" endif diff --git a/board/LaCie/wireless_space/MAINTAINERS b/board/LaCie/wireless_space/MAINTAINERS index 8b36bff..8a27b9a 100644 --- a/board/LaCie/wireless_space/MAINTAINERS +++ b/board/LaCie/wireless_space/MAINTAINERS @@ -1,5 +1,5 @@ WIRELESS_SPACE BOARD -M: - +#M: - S: Maintained F: board/LaCie/wireless_space/ F: include/configs/wireless_space.h diff --git a/board/Marvell/aspenite/Kconfig b/board/Marvell/aspenite/Kconfig index 7edcd81..ee2ec06 100644 --- a/board/Marvell/aspenite/Kconfig +++ b/board/Marvell/aspenite/Kconfig @@ -1,23 +1,18 @@ if TARGET_ASPENITE config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "aspenite" config SYS_VENDOR - string default "Marvell" config SYS_SOC - string default "armada100" config SYS_CONFIG_NAME - string default "aspenite" endif diff --git a/board/Marvell/db64360/Kconfig b/board/Marvell/db64360/Kconfig index c08fd05..c5118f8 100644 --- a/board/Marvell/db64360/Kconfig +++ b/board/Marvell/db64360/Kconfig @@ -1,15 +1,12 @@ if TARGET_DB64360 config SYS_BOARD - string default "db64360" config SYS_VENDOR - string default "Marvell" config SYS_CONFIG_NAME - string default "DB64360" endif diff --git a/board/Marvell/db64360/MAINTAINERS b/board/Marvell/db64360/MAINTAINERS index 7383207..af3eb24 100644 --- a/board/Marvell/db64360/MAINTAINERS +++ b/board/Marvell/db64360/MAINTAINERS @@ -1,5 +1,5 @@ DB64360 BOARD -M: - +#M: - S: Maintained F: board/Marvell/db64360/ F: include/configs/DB64360.h diff --git a/board/Marvell/db64460/Kconfig b/board/Marvell/db64460/Kconfig index 3cd2eb4..f53e3a9 100644 --- a/board/Marvell/db64460/Kconfig +++ b/board/Marvell/db64460/Kconfig @@ -1,15 +1,12 @@ if TARGET_DB64460 config SYS_BOARD - string default "db64460" config SYS_VENDOR - string default "Marvell" config SYS_CONFIG_NAME - string default "DB64460" endif diff --git a/board/Marvell/db64460/MAINTAINERS b/board/Marvell/db64460/MAINTAINERS index 751aac2..a30c51c 100644 --- a/board/Marvell/db64460/MAINTAINERS +++ b/board/Marvell/db64460/MAINTAINERS @@ -1,5 +1,5 @@ DB64460 BOARD -M: - +#M: - S: Maintained F: board/Marvell/db64460/ F: include/configs/DB64460.h diff --git a/board/Marvell/dkb/Kconfig b/board/Marvell/dkb/Kconfig index 7ce761b..33d5157 100644 --- a/board/Marvell/dkb/Kconfig +++ b/board/Marvell/dkb/Kconfig @@ -1,23 +1,18 @@ if TARGET_DKB config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "dkb" config SYS_VENDOR - string default "Marvell" config SYS_SOC - string default "pantheon" config SYS_CONFIG_NAME - string default "dkb" endif diff --git a/board/Marvell/dreamplug/Kconfig b/board/Marvell/dreamplug/Kconfig index afaddf4..f65ff73 100644 --- a/board/Marvell/dreamplug/Kconfig +++ b/board/Marvell/dreamplug/Kconfig @@ -1,15 +1,12 @@ if TARGET_DREAMPLUG config SYS_BOARD - string default "dreamplug" config SYS_VENDOR - string default "Marvell" config SYS_CONFIG_NAME - string default "dreamplug" endif diff --git a/board/Marvell/gplugd/Kconfig b/board/Marvell/gplugd/Kconfig index 94cdd48..102c18d 100644 --- a/board/Marvell/gplugd/Kconfig +++ b/board/Marvell/gplugd/Kconfig @@ -1,23 +1,18 @@ if TARGET_GPLUGD config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "gplugd" config SYS_VENDOR - string default "Marvell" config SYS_SOC - string default "armada100" config SYS_CONFIG_NAME - string default "gplugd" endif diff --git a/board/Marvell/guruplug/Kconfig b/board/Marvell/guruplug/Kconfig index 0b10e9f..529e6e3 100644 --- a/board/Marvell/guruplug/Kconfig +++ b/board/Marvell/guruplug/Kconfig @@ -1,15 +1,12 @@ if TARGET_GURUPLUG config SYS_BOARD - string default "guruplug" config SYS_VENDOR - string default "Marvell" config SYS_CONFIG_NAME - string default "guruplug" endif diff --git a/board/Marvell/mv88f6281gtw_ge/Kconfig b/board/Marvell/mv88f6281gtw_ge/Kconfig index 49654fe..00d7d1c 100644 --- a/board/Marvell/mv88f6281gtw_ge/Kconfig +++ b/board/Marvell/mv88f6281gtw_ge/Kconfig @@ -1,15 +1,12 @@ if TARGET_MV88F6281GTW_GE config SYS_BOARD - string default "mv88f6281gtw_ge" config SYS_VENDOR - string default "Marvell" config SYS_CONFIG_NAME - string default "mv88f6281gtw_ge" endif diff --git a/board/Marvell/openrd/Kconfig b/board/Marvell/openrd/Kconfig index 7032ba5..124b66d 100644 --- a/board/Marvell/openrd/Kconfig +++ b/board/Marvell/openrd/Kconfig @@ -1,15 +1,12 @@ if TARGET_OPENRD config SYS_BOARD - string default "openrd" config SYS_VENDOR - string default "Marvell" config SYS_CONFIG_NAME - string default "openrd" endif diff --git a/board/Marvell/openrd/MAINTAINERS b/board/Marvell/openrd/MAINTAINERS index 7a52a8e..7a189ab 100644 --- a/board/Marvell/openrd/MAINTAINERS +++ b/board/Marvell/openrd/MAINTAINERS @@ -6,7 +6,7 @@ F: include/configs/openrd.h F: configs/openrd_base_defconfig OPENRD_CLIENT BOARD -M: - +#M: - S: Maintained F: configs/openrd_client_defconfig F: configs/openrd_ultimate_defconfig diff --git a/board/Marvell/rd6281a/Kconfig b/board/Marvell/rd6281a/Kconfig index e8702a7..025ee26 100644 --- a/board/Marvell/rd6281a/Kconfig +++ b/board/Marvell/rd6281a/Kconfig @@ -1,15 +1,12 @@ if TARGET_RD6281A config SYS_BOARD - string default "rd6281a" config SYS_VENDOR - string default "Marvell" config SYS_CONFIG_NAME - string default "rd6281a" endif diff --git a/board/Marvell/sheevaplug/Kconfig b/board/Marvell/sheevaplug/Kconfig index 1c24d24..e5f9284 100644 --- a/board/Marvell/sheevaplug/Kconfig +++ b/board/Marvell/sheevaplug/Kconfig @@ -1,15 +1,12 @@ if TARGET_SHEEVAPLUG config SYS_BOARD - string default "sheevaplug" config SYS_VENDOR - string default "Marvell" config SYS_CONFIG_NAME - string default "sheevaplug" endif diff --git a/board/RRvision/Kconfig b/board/RRvision/Kconfig index ac6bebc..7c8a6f6 100644 --- a/board/RRvision/Kconfig +++ b/board/RRvision/Kconfig @@ -1,11 +1,9 @@ if TARGET_RRVISION config SYS_BOARD - string default "RRvision" config SYS_CONFIG_NAME - string default "RRvision" endif diff --git a/board/Seagate/dockstar/Kconfig b/board/Seagate/dockstar/Kconfig index 13ea620..b50cd3b 100644 --- a/board/Seagate/dockstar/Kconfig +++ b/board/Seagate/dockstar/Kconfig @@ -1,15 +1,12 @@ if TARGET_DOCKSTAR config SYS_BOARD - string default "dockstar" config SYS_VENDOR - string default "Seagate" config SYS_CONFIG_NAME - string default "dockstar" endif diff --git a/board/Seagate/goflexhome/Kconfig b/board/Seagate/goflexhome/Kconfig index 2fb14ef..0cbeaf7 100644 --- a/board/Seagate/goflexhome/Kconfig +++ b/board/Seagate/goflexhome/Kconfig @@ -1,15 +1,12 @@ if TARGET_GOFLEXHOME config SYS_BOARD - string default "goflexhome" config SYS_VENDOR - string default "Seagate" config SYS_CONFIG_NAME - string default "goflexhome" endif diff --git a/board/a3000/Kconfig b/board/a3000/Kconfig index 9ce64fd..21a9e48 100644 --- a/board/a3000/Kconfig +++ b/board/a3000/Kconfig @@ -1,11 +1,9 @@ if TARGET_A3000 config SYS_BOARD - string default "a3000" config SYS_CONFIG_NAME - string default "A3000" endif diff --git a/board/a3000/MAINTAINERS b/board/a3000/MAINTAINERS index 2d8560f..303e5fd 100644 --- a/board/a3000/MAINTAINERS +++ b/board/a3000/MAINTAINERS @@ -1,5 +1,5 @@ A3000 BOARD -M: - +#M: - S: Maintained F: board/a3000/ F: include/configs/A3000.h diff --git a/board/a3m071/Kconfig b/board/a3m071/Kconfig index ab32d5c..444c450 100644 --- a/board/a3m071/Kconfig +++ b/board/a3m071/Kconfig @@ -1,11 +1,9 @@ if TARGET_A3M071 config SYS_BOARD - string default "a3m071" config SYS_CONFIG_NAME - string default "a3m071" endif diff --git a/board/a4m072/Kconfig b/board/a4m072/Kconfig index cc31947..ba5447f 100644 --- a/board/a4m072/Kconfig +++ b/board/a4m072/Kconfig @@ -1,11 +1,9 @@ if TARGET_A4M072 config SYS_BOARD - string default "a4m072" config SYS_CONFIG_NAME - string default "a4m072" endif diff --git a/board/abilis/tb100/Kconfig b/board/abilis/tb100/Kconfig index eccf928..904a92c 100644 --- a/board/abilis/tb100/Kconfig +++ b/board/abilis/tb100/Kconfig @@ -1,19 +1,15 @@ if TARGET_TB100 config SYS_CPU - string default "arc700" config SYS_BOARD - string default "tb100" config SYS_VENDOR - string default "abilis" config SYS_CONFIG_NAME - string default "tb100" endif diff --git a/board/afeb9260/Kconfig b/board/afeb9260/Kconfig index 008d943..ff19181 100644 --- a/board/afeb9260/Kconfig +++ b/board/afeb9260/Kconfig @@ -1,19 +1,15 @@ if TARGET_AFEB9260 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "afeb9260" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "afeb9260" endif diff --git a/board/ait/cam_enc_4xx/Kconfig b/board/ait/cam_enc_4xx/Kconfig index 2b88692..64e18f4 100644 --- a/board/ait/cam_enc_4xx/Kconfig +++ b/board/ait/cam_enc_4xx/Kconfig @@ -1,15 +1,12 @@ if TARGET_CAM_ENC_4XX config SYS_BOARD - string default "cam_enc_4xx" config SYS_VENDOR - string default "ait" config SYS_CONFIG_NAME - string default "cam_enc_4xx" endif diff --git a/board/alphaproject/ap_sh4a_4a/Kconfig b/board/alphaproject/ap_sh4a_4a/Kconfig index 7893164..2352e66 100644 --- a/board/alphaproject/ap_sh4a_4a/Kconfig +++ b/board/alphaproject/ap_sh4a_4a/Kconfig @@ -1,19 +1,15 @@ if TARGET_AP_SH4A_4A config SYS_CPU - string default "sh4" config SYS_BOARD - string default "ap_sh4a_4a" config SYS_VENDOR - string default "alphaproject" config SYS_CONFIG_NAME - string default "ap_sh4a_4a" endif diff --git a/board/altera/nios2-generic/Kconfig b/board/altera/nios2-generic/Kconfig index 1209638..cd3d098 100644 --- a/board/altera/nios2-generic/Kconfig +++ b/board/altera/nios2-generic/Kconfig @@ -1,15 +1,12 @@ if TARGET_NIOS2_GENERIC config SYS_BOARD - string default "nios2-generic" config SYS_VENDOR - string default "altera" config SYS_CONFIG_NAME - string default "nios2-generic" endif diff --git a/board/altera/socfpga/Kconfig b/board/altera/socfpga/Kconfig index d0d9012..f859578 100644 --- a/board/altera/socfpga/Kconfig +++ b/board/altera/socfpga/Kconfig @@ -1,23 +1,18 @@ if TARGET_SOCFPGA_CYCLONE5 config SYS_CPU - string default "armv7" config SYS_BOARD - string default "socfpga" config SYS_VENDOR - string default "altera" config SYS_SOC - string default "socfpga" config SYS_CONFIG_NAME - string default "socfpga_cyclone5" endif diff --git a/board/amcc/acadia/Kconfig b/board/amcc/acadia/Kconfig index 096f02e..033deaf 100644 --- a/board/amcc/acadia/Kconfig +++ b/board/amcc/acadia/Kconfig @@ -1,15 +1,12 @@ if TARGET_ACADIA config SYS_BOARD - string default "acadia" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "acadia" endif diff --git a/board/amcc/bamboo/Kconfig b/board/amcc/bamboo/Kconfig index a002cfa..c0bd40a 100644 --- a/board/amcc/bamboo/Kconfig +++ b/board/amcc/bamboo/Kconfig @@ -1,15 +1,12 @@ if TARGET_BAMBOO config SYS_BOARD - string default "bamboo" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "bamboo" endif diff --git a/board/amcc/bluestone/Kconfig b/board/amcc/bluestone/Kconfig index 2f5999d..255e013 100644 --- a/board/amcc/bluestone/Kconfig +++ b/board/amcc/bluestone/Kconfig @@ -1,15 +1,12 @@ if TARGET_BLUESTONE config SYS_BOARD - string default "bluestone" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "bluestone" endif diff --git a/board/amcc/bluestone/MAINTAINERS b/board/amcc/bluestone/MAINTAINERS index 4a329e9..9eb9bbd 100644 --- a/board/amcc/bluestone/MAINTAINERS +++ b/board/amcc/bluestone/MAINTAINERS @@ -1,5 +1,5 @@ BLUESTONE BOARD -M: Tirumala Marri +#M: Tirumala Marri S: Orphan (since 2014-03) F: board/amcc/bluestone/ F: include/configs/bluestone.h diff --git a/board/amcc/bubinga/Kconfig b/board/amcc/bubinga/Kconfig index 29f769b..540d9b6 100644 --- a/board/amcc/bubinga/Kconfig +++ b/board/amcc/bubinga/Kconfig @@ -1,15 +1,12 @@ if TARGET_BUBINGA config SYS_BOARD - string default "bubinga" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "bubinga" endif diff --git a/board/amcc/bubinga/MAINTAINERS b/board/amcc/bubinga/MAINTAINERS index 9d5ace2..3299cc3 100644 --- a/board/amcc/bubinga/MAINTAINERS +++ b/board/amcc/bubinga/MAINTAINERS @@ -1,5 +1,5 @@ BUBINGA BOARD -M: - +#M: - S: Maintained F: board/amcc/bubinga/ F: include/configs/bubinga.h diff --git a/board/amcc/canyonlands/Kconfig b/board/amcc/canyonlands/Kconfig index 545056a..530a6ef 100644 --- a/board/amcc/canyonlands/Kconfig +++ b/board/amcc/canyonlands/Kconfig @@ -1,15 +1,12 @@ if TARGET_CANYONLANDS config SYS_BOARD - string default "canyonlands" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "canyonlands" endif diff --git a/board/amcc/ebony/Kconfig b/board/amcc/ebony/Kconfig index cc1448f..62394b6 100644 --- a/board/amcc/ebony/Kconfig +++ b/board/amcc/ebony/Kconfig @@ -1,15 +1,12 @@ if TARGET_EBONY config SYS_BOARD - string default "ebony" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "ebony" endif diff --git a/board/amcc/katmai/Kconfig b/board/amcc/katmai/Kconfig index 2a8d783..fc606cf 100644 --- a/board/amcc/katmai/Kconfig +++ b/board/amcc/katmai/Kconfig @@ -1,15 +1,12 @@ if TARGET_KATMAI config SYS_BOARD - string default "katmai" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "katmai" endif diff --git a/board/amcc/kilauea/Kconfig b/board/amcc/kilauea/Kconfig index 3564cc3..3f2f434 100644 --- a/board/amcc/kilauea/Kconfig +++ b/board/amcc/kilauea/Kconfig @@ -1,15 +1,12 @@ if TARGET_KILAUEA config SYS_BOARD - string default "kilauea" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "kilauea" endif diff --git a/board/amcc/luan/Kconfig b/board/amcc/luan/Kconfig index 7f19980..3df90af 100644 --- a/board/amcc/luan/Kconfig +++ b/board/amcc/luan/Kconfig @@ -1,15 +1,12 @@ if TARGET_LUAN config SYS_BOARD - string default "luan" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "luan" endif diff --git a/board/amcc/makalu/Kconfig b/board/amcc/makalu/Kconfig index 7f95bdc..31ce5f1 100644 --- a/board/amcc/makalu/Kconfig +++ b/board/amcc/makalu/Kconfig @@ -1,15 +1,12 @@ if TARGET_MAKALU config SYS_BOARD - string default "makalu" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "makalu" endif diff --git a/board/amcc/ocotea/Kconfig b/board/amcc/ocotea/Kconfig index 5eaf812..18c1a15 100644 --- a/board/amcc/ocotea/Kconfig +++ b/board/amcc/ocotea/Kconfig @@ -1,15 +1,12 @@ if TARGET_OCOTEA config SYS_BOARD - string default "ocotea" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "ocotea" endif diff --git a/board/amcc/redwood/Kconfig b/board/amcc/redwood/Kconfig index 001d400..d710590 100644 --- a/board/amcc/redwood/Kconfig +++ b/board/amcc/redwood/Kconfig @@ -1,15 +1,12 @@ if TARGET_REDWOOD config SYS_BOARD - string default "redwood" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "redwood" endif diff --git a/board/amcc/sequoia/Kconfig b/board/amcc/sequoia/Kconfig index ddcaced..67ee3ca 100644 --- a/board/amcc/sequoia/Kconfig +++ b/board/amcc/sequoia/Kconfig @@ -1,15 +1,12 @@ if TARGET_SEQUOIA config SYS_BOARD - string default "sequoia" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "sequoia" endif diff --git a/board/amcc/taihu/Kconfig b/board/amcc/taihu/Kconfig index 8411a82..fc5cb1d 100644 --- a/board/amcc/taihu/Kconfig +++ b/board/amcc/taihu/Kconfig @@ -1,15 +1,12 @@ if TARGET_TAIHU config SYS_BOARD - string default "taihu" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "taihu" endif diff --git a/board/amcc/taishan/Kconfig b/board/amcc/taishan/Kconfig index 0022063..abd07f5 100644 --- a/board/amcc/taishan/Kconfig +++ b/board/amcc/taishan/Kconfig @@ -1,15 +1,12 @@ if TARGET_TAISHAN config SYS_BOARD - string default "taishan" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "taishan" endif diff --git a/board/amcc/walnut/Kconfig b/board/amcc/walnut/Kconfig index f98cec5..94e3dc9 100644 --- a/board/amcc/walnut/Kconfig +++ b/board/amcc/walnut/Kconfig @@ -1,15 +1,12 @@ if TARGET_WALNUT config SYS_BOARD - string default "walnut" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "walnut" endif diff --git a/board/amcc/yosemite/Kconfig b/board/amcc/yosemite/Kconfig index 8aa62c0..dfa1068 100644 --- a/board/amcc/yosemite/Kconfig +++ b/board/amcc/yosemite/Kconfig @@ -1,15 +1,12 @@ if TARGET_YOSEMITE config SYS_BOARD - string default "yosemite" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "yosemite" endif diff --git a/board/amcc/yucca/Kconfig b/board/amcc/yucca/Kconfig index 945333f..61d9589 100644 --- a/board/amcc/yucca/Kconfig +++ b/board/amcc/yucca/Kconfig @@ -1,15 +1,12 @@ if TARGET_YUCCA config SYS_BOARD - string default "yucca" config SYS_VENDOR - string default "amcc" config SYS_CONFIG_NAME - string default "yucca" endif diff --git a/board/amcc/yucca/MAINTAINERS b/board/amcc/yucca/MAINTAINERS index 0663003..1cbdb0e 100644 --- a/board/amcc/yucca/MAINTAINERS +++ b/board/amcc/yucca/MAINTAINERS @@ -1,5 +1,5 @@ YUCCA BOARD -M: - +#M: - S: Maintained F: board/amcc/yucca/ F: include/configs/yucca.h diff --git a/board/aristainetos/Kconfig b/board/aristainetos/Kconfig index 58078ea..ac35d6d 100644 --- a/board/aristainetos/Kconfig +++ b/board/aristainetos/Kconfig @@ -1,19 +1,15 @@ if TARGET_ARISTAINETOS config SYS_CPU - string default "armv7" config SYS_BOARD - string default "aristainetos" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "aristainetos" endif diff --git a/board/armadeus/apf27/Kconfig b/board/armadeus/apf27/Kconfig index f2d33c6..53532bb 100644 --- a/board/armadeus/apf27/Kconfig +++ b/board/armadeus/apf27/Kconfig @@ -1,23 +1,18 @@ if TARGET_APF27 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "apf27" config SYS_VENDOR - string default "armadeus" config SYS_SOC - string default "mx27" config SYS_CONFIG_NAME - string default "apf27" endif diff --git a/board/armltd/integrator/Kconfig b/board/armltd/integrator/Kconfig index c1ac6b1..4955313 100644 --- a/board/armltd/integrator/Kconfig +++ b/board/armltd/integrator/Kconfig @@ -1,19 +1,15 @@ if TARGET_INTEGRATORAP_CM720T config SYS_CPU - string default "arm720t" config SYS_BOARD - string default "integrator" config SYS_VENDOR - string default "armltd" config SYS_CONFIG_NAME - string default "integratorap" endif @@ -21,19 +17,15 @@ endif if TARGET_INTEGRATORAP_CM920T config SYS_CPU - string default "arm920t" config SYS_BOARD - string default "integrator" config SYS_VENDOR - string default "armltd" config SYS_CONFIG_NAME - string default "integratorap" endif @@ -41,19 +33,15 @@ endif if TARGET_INTEGRATORCP_CM920T config SYS_CPU - string default "arm920t" config SYS_BOARD - string default "integrator" config SYS_VENDOR - string default "armltd" config SYS_CONFIG_NAME - string default "integratorcp" endif @@ -61,19 +49,15 @@ endif if TARGET_INTEGRATORAP_CM926EJS config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "integrator" config SYS_VENDOR - string default "armltd" config SYS_CONFIG_NAME - string default "integratorap" endif @@ -81,19 +65,15 @@ endif if TARGET_INTEGRATORCP_CM926EJS config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "integrator" config SYS_VENDOR - string default "armltd" config SYS_CONFIG_NAME - string default "integratorcp" endif @@ -101,19 +81,15 @@ endif if TARGET_INTEGRATORCP_CM1136 config SYS_CPU - string default "arm1136" config SYS_BOARD - string default "integrator" config SYS_VENDOR - string default "armltd" config SYS_CONFIG_NAME - string default "integratorcp" endif @@ -121,19 +97,15 @@ endif if TARGET_INTEGRATORAP_CM946ES config SYS_CPU - string default "arm946es" config SYS_BOARD - string default "integrator" config SYS_VENDOR - string default "armltd" config SYS_CONFIG_NAME - string default "integratorap" endif @@ -141,19 +113,15 @@ endif if TARGET_INTEGRATORCP_CM946ES config SYS_CPU - string default "arm946es" config SYS_BOARD - string default "integrator" config SYS_VENDOR - string default "armltd" config SYS_CONFIG_NAME - string default "integratorcp" endif diff --git a/board/armltd/versatile/MAINTAINERS b/board/armltd/versatile/MAINTAINERS index f390e53..a56dd99 100644 --- a/board/armltd/versatile/MAINTAINERS +++ b/board/armltd/versatile/MAINTAINERS @@ -1,5 +1,5 @@ VERSATILE BOARD -M: - +#M: - S: Maintained F: board/armltd/versatile/ F: include/configs/versatile.h diff --git a/board/armltd/vexpress/Kconfig b/board/armltd/vexpress/Kconfig index e49e871..7fa30c6 100644 --- a/board/armltd/vexpress/Kconfig +++ b/board/armltd/vexpress/Kconfig @@ -1,19 +1,15 @@ if TARGET_VEXPRESS_CA15_TC2 config SYS_CPU - string default "armv7" config SYS_BOARD - string default "vexpress" config SYS_VENDOR - string default "armltd" config SYS_CONFIG_NAME - string default "vexpress_ca15_tc2" endif @@ -21,19 +17,15 @@ endif if TARGET_VEXPRESS_CA5X2 config SYS_CPU - string default "armv7" config SYS_BOARD - string default "vexpress" config SYS_VENDOR - string default "armltd" config SYS_CONFIG_NAME - string default "vexpress_ca5x2" endif @@ -41,19 +33,15 @@ endif if TARGET_VEXPRESS_CA9X4 config SYS_CPU - string default "armv7" config SYS_BOARD - string default "vexpress" config SYS_VENDOR - string default "armltd" config SYS_CONFIG_NAME - string default "vexpress_ca9x4" endif diff --git a/board/armltd/vexpress/MAINTAINERS b/board/armltd/vexpress/MAINTAINERS index e730f4f..a6943d7 100644 --- a/board/armltd/vexpress/MAINTAINERS +++ b/board/armltd/vexpress/MAINTAINERS @@ -1,12 +1,12 @@ VEXPRESS BOARD -M: - +#M: - S: Maintained F: board/armltd/vexpress/ F: include/configs/vexpress_ca15_tc2.h F: configs/vexpress_ca15_tc2_defconfig VEXPRESS_CA5X2 BOARD -M: Matt Waddel +#M: Matt Waddel S: Orphan (since 2014-08) F: include/configs/vexpress_ca5x2.h F: configs/vexpress_ca5x2_defconfig diff --git a/board/armltd/vexpress64/Kconfig b/board/armltd/vexpress64/Kconfig index 91eb8d2..7ebea63 100644 --- a/board/armltd/vexpress64/Kconfig +++ b/board/armltd/vexpress64/Kconfig @@ -1,39 +1,12 @@ if TARGET_VEXPRESS_AEMV8A -config SYS_CPU - string - default "armv8" - -config SYS_BOARD - string - default "vexpress64" - -config SYS_VENDOR - string - default "armltd" - -config SYS_CONFIG_NAME - string - default "vexpress_aemv8a" - -endif - -if TARGET_VEXPRESS_AEMV8A_SEMI - -config SYS_CPU - string - default "armv8" - config SYS_BOARD - string default "vexpress64" config SYS_VENDOR - string default "armltd" config SYS_CONFIG_NAME - string default "vexpress_aemv8a" endif diff --git a/board/astro/mcf5373l/Kconfig b/board/astro/mcf5373l/Kconfig index 6e947dc..a7c04ce 100644 --- a/board/astro/mcf5373l/Kconfig +++ b/board/astro/mcf5373l/Kconfig @@ -1,19 +1,15 @@ if TARGET_ASTRO_MCF5373L config SYS_CPU - string default "mcf532x" config SYS_BOARD - string default "mcf5373l" config SYS_VENDOR - string default "astro" config SYS_CONFIG_NAME - string default "astro_mcf5373l" endif diff --git a/board/atc/Kconfig b/board/atc/Kconfig index 826753f..9b336ca 100644 --- a/board/atc/Kconfig +++ b/board/atc/Kconfig @@ -1,11 +1,9 @@ if TARGET_ATC config SYS_BOARD - string default "atc" config SYS_CONFIG_NAME - string default "atc" endif diff --git a/board/atmark-techno/armadillo-800eva/Kconfig b/board/atmark-techno/armadillo-800eva/Kconfig index 3365c7b..cd37dd4 100644 --- a/board/atmark-techno/armadillo-800eva/Kconfig +++ b/board/atmark-techno/armadillo-800eva/Kconfig @@ -1,15 +1,12 @@ if TARGET_ARMADILLO_800EVA config SYS_BOARD - string default "armadillo-800eva" config SYS_VENDOR - string default "atmark-techno" config SYS_CONFIG_NAME - string default "armadillo-800eva" endif diff --git a/board/atmel/at91rm9200ek/Kconfig b/board/atmel/at91rm9200ek/Kconfig index d7ee4f4..61db2e2 100644 --- a/board/atmel/at91rm9200ek/Kconfig +++ b/board/atmel/at91rm9200ek/Kconfig @@ -1,23 +1,18 @@ if TARGET_AT91RM9200EK config SYS_CPU - string default "arm920t" config SYS_BOARD - string default "at91rm9200ek" config SYS_VENDOR - string default "atmel" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "at91rm9200ek" endif diff --git a/board/atmel/at91sam9260ek/Kconfig b/board/atmel/at91sam9260ek/Kconfig index 14af5bc..24a645b 100644 --- a/board/atmel/at91sam9260ek/Kconfig +++ b/board/atmel/at91sam9260ek/Kconfig @@ -1,23 +1,18 @@ if TARGET_AT91SAM9260EK config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "at91sam9260ek" config SYS_VENDOR - string default "atmel" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "at91sam9260ek" endif diff --git a/board/atmel/at91sam9261ek/Kconfig b/board/atmel/at91sam9261ek/Kconfig index 63dcdd8..301bf1a 100644 --- a/board/atmel/at91sam9261ek/Kconfig +++ b/board/atmel/at91sam9261ek/Kconfig @@ -1,23 +1,18 @@ if TARGET_AT91SAM9261EK config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "at91sam9261ek" config SYS_VENDOR - string default "atmel" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "at91sam9261ek" endif diff --git a/board/atmel/at91sam9263ek/Kconfig b/board/atmel/at91sam9263ek/Kconfig index fa0a58a..f8e2b48 100644 --- a/board/atmel/at91sam9263ek/Kconfig +++ b/board/atmel/at91sam9263ek/Kconfig @@ -1,23 +1,18 @@ if TARGET_AT91SAM9263EK config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "at91sam9263ek" config SYS_VENDOR - string default "atmel" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "at91sam9263ek" endif diff --git a/board/atmel/at91sam9m10g45ek/Kconfig b/board/atmel/at91sam9m10g45ek/Kconfig index 8567f95..d2e191c 100644 --- a/board/atmel/at91sam9m10g45ek/Kconfig +++ b/board/atmel/at91sam9m10g45ek/Kconfig @@ -1,23 +1,18 @@ if TARGET_AT91SAM9M10G45EK config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "at91sam9m10g45ek" config SYS_VENDOR - string default "atmel" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "at91sam9m10g45ek" endif diff --git a/board/atmel/at91sam9n12ek/Kconfig b/board/atmel/at91sam9n12ek/Kconfig index 4fc714b..845cd36 100644 --- a/board/atmel/at91sam9n12ek/Kconfig +++ b/board/atmel/at91sam9n12ek/Kconfig @@ -1,23 +1,18 @@ if TARGET_AT91SAM9N12EK config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "at91sam9n12ek" config SYS_VENDOR - string default "atmel" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "at91sam9n12ek" endif diff --git a/board/atmel/at91sam9rlek/Kconfig b/board/atmel/at91sam9rlek/Kconfig index 178f80d..517f22a 100644 --- a/board/atmel/at91sam9rlek/Kconfig +++ b/board/atmel/at91sam9rlek/Kconfig @@ -1,23 +1,18 @@ if TARGET_AT91SAM9RLEK config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "at91sam9rlek" config SYS_VENDOR - string default "atmel" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "at91sam9rlek" endif diff --git a/board/atmel/at91sam9x5ek/Kconfig b/board/atmel/at91sam9x5ek/Kconfig index 0a0b132..d236b1a 100644 --- a/board/atmel/at91sam9x5ek/Kconfig +++ b/board/atmel/at91sam9x5ek/Kconfig @@ -1,23 +1,18 @@ if TARGET_AT91SAM9X5EK config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "at91sam9x5ek" config SYS_VENDOR - string default "atmel" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "at91sam9x5ek" endif diff --git a/board/atmel/atngw100/Kconfig b/board/atmel/atngw100/Kconfig index a966b31..28037b6 100644 --- a/board/atmel/atngw100/Kconfig +++ b/board/atmel/atngw100/Kconfig @@ -1,19 +1,15 @@ if TARGET_ATNGW100 config SYS_BOARD - string default "atngw100" config SYS_VENDOR - string default "atmel" config SYS_SOC - string default "at32ap700x" config SYS_CONFIG_NAME - string default "atngw100" endif diff --git a/board/atmel/atngw100/MAINTAINERS b/board/atmel/atngw100/MAINTAINERS index dd698ea..1c319f6 100644 --- a/board/atmel/atngw100/MAINTAINERS +++ b/board/atmel/atngw100/MAINTAINERS @@ -1,5 +1,5 @@ ATNGW100 BOARD -M: Haavard Skinnemoen +#M: Haavard Skinnemoen S: Orphan (since 2014-06) F: board/atmel/atngw100/ F: include/configs/atngw100.h diff --git a/board/atmel/atngw100mkii/Kconfig b/board/atmel/atngw100mkii/Kconfig index dcea07e..ca04269 100644 --- a/board/atmel/atngw100mkii/Kconfig +++ b/board/atmel/atngw100mkii/Kconfig @@ -1,19 +1,15 @@ if TARGET_ATNGW100MKII config SYS_BOARD - string default "atngw100mkii" config SYS_VENDOR - string default "atmel" config SYS_SOC - string default "at32ap700x" config SYS_CONFIG_NAME - string default "atngw100mkii" endif diff --git a/board/atmel/atstk1000/Kconfig b/board/atmel/atstk1000/Kconfig index 1a24409..6d41514 100644 --- a/board/atmel/atstk1000/Kconfig +++ b/board/atmel/atstk1000/Kconfig @@ -1,19 +1,15 @@ if TARGET_ATSTK1002 config SYS_BOARD - string default "atstk1000" config SYS_VENDOR - string default "atmel" config SYS_SOC - string default "at32ap700x" config SYS_CONFIG_NAME - string default "atstk1002" endif @@ -21,19 +17,15 @@ endif if TARGET_ATSTK1003 config SYS_BOARD - string default "atstk1000" config SYS_VENDOR - string default "atmel" config SYS_SOC - string default "at32ap700x" config SYS_CONFIG_NAME - string default "atstk1003" endif @@ -41,19 +33,15 @@ endif if TARGET_ATSTK1004 config SYS_BOARD - string default "atstk1000" config SYS_VENDOR - string default "atmel" config SYS_SOC - string default "at32ap700x" config SYS_CONFIG_NAME - string default "atstk1004" endif @@ -61,19 +49,15 @@ endif if TARGET_ATSTK1006 config SYS_BOARD - string default "atstk1000" config SYS_VENDOR - string default "atmel" config SYS_SOC - string default "at32ap700x" config SYS_CONFIG_NAME - string default "atstk1006" endif diff --git a/board/atmel/atstk1000/MAINTAINERS b/board/atmel/atstk1000/MAINTAINERS index 76365b0..378e1b3 100644 --- a/board/atmel/atstk1000/MAINTAINERS +++ b/board/atmel/atstk1000/MAINTAINERS @@ -1,5 +1,5 @@ ATSTK1000 BOARD -M: Haavard Skinnemoen +#M: Haavard Skinnemoen S: Orphan (since 2014-06) F: board/atmel/atstk1000/ F: include/configs/atstk1002.h diff --git a/board/atmel/sama5d3_xplained/Kconfig b/board/atmel/sama5d3_xplained/Kconfig index 603b241..0ca1ec0 100644 --- a/board/atmel/sama5d3_xplained/Kconfig +++ b/board/atmel/sama5d3_xplained/Kconfig @@ -1,23 +1,18 @@ if TARGET_SAMA5D3_XPLAINED config SYS_CPU - string default "armv7" config SYS_BOARD - string default "sama5d3_xplained" config SYS_VENDOR - string default "atmel" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "sama5d3_xplained" endif diff --git a/board/atmel/sama5d3xek/Kconfig b/board/atmel/sama5d3xek/Kconfig index 5b4eb6f..f0dd04a 100644 --- a/board/atmel/sama5d3xek/Kconfig +++ b/board/atmel/sama5d3xek/Kconfig @@ -1,23 +1,18 @@ if TARGET_SAMA5D3XEK config SYS_CPU - string default "armv7" config SYS_BOARD - string default "sama5d3xek" config SYS_VENDOR - string default "atmel" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "sama5d3xek" endif diff --git a/board/atmel/sama5d3xek/sama5d3xek.c b/board/atmel/sama5d3xek/sama5d3xek.c index c835c12..f53754b 100644 --- a/board/atmel/sama5d3xek/sama5d3xek.c +++ b/board/atmel/sama5d3xek/sama5d3xek.c @@ -67,6 +67,61 @@ void sama5d3xek_nand_hw_init(void) } #endif +#ifndef CONFIG_SYS_NO_FLASH +static void sama5d3xek_nor_hw_init(void) +{ + struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; + + at91_periph_clk_enable(ATMEL_ID_SMC); + + /* Configure SMC CS0 for NOR flash */ + writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | + AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0), + &smc->cs[0].setup); + writel(AT91_SMC_PULSE_NWE(10) | AT91_SMC_PULSE_NCS_WR(11) | + AT91_SMC_PULSE_NRD(10) | AT91_SMC_PULSE_NCS_RD(11), + &smc->cs[0].pulse); + writel(AT91_SMC_CYCLE_NWE(11) | AT91_SMC_CYCLE_NRD(14), + &smc->cs[0].cycle); + writel(AT91_SMC_TIMINGS_TCLR(0) | AT91_SMC_TIMINGS_TADL(0) | + AT91_SMC_TIMINGS_TAR(0) | AT91_SMC_TIMINGS_TRR(0) | + AT91_SMC_TIMINGS_TWB(0) | AT91_SMC_TIMINGS_RBNSEL(0)| + AT91_SMC_TIMINGS_NFSEL(0), &smc->cs[0].timings); + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | + AT91_SMC_MODE_EXNW_DISABLE | + AT91_SMC_MODE_DBW_16 | + AT91_SMC_MODE_TDF_CYCLE(1), + &smc->cs[0].mode); + + /* Address pin (A1 ~ A23) configuration */ + at91_set_a_periph(AT91_PIO_PORTE, 1, 0); + at91_set_a_periph(AT91_PIO_PORTE, 2, 0); + at91_set_a_periph(AT91_PIO_PORTE, 3, 0); + at91_set_a_periph(AT91_PIO_PORTE, 4, 0); + at91_set_a_periph(AT91_PIO_PORTE, 5, 0); + at91_set_a_periph(AT91_PIO_PORTE, 6, 0); + at91_set_a_periph(AT91_PIO_PORTE, 7, 0); + at91_set_a_periph(AT91_PIO_PORTE, 8, 0); + at91_set_a_periph(AT91_PIO_PORTE, 9, 0); + at91_set_a_periph(AT91_PIO_PORTE, 10, 0); + at91_set_a_periph(AT91_PIO_PORTE, 11, 0); + at91_set_a_periph(AT91_PIO_PORTE, 12, 0); + at91_set_a_periph(AT91_PIO_PORTE, 13, 0); + at91_set_a_periph(AT91_PIO_PORTE, 14, 0); + at91_set_a_periph(AT91_PIO_PORTE, 15, 0); + at91_set_a_periph(AT91_PIO_PORTE, 16, 0); + at91_set_a_periph(AT91_PIO_PORTE, 17, 0); + at91_set_a_periph(AT91_PIO_PORTE, 18, 0); + at91_set_a_periph(AT91_PIO_PORTE, 19, 0); + at91_set_a_periph(AT91_PIO_PORTE, 20, 0); + at91_set_a_periph(AT91_PIO_PORTE, 21, 0); + at91_set_a_periph(AT91_PIO_PORTE, 22, 0); + at91_set_a_periph(AT91_PIO_PORTE, 23, 0); + /* CS0 pin configuration */ + at91_set_a_periph(AT91_PIO_PORTE, 26, 0); +} +#endif + #ifdef CONFIG_CMD_USB static void sama5d3xek_usb_hw_init(void) { @@ -181,6 +236,9 @@ int board_init(void) #ifdef CONFIG_NAND_ATMEL sama5d3xek_nand_hw_init(); #endif +#ifndef CONFIG_SYS_NO_FLASH + sama5d3xek_nor_hw_init(); +#endif #ifdef CONFIG_CMD_USB sama5d3xek_usb_hw_init(); #endif diff --git a/board/avionic-design/medcom-wide/Kconfig b/board/avionic-design/medcom-wide/Kconfig index 16001e4..267647c 100644 --- a/board/avionic-design/medcom-wide/Kconfig +++ b/board/avionic-design/medcom-wide/Kconfig @@ -1,15 +1,12 @@ if TARGET_MEDCOM_WIDE config SYS_BOARD - string default "medcom-wide" config SYS_VENDOR - string default "avionic-design" config SYS_CONFIG_NAME - string default "medcom-wide" endif diff --git a/board/avionic-design/plutux/Kconfig b/board/avionic-design/plutux/Kconfig index c9a90247..09a3ac9 100644 --- a/board/avionic-design/plutux/Kconfig +++ b/board/avionic-design/plutux/Kconfig @@ -1,15 +1,12 @@ if TARGET_PLUTUX config SYS_BOARD - string default "plutux" config SYS_VENDOR - string default "avionic-design" config SYS_CONFIG_NAME - string default "plutux" endif diff --git a/board/avionic-design/tec-ng/Kconfig b/board/avionic-design/tec-ng/Kconfig index e6b69e8..36a0cec 100644 --- a/board/avionic-design/tec-ng/Kconfig +++ b/board/avionic-design/tec-ng/Kconfig @@ -1,15 +1,12 @@ if TARGET_TEC_NG config SYS_BOARD - string default "tec-ng" config SYS_VENDOR - string default "avionic-design" config SYS_CONFIG_NAME - string default "tec-ng" endif diff --git a/board/avionic-design/tec/Kconfig b/board/avionic-design/tec/Kconfig index fbf7f46..bc9751b 100644 --- a/board/avionic-design/tec/Kconfig +++ b/board/avionic-design/tec/Kconfig @@ -1,15 +1,12 @@ if TARGET_TEC config SYS_BOARD - string default "tec" config SYS_VENDOR - string default "avionic-design" config SYS_CONFIG_NAME - string default "tec" endif diff --git a/board/avnet/fx12mm/Kconfig b/board/avnet/fx12mm/Kconfig index 7b1687e..0b67ebd 100644 --- a/board/avnet/fx12mm/Kconfig +++ b/board/avnet/fx12mm/Kconfig @@ -1,15 +1,12 @@ if TARGET_FX12MM config SYS_BOARD - string default "fx12mm" config SYS_VENDOR - string default "avnet" config SYS_CONFIG_NAME - string default "fx12mm" endif diff --git a/board/avnet/v5fx30teval/Kconfig b/board/avnet/v5fx30teval/Kconfig index 8ae22e9..079387b 100644 --- a/board/avnet/v5fx30teval/Kconfig +++ b/board/avnet/v5fx30teval/Kconfig @@ -1,15 +1,12 @@ if TARGET_V5FX30TEVAL config SYS_BOARD - string default "v5fx30teval" config SYS_VENDOR - string default "avnet" config SYS_CONFIG_NAME - string default "v5fx30teval" endif diff --git a/board/balloon3/Kconfig b/board/balloon3/Kconfig index aee2193..fb1cf3f 100644 --- a/board/balloon3/Kconfig +++ b/board/balloon3/Kconfig @@ -1,15 +1,12 @@ if TARGET_BALLOON3 config SYS_CPU - string default "pxa" config SYS_BOARD - string default "balloon3" config SYS_CONFIG_NAME - string default "balloon3" endif diff --git a/board/barco/titanium/Kconfig b/board/barco/titanium/Kconfig index a2ddd87..56ed7d6 100644 --- a/board/barco/titanium/Kconfig +++ b/board/barco/titanium/Kconfig @@ -1,23 +1,18 @@ if TARGET_TITANIUM config SYS_CPU - string default "armv7" config SYS_BOARD - string default "titanium" config SYS_VENDOR - string default "barco" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "titanium" endif diff --git a/board/bc3450/Kconfig b/board/bc3450/Kconfig index ba058db..a0fc19f 100644 --- a/board/bc3450/Kconfig +++ b/board/bc3450/Kconfig @@ -1,11 +1,9 @@ if TARGET_BC3450 config SYS_BOARD - string default "bc3450" config SYS_CONFIG_NAME - string default "BC3450" endif diff --git a/board/bc3450/MAINTAINERS b/board/bc3450/MAINTAINERS index e2a8363..81a7076 100644 --- a/board/bc3450/MAINTAINERS +++ b/board/bc3450/MAINTAINERS @@ -1,5 +1,5 @@ BC3450 BOARD -M: - +#M: - S: Maintained F: board/bc3450/ F: include/configs/BC3450.h diff --git a/board/bct-brettl2/Kconfig b/board/bct-brettl2/Kconfig index c3e3837..9c5407e 100644 --- a/board/bct-brettl2/Kconfig +++ b/board/bct-brettl2/Kconfig @@ -1,11 +1,9 @@ if TARGET_BCT_BRETTL2 config SYS_BOARD - string default "bct-brettl2" config SYS_CONFIG_NAME - string default "bct-brettl2" endif diff --git a/board/bf506f-ezkit/Kconfig b/board/bf506f-ezkit/Kconfig index 749ad2b..e6fc12c 100644 --- a/board/bf506f-ezkit/Kconfig +++ b/board/bf506f-ezkit/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF506F_EZKIT config SYS_BOARD - string default "bf506f-ezkit" config SYS_CONFIG_NAME - string default "bf506f-ezkit" endif diff --git a/board/bf518f-ezbrd/Kconfig b/board/bf518f-ezbrd/Kconfig index 5656d1c..a0e80a8 100644 --- a/board/bf518f-ezbrd/Kconfig +++ b/board/bf518f-ezbrd/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF518F_EZBRD config SYS_BOARD - string default "bf518f-ezbrd" config SYS_CONFIG_NAME - string default "bf518f-ezbrd" endif diff --git a/board/bf525-ucr2/Kconfig b/board/bf525-ucr2/Kconfig index 5967d04..cd52daa 100644 --- a/board/bf525-ucr2/Kconfig +++ b/board/bf525-ucr2/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF525_UCR2 config SYS_BOARD - string default "bf525-ucr2" config SYS_CONFIG_NAME - string default "bf525-ucr2" endif diff --git a/board/bf526-ezbrd/Kconfig b/board/bf526-ezbrd/Kconfig index 6793c0e..e138ea5 100644 --- a/board/bf526-ezbrd/Kconfig +++ b/board/bf526-ezbrd/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF526_EZBRD config SYS_BOARD - string default "bf526-ezbrd" config SYS_CONFIG_NAME - string default "bf526-ezbrd" endif diff --git a/board/bf527-ad7160-eval/Kconfig b/board/bf527-ad7160-eval/Kconfig index 6febd7f..fe56241 100644 --- a/board/bf527-ad7160-eval/Kconfig +++ b/board/bf527-ad7160-eval/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF527_AD7160_EVAL config SYS_BOARD - string default "bf527-ad7160-eval" config SYS_CONFIG_NAME - string default "bf527-ad7160-eval" endif diff --git a/board/bf527-ezkit/Kconfig b/board/bf527-ezkit/Kconfig index 459d971..df49d7a 100644 --- a/board/bf527-ezkit/Kconfig +++ b/board/bf527-ezkit/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF527_EZKIT config SYS_BOARD - string default "bf527-ezkit" config SYS_CONFIG_NAME - string default "bf527-ezkit" endif diff --git a/board/bf527-sdp/Kconfig b/board/bf527-sdp/Kconfig index 8d54fb8..928bd77 100644 --- a/board/bf527-sdp/Kconfig +++ b/board/bf527-sdp/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF527_SDP config SYS_BOARD - string default "bf527-sdp" config SYS_CONFIG_NAME - string default "bf527-sdp" endif diff --git a/board/bf533-ezkit/Kconfig b/board/bf533-ezkit/Kconfig index c0317c2..555ab29 100644 --- a/board/bf533-ezkit/Kconfig +++ b/board/bf533-ezkit/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF533_EZKIT config SYS_BOARD - string default "bf533-ezkit" config SYS_CONFIG_NAME - string default "bf533-ezkit" endif diff --git a/board/bf533-stamp/Kconfig b/board/bf533-stamp/Kconfig index 3f01c2b..0cffde3 100644 --- a/board/bf533-stamp/Kconfig +++ b/board/bf533-stamp/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF533_STAMP config SYS_BOARD - string default "bf533-stamp" config SYS_CONFIG_NAME - string default "bf533-stamp" endif diff --git a/board/bf537-minotaur/Kconfig b/board/bf537-minotaur/Kconfig index 6704f2d..204f609 100644 --- a/board/bf537-minotaur/Kconfig +++ b/board/bf537-minotaur/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF537_MINOTAUR config SYS_BOARD - string default "bf537-minotaur" config SYS_CONFIG_NAME - string default "bf537-minotaur" endif diff --git a/board/bf537-pnav/Kconfig b/board/bf537-pnav/Kconfig index 125a9fa..acb1f89 100644 --- a/board/bf537-pnav/Kconfig +++ b/board/bf537-pnav/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF537_PNAV config SYS_BOARD - string default "bf537-pnav" config SYS_CONFIG_NAME - string default "bf537-pnav" endif diff --git a/board/bf537-srv1/Kconfig b/board/bf537-srv1/Kconfig index 658a6e5..2ddcd69 100644 --- a/board/bf537-srv1/Kconfig +++ b/board/bf537-srv1/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF537_SRV1 config SYS_BOARD - string default "bf537-srv1" config SYS_CONFIG_NAME - string default "bf537-srv1" endif diff --git a/board/bf537-stamp/Kconfig b/board/bf537-stamp/Kconfig index 9330a4c..4f86128 100644 --- a/board/bf537-stamp/Kconfig +++ b/board/bf537-stamp/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF537_STAMP config SYS_BOARD - string default "bf537-stamp" config SYS_CONFIG_NAME - string default "bf537-stamp" endif diff --git a/board/bf538f-ezkit/Kconfig b/board/bf538f-ezkit/Kconfig index 5b9c8d9..e40fcdb 100644 --- a/board/bf538f-ezkit/Kconfig +++ b/board/bf538f-ezkit/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF538F_EZKIT config SYS_BOARD - string default "bf538f-ezkit" config SYS_CONFIG_NAME - string default "bf538f-ezkit" endif diff --git a/board/bf548-ezkit/Kconfig b/board/bf548-ezkit/Kconfig index 8d799aa..550227f 100644 --- a/board/bf548-ezkit/Kconfig +++ b/board/bf548-ezkit/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF548_EZKIT config SYS_BOARD - string default "bf548-ezkit" config SYS_CONFIG_NAME - string default "bf548-ezkit" endif diff --git a/board/bf561-acvilon/Kconfig b/board/bf561-acvilon/Kconfig index 6c1789c..ba1580d 100644 --- a/board/bf561-acvilon/Kconfig +++ b/board/bf561-acvilon/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF561_ACVILON config SYS_BOARD - string default "bf561-acvilon" config SYS_CONFIG_NAME - string default "bf561-acvilon" endif diff --git a/board/bf561-ezkit/Kconfig b/board/bf561-ezkit/Kconfig index d1cb81f..495a5c5 100644 --- a/board/bf561-ezkit/Kconfig +++ b/board/bf561-ezkit/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF561_EZKIT config SYS_BOARD - string default "bf561-ezkit" config SYS_CONFIG_NAME - string default "bf561-ezkit" endif diff --git a/board/bf609-ezkit/Kconfig b/board/bf609-ezkit/Kconfig index ad959d7..7992e1e 100644 --- a/board/bf609-ezkit/Kconfig +++ b/board/bf609-ezkit/Kconfig @@ -1,11 +1,9 @@ if TARGET_BF609_EZKIT config SYS_BOARD - string default "bf609-ezkit" config SYS_CONFIG_NAME - string default "bf609-ezkit" endif diff --git a/board/blackstamp/Kconfig b/board/blackstamp/Kconfig index 0046b93..7ce086a 100644 --- a/board/blackstamp/Kconfig +++ b/board/blackstamp/Kconfig @@ -1,11 +1,9 @@ if TARGET_BLACKSTAMP config SYS_BOARD - string default "blackstamp" config SYS_CONFIG_NAME - string default "blackstamp" endif diff --git a/board/blackvme/Kconfig b/board/blackvme/Kconfig index 72aaa29..5e73f84 100644 --- a/board/blackvme/Kconfig +++ b/board/blackvme/Kconfig @@ -1,11 +1,9 @@ if TARGET_BLACKVME config SYS_BOARD - string default "blackvme" config SYS_CONFIG_NAME - string default "blackvme" endif diff --git a/board/bluegiga/apx4devkit/Kconfig b/board/bluegiga/apx4devkit/Kconfig index acccec9..7d1534a 100644 --- a/board/bluegiga/apx4devkit/Kconfig +++ b/board/bluegiga/apx4devkit/Kconfig @@ -1,23 +1,18 @@ if TARGET_APX4DEVKIT config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "apx4devkit" config SYS_VENDOR - string default "bluegiga" config SYS_SOC - string default "mxs" config SYS_CONFIG_NAME - string default "apx4devkit" endif diff --git a/board/bluewater/snapper9260/Kconfig b/board/bluewater/snapper9260/Kconfig index 81eb911..1c8f78d 100644 --- a/board/bluewater/snapper9260/Kconfig +++ b/board/bluewater/snapper9260/Kconfig @@ -1,23 +1,18 @@ if TARGET_SNAPPER9260 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "snapper9260" config SYS_VENDOR - string default "bluewater" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "snapper9260" endif diff --git a/board/boundary/a/6x_bootscript-upgrade-usbotg.txt b/board/boundary/a/6x_bootscript-upgrade-usbotg.txt new file mode 100644 index 0000000..e5d9cfa --- /dev/null +++ b/board/boundary/a/6x_bootscript-upgrade-usbotg.txt @@ -0,0 +1,8 @@ +for n in 51 52 53 54 ; do gpio clear $n ; done +load usb 0 10008000 /restore-to-emmc-amp.img.gz + && time gzwrite mmc 0 10008000 0x$filesize 400000 0 + && gpio set 51 + && gpio set 52 + && while itest.l 0 -eq 0 ; do ;; done +gpio set 54 + diff --git a/board/boundary/a/6x_bootscript-writeable-rootfs.txt b/board/boundary/a/6x_bootscript-writeable-rootfs.txt new file mode 100644 index 0000000..6137edf --- /dev/null +++ b/board/boundary/a/6x_bootscript-writeable-rootfs.txt @@ -0,0 +1,21 @@ +setenv bootargs enable_wait_mode=off +setenv bootargs $bootargs console=ttymxc1,115200 + +if test -n "$tempfuse" ; then + setenv bootargs $bootargs thermal.fusedata=$tempfuse +fi + +if itest.s "x" != "x$asix"; then + setenv bootargs $bootargs asix.ethaddr1=$asix; +fi + +if kbd ; then + if itest.s "xF" == "x$keybd" ; then + ums 0 mmc 0; + fi +fi + +if ${fs}load ${dtype} 0:1 10800000 /uImage ; then + setenv bootargs $bootargs rootwait root=/dev/mmcblk0p2 init=/sbin/init + bootm 10800000 +fi diff --git a/board/boundary/a/6x_bootscript.txt b/board/boundary/a/6x_bootscript.txt new file mode 100644 index 0000000..7dea387 --- /dev/null +++ b/board/boundary/a/6x_bootscript.txt @@ -0,0 +1,29 @@ +setenv bootargs enable_wait_mode=off +if test -n "$tempfuse" ; then + setenv bootargs $bootargs thermal.fusedata=$tempfuse +fi + +kernel=/boot/uImage +ramdisk=/boot/uramdisk.img + +if kbd ; then + if itest.s "xF" == "x$keybd" ; then + kernel=/boot/uImage-usbwrite + ramdisk=/boot/uramdisk-usbwrite + fi +fi + +if itest.s "x" != "x$asix"; then + setenv bootargs $bootargs asix.ethaddr1=$asix; +fi + +setenv bootargs $bootargs console=ttymxc1,115200 +if ${fs}load ${dtype} 0:1 10800000 $kernel ; then + if ${fs}load ${dtype} 0:1 12800000 $ramdisk ; then + bootm 10800000 12800000 + else + echo "Error loading RAM disk $ramdisk" + fi +else + echo "Error loading kernel image $kernel" +fi diff --git a/board/boundary/a/Kconfig b/board/boundary/a/Kconfig new file mode 100644 index 0000000..bb4d567 --- /dev/null +++ b/board/boundary/a/Kconfig @@ -0,0 +1,18 @@ +if TARGET_A + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "a" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "a" + +endif diff --git a/board/boundary/a/MAINTAINERS b/board/boundary/a/MAINTAINERS new file mode 100644 index 0000000..5ca9cd1 --- /dev/null +++ b/board/boundary/a/MAINTAINERS @@ -0,0 +1,7 @@ +A BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/a/ +F: include/configs/a.h +F: configs/a_defconfig + diff --git a/board/boundary/a/Makefile b/board/boundary/a/Makefile new file mode 100644 index 0000000..ffb943c --- /dev/null +++ b/board/boundary/a/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := a.o diff --git a/board/boundary/a/a.c b/board/boundary/a/a.c new file mode 100644 index 0000000..01a68e1 --- /dev/null +++ b/board/boundary/a/a.c @@ -0,0 +1,527 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) + +/* + * From antenna connector toward USB OTG + * connector, there are four LEDS in the + * order listed below. + */ +#define GPLED0 IMX_GPIO_NR(2, 19) +#define GPLED1 IMX_GPIO_NR(2, 20) +#define GPLEDRED IMX_GPIO_NR(2, 22) +#define GPLED2 IMX_GPIO_NR(2, 21) + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); + + return 0; +} + +static iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const uart2_pads[] = { + MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D0__GPIO2_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* RESET (rev 1) */ +}; + +static iomux_v3_cfg_t const usb_pads[] = { + NEW_PAD_CTRL(MX6_PAD_EIM_D22__GPIO3_IO22, WEAK_PULLUP), /* usbotg power */ + NEW_PAD_CTRL(MX6_PAD_GPIO_1__USB_OTG_ID, USDHC_PAD_CTRL), /* USBOTG ID pin */ + MX6_PAD_KEY_COL4__USB_OTG_OC, /* USBOTG OC pin */ + NEW_PAD_CTRL(MX6_PAD_NANDF_D5__GPIO2_IO05, OUTPUT_40OHM), /* Modem OFF */ + NEW_PAD_CTRL(MX6_PAD_NANDF_D6__GPIO2_IO06, WEAK_PULLUP), /* Modem nRESET */ + MX6_PAD_NANDF_D7__GPIO2_IO07 | MUX_PAD_CTRL(NO_PAD_CTRL), /* Modem Sleep stat */ + NEW_PAD_CTRL(MX6_PAD_NANDF_WP_B__GPIO6_IO09, OUTPUT_40OHM), + MX6_PAD_NANDF_RB0__GPIO6_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), /* Modem Wakeup In */ +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); + imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + return 0; +} + +int board_ehci_power(int port, int on) +{ + if (port) + return 0; + gpio_set_value(GP_USB_OTG_PWR, on); + return 0; +} + +#endif + +#ifdef CONFIG_FSL_ESDHC + +int board_mmc_getcd(struct mmc *mmc) +{ + return 1; +} + +static struct fsl_esdhc_cfg usdhc_cfg = { + .esdhc_base = USDHC4_BASE_ADDR, + .max_bus_width = 8 +}; + +int board_mmc_init(bd_t *bis) +{ + printf("%s:\n", __func__ ); + usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + imx_iomux_v3_setup_multiple_pads( + usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + return fsl_esdhc_initialize(bis, &usdhc_cfg); +} +#endif + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -1; +} + +static iomux_v3_cfg_t const ecspi1_pads[] = { + /* SS1 */ + MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; + +static void setup_spi(void) +{ + gpio_direction_output(CONFIG_SF_DEFAULT_CS, 1); + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, + ARRAY_SIZE(ecspi1_pads)); +} +#endif + +int board_early_init_f(void) +{ + setup_iomux_uart(); + + gpio_direction_output(IMX_GPIO_NR(3, 22), 0); /* disable USB otg power */ + imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); + gpio_direction_output(IMX_GPIO_NR(2,5), 0); /* de-assert MODEM off */ + gpio_direction_output(IMX_GPIO_NR(2,6), 1); /* de-assert MODEM nRESET */ + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +#ifdef CONFIG_FEC_MXC +int board_phy_config(struct phy_device *phydev) +{ + /* min rx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0); + /* min tx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0); + /* max rx/tx clock delay, min rx/tx control */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0); + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +static iomux_v3_cfg_t const enet_pads1[] = { + MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), + /* pin 35 - 1 (PHY_AD2) on reset */ + MX6_PAD_RGMII_RXC__GPIO6_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 32 - 1 - (MODE0) all */ + MX6_PAD_RGMII_RD0__GPIO6_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 31 - 1 - (MODE1) all */ + MX6_PAD_RGMII_RD1__GPIO6_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 28 - 1 - (MODE2) all */ + MX6_PAD_RGMII_RD2__GPIO6_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 27 - 1 - (MODE3) all */ + MX6_PAD_RGMII_RD3__GPIO6_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + MX6_PAD_RGMII_RX_CTL__GPIO6_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 42 PHY nRST */ + MX6_PAD_EIM_D23__GPIO3_IO23 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static iomux_v3_cfg_t const enet_pads2[] = { + MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), +}; + +static iomux_v3_cfg_t const misc_pads[] = { + MX6_PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_KEY_COL4__USB_OTG_OC | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_EIM_D30__USB_H1_OC | MUX_PAD_CTRL(WEAK_PULLUP), + /* OTG Power enable */ + MX6_PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(OUTPUT_40OHM), + MX6_PAD_KEY_COL0__GPIO4_IO06 | MUX_PAD_CTRL(WEAK_PULLUP), /* S0: factory reset */ + MX6_PAD_EIM_A23__GPIO6_IO06 | MUX_PAD_CTRL(WEAK_PULLUP), /* J57: pin3 input switch */ + MX6_PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(WEAK_PULLUP), /* S1:1 - Loopback request switch */ + MX6_PAD_KEY_ROW0__GPIO4_IO07 | MUX_PAD_CTRL(WEAK_PULLUP), /* S1:2 - Diagnostic Switch 1 */ + MX6_PAD_KEY_COL1__GPIO4_IO08 | MUX_PAD_CTRL(WEAK_PULLUP), /* S1:3 - Diagnostic Switch 2 */ + MX6_PAD_EIM_LBA__GPIO2_IO27 | MUX_PAD_CTRL(WEAK_PULLUP), /* S1:4 */ + MX6_PAD_EIM_A19__GPIO2_IO19 | MUX_PAD_CTRL(WEAK_PULLDOWN), /* Led 4 */ + MX6_PAD_EIM_A18__GPIO2_IO20 | MUX_PAD_CTRL(WEAK_PULLDOWN), /* Led 3 */ + MX6_PAD_EIM_A17__GPIO2_IO21 | MUX_PAD_CTRL(WEAK_PULLDOWN), /* Led 2 */ + MX6_PAD_EIM_A16__GPIO2_IO22 | MUX_PAD_CTRL(WEAK_PULLDOWN), /* Led 1 */ + MX6_PAD_GPIO_3__GPIO1_IO03 | MUX_PAD_CTRL(WEAK_PULLUP), /* RX_ACT led */ + MX6_PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(WEAK_PULLUP), /* TX_ACT led */ +}; + +static int gpio_inputs[] = { + IMX_GPIO_NR(4,6), /* S0: factory reset */ + IMX_GPIO_NR(6,6), /* J57: pin3 input switch */ + IMX_GPIO_NR(4,5), /* S1:1 - Loopback request switch */ + IMX_GPIO_NR(4,7), /* S1:2 - Diagnostic Switch 1 */ + IMX_GPIO_NR(4,8), /* S1:3 - Diagnostic Switch 2 */ + IMX_GPIO_NR(2,27), /* S1:4 */ +}; + +static void setup_iomux_enet(void) +{ + gpio_direction_output(IMX_GPIO_NR(1, 27), 0); /* PHY rst */ + gpio_direction_output(IMX_GPIO_NR(6, 30), 1); + gpio_direction_output(IMX_GPIO_NR(6, 25), 1); + gpio_direction_output(IMX_GPIO_NR(6, 27), 1); + gpio_direction_output(IMX_GPIO_NR(6, 28), 1); + gpio_direction_output(IMX_GPIO_NR(6, 29), 1); + imx_iomux_v3_setup_multiple_pads(enet_pads1, ARRAY_SIZE(enet_pads1)); + gpio_direction_output(IMX_GPIO_NR(6, 24), 1); + + /* Need delay 10ms according to KSZ9021 spec */ + udelay(1000 * 10); + gpio_set_value(IMX_GPIO_NR(1, 27), 1); /* PHY reset */ + + imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2)); + udelay(100); /* Wait 100 us before using mii interface */ +} + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + /* scan phy 4,5,6,7 */ + phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } + +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} +#endif + +int board_init(void) +{ + int i; + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_MXC_SPI + setup_spi(); +#endif + imx_iomux_v3_setup_multiple_pads(misc_pads, + ARRAY_SIZE(misc_pads)); + for (i=0; i < ARRAY_SIZE(gpio_inputs); i++) + gpio_direction_input(gpio_inputs[i]); + return 0; +} + +int checkboard(void) +{ + puts("Board: Boundary A board\n"); + + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; + bool presslevel; +}; + +static struct button_key const buttons[] = { + {"factory", IMX_GPIO_NR(4, 6), 'F', 0}, + {"input", IMX_GPIO_NR(6, 6), 'I', 0}, +#if 0 + {"D1", IMX_GPIO_NR(4, 5), '1', 1}, /* S1:1 - Loopback request switch */ + {"D2", IMX_GPIO_NR(4, 7), '2', 1}, /* S1:2 - Diagnostic Switch 1 */ + {"D3", IMX_GPIO_NR(4, 8), '3', 1}, /* S1:3 - Diagnostic Switch 2 */ + {"D4", IMX_GPIO_NR(2, 27), '4', 1}, /* S1:4 */ +#endif +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + if (buttons[i].presslevel + == gpio_get_value(buttons[i].gpnum)) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +#ifdef CONFIG_PREBOOT +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} +#endif + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, /* usdhc4 */ + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +#define PROGRESS_BITS 3 + +static int const leds[] = { + GPLED0, + GPLED1, + GPLEDRED, + GPLED2 +}; + +void gzwrite_progress_init(u64 expected_size) +{ + int i; + putc('\n'); + for (i = 0; i < ARRAY_SIZE(leds); i++) + gpio_direction_output(leds[i], 0); +} + +void gzwrite_progress(int iteration, + u64 bytes_written, + u64 total_bytes) +{ + int i; + if (0 == (iteration & 3)) + printf("%llu/%llu\r", bytes_written, total_bytes); + + for (i = 0; i < 2; i++) + gpio_set_value(leds[i], (iteration & 1) == i); +} + +void gzwrite_progress_finish(int returnval, /* 0 == success */ + u64 totalwritten, + u64 totalsize, + u32 expected_crc, + u32 calculated_crc) +{ + int i; + for (i = 0; i < ARRAY_SIZE(leds); i++) + gpio_set_value(leds[i], 0); + + if (0 == returnval) { + printf("\n\t%llu bytes, crc 0x%08x\n", + totalwritten, calculated_crc); + gpio_set_value(leds[3], 1); + } else { + printf("\n\tuncompressed %llu of %llu\n" + "\tcrcs == 0x%08x/0x%08x\n", + totalwritten, totalsize, + expected_crc, calculated_crc); + gpio_set_value(leds[2], 1); + } +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "a"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/bt/1066mhz_4x256mx16.cfg b/board/boundary/bt/1066mhz_4x256mx16.cfg new file mode 100644 index 0000000..475527f --- /dev/null +++ b/board/boundary/bt/1066mhz_4x256mx16.cfg @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 +DATA 4, MX6_MMDC_P0_MDCFG0, 0x898E7974 +DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64 +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB +DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 +DATA 4, MX6_MMDC_P0_MDOR, 0x008E1023 +DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040 +DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576 +DATA 4, MX6_MMDC_P0_MDASP, 0x00000047 +DATA 4, MX6_MMDC_P0_MDCTL, 0x841A0000 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00428031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x19308030 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P0_MDREF, 0x00007800 +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42740304 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x026e0265 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x02750306 +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x02720244 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x463d4041 +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x42413c47 +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x37414441 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x4633473b +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0025001f +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x00290027 +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x001f002b +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x000f0029 +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/boundary/bt/1066mhz_4x512mx16.cfg b/board/boundary/bt/1066mhz_4x512mx16.cfg new file mode 100644 index 0000000..ce0d18e --- /dev/null +++ b/board/boundary/bt/1066mhz_4x512mx16.cfg @@ -0,0 +1,119 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/* + * MT41K512M16TNA-125:E + * 15 row + 3 bank + 10 col + 1 rank + 3 width = 32 = 4 GB + * tRCD 13125 ps + * tRP 13125 ps + * tCL 13125 ps + * 528M DDR clock = .528G = 1893.9ps/clocks + * 13125ps / 1893.9ps/clocks = 6.93 clocks + */ + +DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036 /* them 25576 */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 +/* + * tRFC:0x89:138 clocks (260000/1893.9) + * tXS:0x8e:143 clocks (270000/1893.9) + * tXP:b'011': 4 clocks (6000/1893.9) + * tXPDLL:b'1100': 13 clocks (24000/1893.9) + * tFAW:b'11010': 27 clocks (50000/1893.9) + * tCL:b'0100': 7 clocks (13125/1893.9) + */ +DATA 4, MX6_MMDC_P0_MDCFG0, 0x898E79a4 /* them 555A7975 */ +/* + * tRCD:b'110': 7 clocks (13125/1893.9) + * tRP:b'110': 7 clocks (13125/1893.9) + * tRC:b'11010': 27 clocks (50625/1893.9) + * tRAS:b'10011': 20 clocks (37500/1893.9) + * tRPA:b'1': 8 clocks (tRP[+1]) 7 + * tWR:b'111': 8 clocks (15000/1893.9) + * tMRD:b'1011': 12 clocks (min 4 clocks)4 + * tCWL:b'100': 6 clocks (tCL-1) + */ +DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64 /* them FF538E64 */ +/* + * tDLLK:0x1ff, 512 clocks (Jedec for DDR3) + * tRTP:b'011': 4 clocks (7500/1893.9) + * tWTR:same bank b'011': 4 clocks (7500/1893.9) + * tRRD:b'101': 6 clocks (10000/1893.9) + */ +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DD +/* + * RTW_SAME: 2 cycles, + * WTR_DIFF: 3 cycles, + * WTW_DIFF: 3 cycles, + * RTW_DIFF: 2 cycles, + * RTR_DIFF: 2 cycles + */ +DATA 4, MX6_MMDC_P0_MDRWD, 0x0f9f26d2 +/* + * tXPR:0x8e: 143 cycles, (270000/1893.9) + * SDE_to_RST:0x10: 14 cycles, (Jedec) + * RST_to_CKE:0x23: 33 cycles (Jedec) + */ +DATA 4, MX6_MMDC_P0_MDOR, 0x008E1023 /* them 005B0E21 */ +DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040 +DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576 +/* end of CS0 US 0x90000000-1 */ +DATA 4, MX6_MMDC_P0_MDASP, 0x00000047 /* them 00000027, 0x50000000-1 */ +/* row:15 bits */ +#if 1 +DATA 4, MX6_MMDC_P0_MDCTL, 0xC41A0000 /* them c31a0000, row 14 bits */ +#else +DATA 4, MX6_MMDC_P0_MDCTL, 0x841A0000 /* them c31a0000, row 14 bits */ +#endif +DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x0408803a +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 +DATA 4, MX6_MMDC_P0_MDSCR, 0x0000803b +DATA 4, MX6_MMDC_P0_MDSCR, 0x00428031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00428039 +/* A12 - 1 dll on(fast exit), CAS 7 */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x19308030 /* them 09408030, A12 - 0 dll powrdown, CAS 8 */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x19308038 /* them 09408038 */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008048 +/* force a calibration */ +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 /* them A1380003, no calibration */ +DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 /* them A1380003, no calibration */ +/* 8 refreshes at a time */ +DATA 4, MX6_MMDC_P0_MDREF, 0x00007800 /* them 00005800, 6 refreshes at a time */ +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 + +#if 1 +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x433C0350 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x03400338 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x433C0350 +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x03400304 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x423A3E4A +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x443A3648 +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x383E4238 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x42364A3E +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001f0024 +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x00240021 +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00150028 +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0009001c +#else +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x43540368 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x03440340 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x43540368 +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x034C0310 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x42363844 +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x463E384E +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3A363C34 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x40364A3E +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001F0024 +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x00210024 +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x0016002A +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00180025 +#endif + +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/boundary/bt/6x_bootscript.txt b/board/boundary/bt/6x_bootscript.txt new file mode 100644 index 0000000..de208d5 --- /dev/null +++ b/board/boundary/bt/6x_bootscript.txt @@ -0,0 +1,9 @@ +setenv bootargs enable_wait_mode=off video=mxcfb0:dev=hdmi,1280x720M@60,if=RGB24 +setenv bootargs $bootargs video=mxcfb1:off video=mxcfb2:off video=mxcfb3:off +setenv bootargs $bootargs fbmem=28M console=ttymxc1,115200 vmalloc=400M +setenv bootargs $bootargs consoleblank=0 mxc_hdmi.only_cea=1 +setenv bootargs $bootargs rootwait root=/dev/mmcblk${disk}p1 +ext2load mmc ${disk}:1 0x10800000 /boot/uImage && + ext2load mmc ${disk}:1 0x12800000 /boot/uramdisk.img && + bootm 10800000 12800000 +echo "Error launching kernel /boot/uImage" diff --git a/board/boundary/bt/Kconfig b/board/boundary/bt/Kconfig new file mode 100644 index 0000000..719e85d --- /dev/null +++ b/board/boundary/bt/Kconfig @@ -0,0 +1,18 @@ +if TARGET_BT + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "bt" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "bt" + +endif diff --git a/board/boundary/bt/MAINTAINERS b/board/boundary/bt/MAINTAINERS new file mode 100644 index 0000000..3ae434b --- /dev/null +++ b/board/boundary/bt/MAINTAINERS @@ -0,0 +1,8 @@ +BT BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/bt/ +F: include/configs/bt.h +F: configs/bt2g_defconfig +F: configs/bt4g_defconfig + diff --git a/board/boundary/bt/Makefile b/board/boundary/bt/Makefile new file mode 100644 index 0000000..9ae9738 --- /dev/null +++ b/board/boundary/bt/Makefile @@ -0,0 +1,10 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := bt.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/boundary/bt/bt.c b/board/boundary/bt/bt.c new file mode 100644 index 0000000..6a3fece --- /dev/null +++ b/board/boundary/bt/bt.c @@ -0,0 +1,457 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#define CONFIG_MX6QDL +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_MX6Q +#include "pads-bt.h" +#endif +#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +#define FOR_DL_SOLO +#include "pads-bt.h" +#endif + + +DECLARE_GLOBAL_DATA_PTR; + +#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +#ifdef CONFIG_MX6Q +#define GET_MX6_REF(ref) (is_cpu_type(MXC_CPU_MX6Q) ? mx6q_##ref : mx6dl_solo_##ref) +#define IOMUX_SETUP(list) iomux_setup(mx6q_##list, ARRAY_SIZE(mx6q_##list), \ + mx6dl_solo_##list, ARRAY_SIZE(mx6dl_solo_##list)) + +int iomux_setup(iomux_v3_cfg_t *mx6q_pad_list, int mx6q_pad_cnt, + iomux_v3_cfg_t *mx6dl_solo_pad_list, int mx6dl_solo_pad_cnt) +{ + int mx6q = is_cpu_type(MXC_CPU_MX6Q); + iomux_v3_cfg_t *p = mx6q ? mx6q_pad_list : mx6dl_solo_pad_list; + int cnt = mx6q ? mx6q_pad_cnt : mx6dl_solo_pad_cnt; + + return imx_iomux_v3_setup_multiple_pads(p, cnt); +} +#else +#define GET_MX6_REF(ref) (mx6dl_solo_##ref) +#define IOMUX_SETUP(list) imx_iomux_v3_setup_multiple_pads( \ + mx6dl_solo_##list, ARRAY_SIZE(mx6dl_solo_##list)) +#endif +#else +#define GET_MX6_REF(ref) (mx6q_##ref) +#define IOMUX_SETUP(list) imx_iomux_v3_setup_multiple_pads( \ + mx6q_##list, ARRAY_SIZE(mx6q_##list)) +#endif + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); +// printf("%s:%p *%p=0x%lx\n", __func__, gd, &gd->ram_size, gd->ram_size); + return 0; +} + +static void setup_iomux_enet(void) +{ + gpio_direction_output(GP_ENET_PHY_RESET, 0); /* PHY rst */ + gpio_direction_output(IMX_GPIO_NR(6, 30), 1); + gpio_direction_output(IMX_GPIO_NR(6, 25), 1); + gpio_direction_output(IMX_GPIO_NR(6, 27), 1); + gpio_direction_output(IMX_GPIO_NR(6, 28), 1); + gpio_direction_output(IMX_GPIO_NR(6, 29), 1); + IOMUX_SETUP(enet_pads1); + gpio_direction_output(IMX_GPIO_NR(6, 24), 1); + + /* Need delay 10ms according to KSZ9021 spec */ + udelay(1000 * 10); + gpio_set_value(GP_ENET_PHY_RESET, 1); /* PHY reset */ + + IOMUX_SETUP(enet_pads2); + udelay(100); /* Wait 100 us before using mii interface */ +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + /* Reset USB hub */ + if (port) { + gpio_set_value(GP_USB_HUB_RESET, 0); + gpio_set_value(GP_AX88772A_RESET, 0); + mdelay(2); + gpio_set_value(GP_USB_HUB_RESET, 1); + gpio_set_value(GP_AX88772A_RESET, 1); + } + return 0; +} + +int board_ehci_power(int port, int on) +{ + if (port) + return 0; + gpio_set_value(GP_USB_OTG_PWR, on); + return 0; +} + +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[] = { + {USDHC1_BASE_ADDR}, + {USDHC2_BASE_ADDR}, + {USDHC3_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int gp_cd = GP_SD1_CD; + + if (cfg->esdhc_base == USDHC3_BASE_ADDR) + return 1; /* eMMC always present */ + if (cfg->esdhc_base == USDHC2_BASE_ADDR) + gp_cd = GP_SD2_CD; + return !gpio_get_value(gp_cd); +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].max_bus_width = 4; + usdhc_cfg[2].max_bus_width = 8; + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + break; + case 1: + break; + case 2: + gpio_set_value(GP_EMMC_RESET, 1); /* release reset */ + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -1; +} + +int board_phy_config(struct phy_device *phydev) +{ + /* min rx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0); + /* min tx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0); + /* max rx/tx clock delay, min rx/tx control */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0); + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + +#ifdef CONFIG_FEC_MXC + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + /* scan phy 4,5,6,7 */ + phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } +#endif + +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + + +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) { + return -1; + } + + env_loadsplash = getenv("loadsplash"); + if (env_loadsplash == NULL) { + printf("Environment variable loadsplash not found!\n"); + return -1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("failed to run loadsplash %s\n\n", env_loadsplash); + return -1; + } + + return 0; +} + +#if defined(CONFIG_VIDEO_IPUV3) + +const struct display_info_t displays[] = { + /* hdmi */ + IMX_VD50_1280_720M_60(HDMI, 1, 1), + IMX_VD50_1920_1080M_60(HDMI, 0, 1), + IMX_VD50_1024_768M_60(HDMI, 0, 1), +}; + +size_t display_count = ARRAY_SIZE(displays); + +int board_cfb_skip(void) +{ + return NULL != getenv("novideo"); +} +#endif + + +static unsigned short gpios_out_low[] = { + GP_EMMC_RESET, /* hold in reset */ + GP_USB_OTG_PWR, /* disable USB otg power */ + GP_USB_HUB_RESET, /* disable hub */ + GP_AX88772A_RESET, + GP_ENET_PHY_RESET, + GP_PCIE_RESET, + GP_GS2971_RESET, + GP_GS2971_RC_BYPASS, + GP_GS2971_IOPROC_EN, + GP_GS2971_AUDIO_EN, + GP_GS2971_TIM_861, + GP_GS2971_SW_EN, + GP_GS2971_DVB_ASI, + GP_ADV7391_RESET, + GP_J92_PIN9, +}; + +static unsigned short gpios_out_high[] = { + GP_PWR_J1, + GP_PWR_J2, + GP_PWR_J3, + GP_PWR_J4, + GP_PWR_J6, + GP_PWR_J7, + GP_ECSPI1_CS1, /* SS1 of spi nor */ + GP_ECSPI3_GS2971_CS, + GP_SD1_POWER_SEL, /* high=3.3v */ + GP_GS2971_STANDBY, + GP_J92_PIN7, +}; + +static unsigned short gpios_in[] = { + GP_SD1_CD, + GP_SD2_CD, + GP_GS2971_SMPTE_BYPASS, + GP_GS2971_DVI_LOCK, + GP_GS2971_DATA_ERR, + GP_GS2971_LB_CONT, + GP_GS2971_Y_1ANC, + GP_J92_PIN10, + GP_J92_PIN12, + GP_BT_GPIO1, + GP_BT_GPIO2, + GP_BT_GPIO3, + GP_BT_GPIO4, + GP_BT_GPIO5, + GP_BT_GPIO6, + GP_BT_GPIO7, + GP_BT_GPIO8, + GP_BT_GPIO9, + GP_BT_GPIO10, + GP_BT_GPIO11, + GP_BT_GPIO12, + GP_BT_GPIO13, + GP_BT_GPIO14, + GP_BT_GPIO15, + GP_BT_GPIO16, + GP_BT_GPIO17, + GP_BT_GPIO18, + GP_BT_GPIO19, + GP_BT_GPIO20, + GP_BT_GPIO21, + GP_BT_GPIO22, + GP_BT_GPIO23, + GP_BT_GPIO24, + GP_BT_GPIO25, + GP_BT_GPIO26, + GP_BT_GPIO27, + GP_BT_GPIO28, + GP_BT_GPIO29, + GP_BT_GPIO30, + GP_BT_GPIO31, + GP_BT_GPIO32, + GP_BT_GPIO33, + GP_BT_GPIO34, + GP_BT_GPIO35, + GP_BT_GPIO36, + GP_BT_GPIO37, + GP_BT_GPIO38, + GP_BT_GPIO39, + GP_BT_GPIO40, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned short *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + + IOMUX_SETUP(bt_pads); +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + struct i2c_pads_info *p = GET_MX6_REF(i2c_pad_info); + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &p[0]); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &p[1]); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &p[2]); + +#ifdef CONFIG_CMD_SATA + setup_sata(); +#endif + + return 0; +} + + +int checkboard(void) +{ + puts("Board: BT\n"); + return 0; +} + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "bt"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/bt/bt2g.cfg b/board/boundary/bt/bt2g.cfg new file mode 100644 index 0000000..fe6dfc1 --- /dev/null +++ b/board/boundary/bt/bt2g.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "ddr-setup.cfg" +#include "1066mhz_4x256mx16.cfg" +#include "clocks.cfg" diff --git a/board/boundary/bt/bt4g.cfg b/board/boundary/bt/bt4g.cfg new file mode 100644 index 0000000..c8a0e59 --- /dev/null +++ b/board/boundary/bt/bt4g.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "ddr-setup.cfg" +#include "1066mhz_4x512mx16.cfg" +#include "clocks.cfg" diff --git a/board/boundary/bt/clocks.cfg b/board/boundary/bt/clocks.cfg new file mode 100644 index 0000000..8bddb91 --- /dev/null +++ b/board/boundary/bt/clocks.cfg @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* set the default clock gate to save power */ +DATA 4, CCM_CCGR0, 0x00C03F3F +DATA 4, CCM_CCGR1, 0x0030FC03 +DATA 4, CCM_CCGR2, 0x0FFFC000 +DATA 4, CCM_CCGR3, 0x3FF00000 +DATA 4, CCM_CCGR4, 0x00FFF300 +DATA 4, CCM_CCGR5, 0x0F0000C3 +DATA 4, CCM_CCGR6, 0x000003FF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4, MX6_IOMUXC_GPR6, 0x007F007F +DATA 4, MX6_IOMUXC_GPR7, 0x007F007F + +/* + * Setup CCM_CCOSR register as follows: + * + * cko1_en = 1 --> CKO1 enabled + * cko1_div = 111 --> divide by 8 + * cko1_sel = 1011 --> ahb_clk_root + * + * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz + */ +DATA 4, CCM_CCOSR, 0x000000fb diff --git a/board/boundary/bt/ddr-setup.cfg b/board/boundary/bt/ddr-setup.cfg new file mode 100644 index 0000000..04dffa7 --- /dev/null +++ b/board/boundary/bt/ddr-setup.cfg @@ -0,0 +1,96 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* + * DDR3 settings + * MX6Q ddr is limited to 1066 Mhz currently 1056 MHz(528 MHz clock), + * memory bus width: 64 bits x16/x32/x64 + * MX6DL ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 64 bits x16/x32/x64 + * MX6SOLO ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 32 bits x16/x32 + */ +DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030 + +DATA 4, MX6_IOM_GRP_B0DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B1DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B2DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B3DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B4DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B5DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B6DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B7DS, 0x00000030 +DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030 +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ +DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030 + +DATA 4, MX6_IOM_DRAM_DQM0, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM1, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM2, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM3, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM4, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM5, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM6, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM7, 0x00020030 + +DATA 4, MX6_IOM_DRAM_CAS, 0x00020030 +DATA 4, MX6_IOM_DRAM_RAS, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00020030 + +DATA 4, MX6_IOM_DRAM_RESET, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 +DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00003000 + +DATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030 +DATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030 + +/* (differential input) */ +DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000 +/* (differential input) */ +DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000 +/* disable ddr pullups */ +DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000 +DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000 +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ +DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000 + +/* Read data DQ Byte0-3 delay */ +DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333 + +/* + * MDMISC mirroring-off interleaved (row/bank/col) + */ +DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740 + +/* + * MDSCR con_req + */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 diff --git a/board/boundary/bt/pads-bt.h b/board/boundary/bt/pads-bt.h new file mode 100644 index 0000000..20844fd --- /dev/null +++ b/board/boundary/bt/pads-bt.h @@ -0,0 +1,448 @@ +/* + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#undef MX6PAD +#undef MX6NAME + +#ifdef FOR_DL_SOLO +#define MX6PAD(a) MX6DL_PAD_##a +#define MX6NAME(a) mx6dl_solo_##a +#else +#define MX6PAD(a) MX6Q_PAD_##a +#define MX6NAME(a) mx6q_##a +#endif + + +#define AUD_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define CSI_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +static const iomux_v3_cfg_t MX6NAME(bt_pads)[] = { + /* Adv7391 - I2C3 */ +#define GP_ADV7391_RESET IMX_GPIO_NR(4, 20) + MX6PAD(DI0_PIN4__GPIO4_IO20), /* Adv7391 reset */ + + /* ECSPI1 */ + NEW_PAD_CTRL(MX6PAD(EIM_D17__ECSPI1_MISO), SPI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D18__ECSPI1_MOSI), SPI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D16__ECSPI1_SCLK), SPI_PAD_CTRL), +#define GP_ECSPI1_CS1 IMX_GPIO_NR(3, 19) + NEW_PAD_CTRL(MX6PAD(EIM_D19__GPIO3_IO19), WEAK_PULLUP), /* SS1 */ + + /* ECSPI3 - GS2971 */ + NEW_PAD_CTRL(MX6PAD(DISP0_DAT2__ECSPI3_MISO), SPI_PAD_CTRL), /* pin E7 - SDOUT */ + NEW_PAD_CTRL(MX6PAD(DISP0_DAT1__ECSPI3_MOSI), SPI_PAD_CTRL), /* pin E8 - SDIN */ + NEW_PAD_CTRL(MX6PAD(DISP0_DAT0__ECSPI3_SCLK), SPI_PAD_CTRL), /* pin F8 - SCLK */ +#define GP_ECSPI3_GS2971_CS IMX_GPIO_NR(4, 24) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT3__GPIO4_IO24), WEAK_PULLUP), /* 0 - pin F7 - CS0 */ + + /* ENET pads that don't change for PHY reset */ + NEW_PAD_CTRL(MX6PAD(ENET_MDIO__ENET_MDIO), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(ENET_MDC__ENET_MDC), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_TXC__RGMII_TXC), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_TD0__RGMII_TD0), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_TD1__RGMII_TD1), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_TD2__RGMII_TD2), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_TD3__RGMII_TD3), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_TX_CTL__RGMII_TX_CTL), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(ENET_REF_CLK__ENET_TX_CLK), ENET_PAD_CTRL), + /* pin 42 PHY nRST */ +#define GP_ENET_PHY_RESET IMX_GPIO_NR(1, 27) + NEW_PAD_CTRL(MX6PAD(ENET_RXD0__GPIO1_IO27), OUTPUT_40OHM), +#define GP_ENET_PHY_INT IMX_GPIO_NR(1, 28) + NEW_PAD_CTRL(MX6PAD(ENET_TX_EN__GPIO1_IO28), WEAK_PULLUP), /* Micrel RGMII Phy Interrupt */ + + /* gpios J91 */ + /* grounds, 1,2,11,12,29,46,47,48,49,50 */ +#define GP_BT_GPIO1 IMX_GPIO_NR(2, 15) + NEW_PAD_CTRL(MX6PAD(SD4_DAT7__GPIO2_IO15), WEAK_PULLUP), /* bt_gpio1, pin 3 */ +#define GP_BT_GPIO2 IMX_GPIO_NR(2, 14) + NEW_PAD_CTRL(MX6PAD(SD4_DAT6__GPIO2_IO14), WEAK_PULLUP), /* bt_gpio2, pin 4 */ +#define GP_BT_GPIO3 IMX_GPIO_NR(2, 13) + NEW_PAD_CTRL(MX6PAD(SD4_DAT5__GPIO2_IO13), WEAK_PULLUP), /* bt_gpio3, pin 5 */ +#define GP_BT_GPIO4 IMX_GPIO_NR(2, 12) + NEW_PAD_CTRL(MX6PAD(SD4_DAT4__GPIO2_IO12), WEAK_PULLUP), /* bt_gpio4, pin 6 */ +#define GP_BT_GPIO5 IMX_GPIO_NR(2, 11) + NEW_PAD_CTRL(MX6PAD(SD4_DAT3__GPIO2_IO11), WEAK_PULLUP), /* bt_gpio5, pin 7 */ +#define GP_BT_GPIO6 IMX_GPIO_NR(2, 10) + NEW_PAD_CTRL(MX6PAD(SD4_DAT2__GPIO2_IO10), WEAK_PULLUP), /* bt_gpio6, pin 8 */ +#define GP_BT_GPIO7 IMX_GPIO_NR(2, 9) + NEW_PAD_CTRL(MX6PAD(SD4_DAT1__GPIO2_IO09), WEAK_PULLUP), /* bt_gpio7, pin 9 */ +#define GP_BT_GPIO8 IMX_GPIO_NR(2, 8) + NEW_PAD_CTRL(MX6PAD(SD4_DAT0__GPIO2_IO08), WEAK_PULLUP), /* bt_gpio8, pin 10 */ +#define GP_BT_GPIO9 IMX_GPIO_NR(7, 9) + NEW_PAD_CTRL(MX6PAD(SD4_CMD__GPIO7_IO09), WEAK_PULLUP), /* bt_gpio9, pin 13 */ +#define GP_BT_GPIO10 IMX_GPIO_NR(7, 10) + NEW_PAD_CTRL(MX6PAD(SD4_CLK__GPIO7_IO10), WEAK_PULLUP), /* bt_gpio10, pin 14 */ +#define GP_BT_GPIO11 IMX_GPIO_NR(2, 7) + NEW_PAD_CTRL(MX6PAD(NANDF_D7__GPIO2_IO07), WEAK_PULLUP), /* bt_gpio11, pin 15 */ +#define GP_BT_GPIO12 IMX_GPIO_NR(2, 6) + NEW_PAD_CTRL(MX6PAD(NANDF_D6__GPIO2_IO06), WEAK_PULLUP), /* bt_gpio12, pin 16 */ +#define GP_BT_GPIO13 IMX_GPIO_NR(2, 5) + NEW_PAD_CTRL(MX6PAD(NANDF_D5__GPIO2_IO05), WEAK_PULLUP), /* bt_gpio13, pin 17 */ +#define GP_BT_GPIO14 IMX_GPIO_NR(2, 4) + NEW_PAD_CTRL(MX6PAD(NANDF_D4__GPIO2_IO04), WEAK_PULLUP), /* bt_gpio14, pin 18 */ +#define GP_BT_GPIO15 IMX_GPIO_NR(2, 3) + NEW_PAD_CTRL(MX6PAD(NANDF_D3__GPIO2_IO03), WEAK_PULLUP), /* bt_gpio15, pin 19 */ +#define GP_BT_GPIO16 IMX_GPIO_NR(2, 2) + NEW_PAD_CTRL(MX6PAD(NANDF_D2__GPIO2_IO02), WEAK_PULLUP), /* bt_gpio16, pin 20 */ +#define GP_BT_GPIO17 IMX_GPIO_NR(2, 1) + NEW_PAD_CTRL(MX6PAD(NANDF_D1__GPIO2_IO01), WEAK_PULLUP), /* bt_gpio17, pin 21 */ +#define GP_BT_GPIO18 IMX_GPIO_NR(2, 0) + NEW_PAD_CTRL(MX6PAD(NANDF_D0__GPIO2_IO00), WEAK_PULLUP), /* bt_gpio18, pin 22 */ +#define GP_BT_GPIO19 IMX_GPIO_NR(6, 10) + NEW_PAD_CTRL(MX6PAD(NANDF_RB0__GPIO6_IO10), WEAK_PULLUP), /* bt_gpio19, pin 23 */ +#define GP_BT_GPIO20 IMX_GPIO_NR(6, 9) + NEW_PAD_CTRL(MX6PAD(NANDF_WP_B__GPIO6_IO09), WEAK_PULLUP), /* bt_gpio20, pin 24 */ +#define GP_BT_GPIO21 IMX_GPIO_NR(6, 7) + NEW_PAD_CTRL(MX6PAD(NANDF_CLE__GPIO6_IO07), WEAK_PULLUP), /* bt_gpio21, pin 25 */ +#define GP_BT_GPIO22 IMX_GPIO_NR(6, 8) + NEW_PAD_CTRL(MX6PAD(NANDF_ALE__GPIO6_IO08), WEAK_PULLUP), /* bt_gpio22, pin 26 */ +#define GP_BT_GPIO23 IMX_GPIO_NR(6, 16) + NEW_PAD_CTRL(MX6PAD(NANDF_CS3__GPIO6_IO16), WEAK_PULLUP), /* bt_gpio23, pin 27 */ +#define GP_BT_GPIO24 IMX_GPIO_NR(6, 15) + NEW_PAD_CTRL(MX6PAD(NANDF_CS2__GPIO6_IO15), WEAK_PULLUP), /* bt_gpio24, pin 28 */ +#define GP_BT_GPIO25 IMX_GPIO_NR(6, 14) + NEW_PAD_CTRL(MX6PAD(NANDF_CS1__GPIO6_IO14), WEAK_PULLUP), /* bt_gpio25, pin 30 */ +#define GP_BT_GPIO26 IMX_GPIO_NR(6, 11) + NEW_PAD_CTRL(MX6PAD(NANDF_CS0__GPIO6_IO11), WEAK_PULLUP), /* bt_gpio26, pin 31 */ +#define GP_BT_GPIO27 IMX_GPIO_NR(5, 30) + NEW_PAD_CTRL(MX6PAD(CSI0_DAT12__GPIO5_IO30), WEAK_PULLUP), /* bt_gpio27, pin 32 */ +#define GP_BT_GPIO28 IMX_GPIO_NR(5, 31) + NEW_PAD_CTRL(MX6PAD(CSI0_DAT13__GPIO5_IO31), WEAK_PULLUP), /* bt_gpio28, pin 33 */ +#define GP_BT_GPIO29 IMX_GPIO_NR(5, 24) + NEW_PAD_CTRL(MX6PAD(CSI0_DAT6__GPIO5_IO24), WEAK_PULLUP), /* bt_gpio29, pin 34 */ +#define GP_BT_GPIO30 IMX_GPIO_NR(5, 25) + NEW_PAD_CTRL(MX6PAD(CSI0_DAT7__GPIO5_IO25), WEAK_PULLUP), /* bt_gpio30, pin 35 */ +#define GP_BT_GPIO31 IMX_GPIO_NR(6, 2) + NEW_PAD_CTRL(MX6PAD(CSI0_DAT16__GPIO6_IO02), WEAK_PULLUP), /* bt_gpio31, pin 36 */ +#define GP_BT_GPIO32 IMX_GPIO_NR(6, 3) + NEW_PAD_CTRL(MX6PAD(CSI0_DAT17__GPIO6_IO03), WEAK_PULLUP), /* bt_gpio32, pin 37 */ +#define GP_BT_GPIO33 IMX_GPIO_NR(6, 4) + NEW_PAD_CTRL(MX6PAD(CSI0_DAT18__GPIO6_IO04), WEAK_PULLUP), /* bt_gpio33, pin 38 */ +#define GP_BT_GPIO34 IMX_GPIO_NR(6, 5) + NEW_PAD_CTRL(MX6PAD(CSI0_DAT19__GPIO6_IO05), WEAK_PULLUP), /* bt_gpio34, pin 39 */ +#define GP_BT_GPIO35 IMX_GPIO_NR(5, 2) + NEW_PAD_CTRL(MX6PAD(EIM_A25__GPIO5_IO02), WEAK_PULLUP), /* bt_gpio35, pin 40 */ +#define GP_BT_GPIO36 IMX_GPIO_NR(3, 29) + NEW_PAD_CTRL(MX6PAD(EIM_D29__GPIO3_IO29), WEAK_PULLUP), /* bt_gpio36, pin 41 */ +#define GP_BT_GPIO37 IMX_GPIO_NR(2, 30) + NEW_PAD_CTRL(MX6PAD(EIM_EB2__GPIO2_IO30), WEAK_PULLUP), /* bt_gpio37, pin 42 */ +#define GP_BT_GPIO38 IMX_GPIO_NR(2, 31) + NEW_PAD_CTRL(MX6PAD(EIM_EB3__GPIO2_IO31), WEAK_PULLUP), /* bt_gpio38, pin 43 */ +#define GP_BT_GPIO39 IMX_GPIO_NR(5, 26) + NEW_PAD_CTRL(MX6PAD(CSI0_DAT8__GPIO5_IO26), WEAK_PULLUP), /* bt_gpio39, pin 44 */ +#define GP_BT_GPIO40 IMX_GPIO_NR(5, 27) + NEW_PAD_CTRL(MX6PAD(CSI0_DAT9__GPIO5_IO27), WEAK_PULLUP), /* bt_gpio40, pin 45 */ + + /* Power control, high is off */ + /* Pull-up so that reset will leave high */ +#define GP_PWR_J1 IMX_GPIO_NR(5, 9) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT15__GPIO5_IO09), WEAK_PULLUP), /* J1 Power enable */ +#define GP_PWR_J2 IMX_GPIO_NR(4, 25) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT4__GPIO4_IO25), WEAK_PULLUP), /* J2 */ +#define GP_PWR_J3 IMX_GPIO_NR(2, 23) + NEW_PAD_CTRL(MX6PAD(EIM_CS0__GPIO2_IO23), WEAK_PULLUP), /* J3 */ +#define GP_PWR_J4 IMX_GPIO_NR(2, 25) + NEW_PAD_CTRL(MX6PAD(EIM_OE__GPIO2_IO25), WEAK_PULLUP), /* J4 */ +#define GP_PWR_J6 IMX_GPIO_NR(2, 26) + NEW_PAD_CTRL(MX6PAD(EIM_RW__GPIO2_IO26), WEAK_PULLUP), /* J6 */ +#define GP_PWR_J7 IMX_GPIO_NR(2, 27) + NEW_PAD_CTRL(MX6PAD(EIM_LBA__GPIO2_IO27), WEAK_PULLUP), /* J7 */ + + /* Dry Contact */ + /* J92 pins */ +#define GP_J92_PIN7 IMX_GPIO_NR(3, 31) + NEW_PAD_CTRL(MX6PAD(EIM_D31__GPIO3_IO31), WEAK_PULLUP), /* OUT_1 - Dry contact to J92 pin 7 */ +#define GP_J92_PIN9 IMX_GPIO_NR(1, 8) + NEW_PAD_CTRL(MX6PAD(GPIO_8__GPIO1_IO08), WEAK_PULLDN), /* OUT_2 - Dry contact to J92 pin 9 */ +#define GP_J92_PIN10 IMX_GPIO_NR(5, 22) + NEW_PAD_CTRL(MX6PAD(CSI0_DAT4__GPIO5_IO22), WEAK_PULLUP), /* GPI_1 - J92 - pin 10 */ +#define GP_J92_PIN12 IMX_GPIO_NR(5, 23) + NEW_PAD_CTRL(MX6PAD(CSI0_DAT5__GPIO5_IO23), WEAK_PULLUP), /* GPI_2 - J92 - pin 12 */ + + /* + * PCIe - tw6869 dedicated, + * VIN1-4 used, + * AIN1-2 amplified, AIN3-4 not amplified + */ +#define GP_PCIE_RESET IMX_GPIO_NR(4, 8) + NEW_PAD_CTRL(MX6PAD(KEY_COL1__GPIO4_IO08), OUTPUT_40OHM), + + /* rtc - i2c1 */ +#define GP_RTC_RV4162_IRQ IMX_GPIO_NR(4, 11) + NEW_PAD_CTRL(MX6PAD(KEY_ROW2__GPIO4_IO11), WEAK_PULLUP), + + /* SDI - gs2971 on CSI1 */ +#ifdef FOR_DL_SOLO + /* Dualite/Solo doesn't have IPU2 */ + NEW_PAD_CTRL(MX6PAD(EIM_A24__IPU1_CSI1_DATA19), CSI_PAD_CTRL), /* GPIO2[30] */ + NEW_PAD_CTRL(MX6PAD(EIM_A23__IPU1_CSI1_DATA18), CSI_PAD_CTRL), /* GPIO6[6] */ + NEW_PAD_CTRL(MX6PAD(EIM_A22__IPU1_CSI1_DATA17), CSI_PAD_CTRL), /* GPIO2[16] */ + NEW_PAD_CTRL(MX6PAD(EIM_A21__IPU1_CSI1_DATA16), CSI_PAD_CTRL), /* GPIO2[17] */ + NEW_PAD_CTRL(MX6PAD(EIM_A20__IPU1_CSI1_DATA15), CSI_PAD_CTRL), /* GPIO2[18] */ + NEW_PAD_CTRL(MX6PAD(EIM_A19__IPU1_CSI1_DATA14), CSI_PAD_CTRL), /* GPIO2[19] */ + NEW_PAD_CTRL(MX6PAD(EIM_A18__IPU1_CSI1_DATA13), CSI_PAD_CTRL), /* GPIO2[20] */ + NEW_PAD_CTRL(MX6PAD(EIM_A17__IPU1_CSI1_DATA12), CSI_PAD_CTRL), /* GPIO2[21] */ + NEW_PAD_CTRL(MX6PAD(EIM_EB0__IPU1_CSI1_DATA11), CSI_PAD_CTRL), /* GPIO2[28] */ + NEW_PAD_CTRL(MX6PAD(EIM_EB1__IPU1_CSI1_DATA10), CSI_PAD_CTRL), /* GPIO2[29] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA0__IPU1_CSI1_DATA09), CSI_PAD_CTRL), /* GPIO3[0] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA1__IPU1_CSI1_DATA08), CSI_PAD_CTRL), /* GPIO3[1] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA2__IPU1_CSI1_DATA07), CSI_PAD_CTRL), /* GPIO3[2] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA3__IPU1_CSI1_DATA06), CSI_PAD_CTRL), /* GPIO3[3] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA4__IPU1_CSI1_DATA05), CSI_PAD_CTRL), /* GPIO3[4] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA5__IPU1_CSI1_DATA04), CSI_PAD_CTRL), /* GPIO3[5] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA6__IPU1_CSI1_DATA03), CSI_PAD_CTRL), /* GPIO3[6] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA7__IPU1_CSI1_DATA02), CSI_PAD_CTRL), /* GPIO3[7] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA8__IPU1_CSI1_DATA01), CSI_PAD_CTRL), /* GPIO3[8] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA9__IPU1_CSI1_DATA00), CSI_PAD_CTRL), /* GPIO3[9] */ + NEW_PAD_CTRL(MX6PAD(EIM_A16__IPU1_CSI1_PIXCLK), CSI_PAD_CTRL), /* GPIO2[22] */ +#else + NEW_PAD_CTRL(MX6PAD(EIM_A24__IPU2_CSI1_DATA19), CSI_PAD_CTRL), /* GPIO2[30] */ + NEW_PAD_CTRL(MX6PAD(EIM_A23__IPU2_CSI1_DATA18), CSI_PAD_CTRL), /* GPIO6[6] */ + NEW_PAD_CTRL(MX6PAD(EIM_A22__IPU2_CSI1_DATA17), CSI_PAD_CTRL), /* GPIO2[16] */ + NEW_PAD_CTRL(MX6PAD(EIM_A21__IPU2_CSI1_DATA16), CSI_PAD_CTRL), /* GPIO2[17] */ + NEW_PAD_CTRL(MX6PAD(EIM_A20__IPU2_CSI1_DATA15), CSI_PAD_CTRL), /* GPIO2[18] */ + NEW_PAD_CTRL(MX6PAD(EIM_A19__IPU2_CSI1_DATA14), CSI_PAD_CTRL), /* GPIO2[19] */ + NEW_PAD_CTRL(MX6PAD(EIM_A18__IPU2_CSI1_DATA13), CSI_PAD_CTRL), /* GPIO2[20] */ + NEW_PAD_CTRL(MX6PAD(EIM_A17__IPU2_CSI1_DATA12), CSI_PAD_CTRL), /* GPIO2[21] */ + NEW_PAD_CTRL(MX6PAD(EIM_EB0__IPU2_CSI1_DATA11), CSI_PAD_CTRL), /* GPIO2[28] */ + NEW_PAD_CTRL(MX6PAD(EIM_EB1__IPU2_CSI1_DATA10), CSI_PAD_CTRL), /* GPIO2[29] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA0__IPU2_CSI1_DATA09), CSI_PAD_CTRL), /* GPIO3[0] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA1__IPU2_CSI1_DATA08), CSI_PAD_CTRL), /* GPIO3[1] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA2__IPU2_CSI1_DATA07), CSI_PAD_CTRL), /* GPIO3[2] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA3__IPU2_CSI1_DATA06), CSI_PAD_CTRL), /* GPIO3[3] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA4__IPU2_CSI1_DATA05), CSI_PAD_CTRL), /* GPIO3[4] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA5__IPU2_CSI1_DATA04), CSI_PAD_CTRL), /* GPIO3[5] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA6__IPU2_CSI1_DATA03), CSI_PAD_CTRL), /* GPIO3[6] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA7__IPU2_CSI1_DATA02), CSI_PAD_CTRL), /* GPIO3[7] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA8__IPU2_CSI1_DATA01), CSI_PAD_CTRL), /* GPIO3[8] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA9__IPU2_CSI1_DATA00), CSI_PAD_CTRL), /* GPIO3[9] */ + NEW_PAD_CTRL(MX6PAD(EIM_A16__IPU2_CSI1_PIXCLK), CSI_PAD_CTRL), /* GPIO2[22] - pin A8 */ +#endif + + /* Not used, but MUST be in GPIO mode */ + NEW_PAD_CTRL(MX6PAD(EIM_DA10__GPIO3_IO10), WEAK_PULLUP), /* IPU2_CSI1_DATA_EN not used (pin B5 stat2) */ + NEW_PAD_CTRL(MX6PAD(EIM_DA11__GPIO3_IO11), WEAK_PULLUP), /* HSYNC - pin A5 stat0 */ + NEW_PAD_CTRL(MX6PAD(EIM_DA12__GPIO3_IO12), WEAK_PULLUP), /* VSYNC - pin A6 stat1 */ + +#define GP_GS2971_SMPTE_BYPASS IMX_GPIO_NR(2, 24) + NEW_PAD_CTRL(MX6PAD(EIM_CS1__GPIO2_IO24), WEAK_PULLUP), /* pin G7 - i/o SMPTE bypass */ +#define GP_GS2971_RESET IMX_GPIO_NR(3, 13) + NEW_PAD_CTRL(MX6PAD(EIM_DA13__GPIO3_IO13), OUTPUT_40OHM), /* 0 - pin C7 - reset */ +#define GP_GS2971_DVI_LOCK IMX_GPIO_NR(3, 14) + NEW_PAD_CTRL(MX6PAD(EIM_DA14__GPIO3_IO14), WEAK_PULLUP), /* pin B6 - stat3 - DVI_LOCK */ +#define GP_GS2971_DATA_ERR IMX_GPIO_NR(3, 15) + NEW_PAD_CTRL(MX6PAD(EIM_DA15__GPIO3_IO15), WEAK_PULLUP), /* pin C6 - stat5 - DATA error */ +#define GP_GS2971_LB_CONT IMX_GPIO_NR(3, 20) + NEW_PAD_CTRL(MX6PAD(EIM_D20__GPIO3_IO20), WEAK_PULLUP), /* pin A3 - LB control - float, analog input */ +#define GP_GS2971_Y_1ANC IMX_GPIO_NR(4, 26) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT5__GPIO4_IO26), WEAK_PULLUP), /* pin C5 - stat4 - 1ANC - Y signal detect */ +#define GP_GS2971_RC_BYPASS IMX_GPIO_NR(4, 27) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT6__GPIO4_IO27), OUTPUT_40OHM), /* 0 - pin G3 - RC bypass - output is buffered(low) */ +#define GP_GS2971_IOPROC_EN IMX_GPIO_NR(4, 28) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT7__GPIO4_IO28), OUTPUT_40OHM), /* 0 - pin H8 - io(A/V) processor enable */ +#define GP_GS2971_AUDIO_EN IMX_GPIO_NR(4, 29) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT8__GPIO4_IO29), OUTPUT_40OHM), /* 0 - pin H3 - Audio Enable */ +#define GP_GS2971_TIM_861 IMX_GPIO_NR(4, 30) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT9__GPIO4_IO30), OUTPUT_40OHM), /* 0 - pin H5 - TIM861 timing format, 0-use HSYNC/VSYNC */ +#define GP_GS2971_SW_EN IMX_GPIO_NR(4, 31) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT10__GPIO4_IO31), OUTPUT_40OHM), /* 0 - pin D7 - SW_EN - line lock enable */ +#define GP_GS2971_STANDBY IMX_GPIO_NR(5, 0) + NEW_PAD_CTRL(MX6PAD(EIM_WAIT__GPIO5_IO00), OUTPUT_40OHM), /* 1 - pin K2 - Standby */ +#define GP_GS2971_DVB_ASI IMX_GPIO_NR(5, 5) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT11__GPIO5_IO05), WEAK_PULLUP), /* pin G8 i/o DVB_ASI */ + + NEW_PAD_CTRL(MX6PAD(KEY_ROW1__AUD5_RXD), AUD_PAD_CTRL), /* pin J3 - AOUT1/2 */ + NEW_PAD_CTRL(MX6PAD(DISP0_DAT14__AUD5_RXC), AUD_PAD_CTRL), /* pin J4 - ACLK*/ + NEW_PAD_CTRL(MX6PAD(DISP0_DAT13__AUD5_RXFS), AUD_PAD_CTRL), /* pin H4 - WCLK*/ + + /* UART1 */ + NEW_PAD_CTRL(MX6PAD(CSI0_DAT10__UART1_TX_DATA), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT11__UART1_RX_DATA), UART_PAD_CTRL), + + /* UART2 for debug */ + NEW_PAD_CTRL(MX6PAD(EIM_D26__UART2_TX_DATA), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D27__UART2_RX_DATA), UART_PAD_CTRL), + + /* UART3 */ + NEW_PAD_CTRL(MX6PAD(EIM_D24__UART3_TX_DATA), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D25__UART3_RX_DATA), UART_PAD_CTRL), + + /* UART4 */ + NEW_PAD_CTRL(MX6PAD(KEY_COL0__UART4_TX_DATA), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(KEY_ROW0__UART4_RX_DATA), UART_PAD_CTRL), + + /* UART5 */ + NEW_PAD_CTRL(MX6PAD(CSI0_DAT14__UART5_TX_DATA), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT15__UART5_RX_DATA), UART_PAD_CTRL), + + /* UART6/7 on sc16is752 on i2c2 */ +#define GP_SC16IS752_IRQ IMX_GPIO_NR(4, 10) + NEW_PAD_CTRL(MX6PAD(KEY_COL2__GPIO4_IO10), WEAK_PULLUP), /* irq */ + + /* USBH1 */ + NEW_PAD_CTRL(MX6PAD(EIM_D30__USB_H1_OC), WEAK_PULLUP), +#define GP_USB_HUB_RESET IMX_GPIO_NR(7, 12) + NEW_PAD_CTRL(MX6PAD(GPIO_17__GPIO7_IO12), OUTPUT_40OHM), /* USB Hub Reset for USB2512 4 port hub */ + /* + * port1 - 10/100 ethernet using AX88772A on J90 + * port2 - usb connector on J26 + * port3 - usb connector on J25 + * port4 - usb connector on J96 + */ +#define GP_AX88772A_RESET IMX_GPIO_NR(5, 20) + NEW_PAD_CTRL(MX6PAD(CSI0_DATA_EN__GPIO5_IO20), OUTPUT_40OHM), + + /* USBOTG - J80 */ + NEW_PAD_CTRL(MX6PAD(GPIO_1__USB_OTG_ID) , WEAK_PULLUP), + NEW_PAD_CTRL(MX6PAD(KEY_COL4__USB_OTG_OC), WEAK_PULLUP), +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) + NEW_PAD_CTRL(MX6PAD(EIM_D22__GPIO3_IO22), OUTPUT_40OHM), + + /* USDHC1: Full size SD card holder - J88 */ + NEW_PAD_CTRL(MX6PAD(SD1_CLK__SD1_CLK), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD1_CMD__SD1_CMD), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD1_DAT0__SD1_DATA0), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD1_DAT1__SD1_DATA1), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD1_DAT2__SD1_DATA2), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD1_DAT3__SD1_DATA3), USDHC_PAD_CTRL), +#define GP_SD1_CD IMX_GPIO_NR(1, 4) + NEW_PAD_CTRL(MX6PAD(GPIO_4__GPIO1_IO04), WEAK_PULLUP), +#define GP_SD1_WP IMX_GPIO_NR(1, 2) + NEW_PAD_CTRL(MX6PAD(GPIO_2__GPIO1_IO02), WEAK_PULLUP), + /* Needs to invert and use key_col1 */ +#define GP_SD1_POWER_SEL IMX_GPIO_NR(7, 13) /* low 1.8V, high 3.3V */ + NEW_PAD_CTRL(MX6PAD(GPIO_18__GPIO7_IO13), OUTPUT_40OHM), + + /* USDHC2: micro sd - J87 */ + NEW_PAD_CTRL(MX6PAD(SD2_CLK__SD2_CLK), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD2_CMD__SD2_CMD), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD2_DAT0__SD2_DATA0), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD2_DAT1__SD2_DATA1), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD2_DAT2__SD2_DATA2), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD2_DAT3__SD2_DATA3), USDHC_PAD_CTRL), +#define GP_SD2_CD IMX_GPIO_NR(3, 23) + NEW_PAD_CTRL(MX6PAD(EIM_D23__GPIO3_IO23), WEAK_PULLUP), + + /* USDHC3 - eMMC */ + NEW_PAD_CTRL(MX6PAD(SD3_CLK__SD3_CLK), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_CMD__SD3_CMD), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT0__SD3_DATA0), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT1__SD3_DATA1), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT2__SD3_DATA2), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT3__SD3_DATA3), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT4__SD3_DATA4), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT5__SD3_DATA5), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT6__SD3_DATA6), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT7__SD3_DATA7), USDHC_PAD_CTRL), +#define GP_EMMC_RESET IMX_GPIO_NR(7, 8) + NEW_PAD_CTRL(MX6PAD(SD3_RST__GPIO7_IO08), OUTPUT_40OHM), /* eMMC reset */ +}; + +static const iomux_v3_cfg_t MX6NAME(enet_pads1)[] = { + /* pin 35 - 1 (PHY_AD2) on reset */ + NEW_PAD_CTRL(MX6PAD(RGMII_RXC__GPIO6_IO30), OUTPUT_40OHM), + /* pin 32 - 1 - (MODE0) all */ + NEW_PAD_CTRL(MX6PAD(RGMII_RD0__GPIO6_IO25), OUTPUT_40OHM), + /* pin 31 - 1 - (MODE1) all */ + NEW_PAD_CTRL(MX6PAD(RGMII_RD1__GPIO6_IO27), OUTPUT_40OHM), + /* pin 28 - 1 - (MODE2) all */ + NEW_PAD_CTRL(MX6PAD(RGMII_RD2__GPIO6_IO28), OUTPUT_40OHM), + /* pin 27 - 1 - (MODE3) all */ + NEW_PAD_CTRL(MX6PAD(RGMII_RD3__GPIO6_IO29), OUTPUT_40OHM), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + NEW_PAD_CTRL(MX6PAD(RGMII_RX_CTL__GPIO6_IO24), OUTPUT_40OHM), +}; + +static const iomux_v3_cfg_t MX6NAME(enet_pads2)[] = { + NEW_PAD_CTRL(MX6PAD(RGMII_RXC__RGMII_RXC), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_RD0__RGMII_RD0), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_RD1__RGMII_RD1), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_RD2__RGMII_RD2), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_RD3__RGMII_RD3), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_RX_CTL__RGMII_RX_CTL), ENET_PAD_CTRL), +}; + +/* + * + */ +#define PC I2C_PAD_CTRL + +static struct i2c_pads_info MX6NAME(i2c_pad_info)[] = { +{ + /* I2C1, SGTL5000 */ + .scl = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(EIM_D21__I2C1_SCL), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(EIM_D21__GPIO3_IO21), PC), + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(EIM_D28__I2C1_SDA), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(EIM_D28__GPIO3_IO28), PC), + .gp = IMX_GPIO_NR(3, 28) + } +}, { + /* I2C2 Camera, MIPI */ + .scl = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(KEY_COL3__I2C2_SCL), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(KEY_COL3__GPIO4_IO12), PC), + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(KEY_ROW3__I2C2_SDA), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(KEY_ROW3__GPIO4_IO13), PC), + .gp = IMX_GPIO_NR(4, 13) + } +}, { + /* I2C3, J15 - RGB connector */ + .scl = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(GPIO_5__I2C3_SCL), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(GPIO_5__GPIO1_IO05), PC), + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(GPIO_16__I2C3_SDA), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(GPIO_16__GPIO7_IO11), PC), + .gp = IMX_GPIO_NR(7, 11) + } +} +}; diff --git a/board/boundary/bt/spl.c b/board/boundary/bt/spl.c new file mode 100644 index 0000000..f68a458 --- /dev/null +++ b/board/boundary/bt/spl.c @@ -0,0 +1,115 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#if 0 +void board_init_f(ulong dummy) +{ +#if 0 + arch_cpu_init(); + board_early_init_f(); + timer_init(); + preloader_console_init(); + + print_cpuinfo(); + board_init_r(NULL, 0); +#endif +} +#endif + +void spl_board_init(void) +{ +#if 0 + int i; + u32 const *regs ; + int num_regs; + unsigned char mac_address[6]; + imx_get_mac_from_fuse(0,mac_address); + printf("ethaddr: %pM\n", mac_address); + + if (is_cpu_type(MXC_CPU_MX6Q)) { +#if 1 + regs = mx6q_1g; + num_regs = ARRAY_SIZE(mx6q_1g); +#else + regs = mx6q_2g; + num_regs = ARRAY_SIZE(mx6q_2g); +#endif + } else { +#if CONFIG_DDR_MB == 512 + regs = mx6dl_512m; + num_regs = ARRAY_SIZE(mx6dl_512m); +printf("Configuring for 512MiB narrow memory bus\n"); +#elif CONFIG_DDR_MB == 1024 + regs = mx6dl_1gn; + num_regs = ARRAY_SIZE(mx6dl_1gn); +printf("Configuring for 1GiB narrow memory bus\n"); +#elif CONFIG_DDR_MB == 2048 + regs = mx6dl_2g; + num_regs = ARRAY_SIZE(mx6dl_2g); +printf("Configuring for 2GiB wide memory bus\n"); +#endif + } + for (i=0; i < num_regs; i+=2) { + writel(regs[i+1],regs[i]); + } + dram_init(); +#endif + printf("%s\n", __func__); +} + +u32 spl_boot_device(void) +{ + printf("%s\n", __func__); +#if 0 + unsigned reg; + struct src *psrc = (struct src *)SRC_BASE_ADDR; + printf("%s: sbmr1 == 0x%08x\n", __func__, psrc->sbmr1); + printf("%s: gpr9 == 0x%08x\n", __func__, psrc->gpr9); + printf("%s: gpr10 == 0x%08x\n", __func__, psrc->gpr10); + return BOOT_DEVICE_USB; +#endif +#if 1 + return BOOT_DEVICE_SPI; +#endif +} + +#if 0 +void spl_usb_load_image(void) +{ + boot_mode_apply(MAKE_CFGVAL(0x01, 0x00, 0x00, 0x00)); + reset_cpu(0); +} + +#endif diff --git a/board/boundary/cad/Kconfig b/board/boundary/cad/Kconfig new file mode 100644 index 0000000..4841110 --- /dev/null +++ b/board/boundary/cad/Kconfig @@ -0,0 +1,18 @@ +if TARGET_CAD + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "cad" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "cad" + +endif diff --git a/board/boundary/cad/MAINTAINERS b/board/boundary/cad/MAINTAINERS new file mode 100644 index 0000000..78025ad --- /dev/null +++ b/board/boundary/cad/MAINTAINERS @@ -0,0 +1,6 @@ +CAD BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/cad/ +F: include/configs/cad.h +F: configs/cad_defconfig diff --git a/board/boundary/cad/Makefile b/board/boundary/cad/Makefile new file mode 100644 index 0000000..b5bc391 --- /dev/null +++ b/board/boundary/cad/Makefile @@ -0,0 +1,10 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := cad.o +obj-$(CONFIG_MXC_SPI_DISPLAY) += spi_display.o \ No newline at end of file diff --git a/board/boundary/cad/cad.c b/board/boundary/cad/cad.c new file mode 100644 index 0000000..3e57c9b --- /dev/null +++ b/board/boundary/cad/cad.c @@ -0,0 +1,365 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "spi_display.h" + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC4_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + + +static iomux_v3_cfg_t const init_pads[] = { +#define POWERDOWN_REPLY IMX_GPIO_NR(1, 2) + MX6_PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(OUTPUT_40OHM), /* powerdown_reply - output to latch power */ +#define POWERLOW IMX_GPIO_NR(1, 3) + MX6_PAD_GPIO_3__GPIO1_IO03, /* powerlow - input reflecting power state */ +#define POWERDOWN_NOTICE IMX_GPIO_NR(1, 6) + MX6_PAD_GPIO_6__GPIO1_IO06, /* powerdown_notice - input reflecting button press */ +#define BUZZER IMX_GPIO_NR(7, 13) + MX6_PAD_GPIO_18__GPIO7_IO13, /* buzzer */ +#define IR_STATUS IMX_GPIO_NR(1, 9) + MX6_PAD_GPIO_9__GPIO1_IO09, /* IR status */ +#define GP_BACKLIGHT IMX_GPIO_NR(1, 21) /* PWM1 */ + IOMUX_PAD_CTRL(SD1_DAT3__GPIO1_IO21, WEAK_PULLDOWN), +}; + + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); + + return 0; +} + +static iomux_v3_cfg_t const uart2_pads[] = { + MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +/* I2C1, SGTL5000, RTC */ +static struct i2c_pads_info i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}; + +/* I2C2 MIPI camera */ +static struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}; + +/* I2C3 - Touch screen, ADV7997 */ +static struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC, + .gp = IMX_GPIO_NR(7, 11) + } +}; + +static iomux_v3_cfg_t const usdhc_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ + MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); +} + +int board_ehci_hcd_init(int port) +{ + return 0; +} + +static struct fsl_esdhc_cfg usdhc_cfgs[] = { + {.esdhc_base = USDHC2_BASE_ADDR, .max_bus_width = 4}, + {.esdhc_base = USDHC4_BASE_ADDR, .max_bus_width = 4}, + {.esdhc_base = USDHC3_BASE_ADDR, .max_bus_width = 4}, +}; + +static int usdhc_clocks[] = { + MXC_ESDHC3_CLK, + MXC_ESDHC2_CLK, + MXC_ESDHC4_CLK, +}; + +static int card_detect[] = { + -1, + IMX_GPIO_NR(2, 6), + IMX_GPIO_NR(7, 0), +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int gp_cd = -1; + int i = 0; + for (i = 0; i < ARRAY_SIZE(card_detect); i++) { + if (cfg->esdhc_base == usdhc_cfgs[i].esdhc_base) { + gp_cd = card_detect[i]; + break; + } + } + if (0 <= gp_cd) + return !gpio_get_value(gp_cd); + else + return 1; +} + +int board_mmc_init(bd_t *bis) +{ + int i, status = 0; + imx_iomux_v3_setup_multiple_pads( + usdhc_pads, ARRAY_SIZE(usdhc_pads)); + + for (i = 0; i < ARRAY_SIZE(usdhc_cfgs); i++) { + usdhc_cfgs[i].sdhc_clk = mxc_get_clock(usdhc_clocks[i]); + status |= fsl_esdhc_initialize(bis, &usdhc_cfgs[i]); + } + printf("%s: status = 0x%x\n", __func__, status); + return status; +} + +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : (cs >> 8) ? (cs >> 8) : -1; +} + +static iomux_v3_cfg_t const ecspi_pads[] = { + /* SPI1 chip-select */ + MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; + +static void setup_spi(void) +{ + imx_iomux_v3_setup_multiple_pads(ecspi_pads, + ARRAY_SIZE(ecspi_pads)); + gpio_direction_output(IMX_GPIO_NR(3, 19), 1); +} + +int board_cfb_skip(void) +{ + return 1; +} + +#define IMX_VD_SPI_QVGA(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x70,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = detect_spi,\ + .enable = enable_spi_rgb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_MODESTR,\ + .mode = {\ + .name = "qvga",\ + .refresh = 60,\ + .xres = 320,\ + .yres = 240,\ + .pixclock = 1000000000 / 408 * 100 / 262 / 6,\ + .left_margin = 16,\ + .right_margin = 20,\ + .upper_margin = 16,\ + .lower_margin = 4,\ + .hsync_len = 52,\ + .vsync_len = 2,\ + .sync = 0,\ + .vmode = FB_VMODE_NONINTERLACED\ + }\ +} + +const struct display_info_t displays[] = { + IMX_VD_SPI_QVGA(LCD, 1, 1), +}; +size_t display_count = ARRAY_SIZE(displays); + +int board_eth_init(bd_t *bis) +{ + /* For otg ethernet*/ + usb_eth_initialize(bis); + mdelay(23); /* Wait 14 frames for display to come on, 20 is too low*/ + gpio_set_value(GP_BACKLIGHT, 1); + return 0; +} + +int board_early_init_f(void) +{ + gpio_direction_output(GP_BACKLIGHT, 0); + setup_iomux_uart(); + + imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads)); + gpio_direction_output(POWERDOWN_REPLY, 1); + +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + + setup_spi(); + + return 0; +} + +int checkboard(void) +{ + puts("Board: " CONFIG_BOARD_NAME "\n"); + return 0; +} + +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; + +int misc_init_r(void) +{ + add_board_boot_modes(board_boot_modes); + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", CONFIG_BOARD_NAME); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} + +static int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + gpio_set_value(GP_BACKLIGHT, 0); + gpio_set_value(POWERDOWN_REPLY, 0); + mdelay(500); + return 1; +} + +U_BOOT_CMD( + poweroff, 70, 0, do_poweroff, + "power down board", + "" +); diff --git a/board/boundary/cad/cad.cfg b/board/boundary/cad/cad.cfg new file mode 100644 index 0000000..8fd7eb3 --- /dev/null +++ b/board/boundary/cad/cad.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "../nitrogen6x/ddr-setup.cfg" +#include "../nitrogen6x/800mhz_2x256mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/cad/spi_display.c b/board/boundary/cad/spi_display.c new file mode 100644 index 0000000..e85e7da --- /dev/null +++ b/board/boundary/cad/spi_display.c @@ -0,0 +1,358 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "spi_display.h" + +#define DI0_PAD_CTRL PAD_CTL_DSE_120ohm + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#if defined(CONFIG_MX6QDL) +#define IOMUX_PAD_CTRL(name, ctrl) NEW_PAD_CTRL(MX6Q_PAD_##name, ctrl), \ + NEW_PAD_CTRL(MX6DL_PAD_##name, ctrl) +#else +#define IOMUX_PAD_CTRL(name, ctrl) NEW_PAD_CTRL(MX6_PAD_##name, ctrl) +#endif + +#if 0 +/* RH320240T-3X5WP-A2, Display Mode Setting */ +#define SPI_FREQ 1000000 +#define SPI_MOSI_PAD_CTRL (SPI_PAD_CTRL | PAD_CTL_PUS_22K_UP | PAD_CTL_ODE) +#else +/* RH320240T-3X5AP-A, Display Mode Setting */ +#define SPI_FREQ 1000000 +#define SPI_MOSI_PAD_CTRL (SPI_PAD_CTRL | PAD_CTL_PUS_22K_UP) +#endif + + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +static iomux_v3_cfg_t const spi_display_pads[] = { + /* ECSPI2 */ + IOMUX_PAD_CTRL(CSI0_DAT8__ECSPI2_SCLK, SPI_PAD_CTRL), /* P5:pin 10, P6:pin 49 */ + IOMUX_PAD_CTRL(CSI0_DAT9__ECSPI2_MOSI, SPI_MOSI_PAD_CTRL), /* P5:pin 12, P6:pin 50 */ + IOMUX_PAD_CTRL(CSI0_DAT10__ECSPI2_MISO, SPI_MOSI_PAD_CTRL), /* P5:pin 11, P6:pin 50 */ +#define GP_ECSPI2_CS IMX_GPIO_NR(5, 29) + IOMUX_PAD_CTRL(CSI0_DAT11__GPIO5_IO29, SPI_PAD_CTRL), /* P5:pin 9, P6:pin 43 */ +#define GP_LCD_DISABLE IMX_GPIO_NR(2, 4) + IOMUX_PAD_CTRL(NANDF_D4__GPIO2_IO04, WEAK_PULLUP), /* P5:pin 42, P6:pin 48 (SHUT) */ +#define GP_TOUCH_IRQ IMX_GPIO_NR(4, 20) + IOMUX_PAD_CTRL(DI0_PIN4__GPIO4_IO20, WEAK_PULLUP), + + /* DI0 */ + IOMUX_PAD_CTRL(DI0_DISP_CLK__IPU1_DI0_DISP_CLK, DI0_PAD_CTRL), +// IOMUX_PAD_CTRL(DI0_PIN15__IPU1_DI0_PIN15, DI0_PAD_CTRL), /* DRDY */ + IOMUX_PAD_CTRL(DI0_PIN2__IPU1_DI0_PIN02, DI0_PAD_CTRL), /* HSYNC */ + IOMUX_PAD_CTRL(DI0_PIN3__IPU1_DI0_PIN03, DI0_PAD_CTRL), /* VSYNC */ + IOMUX_PAD_CTRL(DISP0_DAT0__IPU1_DISP0_DATA00, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT1__IPU1_DISP0_DATA01, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT2__IPU1_DISP0_DATA02, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT3__IPU1_DISP0_DATA03, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT4__IPU1_DISP0_DATA04, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT5__IPU1_DISP0_DATA05, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT6__IPU1_DISP0_DATA06, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT7__IPU1_DISP0_DATA07, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT8__IPU1_DISP0_DATA08, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT9__IPU1_DISP0_DATA09, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT10__IPU1_DISP0_DATA10, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT11__IPU1_DISP0_DATA11, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT12__IPU1_DISP0_DATA12, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT13__IPU1_DISP0_DATA13, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT14__IPU1_DISP0_DATA14, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT15__IPU1_DISP0_DATA15, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT16__IPU1_DISP0_DATA16, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT17__IPU1_DISP0_DATA17, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT18__IPU1_DISP0_DATA18, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT19__IPU1_DISP0_DATA19, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT20__IPU1_DISP0_DATA20, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT21__IPU1_DISP0_DATA21, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT22__IPU1_DISP0_DATA22, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT23__IPU1_DISP0_DATA23, DI0_PAD_CTRL), +}; + +static int spi_display_cmds(struct spi_slave *spi, u8 *cmds) +{ + u8 buf[4]; + int ret = 0; + + debug("%s\n", __func__); + while (1) { + uint reg = (cmds[0] << 8) | cmds[1]; + uint len = cmds[2]; + uint val; + + if (!len && !reg) + break; + cmds += 3; + do { + buf[0] = 0x70; + buf[1] = reg >> 8; + buf[2] = reg; + ret = spi_xfer(spi, 3 * 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to select reg 0x%x, %d\n", __func__, reg, ret); + return ret; + } + udelay(2); + if (!len) { + debug("spi: reg:%04x\n", reg); + break; + } + val = (cmds[0] << 8) | cmds[1]; + cmds += 2; + buf[0] = 0x72; + buf[1] = val >> 8; + buf[2] = val; + ret = spi_xfer(spi, 3 * 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to write val 0x%x=0x%x, %d\n", __func__, reg, val, ret); + return ret; + } + debug("spi: reg:%04x=%04x\n", reg, val); + udelay(2); + reg++; + } while (--len); + } + return ret; +} + +int spi_read_register(struct spi_slave *spi, int reg) +{ + int val; + int ret; + u8 buf[4]; + u8 rx_buf[4]; + + buf[0] = 0x70; + buf[1] = reg >> 8; + buf[2] = reg; + ret = spi_xfer(spi, 3 * 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to select reg 0x%x, %d\n", __func__, reg, ret); + return ret; + } + udelay(2); + buf[0] = 0x73; + buf[1] = 0xff; + buf[2] = 0xff; + rx_buf[0] = 0xff; + rx_buf[1] = 0xff; + rx_buf[2] = 0xff; + ret = spi_xfer(spi, 3 * 8, buf, rx_buf, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to read val from reg 0x%x %d\n", __func__, reg, ret); + return ret; + } + val = (rx_buf[1] << 8) | rx_buf[2]; + debug("spi: (0x%02x)reg:%04x=%04x\n", rx_buf[0], reg, val); + return val; +} + +#define A(reg, cnt) (reg >> 8), (reg & 0xff), cnt +#define VAL(val) (val >> 8), (val & 0xff) + +static u8 display_init_cmds[] = { +/* RH320240T-3X5WP-A2, Display Mode Setting */ +#if 1 + A(0x0001, 5), VAL(0x7300), VAL(0x0200), VAL(0x6164), VAL(0x04c7), VAL(0xfc80), + A(0x000a, 1), VAL(0x4008), + A(0x000d, 2), VAL(0x3229), VAL(0x3200), +#else +//defaults +// A(0x0001, 5), VAL(0x7300), VAL(0x0200), VAL(0x6464), VAL(0x0447), VAL(0xb4c4), +// A(0x000a, 1), VAL(0x4008), +// A(0x000d, 2), VAL(0x3229), VAL(0x1200), +#endif + A(0, 0) +}; + +void enable_spi_rgb(struct display_info_t const *dev) +{ + unsigned cs_gpio = GP_ECSPI2_CS; + struct spi_slave *spi; + int ret; + + gpio_direction_output(cs_gpio, 1); + + enable_spi_clk(1, dev->bus); + + /* Setup spi_slave */ + spi = spi_setup_slave(dev->bus, cs_gpio << 8, SPI_FREQ, SPI_MODE_3); + if (!spi) { + printf("%s: Failed to set up slave\n", __func__); + return; + } + + /* Claim spi bus */ + ret = spi_claim_bus(spi); + if (ret) { + debug("%s: Failed to claim SPI bus: %d\n", __func__, ret); + goto free_bus; + } + + /* + * Initialization sequence + * 1. Display Mode Settings + * 2. Power Settings + * 3. Gamma Settings + * 4. Sleep Out + * 5. Wait >= 7 frame + * 6. Display on + */ + ret = spi_display_cmds(spi, display_init_cmds); + if (ret) { + printf("%s: Failed to display_init_cmds %d\n", __func__, ret); + goto release_bus; + } + + /* Release spi bus */ +release_bus: + spi_release_bus(spi); +free_bus: + spi_free_slave(spi); + enable_spi_clk(0, dev->bus); + return; +} + +/* + * Return 1 for successful detection of display + */ +int detect_spi(struct display_info_t const *dev) +{ + unsigned cs_gpio = GP_ECSPI2_CS; + unsigned disable_gpio = GP_LCD_DISABLE; + + debug("%s\n", __func__); + gpio_direction_output(cs_gpio, 1); + gpio_direction_output(disable_gpio, 1); + SETUP_IOMUX_PADS(spi_display_pads); + udelay(200); + gpio_direction_output(disable_gpio, 0); + mdelay(200); + return 1; +} + +static int do_spid(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unsigned cs_gpio = GP_ECSPI2_CS; + struct spi_slave *spi; + int ret = 0; + int arg = 2; + int bus = 1; + int index = 3; + uint reg; + u8 buf[80]; + + if (argc < 2) + return 1; + gpio_direction_output(cs_gpio, 1); + + enable_spi_clk(1, bus); + + /* Setup spi_slave */ + spi = spi_setup_slave(bus, cs_gpio << 8, SPI_FREQ, SPI_MODE_3); + if (!spi) { + printf("%s: Failed to set up slave\n", __func__); + return 1; + } + + /* Claim spi bus */ + ret = spi_claim_bus(spi); + if (ret) { + debug("%s: Failed to claim SPI bus: %d\n", __func__, ret); + goto exit1; + } + + reg = simple_strtoul(argv[1], NULL, 16); + buf[0] = reg >> 8; + buf[1] = reg; + buf[2] = argc - arg; + while (arg < argc) { + int val = simple_strtoul(argv[arg], NULL, 16);; + buf[index++] = val >> 8; + buf[index++] = val; + if (index >= ARRAY_SIZE(buf) - 4) + break; + arg++; + } + buf[index++] = 0; + buf[index++] = 0; + buf[index++] = 0; + spi_display_cmds(spi, buf); + spi_release_bus(spi); +exit1: + spi_free_slave(spi); + enable_spi_clk(0, bus); + return ret ? 1 : 0; +} + +U_BOOT_CMD( + spid, 70, 0, do_spid, + "write cmd, data to spi display", + "reg16 [word]" +); + +static int do_spidr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unsigned cs_gpio = GP_ECSPI2_CS; + struct spi_slave *spi; + int ret = 0; + int bus = 1; + uint reg; + int val; + + if (argc != 2) + return 1; + + gpio_direction_output(cs_gpio, 1); + + enable_spi_clk(1, bus); + + /* Setup spi_slave */ + spi = spi_setup_slave(bus, cs_gpio << 8, SPI_FREQ, SPI_MODE_3); + if (!spi) { + printf("%s: Failed to set up slave\n", __func__); + return 1; + } + + /* Claim spi bus */ + ret = spi_claim_bus(spi); + if (ret) { + debug("%s: Failed to claim SPI bus: %d\n", __func__, ret); + goto exit1; + } + + reg = simple_strtoul(argv[1], NULL, 16); + val = spi_read_register(spi, reg); + printf("reg %04x=0x%04x\n", reg, val); + spi_release_bus(spi); +exit1: + spi_free_slave(spi); + enable_spi_clk(0, bus); + return ret ? 1 : 0; +} + +U_BOOT_CMD( + spidr, 70, 0, do_spidr, + "read data from spi display", + "reg16" +); diff --git a/board/boundary/cad/spi_display.h b/board/boundary/cad/spi_display.h new file mode 100644 index 0000000..e59275d --- /dev/null +++ b/board/boundary/cad/spi_display.h @@ -0,0 +1,2 @@ +int detect_spi(struct display_info_t const *dev); +void enable_spi_rgb(struct display_info_t const *dev); diff --git a/board/boundary/cob/1066mhz_4x128mx16.cfg b/board/boundary/cob/1066mhz_4x128mx16.cfg new file mode 100644 index 0000000..45e938b --- /dev/null +++ b/board/boundary/cob/1066mhz_4x128mx16.cfg @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 +DATA 4, MX6_MMDC_P0_MDCFG0, 0x555A7974 +DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64 +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB +DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 +DATA 4, MX6_MMDC_P0_MDOR, 0x005A1023 +DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040 +DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576 +DATA 4, MX6_MMDC_P0_MDASP, 0x00000027 +DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00428031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x19308030 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P0_MDREF, 0x00005800 +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42720306 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x026F0266 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x4273030A +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x02740240 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x45393B3E +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x403A3747 +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x40434541 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x473E4A3B +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0011000E +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x000E001B +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00190015 +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00070018 +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/boundary/cob/Kconfig b/board/boundary/cob/Kconfig new file mode 100644 index 0000000..4cf7733 --- /dev/null +++ b/board/boundary/cob/Kconfig @@ -0,0 +1,18 @@ +if TARGET_COB + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "cob" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "cob" + +endif diff --git a/board/boundary/cob/MAINTAINERS b/board/boundary/cob/MAINTAINERS new file mode 100644 index 0000000..e344d71 --- /dev/null +++ b/board/boundary/cob/MAINTAINERS @@ -0,0 +1,7 @@ +cob BOARD +M: Troy KIsky +S: Maintained +F: board/boundary/cob/ +F: include/configs/cob.h +F: configs/cob_defconfig + diff --git a/board/boundary/cob/Makefile b/board/boundary/cob/Makefile new file mode 100644 index 0000000..6d1caad --- /dev/null +++ b/board/boundary/cob/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := cob.o diff --git a/board/boundary/cob/cob.c b/board/boundary/cob/cob.c new file mode 100644 index 0000000..ceb7e50 --- /dev/null +++ b/board/boundary/cob/cob.c @@ -0,0 +1,618 @@ +/* + * Copyright (C) 2015, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define USDHC_CLK_PAD_CTRL (PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (USDHC_CLK_PAD_CTRL | PAD_CTL_PUS_47K_UP) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDN_OUTPUT (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_SLOW) + +#define WEAK_PULLUP_OUTPUT (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +#define RGB_PAD_CTRL PAD_CTL_DSE_120ohm + +static const iomux_v3_cfg_t cob_pads[] = { + /* ECSPI1 pads (serial nor eeprom) */ + IOMUX_PAD_CTRL(EIM_D17__ECSPI1_MISO, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D18__ECSPI1_MOSI, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D16__ECSPI1_SCLK, SPI_PAD_CTRL), +#define GP_ECSPI1_NOR_CS IMX_GPIO_NR(3, 19) + IOMUX_PAD_CTRL(EIM_D19__GPIO3_IO19, WEAK_PULLUP), + + /* gpio_keys */ +#define GP_GPIOKEYS_MENU IMX_GPIO_NR(1, 0) + IOMUX_PAD_CTRL(GPIO_0__GPIO1_IO00, WEAK_PULLUP), +#define GP_GPIOKEYS_HOME IMX_GPIO_NR(1, 2) + IOMUX_PAD_CTRL(GPIO_2__GPIO1_IO02, WEAK_PULLUP), +#define GP_GPIOKEYS_PB1_I IMX_GPIO_NR(1, 8) /* J9 pin 6 */ + IOMUX_PAD_CTRL(GPIO_8__GPIO1_IO08, WEAK_PULLUP), +#define GP_GPIOKEYS_PB2_I IMX_GPIO_NR(7, 12) /* J10 pin 6 */ + IOMUX_PAD_CTRL(GPIO_17__GPIO7_IO12, WEAK_PULLUP), + + /* GPIO-leds */ +#define GP_GPIOLEDS_1 IMX_GPIO_NR(2, 19) + IOMUX_PAD_CTRL(EIM_A19__GPIO2_IO19, WEAK_PULLDN_OUTPUT), +#define GP_GPIOLEDS_2 IMX_GPIO_NR(2, 18) + IOMUX_PAD_CTRL(EIM_A20__GPIO2_IO18, WEAK_PULLDN_OUTPUT), + + /* Hog - GPIOs */ +#define GP_HEATER_EN IMX_GPIO_NR(4, 10) + IOMUX_PAD_CTRL(KEY_COL2__GPIO4_IO10, WEAK_PULLDN_OUTPUT), + +#define GP_LCD_DAY_BACKLIGHT_EN IMX_GPIO_NR(4, 15) + IOMUX_PAD_CTRL(KEY_ROW4__GPIO4_IO15, WEAK_PULLDN_OUTPUT), +#define GP_LCD_NIGHT_BACKLIGHT_EN IMX_GPIO_NR(4, 11) + IOMUX_PAD_CTRL(KEY_ROW2__GPIO4_IO11, WEAK_PULLDN_OUTPUT), + +#define GP_TX IMX_GPIO_NR(2, 30) + IOMUX_PAD_CTRL(EIM_EB2__GPIO2_IO30, WEAK_PULLUP), +#define GP_RX IMX_GPIO_NR(2, 31) + IOMUX_PAD_CTRL(EIM_EB3__GPIO2_IO31, WEAK_PULLUP), + +#define GP_HEATER_FAULT IMX_GPIO_NR(5, 0) + IOMUX_PAD_CTRL(EIM_WAIT__GPIO5_IO00, WEAK_PULLUP), + +#define GP_DA1_OUTA IMX_GPIO_NR(3, 0) + IOMUX_PAD_CTRL(EIM_DA0__GPIO3_IO00, WEAK_PULLUP), +#define GP_DA1_OUTB IMX_GPIO_NR(3, 1) + IOMUX_PAD_CTRL(EIM_DA1__GPIO3_IO01, WEAK_PULLUP), +#define GP_DB1_OUTA IMX_GPIO_NR(3, 2) + IOMUX_PAD_CTRL(EIM_DA2__GPIO3_IO02, WEAK_PULLUP), +#define GP_DB1_OUTB IMX_GPIO_NR(3, 3) + IOMUX_PAD_CTRL(EIM_DA3__GPIO3_IO03, WEAK_PULLUP), +#define GP_DA2_OUTA IMX_GPIO_NR(3, 4) + IOMUX_PAD_CTRL(EIM_DA4__GPIO3_IO04, WEAK_PULLUP), +#define GP_DA2_OUTB IMX_GPIO_NR(3, 5) + IOMUX_PAD_CTRL(EIM_DA5__GPIO3_IO05, WEAK_PULLUP), +#define GP_DB2_OUTA IMX_GPIO_NR(3, 6) + IOMUX_PAD_CTRL(EIM_DA6__GPIO3_IO06, WEAK_PULLUP), +#define GP_DB2_OUTB IMX_GPIO_NR(3, 7) + IOMUX_PAD_CTRL(EIM_DA7__GPIO3_IO07, WEAK_PULLUP), + + /* Hog - testpoints */ +#define GP_TP5 IMX_GPIO_NR(4, 8) + IOMUX_PAD_CTRL(KEY_COL1__GPIO4_IO08, WEAK_PULLUP), +#define GP_TP6 IMX_GPIO_NR(4, 9) + IOMUX_PAD_CTRL(KEY_ROW1__GPIO4_IO09, WEAK_PULLUP), +#define GP_TP71 IMX_GPIO_NR(1, 30) + IOMUX_PAD_CTRL(ENET_TXD0__GPIO1_IO30, WEAK_PULLUP), +#define GP_TP72 IMX_GPIO_NR(4, 6) + IOMUX_PAD_CTRL(KEY_COL0__GPIO4_IO06, WEAK_PULLUP), +#define GP_TP74 IMX_GPIO_NR(2, 7) + IOMUX_PAD_CTRL(NANDF_D7__GPIO2_IO07, WEAK_PULLDN), +#define GP_TP75 IMX_GPIO_NR(1, 11) + IOMUX_PAD_CTRL(SD2_CMD__GPIO1_IO11, WEAK_PULLUP), +#define GP_TP76 IMX_GPIO_NR(1, 10) + IOMUX_PAD_CTRL(SD2_CLK__GPIO1_IO10, WEAK_PULLUP), +#define GP_TP78 IMX_GPIO_NR(1, 7) + IOMUX_PAD_CTRL(GPIO_7__GPIO1_IO07, WEAK_PULLUP), +#define GP_TP79 IMX_GPIO_NR(1, 4) + IOMUX_PAD_CTRL(GPIO_4__GPIO1_IO04, WEAK_PULLUP), + +#define GP_I2C3_CRTOUCH IMX_GPIO_NR(1, 9) + IOMUX_PAD_CTRL(GPIO_9__GPIO1_IO09, WEAK_PULLUP), +#define GP_I2C3_CRTOUCH_WAKE IMX_GPIO_NR(2, 27) + IOMUX_PAD_CTRL(EIM_LBA__GPIO2_IO27, WEAK_PULLUP), +#define GP_I2C3_CRTOUCH_RESET IMX_GPIO_NR(2, 26) + IOMUX_PAD_CTRL(EIM_RW__GPIO2_IO26, WEAK_PULLDN), + + + /* PWM1 */ +#define GP_LCD_DAY_BACKLIGHT_PWM IMX_GPIO_NR(1, 21) + IOMUX_PAD_CTRL(SD1_DAT3__GPIO1_IO21, WEAK_PULLDN), + + /* PWM2 */ +#define GP_LCD_NIGHT_BACKLIGHT_PWM IMX_GPIO_NR(1, 19) + IOMUX_PAD_CTRL(SD1_DAT2__GPIO1_IO19, WEAK_PULLDN), + + /* Regulator - usbotg */ +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) + IOMUX_PAD_CTRL(EIM_D22__GPIO3_IO22, WEAK_PULLDN_OUTPUT), + + /* UART1 */ + IOMUX_PAD_CTRL(SD3_DAT7__UART1_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT6__UART1_RX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT0__UART1_CTS_B, UART_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT1__UART1_RTS_B, UART_PAD_CTRL), + + /* UART2 */ + IOMUX_PAD_CTRL(EIM_D26__UART2_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D27__UART2_RX_DATA, UART_PAD_CTRL), + + /* UART3 */ + IOMUX_PAD_CTRL(EIM_D24__UART3_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D25__UART3_RX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT3__UART3_CTS_B, UART_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_RST__UART3_RTS_B, UART_PAD_CTRL), + + /* USBH1 */ +#define GP_USBH1_SOURCE IMX_GPIO_NR(2, 28) /* 1 - imx, 0 - other board */ + IOMUX_PAD_CTRL(EIM_EB0__GPIO2_IO28, WEAK_PULLDN), +#define GP_USBH1_FP_OC IMX_GPIO_NR(4, 7) + IOMUX_PAD_CTRL(KEY_ROW0__GPIO4_IO07, WEAK_PULLDN), + IOMUX_PAD_CTRL(EIM_D30__USB_H1_OC, WEAK_PULLUP), + + /* USB OTG */ + IOMUX_PAD_CTRL(GPIO_1__USB_OTG_ID, WEAK_PULLUP), + IOMUX_PAD_CTRL(KEY_COL4__USB_OTG_OC, WEAK_PULLUP), + + /* USDHC4 - eMMC */ + IOMUX_PAD_CTRL(SD4_CLK__SD4_CLK, USDHC_CLK_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_CMD__SD4_CMD, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT0__SD4_DATA0, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT1__SD4_DATA1, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT2__SD4_DATA2, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT3__SD4_DATA3, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT4__SD4_DATA4, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT5__SD4_DATA5, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT6__SD4_DATA6, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT7__SD4_DATA7, USDHC_PAD_CTRL), +#define GP_EMMC_RESET IMX_GPIO_NR(2, 6) + IOMUX_PAD_CTRL(NANDF_D6__GPIO2_IO06, WEAK_PULLUP), +}; + + +static const iomux_v3_cfg_t rgb_pads[] = { + IOMUX_PAD_CTRL(DI0_DISP_CLK__IPU1_DI0_DISP_CLK, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DI0_PIN2__IPU1_DI0_PIN02, RGB_PAD_CTRL), /* Hsync */ + IOMUX_PAD_CTRL(DI0_PIN3__IPU1_DI0_PIN03, RGB_PAD_CTRL), /* Vsync */ + IOMUX_PAD_CTRL(DI0_PIN15__IPU1_DI0_PIN15, RGB_PAD_CTRL), /* DRDY */ + IOMUX_PAD_CTRL(DISP0_DAT0__IPU1_DISP0_DATA00, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT1__IPU1_DISP0_DATA01, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT2__IPU1_DISP0_DATA02, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT3__IPU1_DISP0_DATA03, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT4__IPU1_DISP0_DATA04, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT5__IPU1_DISP0_DATA05, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT6__IPU1_DISP0_DATA06, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT7__IPU1_DISP0_DATA07, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT8__IPU1_DISP0_DATA08, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT9__IPU1_DISP0_DATA09, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT10__IPU1_DISP0_DATA10, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT11__IPU1_DISP0_DATA11, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT12__IPU1_DISP0_DATA12, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT13__IPU1_DISP0_DATA13, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT14__IPU1_DISP0_DATA14, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT15__IPU1_DISP0_DATA15, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT16__IPU1_DISP0_DATA16, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT17__IPU1_DISP0_DATA17, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT18__IPU1_DISP0_DATA18, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT19__IPU1_DISP0_DATA19, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT20__IPU1_DISP0_DATA20, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT21__IPU1_DISP0_DATA21, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT22__IPU1_DISP0_DATA22, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT23__IPU1_DISP0_DATA23, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(SD1_DAT3__PWM1_OUT, WEAK_PULLDN), +}; + +/* + * + */ +static struct i2c_pads_info i2c_pads[] = { + /* I2C1, rv4162 */ + I2C_PADS_INFO_ENTRY(I2C1, EIM_D21, 3, 21, EIM_D28, 3, 28, I2C_PAD_CTRL), + I2C_PADS_INFO_ENTRY(I2C2, KEY_COL3, 4, 12, KEY_ROW3, 4, 13, I2C_PAD_CTRL), + I2C_PADS_INFO_ENTRY(I2C3, GPIO_5, 1, 05, GPIO_16, 7, 11, I2C_PAD_CTRL), +}; + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); +// printf("%s:%p *%p=0x%lx\n", __func__, gd, &gd->ram_size, gd->ram_size); + return 0; +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + /* Connect H1 USB to imx */ + gpio_direction_output(GP_USBH1_SOURCE, 1); + mdelay(2); + return 0; +} + +int board_ehci_power(int port, int on) +{ + if (port) + return 0; + gpio_set_value(GP_USB_OTG_PWR, on); + return 0; +} + +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC4_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + return 1; /* eMMC always present */ +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + usdhc_cfg[0].max_bus_width = 8; + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + gpio_set_value(GP_EMMC_RESET, 1); /* release reset */ + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + int gp = (bus == 0 && cs == 0) ? GP_ECSPI1_NOR_CS : -1; + return gp; +} +#endif + + +int board_eth_init(bd_t *bis) +{ +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + + +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) { + return -1; + } + + env_loadsplash = getenv("loadsplash"); + if (env_loadsplash == NULL) { + printf("Environment variable loadsplash not found!\n"); + return -1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("failed to run loadsplash %s\n\n", env_loadsplash); + return -1; + } + + return 0; +} + +#if defined(CONFIG_VIDEO_IPUV3) + +void board_enable_lcd(const struct display_info_t *di) +{ + /* enable backlight PWM 1 */ + pwm_init(0, 0, 0); + + /* 300 Hz, duty cycle 2 ms, period: 3.3 ms */ + pwm_config(0, 1666667, 3333333); + pwm_enable(0); + + SETUP_IOMUX_PADS(rgb_pads); + gpio_direction_output(GP_LCD_DAY_BACKLIGHT_EN, 1); + gpio_direction_output(GP_LCD_DAY_BACKLIGHT_PWM, 1); +} + +const struct display_info_t displays[] = { + /* tsc2004 */ + IMX_VD48_DC050WX(LCD, 1, 2), + IMX_VD48_QVGA(LCD, 0, 2), + + /* fusion7 specific touchscreen */ + IMX_VD10_FUSION7(LCD, 1, 2), +}; + +size_t display_count = ARRAY_SIZE(displays); + +int board_cfb_skip(void) +{ + return NULL != getenv("novideo"); +} +#endif + + +static unsigned short gpios_out_low[] = { + GP_USBH1_SOURCE, + GP_USB_OTG_PWR, /* disable USB otg power */ + GP_EMMC_RESET, /* hold in reset */ + GP_HEATER_EN, + GP_LCD_DAY_BACKLIGHT_EN, + GP_LCD_DAY_BACKLIGHT_PWM, + GP_LCD_NIGHT_BACKLIGHT_EN, + GP_LCD_NIGHT_BACKLIGHT_PWM, + GP_I2C3_CRTOUCH_RESET, + GP_DA1_OUTA, + GP_DA1_OUTB, + GP_DB1_OUTA, + GP_DB1_OUTB, + GP_DA2_OUTA, + GP_DA2_OUTB, + GP_DB2_OUTA, + GP_DB2_OUTB, +}; + +static unsigned short gpios_out_high[] = { + GP_ECSPI1_NOR_CS, /* SS1 of spi nor */ + GP_I2C3_CRTOUCH_WAKE, +}; + +static unsigned short gpios_in[] = { + GP_USBH1_FP_OC, + GP_GPIOLEDS_1, + GP_GPIOLEDS_2, + GP_GPIOKEYS_MENU, + GP_GPIOKEYS_HOME, + GP_GPIOKEYS_PB1_I, + GP_GPIOKEYS_PB2_I, + GP_TX, + GP_RX, + GP_HEATER_FAULT, + GP_TP5, + GP_TP6, + GP_TP71, + GP_TP72, + GP_TP74, + GP_TP75, + GP_TP76, + GP_TP78, + GP_TP79, + GP_I2C3_CRTOUCH, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned short *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + + SETUP_IOMUX_PADS(cob_pads); +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + int i; + struct i2c_pads_info *p = i2c_pads + i2c_get_info_entry_offset(); + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + for (i = 0; i < 3; i++) { + setup_i2c(i, CONFIG_SYS_I2C_SPEED, 0x7f, p); + p += I2C_PADS_INFO_ENTRY_SPACING; + } + return 0; +} + + +int checkboard(void) +{ + puts("Board: Cob\n"); + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; +}; + +static struct button_key const buttons[] = { + {"home", GP_GPIOKEYS_HOME, 'H'}, + {"menu", GP_GPIOKEYS_MENU, 'M'}, +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + if (!gpio_get_value(buttons[i].gpnum)) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +#ifdef CONFIG_PREBOOT +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} +#endif + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + {"mmc0", MAKE_CFGVAL(0x60, 0x58, 0x00, 0x00)}, /* 8-bit eMMC */ + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_PREBOOT + preboot_keys(); +#endif + +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + unsigned char mac[8]; + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "cob"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + imx_get_mac_from_fuse(0, mac); + if (is_valid_ether_addr(mac)) { + if (!getenv("ethaddr")) + eth_setenv_enetaddr("ethaddr", mac); + } + return 0; +} diff --git a/board/boundary/cob/cob.cfg b/board/boundary/cob/cob.cfg new file mode 100644 index 0000000..7115e84 --- /dev/null +++ b/board/boundary/cob/cob.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "ddr-setup.cfg" +#include "1066mhz_4x128mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/cob/ddr-setup.cfg b/board/boundary/cob/ddr-setup.cfg new file mode 100644 index 0000000..04dffa7 --- /dev/null +++ b/board/boundary/cob/ddr-setup.cfg @@ -0,0 +1,96 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* + * DDR3 settings + * MX6Q ddr is limited to 1066 Mhz currently 1056 MHz(528 MHz clock), + * memory bus width: 64 bits x16/x32/x64 + * MX6DL ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 64 bits x16/x32/x64 + * MX6SOLO ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 32 bits x16/x32 + */ +DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030 + +DATA 4, MX6_IOM_GRP_B0DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B1DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B2DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B3DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B4DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B5DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B6DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B7DS, 0x00000030 +DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030 +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ +DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030 + +DATA 4, MX6_IOM_DRAM_DQM0, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM1, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM2, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM3, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM4, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM5, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM6, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM7, 0x00020030 + +DATA 4, MX6_IOM_DRAM_CAS, 0x00020030 +DATA 4, MX6_IOM_DRAM_RAS, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00020030 + +DATA 4, MX6_IOM_DRAM_RESET, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 +DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00003000 + +DATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030 +DATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030 + +/* (differential input) */ +DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000 +/* (differential input) */ +DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000 +/* disable ddr pullups */ +DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000 +DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000 +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ +DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000 + +/* Read data DQ Byte0-3 delay */ +DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333 + +/* + * MDMISC mirroring-off interleaved (row/bank/col) + */ +DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740 + +/* + * MDSCR con_req + */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 diff --git a/board/boundary/dash/Kconfig b/board/boundary/dash/Kconfig new file mode 100644 index 0000000..6515b5c --- /dev/null +++ b/board/boundary/dash/Kconfig @@ -0,0 +1,18 @@ +if TARGET_DASH + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "dash" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "dash" + +endif diff --git a/board/boundary/dash/MAINTAINERS b/board/boundary/dash/MAINTAINERS new file mode 100644 index 0000000..02970c8 --- /dev/null +++ b/board/boundary/dash/MAINTAINERS @@ -0,0 +1,7 @@ +DASH BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/dash/ +F: include/configs/dash.h +F: configs/dash_defconfig + diff --git a/board/boundary/dash/Makefile b/board/boundary/dash/Makefile new file mode 100644 index 0000000..7456626 --- /dev/null +++ b/board/boundary/dash/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := dash.o diff --git a/board/boundary/dash/dash.c b/board/boundary/dash/dash.c new file mode 100644 index 0000000..dd723ed --- /dev/null +++ b/board/boundary/dash/dash.c @@ -0,0 +1,551 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +static iomux_v3_cfg_t const init_pads[] = { + /* wl1271 pads */ +#define WL12XX_WL_IRQ_GP IMX_GPIO_NR(6, 14) + NEW_PAD_CTRL(MX6_PAD_NANDF_CS1__GPIO6_IO14, WEAK_PULLDOWN), + /* WL12XX_WL_ENABLE_GP */ + NEW_PAD_CTRL(MX6_PAD_NANDF_CS2__GPIO6_IO15, OUTPUT_40OHM), + /* WL12XX_BT_ENABLE_GP */ + NEW_PAD_CTRL(MX6_PAD_NANDF_CS3__GPIO6_IO16, OUTPUT_40OHM), + /* USB otg power */ + NEW_PAD_CTRL(MX6_PAD_EIM_D22__GPIO3_IO22, OUTPUT_40OHM), + NEW_PAD_CTRL(MX6_PAD_NANDF_D5__GPIO2_IO05, OUTPUT_40OHM), + NEW_PAD_CTRL(MX6_PAD_NANDF_WP_B__GPIO6_IO09, OUTPUT_40OHM), + NEW_PAD_CTRL(MX6_PAD_GPIO_8__GPIO1_IO08, OUTPUT_40OHM), + NEW_PAD_CTRL(MX6_PAD_GPIO_6__GPIO1_IO06, OUTPUT_40OHM), + + /* Backlight on LVDS connector: J6 */ + MX6_PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL), +#define LVDS_BACKLIGHT_GP IMX_GPIO_NR(1, 18) + MX6_PAD_EIM_DA2__GPIO3_IO02 | MUX_PAD_CTRL(WEAK_PULLUP), /* LVDS_BCKLT_EN */ + MX6_PAD_EIM_DA1__GPIO3_IO01 | MUX_PAD_CTRL(WEAK_PULLUP), /* LVDS_PWR_EN */ +}; + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); + + return 0; +} + +static iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +/* #define CONFIG_SILENT_UART */ +static iomux_v3_cfg_t const uart2_pads[] = { +#ifndef CONFIG_SILENT_UART + MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +#else + MX6_PAD_EIM_D26__GPIO3_IO26 | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_EIM_D27__GPIO3_IO27 | MUX_PAD_CTRL(UART_PAD_CTRL), +#endif +}; + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +/* I2C1, ISL1208 RTC */ +static struct i2c_pads_info i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}; + +/* I2C2, MPU-9150, BH1780GLI */ +static struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}; + +/* I2C3, J15 - LVDS EDID on J4 */ +static struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC, + .gp = IMX_GPIO_NR(7, 11) + } +}; + +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +static iomux_v3_cfg_t const misc_pads[] = { + MX6_PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_KEY_COL4__USB_OTG_OC | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_EIM_D30__USB_H1_OC | MUX_PAD_CTRL(WEAK_PULLUP), + /* OTG Power enable */ + MX6_PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(OUTPUT_40OHM), +}; + +/* wl1271 pads on nitrogen6x */ +static iomux_v3_cfg_t const wl12xx_pads[] = { + (MX6_PAD_NANDF_CS1__GPIO6_IO14 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(WEAK_PULLDOWN), + (MX6_PAD_NANDF_CS2__GPIO6_IO15 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), + (MX6_PAD_NANDF_CS3__GPIO6_IO16 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), +}; +#define WL12XX_WL_IRQ_GP IMX_GPIO_NR(6, 14) +#define WL12XX_WL_ENABLE_GP IMX_GPIO_NR(6, 15) +#define WL12XX_BT_ENABLE_GP IMX_GPIO_NR(6, 16) + +/* Button assignments for J14 */ +static iomux_v3_cfg_t const button_pads[] = { + /* Menu */ + MX6_PAD_NANDF_D1__GPIO2_IO01 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Back */ + MX6_PAD_NANDF_D2__GPIO2_IO02 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Labelled Search (mapped to Power under Android) */ + MX6_PAD_NANDF_D3__GPIO2_IO03 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Home */ + MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Volume Down */ + MX6_PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Volume Up */ + MX6_PAD_GPIO_18__GPIO7_IO13 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usb_pads[] = { + MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); + imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); + + /* Reset USB hub */ + gpio_direction_output(IMX_GPIO_NR(7, 12), 0); + mdelay(2); + gpio_set_value(IMX_GPIO_NR(7, 12), 1); + + return 0; +} + +int board_ehci_power(int port, int on) +{ + if (port) + return 0; + gpio_set_value(GP_USB_OTG_PWR, on); + return 0; +} + +#endif + +int board_mmc_getcd(struct mmc *mmc) +{ + int gp_cd = IMX_GPIO_NR(2, 6); + + gpio_direction_input(gp_cd); + return !gpio_get_value(gp_cd); +} + +static struct fsl_esdhc_cfg usdhc_cfg = {0}; + +int board_mmc_init(bd_t *bis) +{ + usdhc_cfg.esdhc_base = USDHC4_BASE_ADDR; + usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + usdhc_cfg.max_bus_width = 4; + + imx_iomux_v3_setup_multiple_pads( + usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + + return fsl_esdhc_initialize(bis, &usdhc_cfg); +} + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -1; +} + +static iomux_v3_cfg_t const ecspi1_pads[] = { + /* SS1 */ + MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; + +static void setup_spi(void) +{ + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, + ARRAY_SIZE(ecspi1_pads)); +} +#endif + +int board_eth_init(bd_t *bis) +{ + /* For otg ethernet*/ + usb_eth_initialize(bis); + + return 0; +} + + +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) { + return -1; + } + + env_loadsplash = getenv("loadsplash"); + if (env_loadsplash == NULL) { + printf("Environment variable loadsplash not found!\n"); + return -1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("failed to run loadsplash %s\n\n", env_loadsplash); + return -1; + } + + return 0; +} + +static void setup_buttons(void) +{ + imx_iomux_v3_setup_multiple_pads(button_pads, + ARRAY_SIZE(button_pads)); +} + +void board_enable_lvds(const struct display_info_t *di) +{ + gpio_direction_output(LVDS_BACKLIGHT_GP, 1); +} + +const struct display_info_t displays[] = { + IMX_VD_WXGA_J(LVDS, 0, 0), + IMX_VD_WXGA(LVDS, 0, 0), + IMX_VD04_HANNSTAR(LVDS, 1, 2), + IMX_VD04_LG9_7(LVDS, 0, 2), + IMX_VD38_WSVGA(LVDS, 1, 2), +}; + +size_t display_count = ARRAY_SIZE(displays); + +int board_cfb_skip(void) +{ + return NULL != getenv("novideo"); +} + +static unsigned gpios_out_low[] = { + /* Disable wl1271 */ + IMX_GPIO_NR(6, 15), /* disable wireless */ + IMX_GPIO_NR(6, 16), /* disable bluetooth */ + IMX_GPIO_NR(3, 22), /* disable USB otg power */ +}; + +static unsigned short gpios_in[] = { + LVDS_BACKLIGHT_GP, + WL12XX_WL_IRQ_GP, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + + imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads)); + setup_buttons(); + +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + imx_iomux_v3_setup_multiple_pads(misc_pads, ARRAY_SIZE(misc_pads)); + imx_iomux_v3_setup_multiple_pads(wl12xx_pads, ARRAY_SIZE(wl12xx_pads)); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_MXC_SPI + setup_spi(); +#endif + imx_iomux_v3_setup_multiple_pads( + usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + +#ifdef CONFIG_CMD_SATA + setup_sata(); +#endif + + return 0; +} + +int checkboard(void) +{ + puts("Board: DASH\n"); + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; +}; + +static struct button_key const buttons[] = { + {"back", IMX_GPIO_NR(2, 2), 'B'}, + {"home", IMX_GPIO_NR(2, 4), 'H'}, + {"menu", IMX_GPIO_NR(2, 1), 'M'}, + {"search", IMX_GPIO_NR(2, 3), 'S'}, + {"volup", IMX_GPIO_NR(7, 13), 'V'}, + {"voldown", IMX_GPIO_NR(4, 5), 'v'}, +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + if (!gpio_get_value(buttons[i].gpnum)) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +#ifdef CONFIG_PREBOOT +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} +#endif + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_PREBOOT + preboot_keys(); +#endif + +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "dash"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/eo/Kconfig b/board/boundary/eo/Kconfig new file mode 100644 index 0000000..76a1bf8 --- /dev/null +++ b/board/boundary/eo/Kconfig @@ -0,0 +1,18 @@ +if TARGET_EO + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "eo" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "eo" + +endif diff --git a/board/boundary/eo/MAINTAINERS b/board/boundary/eo/MAINTAINERS new file mode 100644 index 0000000..d1d71e3 --- /dev/null +++ b/board/boundary/eo/MAINTAINERS @@ -0,0 +1,6 @@ +EO BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/eo/ +F: include/configs/eo.h +F: configs/eo_defconfig diff --git a/board/boundary/eo/Makefile b/board/boundary/eo/Makefile new file mode 100644 index 0000000..c8888d9 --- /dev/null +++ b/board/boundary/eo/Makefile @@ -0,0 +1,6 @@ +# +# Copyright (C) 2014, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# +obj-y := eo.o diff --git a/board/boundary/eo/eo.c b/board/boundary/eo/eo.c new file mode 100644 index 0000000..0e82489 --- /dev/null +++ b/board/boundary/eo/eo.c @@ -0,0 +1,760 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2014, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define USDHC_CLK_PAD_CTRL (PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (USDHC_CLK_PAD_CTRL | PAD_CTL_PUS_47K_UP) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDN_OUTPUT (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + + +#if defined(CONFIG_MX6QDL) +#define IOMUX_PAD_CTRL(name, ctrl) NEW_PAD_CTRL(MX6Q_PAD_##name, ctrl), \ + NEW_PAD_CTRL(MX6DL_PAD_##name, ctrl) +#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) +#define IOMUX_PAD_CTRL(name, ctrl) NEW_PAD_CTRL(MX6Q_PAD_##name, ctrl) +#else +#define IOMUX_PAD_CTRL(name, ctrl) NEW_PAD_CTRL(MX6DL_PAD_##name, ctrl) +#endif + +static const iomux_v3_cfg_t eo_pads[] = { + /* ECSPI1 pads */ + IOMUX_PAD_CTRL(EIM_D17__ECSPI1_MISO, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D18__ECSPI1_MOSI, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D16__ECSPI1_SCLK, SPI_PAD_CTRL), +#define GP_ECSPI1_NOR_CS IMX_GPIO_NR(3, 19) + IOMUX_PAD_CTRL(EIM_D19__GPIO3_IO19, WEAK_PULLUP), + + + /* ENET pads that don't change for PHY reset */ + IOMUX_PAD_CTRL(ENET_MDIO__ENET_MDIO, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(ENET_MDC__ENET_MDC, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TXC__RGMII_TXC, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TD0__RGMII_TD0, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TD1__RGMII_TD1, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TD2__RGMII_TD2, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TD3__RGMII_TD3, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TX_CTL__RGMII_TX_CTL, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(ENET_REF_CLK__ENET_TX_CLK, ENET_PAD_CTRL), + /* pin 42 PHY nRST */ +#define GP_ENET_PHY_RESET IMX_GPIO_NR(1, 27) + IOMUX_PAD_CTRL(ENET_RXD0__GPIO1_IO27, OUTPUT_40OHM), +#define GP_ENET_PHY_INT IMX_GPIO_NR(1, 28) + IOMUX_PAD_CTRL(ENET_TX_EN__GPIO1_IO28, WEAK_PULLUP), /* Micrel RGMII Phy Interrupt */ + + /* gpio_keys */ +#define GP_BUTTON1 IMX_GPIO_NR(3, 4) + IOMUX_PAD_CTRL(EIM_DA4__GPIO3_IO04, WEAK_PULLUP), +#define GP_BUTTON2 IMX_GPIO_NR(3, 3) + IOMUX_PAD_CTRL(EIM_DA3__GPIO3_IO03, WEAK_PULLUP), +#define GP_BUTTON3 IMX_GPIO_NR(3, 2) + IOMUX_PAD_CTRL(EIM_DA2__GPIO3_IO02, WEAK_PULLUP), +#define GP_BUTTON4 IMX_GPIO_NR(3, 1) + IOMUX_PAD_CTRL(EIM_DA1__GPIO3_IO01, WEAK_PULLUP), +#define GP_BUTTON5 IMX_GPIO_NR(3, 0) + IOMUX_PAD_CTRL(EIM_DA0__GPIO3_IO00, WEAK_PULLUP), + +#define GP_POE_GP1 IMX_GPIO_NR(3, 6) + IOMUX_PAD_CTRL(EIM_DA6__GPIO3_IO06, WEAK_PULLUP), +#define GP_POE_GP2 IMX_GPIO_NR(3, 7) + IOMUX_PAD_CTRL(EIM_DA7__GPIO3_IO07, WEAK_PULLUP), +#define GP_TP71 IMX_GPIO_NR(1, 30) + IOMUX_PAD_CTRL(ENET_TXD0__GPIO1_IO30, WEAK_PULLUP), + + /* I2C1 - rv4162(rtc), */ + + /* I2C2 - J12(touch connector), */ +#define GP_I2C2_TOUCH_IRQ IMX_GPIO_NR(1, 9) + IOMUX_PAD_CTRL(GPIO_9__GPIO1_IO09, WEAK_PULLUP), + + /* I2C3 - pcie, MPR21 cap touch, MMA8652(accelerometer) */ +#define GP_I2C3_PCIE_EN IMX_GPIO_NR(2, 25) + IOMUX_PAD_CTRL(EIM_OE__GPIO2_IO25, WEAK_PULLUP), +#define GP_CAP_TOUCH_IRQ IMX_GPIO_NR(3, 14) + IOMUX_PAD_CTRL(EIM_DA14__GPIO3_IO14, WEAK_PULLUP), +#define GP_ACC_INT1 IMX_GPIO_NR(1, 2) + IOMUX_PAD_CTRL(GPIO_2__GPIO1_IO02, WEAK_PULLUP), +#define GP_ACC_INT2 IMX_GPIO_NR(1, 4) + IOMUX_PAD_CTRL(GPIO_4__GPIO1_IO04, WEAK_PULLUP), + + + /* LVDS, J6 */ +#define GP_LVDS_EN IMX_GPIO_NR(4, 5) + IOMUX_PAD_CTRL(GPIO_19__GPIO4_IO05, WEAK_PULLUP), /* J6 - pin 7, DISP0_CONTRAST */ + + /* PWM1 - AD5211 pwm input for J58 backlight */ +#define GP_LVDS_BACKLIGHT IMX_GPIO_NR(1, 21) + IOMUX_PAD_CTRL(SD1_DAT3__GPIO1_IO21, OUTPUT_40OHM), + + /* PCIe */ +#define GP_PCIE_RESET IMX_GPIO_NR(6, 31) + IOMUX_PAD_CTRL(EIM_BCLK__GPIO6_IO31, WEAK_PULLDN_OUTPUT), + + /* rtc */ +#define GP_RTC_RV4162_IRQ IMX_GPIO_NR(4, 6) + IOMUX_PAD_CTRL(KEY_COL0__GPIO4_IO06, WEAK_PULLUP), + + /* UART1 */ + IOMUX_PAD_CTRL(SD3_DAT7__UART1_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT6__UART1_RX_DATA, UART_PAD_CTRL), + + /* UART2 */ + IOMUX_PAD_CTRL(EIM_D26__UART2_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D27__UART2_RX_DATA, UART_PAD_CTRL), + + /* UART3 for wl1271 */ + IOMUX_PAD_CTRL(EIM_D24__UART3_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D25__UART3_RX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D23__UART3_CTS_B, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D31__UART3_RTS_B, UART_PAD_CTRL), + + /* USB OTG */ + IOMUX_PAD_CTRL(GPIO_1__USB_OTG_ID, WEAK_PULLUP), + IOMUX_PAD_CTRL(KEY_COL4__USB_OTG_OC, WEAK_PULLUP), +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) + IOMUX_PAD_CTRL(EIM_D22__GPIO3_IO22, WEAK_PULLDN_OUTPUT), + + /* USDHC2 - TiWi wl1271 pads */ + IOMUX_PAD_CTRL(SD2_CLK__SD2_CLK, USDHC_CLK_PAD_CTRL), + IOMUX_PAD_CTRL(SD2_CMD__SD2_CMD, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD2_DAT0__SD2_DATA0, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD2_DAT1__SD2_DATA1, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD2_DAT2__SD2_DATA2, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD2_DAT3__SD2_DATA3, USDHC_PAD_CTRL), +#define GP_WL12XX_WL_IRQ IMX_GPIO_NR(6, 11) + IOMUX_PAD_CTRL(NANDF_CS0__GPIO6_IO11, WEAK_PULLDN), +#define GP_WL12XX_WL_ENABLE IMX_GPIO_NR(6, 15) + IOMUX_PAD_CTRL(NANDF_CS2__GPIO6_IO15, OUTPUT_40OHM), +#define GP_WL12XX_BT_ENABLE IMX_GPIO_NR(6, 16) + IOMUX_PAD_CTRL(NANDF_CS3__GPIO6_IO16, OUTPUT_40OHM), +// IOMUX_PAD_CTRL(SD1_CLK__OSC32K_32K_OUT, OUTPUT_40OHM), /* slow clock */ + + /* USDHC3 - micro SD card */ + IOMUX_PAD_CTRL(SD3_CLK__SD3_CLK, USDHC_CLK_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_CMD__SD3_CMD, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT0__SD3_DATA0, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT1__SD3_DATA1, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT2__SD3_DATA2, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT3__SD3_DATA3, USDHC_PAD_CTRL), +#define GP_SD3_CD IMX_GPIO_NR(7, 0) + IOMUX_PAD_CTRL(SD3_DAT5__GPIO7_IO00, WEAK_PULLUP), + + /* USDHC4 - eMMC */ + IOMUX_PAD_CTRL(SD4_CLK__SD4_CLK, USDHC_CLK_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_CMD__SD4_CMD, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT0__SD4_DATA0, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT1__SD4_DATA1, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT2__SD4_DATA2, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT3__SD4_DATA3, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT4__SD4_DATA4, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT5__SD4_DATA5, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT6__SD4_DATA6, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT7__SD4_DATA7, USDHC_PAD_CTRL), +#define GP_EMMC_RESET IMX_GPIO_NR(2, 6) + IOMUX_PAD_CTRL(NANDF_D6__GPIO2_IO06, WEAK_PULLUP), +}; + +static const iomux_v3_cfg_t enet_pads1[] = { + /* pin 35 - 1 (PHY_AD2) on reset */ + IOMUX_PAD_CTRL(RGMII_RXC__GPIO6_IO30, OUTPUT_40OHM), + /* pin 32 - 1 - (MODE0) all */ + IOMUX_PAD_CTRL(RGMII_RD0__GPIO6_IO25, OUTPUT_40OHM), + /* pin 31 - 1 - (MODE1) all */ + IOMUX_PAD_CTRL(RGMII_RD1__GPIO6_IO27, OUTPUT_40OHM), + /* pin 28 - 1 - (MODE2) all */ + IOMUX_PAD_CTRL(RGMII_RD2__GPIO6_IO28, OUTPUT_40OHM), + /* pin 27 - 1 - (MODE3) all */ + IOMUX_PAD_CTRL(RGMII_RD3__GPIO6_IO29, OUTPUT_40OHM), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + IOMUX_PAD_CTRL(RGMII_RX_CTL__GPIO6_IO24, OUTPUT_40OHM), +}; + +static const iomux_v3_cfg_t enet_pads2[] = { + IOMUX_PAD_CTRL(RGMII_RXC__RGMII_RXC, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RD0__RGMII_RD0, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RD1__RGMII_RD1, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RD2__RGMII_RD2, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RD3__RGMII_RD3, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RX_CTL__RGMII_RX_CTL, ENET_PAD_CTRL), +}; + +/* + * + */ +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +static struct i2c_pads_info i2c_pads[] = { +{ + /* I2C1, rv4162 */ + .scl = { + .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6Q_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6Q_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}, { + /* I2C1, rv4162 */ + .scl = { + .i2c_mode = MX6DL_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6DL_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6DL_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6DL_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}, { + /* I2C2 Camera, MIPI */ + .scl = { + .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}, { + /* I2C2 Camera, MIPI */ + .scl = { + .i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}, { + /* I2C3, J15 - RGB connector */ + .scl = { + .i2c_mode = MX6Q_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6Q_PAD_GPIO_5__GPIO1_IO05 | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6Q_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6Q_PAD_GPIO_16__GPIO7_IO11 | PC, + .gp = IMX_GPIO_NR(7, 11) + } +}, { + /* I2C3, J15 - RGB connector */ + .scl = { + .i2c_mode = MX6DL_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6DL_PAD_GPIO_5__GPIO1_IO05 | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6DL_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6DL_PAD_GPIO_16__GPIO7_IO11 | PC, + .gp = IMX_GPIO_NR(7, 11) + } +}}; + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); +// printf("%s:%p *%p=0x%lx\n", __func__, gd, &gd->ram_size, gd->ram_size); + return 0; +} + +static void setup_iomux_enet(void) +{ + gpio_direction_output(GP_ENET_PHY_RESET, 0); /* PHY rst */ + gpio_direction_output(IMX_GPIO_NR(6, 30), 1); + gpio_direction_output(IMX_GPIO_NR(6, 25), 1); + gpio_direction_output(IMX_GPIO_NR(6, 27), 1); + gpio_direction_output(IMX_GPIO_NR(6, 28), 1); + gpio_direction_output(IMX_GPIO_NR(6, 29), 1); + SETUP_IOMUX_PADS(enet_pads1); + gpio_direction_output(IMX_GPIO_NR(6, 24), 1); + + /* Need delay 10ms according to KSZ9021 spec */ + udelay(1000 * 10); + gpio_set_value(GP_ENET_PHY_RESET, 1); /* PHY reset */ + + SETUP_IOMUX_PADS(enet_pads2); + udelay(100); /* Wait 100 us before using mii interface */ +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + return 0; +} + +int board_ehci_power(int port, int on) +{ + if (port) + return 0; + gpio_set_value(GP_USB_OTG_PWR, on); + return 0; +} + +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {.esdhc_base = USDHC3_BASE_ADDR, .max_bus_width = 4}, + {.esdhc_base = USDHC4_BASE_ADDR, .max_bus_width = 8}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int gp_cd = GP_SD3_CD; + + if (cfg->esdhc_base != USDHC3_BASE_ADDR) + return 1; /* eMMC always present */ + gpio_direction_input(gp_cd); + return !gpio_get_value(gp_cd); +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + break; + case 1: + gpio_set_value(GP_EMMC_RESET, 1); /* release reset */ + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + int gp = (bus == 0 && cs == 0) ? GP_ECSPI1_NOR_CS : -1; + return gp; +} +#endif + +int board_phy_config(struct phy_device *phydev) +{ + /* min rx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0); + /* min tx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0); + /* max rx/tx clock delay, min rx/tx control */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0); + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + +#ifdef CONFIG_FEC_MXC + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + /* scan phy 4,5,6,7 */ + phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } +#endif + +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + + +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) { + return -1; + } + + env_loadsplash = getenv("loadsplash"); + if (env_loadsplash == NULL) { + printf("Environment variable loadsplash not found!\n"); + return -1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("failed to run loadsplash %s\n\n", env_loadsplash); + return -1; + } + + return 0; +} + +#if defined(CONFIG_VIDEO_IPUV3) + +void board_enable_lvds(const struct display_info_t *di) +{ + gpio_direction_output(GP_LVDS_BACKLIGHT, 1); +} + +const struct display_info_t displays[] = { + /* uses both lvds connectors */ + IMX_VD_1080P60(LVDS, 0, 0), +}; + +size_t display_count = ARRAY_SIZE(displays); + +int board_cfb_skip(void) +{ + return NULL != getenv("novideo"); +} +#endif + + +static unsigned short gpios_out_low[] = { + GP_ENET_PHY_RESET, + GP_I2C3_PCIE_EN, + GP_LVDS_EN, + GP_LVDS_BACKLIGHT, + GP_PCIE_RESET, + GP_USB_OTG_PWR, /* disable USB otg power */ + GP_WL12XX_WL_ENABLE, /* disable wireless */ + GP_WL12XX_BT_ENABLE, /* disable bluetooth */ + GP_EMMC_RESET, /* hold in reset */ +}; + +static unsigned short gpios_out_high[] = { + GP_ECSPI1_NOR_CS, /* SS1 of spi nor */ +}; + +static unsigned short gpios_in[] = { + GP_ENET_PHY_INT, + GP_BUTTON1, + GP_BUTTON2, + GP_BUTTON3, + GP_BUTTON4, + GP_BUTTON5, + GP_POE_GP1, + GP_POE_GP2, + GP_TP71, + GP_I2C2_TOUCH_IRQ, + GP_CAP_TOUCH_IRQ, + GP_ACC_INT1, + GP_ACC_INT2, + GP_RTC_RV4162_IRQ, + GP_WL12XX_WL_IRQ, + GP_SD3_CD, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned short *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + + SETUP_IOMUX_PADS(eo_pads); +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + int i; + int cpu = get_cpu_type(); + int start = ((cpu == MXC_CPU_MX6Q) | (cpu == MXC_CPU_MX6D)) ? 0 : 1; + struct i2c_pads_info *p = i2c_pads + start; + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + for (i=0; i < ARRAY_SIZE(i2c_pads); i+= 2) + setup_i2c(i/2, CONFIG_SYS_I2C_SPEED, 0x7f, p+i); + return 0; +} + + +int checkboard(void) +{ + puts("Board: EO\n"); + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; +}; + +static struct button_key const buttons[] = { + {"b1", GP_BUTTON1, '1'}, + {"b2", GP_BUTTON2, '2'}, + {"b3", GP_BUTTON3, '3'}, + {"b4", GP_BUTTON4, '4'}, + {"b5", GP_BUTTON5, '5'}, +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + if (!gpio_get_value(buttons[i].gpnum)) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +#ifdef CONFIG_PREBOOT +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} +#endif + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_PREBOOT + preboot_keys(); +#endif + +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +/* RV4162 particulars */ +#define RTC_I2CADDR 0x68 +#define RTC_YEAR 7 +#define RTC_MON 6 +#define RTC_DAY 5 +#define RTC_HOUR 3 +#define RTC_MIN 2 +#define RTC_SEC 1 + +static int frombcd(u8 val) +{ + return (10*(val>>4))+(val&0x0f); +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "eo"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + + /* display date and time from RTC */ + if ((0 == i2c_set_bus_num(0)) + && + (0 == i2c_probe(RTC_I2CADDR))) { + u8 buffer[16]; + int ret = i2c_read(RTC_I2CADDR, 0, 1, buffer, sizeof(buffer)); + if (ret) + printf("Error %d reading RTC\n", ret); + else + printf("time: %04u-%02u-%02u %02u:%02u:%02u UTC\n", + 2000+frombcd(buffer[RTC_YEAR]), + frombcd(buffer[RTC_MON]&0x1f), + frombcd(buffer[RTC_DAY]), + frombcd(buffer[RTC_HOUR]), + frombcd(buffer[RTC_MIN]), + frombcd(buffer[RTC_SEC])); + } + return 0; +} diff --git a/board/boundary/eo/eo.cfg b/board/boundary/eo/eo.cfg new file mode 100644 index 0000000..8c60737 --- /dev/null +++ b/board/boundary/eo/eo.cfg @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2014 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#define CONFIG_MX6Q +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "../nitrogen6_max/ddr-setup.cfg" +#include "../nitrogen6x/1066mhz_4x128mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/h/6x_bootscript.txt b/board/boundary/h/6x_bootscript.txt new file mode 100644 index 0000000..3d6c434 --- /dev/null +++ b/board/boundary/h/6x_bootscript.txt @@ -0,0 +1,19 @@ +setenv bootargs enable_wait_mode=off ldb=sep0 +setenv nextcon 0; +setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 +setenv nextcon 1 +setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,INNOLUX-WVGA,if=RGB666 +setenv nextcon 2 +setenv fbmem "fbmem=28M,10M"; + +while test "4" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +setenv bootargs $bootargs $fbmem +setenv bootargs $bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 +${fs}load ${dtype} ${disk}:1 10800000 /boot/uImage +&& ${fs}load ${dtype} ${disk}:1 12800000 /boot/uramdisk.img +&& bootm 10800000 12800000 ; +echo "Error loading kernel image" diff --git a/board/boundary/h/Kconfig b/board/boundary/h/Kconfig new file mode 100644 index 0000000..cb8d14e --- /dev/null +++ b/board/boundary/h/Kconfig @@ -0,0 +1,18 @@ +if TARGET_H + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "h" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "h" + +endif diff --git a/board/boundary/h/MAINTAINERS b/board/boundary/h/MAINTAINERS new file mode 100644 index 0000000..4a948e5 --- /dev/null +++ b/board/boundary/h/MAINTAINERS @@ -0,0 +1,8 @@ +H BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/h/ +F: include/configs/h.h +F: configs/hsolo1g_defconfig +F: configs/hquad2g_defconfig + diff --git a/board/boundary/h/Makefile b/board/boundary/h/Makefile new file mode 100644 index 0000000..0e64fd4 --- /dev/null +++ b/board/boundary/h/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := h.o diff --git a/board/boundary/h/h.c b/board/boundary/h/h.c new file mode 100644 index 0000000..7d66fdf --- /dev/null +++ b/board/boundary/h/h.c @@ -0,0 +1,607 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDOWN (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); + + return 0; +} + +static iomux_v3_cfg_t const uart1_pads[] = { + NEW_PAD_CTRL(MX6_PAD_SD3_DAT6__UART1_RX_DATA, UART_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_SD3_DAT7__UART1_TX_DATA, UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const uart2_pads[] = { + NEW_PAD_CTRL(MX6_PAD_EIM_D26__UART2_TX_DATA, UART_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_EIM_D27__UART2_RX_DATA, UART_PAD_CTRL), +}; + +#define PC(a) NEW_PAD_CTRL(a, I2C_PAD_CTRL) + +/* I2C1, SGTL5000 */ +static struct i2c_pads_info i2c_pad_info0 = { + .scl = { + .i2c_mode = PC(MX6_PAD_EIM_D21__I2C1_SCL), + .gpio_mode = PC(MX6_PAD_EIM_D21__GPIO3_IO21), + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = PC(MX6_PAD_EIM_D28__I2C1_SDA), + .gpio_mode = PC(MX6_PAD_EIM_D28__GPIO3_IO28), + .gp = IMX_GPIO_NR(3, 28) + } +}; + +/* I2C3, J15 - RGB connector */ +static struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = PC(MX6_PAD_GPIO_5__I2C3_SCL), + .gpio_mode = PC(MX6_PAD_GPIO_5__GPIO1_IO05), + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = PC(MX6_PAD_GPIO_16__I2C3_SDA), + .gpio_mode = PC(MX6_PAD_GPIO_16__GPIO7_IO11), + .gp = IMX_GPIO_NR(7, 11) + } +}; + +#define GP_SD3_CD IMX_GPIO_NR(7, 0) + +static iomux_v3_cfg_t const usdhc3_pads[] = { + NEW_PAD_CTRL(MX6_PAD_SD3_CLK__SD3_CLK, USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_SD3_CMD__SD3_CMD, USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_SD3_DAT0__SD3_DATA0, USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_SD3_DAT1__SD3_DATA1, USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_SD3_DAT2__SD3_DATA2, USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_SD3_DAT3__SD3_DATA3, USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_SD3_DAT5__GPIO7_IO00, NO_PAD_CTRL), /* CD */ +}; + +#define GP_SD4_CD IMX_GPIO_NR(2, 6) + +static iomux_v3_cfg_t const usdhc4_pads[] = { + NEW_PAD_CTRL(MX6_PAD_SD4_CLK__SD4_CLK, USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_SD4_CMD__SD4_CMD, USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_SD4_DAT0__SD4_DATA0, USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_SD4_DAT1__SD4_DATA1, USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_SD4_DAT2__SD4_DATA2, USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_SD4_DAT3__SD4_DATA3, USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_NANDF_D6__GPIO2_IO06, NO_PAD_CTRL), /* CD */ +}; + +#define GP_PHY_AD2 IMX_GPIO_NR(6, 30) +#define GP_PHY_MODE0 IMX_GPIO_NR(6, 25) +#define GP_PHY_MODE1 IMX_GPIO_NR(6, 27) +#define GP_PHY_MODE2 IMX_GPIO_NR(6, 28) +#define GP_PHY_MODE3 IMX_GPIO_NR(6, 29) +#define GP_PHY_CLK125 IMX_GPIO_NR(6, 24) +#define GP_PHY_RESET IMX_GPIO_NR(1, 27) + +#ifdef CONFIG_FEC_MXC +static iomux_v3_cfg_t const enet_pads1[] = { + MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), + /* pin 35 - 1 (PHY_AD2) on reset */ + MX6_PAD_RGMII_RXC__GPIO6_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 32 - 1 - (MODE0) all */ + MX6_PAD_RGMII_RD0__GPIO6_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 31 - 1 - (MODE1) all */ + MX6_PAD_RGMII_RD1__GPIO6_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 28 - 1 - (MODE2) all */ + MX6_PAD_RGMII_RD2__GPIO6_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 27 - 1 - (MODE3) all */ + MX6_PAD_RGMII_RD3__GPIO6_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + MX6_PAD_RGMII_RX_CTL__GPIO6_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 42 PHY nRST */ + MX6_PAD_EIM_D23__GPIO3_IO23 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static iomux_v3_cfg_t const enet_pads2[] = { + MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), +}; +#endif + +/* Broadcom bcm4330 pads on nitrogen6x */ +static iomux_v3_cfg_t const init_pads[] = { + NEW_PAD_CTRL(MX6_PAD_NANDF_CLE__GPIO6_IO07, OUTPUT_40OHM), /* wlan regulator enable */ + NEW_PAD_CTRL(MX6_PAD_NANDF_CS1__GPIO6_IO14, WEAK_PULLDOWN), /* wlan wake irq */ + NEW_PAD_CTRL(MX6_PAD_NANDF_CS2__GPIO6_IO15, OUTPUT_40OHM), /* bt regulator enable */ + NEW_PAD_CTRL(MX6_PAD_NANDF_CS3__GPIO6_IO16, OUTPUT_40OHM), /* bt wake irq */ + NEW_PAD_CTRL(MX6_PAD_NANDF_D2__GPIO2_IO02, OUTPUT_40OHM), /* bt wake */ + NEW_PAD_CTRL(MX6_PAD_NANDF_ALE__GPIO6_IO08, OUTPUT_40OHM), /* bt reset */ + +#define GP_RGB_BACKLIGHT_PWM IMX_GPIO_NR(1, 21) + NEW_PAD_CTRL(MX6_PAD_SD1_DAT3__GPIO1_IO21, NO_PAD_CTRL), +#define GP_LVDS0_BACKLIGHT_PWM IMX_GPIO_NR(1, 18) + NEW_PAD_CTRL(MX6_PAD_SD1_CMD__GPIO1_IO18, NO_PAD_CTRL), +#define GP_LVDS1_BACKLIGHT_PWM IMX_GPIO_NR(1, 17) + NEW_PAD_CTRL(MX6_PAD_SD1_DAT1__GPIO1_IO17, NO_PAD_CTRL), +#define GP_RGB_MIRROR_H IMX_GPIO_NR(2, 25) + NEW_PAD_CTRL(MX6_PAD_EIM_OE__GPIO2_IO25, NO_PAD_CTRL), /* DI0 display left/right mirror */ +#define GP_RGB_MIRROR_V IMX_GPIO_NR(2, 27) + NEW_PAD_CTRL(MX6_PAD_EIM_LBA__GPIO2_IO27, NO_PAD_CTRL), /* DI0 display up/down mirror */ +#define GP_LVDS0_12V_5V_BL_SELECT IMX_GPIO_NR(4, 5) + NEW_PAD_CTRL(MX6_PAD_GPIO_19__GPIO4_IO05, WEAK_PULLDOWN), /* LVDS0 12v/5v select, 0 - 5v, 1 - 12v */ +#define GP_RGB_LVDS1_12V_5V_BL_SELECT IMX_GPIO_NR(1, 7) + NEW_PAD_CTRL(MX6_PAD_GPIO_7__GPIO1_IO07, WEAK_PULLDOWN), /* rgb/LVDS1 12v/5v select, 0 - 5v, 1 - 12v */ +#define GP_12V_POWER_EN IMX_GPIO_NR(4, 20) + NEW_PAD_CTRL(MX6_PAD_DI0_PIN4__GPIO4_IO20, WEAK_PULLDOWN), /* 12v power enable */ +}; + +#define GP_WL_EN IMX_GPIO_NR(6, 7) /* NANDF_CLE - active high */ +#define GP_WL_WAKE_IRQ IMX_GPIO_NR(6, 14) /* NANDF_CS1 - active low */ +#define GP_WL_BT_REG_EN IMX_GPIO_NR(6, 15) /* NANDF_CS2 - active high */ +#define GP_WL_BT_WAKE_IRQ IMX_GPIO_NR(6, 16) /* NANDF_CS3 - active low */ +#define GP_WL_BT_RESET IMX_GPIO_NR(6, 8) /* NANDF_ALE - active low */ +#define GP_WL_CLK_REQ_IRQ IMX_GPIO_NR(6, 9) /* NANDF_WP_B - active low */ + +static void setup_iomux_enet(void) +{ + gpio_direction_output(GP_PHY_RESET, 0); + gpio_direction_output(GP_PHY_AD2, 1); + gpio_direction_output(GP_PHY_MODE0, 1); + gpio_direction_output(GP_PHY_MODE1, 1); + gpio_direction_output(GP_PHY_MODE2, 1); + gpio_direction_output(GP_PHY_MODE3, 1); + imx_iomux_v3_setup_multiple_pads(enet_pads1, ARRAY_SIZE(enet_pads1)); + gpio_direction_output(GP_PHY_CLK125, 1); + + /* Need delay 10ms according to KSZ9021 spec */ + udelay(1000 * 10); + gpio_set_value(GP_PHY_RESET, 1); + imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2)); +} + +#define GP_USB_HUB_RESET IMX_GPIO_NR(7, 12) + +static iomux_v3_cfg_t const usb_pads[] = { + NEW_PAD_CTRL(MX6_PAD_GPIO_17__GPIO7_IO12, WEAK_PULLUP), /* Hub reset */ + NEW_PAD_CTRL(MX6_PAD_GPIO_1__USB_OTG_ID, USDHC_PAD_CTRL), /* USBOTG ID pin */ + NEW_PAD_CTRL(MX6_PAD_EIM_D22__GPIO3_IO22, WEAK_PULLUP), /* usbotg power */ + MX6_PAD_KEY_COL4__USB_OTG_OC, /* USBOTG OC pin */ + NEW_PAD_CTRL(MX6_PAD_EIM_RW__GPIO2_IO26, WEAK_PULLUP), /* Rev1 usb power */ + NEW_PAD_CTRL(MX6_PAD_EIM_D20__GPIO3_IO20, WEAK_PULLUP), /* Rev1 usb power */ + NEW_PAD_CTRL(MX6_PAD_EIM_A25__GPIO5_IO02, WEAK_PULLUP), /* Rev1 usb power */ +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); + imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); + + /* Reset USB hub */ + gpio_direction_output(GP_USB_HUB_RESET, 0); + mdelay(2); + gpio_set_value(GP_USB_HUB_RESET, 1); + + return 0; +} +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC3_BASE_ADDR}, + {USDHC4_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int gp = (cfg->esdhc_base == USDHC3_BASE_ADDR) ? GP_SD3_CD : GP_SD4_CD; + + gpio_direction_input(gp); + return !gpio_get_value(gp); +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].max_bus_width = 8; + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + break; + case 1: + imx_iomux_v3_setup_multiple_pads( + usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -1; +} + +static iomux_v3_cfg_t const ecspi1_pads[] = { + /* SS1 */ + NEW_PAD_CTRL(MX6_PAD_EIM_D19__GPIO3_IO19, SPI_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_EIM_D17__ECSPI1_MISO, SPI_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_EIM_D18__ECSPI1_MOSI, SPI_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_EIM_D16__ECSPI1_SCLK, SPI_PAD_CTRL), +}; + +static void setup_spi(void) +{ + gpio_direction_output(CONFIG_SF_DEFAULT_CS, 1); + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, + ARRAY_SIZE(ecspi1_pads)); +} +#endif + +int board_phy_config(struct phy_device *phydev) +{ + /* min rx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0); + /* min tx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0); + /* max rx/tx clock delay, min rx/tx control */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0); + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + +#ifdef CONFIG_FEC_MXC + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + /* scan phy 4,5,6,7 */ + phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } +#endif + +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + +#if defined(CONFIG_VIDEO_IPUV3) + +static iomux_v3_cfg_t const rgb_pads[] = { + MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, + MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15, + MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02, + MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03, + MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00, + MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01, + MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02, + MX6_PAD_DISP0_DAT3__IPU1_DISP0_DATA03, + MX6_PAD_DISP0_DAT4__IPU1_DISP0_DATA04, + MX6_PAD_DISP0_DAT5__IPU1_DISP0_DATA05, + MX6_PAD_DISP0_DAT6__IPU1_DISP0_DATA06, + MX6_PAD_DISP0_DAT7__IPU1_DISP0_DATA07, + MX6_PAD_DISP0_DAT8__IPU1_DISP0_DATA08, + MX6_PAD_DISP0_DAT9__IPU1_DISP0_DATA09, + MX6_PAD_DISP0_DAT10__IPU1_DISP0_DATA10, + MX6_PAD_DISP0_DAT11__IPU1_DISP0_DATA11, + MX6_PAD_DISP0_DAT12__IPU1_DISP0_DATA12, + MX6_PAD_DISP0_DAT13__IPU1_DISP0_DATA13, + MX6_PAD_DISP0_DAT14__IPU1_DISP0_DATA14, + MX6_PAD_DISP0_DAT15__IPU1_DISP0_DATA15, + MX6_PAD_DISP0_DAT16__IPU1_DISP0_DATA16, + MX6_PAD_DISP0_DAT17__IPU1_DISP0_DATA17, + MX6_PAD_DISP0_DAT18__IPU1_DISP0_DATA18, + MX6_PAD_DISP0_DAT19__IPU1_DISP0_DATA19, + MX6_PAD_DISP0_DAT20__IPU1_DISP0_DATA20, + MX6_PAD_DISP0_DAT21__IPU1_DISP0_DATA21, + MX6_PAD_DISP0_DAT22__IPU1_DISP0_DATA22, + MX6_PAD_DISP0_DAT23__IPU1_DISP0_DATA23, +}; + +void board_enable_lcd(const struct display_info_t *di) +{ + imx_iomux_v3_setup_multiple_pads(rgb_pads, ARRAY_SIZE(rgb_pads)); + gpio_direction_output(GP_RGB_BACKLIGHT_PWM, 1); +} + +void board_enable_lvds(const struct display_info_t *di) +{ + gpio_direction_output(GP_LVDS0_BACKLIGHT_PWM, 1); + gpio_direction_output(GP_LVDS1_BACKLIGHT_PWM, 0); +} + +void board_enable_lvds2(const struct display_info_t *di) +{ + gpio_direction_output(GP_LVDS0_BACKLIGHT_PWM, 0); + gpio_direction_output(GP_LVDS1_BACKLIGHT_PWM, 1); +} + +const struct display_info_t displays[] = { + IMX_VD04_1024_600(LVDS, 1, 2), + IMX_VD48_INNOLUX_WVGA(LVDS2, 1, 2), +}; + +size_t display_count = ARRAY_SIZE(displays); + +static void setup_display(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + int reg; + + reg = readl(&mxc_ccm->chsccdr); + reg &= ~(MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK | + MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK); + reg |= (CHSCCDR_PODF_DIVIDE_BY_3 << MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET) + |(CHSCCDR_IPU_PRE_CLK_540M_PFD << MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_OFFSET); + writel(reg, &mxc_ccm->chsccdr); +} +#endif + +static unsigned gpios_out_low[] = { + /* Disable wl1271 */ + GP_WL_EN, + GP_WL_BT_REG_EN, + GP_WL_BT_RESET, + GP_RGB_MIRROR_V, + GP_LVDS0_12V_5V_BL_SELECT, + GP_RGB_LVDS1_12V_5V_BL_SELECT, + GP_12V_POWER_EN, +}; + +static unsigned gpios_out_high[] = { + GP_RGB_MIRROR_H, +}; + +static unsigned short gpios_in[] = { + GP_WL_WAKE_IRQ, + GP_WL_BT_WAKE_IRQ, + GP_WL_CLK_REQ_IRQ, + GP_RGB_BACKLIGHT_PWM, + GP_LVDS0_BACKLIGHT_PWM, + GP_LVDS1_BACKLIGHT_PWM, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + + imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads)); + +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); + setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +#define GP_I2C_EN_MIPI IMX_GPIO_NR(2, 16) +#define GP_I2C_EN_LVDS0 IMX_GPIO_NR(2, 21) +#define GP_I2C_EN_LVDS1 IMX_GPIO_NR(2, 22) +#define GP_I2C_EN_RTC IMX_GPIO_NR(2, 23) +#define GP_I2C_EN_AR1020 IMX_GPIO_NR(7, 13) + +static iomux_v3_cfg_t const i2c_mux_pads[] = { + NEW_PAD_CTRL(MX6_PAD_EIM_A22__GPIO2_IO16, WEAK_PULLDOWN), /* mipi I2C enable */ + NEW_PAD_CTRL(MX6_PAD_EIM_A17__GPIO2_IO21, WEAK_PULLDOWN), /* LVDS0 I2C enable */ + NEW_PAD_CTRL(MX6_PAD_EIM_A16__GPIO2_IO22, WEAK_PULLDOWN), /* LVDS1 I2C enable */ + NEW_PAD_CTRL(MX6_PAD_EIM_CS0__GPIO2_IO23, WEAK_PULLDOWN), /* RTC I2C enable */ + NEW_PAD_CTRL(MX6_PAD_GPIO_18__GPIO7_IO13, WEAK_PULLDOWN), /* AR1020 I2C enable */ +}; + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_MXC_SPI + setup_spi(); +#endif + imx_iomux_v3_setup_multiple_pads(i2c_mux_pads, + ARRAY_SIZE(i2c_mux_pads)); + gpio_direction_output(GP_I2C_EN_MIPI, 0); + gpio_direction_output(GP_I2C_EN_LVDS0, 0); + gpio_direction_output(GP_I2C_EN_LVDS1, 0); + gpio_direction_output(GP_I2C_EN_RTC, 0); + gpio_direction_output(GP_I2C_EN_AR1020, 0); + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + +#ifdef CONFIG_CMD_SATA + setup_sata(); +#endif + + return 0; +} + +int checkboard(void) +{ + puts("Board: Boundary H\n"); + + return 0; +} + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "h"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/h/hquad2g.cfg b/board/boundary/h/hquad2g.cfg new file mode 100644 index 0000000..d462ca4 --- /dev/null +++ b/board/boundary/h/hquad2g.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "../nitrogen6x/ddr-setup.cfg" +#include "../nitrogen6x/1066mhz_4x256mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/h/hsolo1g.cfg b/board/boundary/h/hsolo1g.cfg new file mode 100644 index 0000000..008902b --- /dev/null +++ b/board/boundary/h/hsolo1g.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "../nitrogen6x/ddr-setup.cfg" +#include "../nitrogen6x/800mhz_2x256mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/insp/1066mhz_4x256mx16.cfg b/board/boundary/insp/1066mhz_4x256mx16.cfg new file mode 100644 index 0000000..475527f --- /dev/null +++ b/board/boundary/insp/1066mhz_4x256mx16.cfg @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 +DATA 4, MX6_MMDC_P0_MDCFG0, 0x898E7974 +DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64 +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB +DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 +DATA 4, MX6_MMDC_P0_MDOR, 0x008E1023 +DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040 +DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576 +DATA 4, MX6_MMDC_P0_MDASP, 0x00000047 +DATA 4, MX6_MMDC_P0_MDCTL, 0x841A0000 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00428031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x19308030 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P0_MDREF, 0x00007800 +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42740304 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x026e0265 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x02750306 +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x02720244 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x463d4041 +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x42413c47 +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x37414441 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x4633473b +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0025001f +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x00290027 +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x001f002b +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x000f0029 +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/boundary/insp/Kconfig b/board/boundary/insp/Kconfig new file mode 100644 index 0000000..8296e97 --- /dev/null +++ b/board/boundary/insp/Kconfig @@ -0,0 +1,18 @@ +if TARGET_INSP + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "insp" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "insp" + +endif diff --git a/board/boundary/insp/MAINTAINERS b/board/boundary/insp/MAINTAINERS new file mode 100644 index 0000000..3bb653e --- /dev/null +++ b/board/boundary/insp/MAINTAINERS @@ -0,0 +1,7 @@ +insp BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/insp/ +F: include/configs/insp.h +F: configs/insp_defconfig + diff --git a/board/boundary/insp/Makefile b/board/boundary/insp/Makefile new file mode 100644 index 0000000..b32da07 --- /dev/null +++ b/board/boundary/insp/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2014, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := insp.o diff --git a/board/boundary/insp/clocks.cfg b/board/boundary/insp/clocks.cfg new file mode 100644 index 0000000..8bddb91 --- /dev/null +++ b/board/boundary/insp/clocks.cfg @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* set the default clock gate to save power */ +DATA 4, CCM_CCGR0, 0x00C03F3F +DATA 4, CCM_CCGR1, 0x0030FC03 +DATA 4, CCM_CCGR2, 0x0FFFC000 +DATA 4, CCM_CCGR3, 0x3FF00000 +DATA 4, CCM_CCGR4, 0x00FFF300 +DATA 4, CCM_CCGR5, 0x0F0000C3 +DATA 4, CCM_CCGR6, 0x000003FF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4, MX6_IOMUXC_GPR6, 0x007F007F +DATA 4, MX6_IOMUXC_GPR7, 0x007F007F + +/* + * Setup CCM_CCOSR register as follows: + * + * cko1_en = 1 --> CKO1 enabled + * cko1_div = 111 --> divide by 8 + * cko1_sel = 1011 --> ahb_clk_root + * + * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz + */ +DATA 4, CCM_CCOSR, 0x000000fb diff --git a/board/boundary/insp/ddr-setup.cfg b/board/boundary/insp/ddr-setup.cfg new file mode 100644 index 0000000..2748d40 --- /dev/null +++ b/board/boundary/insp/ddr-setup.cfg @@ -0,0 +1,96 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* + * DDR3 settings + * MX6Q ddr is limited to 1066 Mhz currently 1056 MHz(528 MHz clock), + * memory bus width: 64 bits x16/x32/x64 + * MX6DL ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 64 bits x16/x32/x64 + * MX6SOLO ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 32 bits x16/x32 + */ +DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030 + +DATA 4, MX6_IOM_GRP_B0DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B1DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B2DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B3DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B4DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B5DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B6DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B7DS, 0x00000030 +DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030 +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ +DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030 + +DATA 4, MX6_IOM_DRAM_DQM0, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM1, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM2, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM3, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM4, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM5, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM6, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM7, 0x00020030 + +DATA 4, MX6_IOM_DRAM_CAS, 0x00020030 +DATA 4, MX6_IOM_DRAM_RAS, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00020030 + +DATA 4, MX6_IOM_DRAM_RESET, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 +DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00003000 + +DATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030 +DATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030 + +/* (differential input) */ +DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000 +/* (differential input) */ +DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000 +/* disable ddr pullups */ +DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000 +DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000 +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ +DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000 + +/* Read data DQ Byte0-3 delay */ +DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333 + +/* + * MDMISC mirroring interleaved (row/bank/col) + */ +DATA 4, MX6_MMDC_P0_MDMISC, 0x00081740 + +/* + * MDSCR con_req + */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 diff --git a/board/boundary/insp/insp.c b/board/boundary/insp/insp.c new file mode 100644 index 0000000..6594c32 --- /dev/null +++ b/board/boundary/insp/insp.c @@ -0,0 +1,448 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#define CONFIG_MX6QDL +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_MX6Q +#include "pads-insp.h" +#endif +#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +#define FOR_DL_SOLO +#include "pads-insp.h" +#endif + +DECLARE_GLOBAL_DATA_PTR; + +#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +#ifdef CONFIG_MX6Q +#define GET_MX6_REF(ref) (is_cpu_type(MXC_CPU_MX6Q) ? mx6q_##ref : mx6dl_solo_##ref) +#define IOMUX_SETUP(list) iomux_setup(mx6q_##list, ARRAY_SIZE(mx6q_##list), \ + mx6dl_solo_##list, ARRAY_SIZE(mx6dl_solo_##list)) + +int iomux_setup(iomux_v3_cfg_t *mx6q_pad_list, int mx6q_pad_cnt, + iomux_v3_cfg_t *mx6dl_solo_pad_list, int mx6dl_solo_pad_cnt) +{ + int mx6q = is_cpu_type(MXC_CPU_MX6Q); + iomux_v3_cfg_t *p = mx6q ? mx6q_pad_list : mx6dl_solo_pad_list; + int cnt = mx6q ? mx6q_pad_cnt : mx6dl_solo_pad_cnt; + + return imx_iomux_v3_setup_multiple_pads(p, cnt); +} +#else +#define GET_MX6_REF(ref) (mx6dl_solo_##ref) +#define IOMUX_SETUP(list) imx_iomux_v3_setup_multiple_pads( \ + mx6dl_solo_##list, ARRAY_SIZE(mx6dl_solo_##list)) +#endif +#else +#define GET_MX6_REF(ref) (mx6q_##ref) +#define IOMUX_SETUP(list) imx_iomux_v3_setup_multiple_pads( \ + mx6q_##list, ARRAY_SIZE(mx6q_##list)) +#endif + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); + + return 0; +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + return 0; +} + +int board_ehci_power(int port, int on) +{ + if (port == 0) + gpio_set_value(GP_USB_OTG_PWR, on); + if (port == 1) + gpio_set_value(GP_USB_H1_PWR, on); + return 0; +} + +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC3_BASE_ADDR}, + {USDHC4_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int gp_cd = (cfg->esdhc_base == USDHC3_BASE_ADDR) ? GP_SD3_CD : -1; + if (gp_cd < 0) + return 1; + gpio_direction_input(gp_cd); + return !gpio_get_value(gp_cd); +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].max_bus_width = 8; + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + break; + case 1: + gpio_set_value(GP_EMMC_RESET, 1); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? GP_ECSPI1_CS1 : -1; +} + +#endif + +int board_eth_init(bd_t *bis) +{ +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + + +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) { + return -1; + } + + env_loadsplash = getenv("loadsplash"); + if (env_loadsplash == NULL) { + printf("Environment variable loadsplash not found!\n"); + return -1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("failed to run loadsplash %s\n\n", env_loadsplash); + return -1; + } + + return 0; +} + +#if defined(CONFIG_VIDEO_IPUV3) + +void board_enable_lcd(const struct display_info_t *di) +{ + IOMUX_SETUP(rgb_pads); + gpio_direction_output(GP_RGB_BACKLIGHT, 1); +} + +const struct display_info_t displays[] = { + IMX_VD_LSA40AT9001(LCD, 0, 2), + + /* hdmi */ + IMX_VD50_1280_720M_60(HDMI, 1, (GP_HDMI_I2C_EN << 8) | 1), + IMX_VD50_1920_1080M_60(HDMI, 0, (GP_HDMI_I2C_EN << 8) | 1), + IMX_VD50_1024_768M_60(HDMI, 0, (GP_HDMI_I2C_EN << 8) | 1), +}; + +size_t display_count = ARRAY_SIZE(displays); + +int board_cfb_skip(void) +{ + return NULL != getenv("novideo"); +} +#endif + +static unsigned short gpios_out_low[] = { + GP_MAIN_POWER_EN, + GP_ADV7180_RESET, + GP_J6_I2C_EN, + GP_HDMI_I2C_EN, + GP_TSC2004_RESET, + GP_PWM1, + GP_RGB_BACKLIGHT, + GP_CAMERA_POWER_DOWN, + GP_CAMERA_RX_EN, + GP_SGTL5000_MUTE, + GP_USB_H1_PWR, + GP_USB_OTG_PWR, + GP_WL_EN, /* disable wireless */ + GP_BT_EN, /* disable bluetooth */ + GP_EMMC_RESET, +}; + +static unsigned short gpios_out_high[] = { + GP_ECSPI1_CS1, +}; + +static unsigned short gpios_in[] = { + GP_MAIN_POWER_BUTTON, + GP_ADV7180_IRQ, + GP_INSP_GP1, + GP_INSP_GP2, + GP_INSP_GP3, + GP_INSP_GP4, + GP_INSP_GP5, + GP_INSP_GP6, + GP_INSP_GP7, + GP_INSP_GP8, + GP_INSP_GP9, + GP_INSP_GP10, + GP_TSC2004_IRQ, + GP_RTC_RV4162_IRQ, + GP_CAMERA_LOCK, + GP_HEADPHONE_DET, + GP_WL_IRQ, + GP_SD3_CD, + GP_SD3_WP, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned short *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + IOMUX_SETUP(insp_pads); + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + struct i2c_pads_info *p = GET_MX6_REF(i2c_pad_info); + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + u8 orig_i2c_bus; + u8 val8; + + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &p[0]); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &p[1]); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &p[2]); + +#ifdef CONFIG_CMD_SATA + setup_sata(); +#endif + + orig_i2c_bus = i2c_get_bus_num(); + i2c_set_bus_num(2); + val8 = 0x7f; /* 4.0A source */ + i2c_write(0x69, 0xc0, 1, &val8, 1); + val8 = 0x0c; /* Protection allow 0xb9 write */ + i2c_write(0x69, 0xbd, 1, &val8, 1); + val8 = 0x14; /* 1A charge */ + i2c_write(0x69, 0xb9, 1, &val8, 1); + i2c_set_bus_num(orig_i2c_bus); + +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); +#endif + return 0; +} + +int checkboard(void) +{ + puts("Board: insp\n"); + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; +}; + +static struct button_key const buttons[] = { + {"input1", GP_INSP_GP1, '1'}, + {"input2", GP_INSP_GP2, '2'}, + {"power", GP_MAIN_POWER_BUTTON, 'P'}, +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + if (!gpio_get_value(buttons[i].gpnum)) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +#ifdef CONFIG_PREBOOT +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} +#endif + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_PREBOOT + preboot_keys(); +#endif + +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + unsigned char mac[8]; + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "insp"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + imx_get_mac_from_fuse(0, mac); + if (is_valid_ether_addr(mac)) { + if (!getenv("ethaddr")) + eth_setenv_enetaddr("ethaddr", mac); + } + return 0; +} diff --git a/board/boundary/insp/insp2g.cfg b/board/boundary/insp/insp2g.cfg new file mode 100644 index 0000000..dea5017 --- /dev/null +++ b/board/boundary/insp/insp2g.cfg @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +/* turn off backlight */ +DATA 4, 0x020e0344, 5 +DATA 4, 0x020e072c, 0x30b0 + +#include "ddr-setup.cfg" +#include "1066mhz_4x256mx16.cfg" +#include "clocks.cfg" diff --git a/board/boundary/insp/pads-insp.h b/board/boundary/insp/pads-insp.h new file mode 100644 index 0000000..2ef9ee2 --- /dev/null +++ b/board/boundary/insp/pads-insp.h @@ -0,0 +1,348 @@ +/* + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#undef MX6PAD +#undef MX6NAME + +#ifdef FOR_DL_SOLO +#define MX6PAD(a) MX6DL_PAD_##a +#define MX6NAME(a) mx6dl_solo_##a +#else +#define MX6PAD(a) MX6Q_PAD_##a +#define MX6NAME(a) mx6q_##a +#endif + + +#define AUD_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define CSI_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define USDHC_CLK_PAD_CTRL (PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (USDHC_CLK_PAD_CTRL | PAD_CTL_PUS_47K_UP) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLUP_OUTPUT (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDN_OUTPUT (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_SLOW) + +#define CEC_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_22K_UP | PAD_CTL_ODE | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +static const iomux_v3_cfg_t MX6NAME(insp_pads)[] = { + /* HOG */ +#define GP_MAIN_POWER_EN IMX_GPIO_NR(3, 5) + NEW_PAD_CTRL(MX6PAD(EIM_DA5__GPIO3_IO05), WEAK_PULLDN_OUTPUT), +#define GP_MAIN_POWER_BUTTON IMX_GPIO_NR(3, 6) + NEW_PAD_CTRL(MX6PAD(EIM_DA6__GPIO3_IO06), WEAK_PULLUP), + + /* ADV7180 */ + /* camera - video0 - ADV7180 - I2C3, crystal 28.636 MHz */ + NEW_PAD_CTRL(MX6PAD(CSI0_DAT12__IPU1_CSI0_DATA12), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT13__IPU1_CSI0_DATA13), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT14__IPU1_CSI0_DATA14), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT15__IPU1_CSI0_DATA15), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT16__IPU1_CSI0_DATA16), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT17__IPU1_CSI0_DATA17), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT18__IPU1_CSI0_DATA18), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT19__IPU1_CSI0_DATA19), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_PIXCLK__IPU1_CSI0_PIXCLK), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_MCLK__GPIO5_IO19), WEAK_PULLUP), /* Hsync */ + NEW_PAD_CTRL(MX6PAD(CSI0_VSYNC__GPIO5_IO21), WEAK_PULLUP), /* Vsync */ +#define GP_ADV7180_RESET IMX_GPIO_NR(2, 25) + NEW_PAD_CTRL(MX6PAD(EIM_OE__GPIO2_IO25), WEAK_PULLUP_OUTPUT), +#define GP_ADV7180_IRQ IMX_GPIO_NR(2, 26) + NEW_PAD_CTRL(MX6PAD(EIM_RW__GPIO2_IO26), WEAK_PULLUP), + + /* AUDMUX */ + NEW_PAD_CTRL(MX6PAD(CSI0_DAT7__AUD3_RXD), AUD_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT4__AUD3_TXC), AUD_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT5__AUD3_TXD), AUD_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT6__AUD3_TXFS), AUD_PAD_CTRL), + + /* ECSPI1 */ + NEW_PAD_CTRL(MX6PAD(EIM_D17__ECSPI1_MISO), SPI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D18__ECSPI1_MOSI), SPI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D16__ECSPI1_SCLK), SPI_PAD_CTRL), +#define GP_ECSPI1_CS1 IMX_GPIO_NR(3, 19) + NEW_PAD_CTRL(MX6PAD(EIM_D19__GPIO3_IO19), WEAK_PULLUP), /* SS1 */ + + /* GPIO_KEYS */ +#define GP_INSP_GP1 IMX_GPIO_NR(4, 7) + NEW_PAD_CTRL(MX6PAD(KEY_ROW0__GPIO4_IO07), WEAK_PULLUP), +#define GP_INSP_GP2 IMX_GPIO_NR(4, 8) + NEW_PAD_CTRL(MX6PAD(KEY_COL1__GPIO4_IO08), WEAK_PULLUP), +#define GP_INSP_GP3 IMX_GPIO_NR(4, 9) + NEW_PAD_CTRL(MX6PAD(KEY_ROW1__GPIO4_IO09), WEAK_PULLUP), +#define GP_INSP_GP4 IMX_GPIO_NR(4, 10) + NEW_PAD_CTRL(MX6PAD(KEY_COL2__GPIO4_IO10), WEAK_PULLUP), +#define GP_INSP_GP5 IMX_GPIO_NR(4, 11) + NEW_PAD_CTRL(MX6PAD(KEY_ROW2__GPIO4_IO11), WEAK_PULLUP), +#define GP_INSP_GP6 IMX_GPIO_NR(1, 2) + NEW_PAD_CTRL(MX6PAD(GPIO_2__GPIO1_IO02), WEAK_PULLUP), +#define GP_INSP_GP7 IMX_GPIO_NR(1, 4) + NEW_PAD_CTRL(MX6PAD(GPIO_4__GPIO1_IO04), WEAK_PULLUP), +#define GP_INSP_GP8 IMX_GPIO_NR(1, 7) + NEW_PAD_CTRL(MX6PAD(GPIO_7__GPIO1_IO07), WEAK_PULLUP), +#define GP_INSP_GP9 IMX_GPIO_NR(1, 8) + NEW_PAD_CTRL(MX6PAD(GPIO_8__GPIO1_IO08), WEAK_PULLUP), +#define GP_INSP_GP10 IMX_GPIO_NR(1, 9) + NEW_PAD_CTRL(MX6PAD(GPIO_9__GPIO1_IO09), WEAK_PULLUP), + + /* HDMI */ + NEW_PAD_CTRL(MX6PAD(EIM_A25__HDMI_TX_CEC_LINE), CEC_PAD_CTRL), + + /* I2C2 */ +#define GP_J6_I2C_EN IMX_GPIO_NR(6, 31) + NEW_PAD_CTRL(MX6PAD(EIM_BCLK__GPIO6_IO31), WEAK_PULLUP_OUTPUT), +#define GP_HDMI_I2C_EN IMX_GPIO_NR(2, 23) + NEW_PAD_CTRL(MX6PAD(EIM_CS0__GPIO2_IO23), WEAK_PULLUP_OUTPUT), + + /* I2C3 */ +#define GP_TSC2004_IRQ IMX_GPIO_NR(2, 27) + NEW_PAD_CTRL(MX6PAD(EIM_LBA__GPIO2_IO27), WEAK_PULLUP), +#define GP_TSC2004_RESET IMX_GPIO_NR(4, 5) + NEW_PAD_CTRL(MX6PAD(GPIO_19__GPIO4_IO05), WEAK_PULLUP), + + + /* PWM1 */ +#define GP_PWM1 IMX_GPIO_NR(1, 21) + NEW_PAD_CTRL(MX6PAD(SD1_DAT3__GPIO1_IO21), WEAK_PULLDN_OUTPUT), + + /* PWM3 */ +#define GP_RGB_BACKLIGHT IMX_GPIO_NR(1, 17) + NEW_PAD_CTRL(MX6PAD(SD1_DAT1__GPIO1_IO17), WEAK_PULLDN_OUTPUT), + + /* rtc - i2c1 */ +#define GP_RTC_RV4162_IRQ IMX_GPIO_NR(4, 6) + NEW_PAD_CTRL(MX6PAD(KEY_COL0__GPIO4_IO06), WEAK_PULLUP), + + /* lvds input on CSI1 */ +#ifdef FOR_DL_SOLO + /* Dualite/Solo doesn't have IPU2 */ + NEW_PAD_CTRL(MX6PAD(EIM_A24__IPU1_CSI1_DATA19), CSI_PAD_CTRL), /* GPIO2[30] */ + NEW_PAD_CTRL(MX6PAD(EIM_A23__IPU1_CSI1_DATA18), CSI_PAD_CTRL), /* GPIO6[6] */ + NEW_PAD_CTRL(MX6PAD(EIM_A22__IPU1_CSI1_DATA17), CSI_PAD_CTRL), /* GPIO2[16] */ + NEW_PAD_CTRL(MX6PAD(EIM_A21__IPU1_CSI1_DATA16), CSI_PAD_CTRL), /* GPIO2[17] */ + NEW_PAD_CTRL(MX6PAD(EIM_A20__IPU1_CSI1_DATA15), CSI_PAD_CTRL), /* GPIO2[18] */ + NEW_PAD_CTRL(MX6PAD(EIM_A19__IPU1_CSI1_DATA14), CSI_PAD_CTRL), /* GPIO2[19] */ + NEW_PAD_CTRL(MX6PAD(EIM_A18__IPU1_CSI1_DATA13), CSI_PAD_CTRL), /* GPIO2[20] */ + NEW_PAD_CTRL(MX6PAD(EIM_A17__IPU1_CSI1_DATA12), CSI_PAD_CTRL), /* GPIO2[21] */ + NEW_PAD_CTRL(MX6PAD(EIM_EB0__IPU1_CSI1_DATA11), CSI_PAD_CTRL), /* GPIO2[28] */ + NEW_PAD_CTRL(MX6PAD(EIM_EB1__IPU1_CSI1_DATA10), CSI_PAD_CTRL), /* GPIO2[29] */ + NEW_PAD_CTRL(MX6PAD(EIM_A16__IPU1_CSI1_PIXCLK), CSI_PAD_CTRL), /* GPIO2[22] */ +#else + NEW_PAD_CTRL(MX6PAD(EIM_A24__IPU2_CSI1_DATA19), CSI_PAD_CTRL), /* GPIO2[30] */ + NEW_PAD_CTRL(MX6PAD(EIM_A23__IPU2_CSI1_DATA18), CSI_PAD_CTRL), /* GPIO6[6] */ + NEW_PAD_CTRL(MX6PAD(EIM_A22__IPU2_CSI1_DATA17), CSI_PAD_CTRL), /* GPIO2[16] */ + NEW_PAD_CTRL(MX6PAD(EIM_A21__IPU2_CSI1_DATA16), CSI_PAD_CTRL), /* GPIO2[17] */ + NEW_PAD_CTRL(MX6PAD(EIM_A20__IPU2_CSI1_DATA15), CSI_PAD_CTRL), /* GPIO2[18] */ + NEW_PAD_CTRL(MX6PAD(EIM_A19__IPU2_CSI1_DATA14), CSI_PAD_CTRL), /* GPIO2[19] */ + NEW_PAD_CTRL(MX6PAD(EIM_A18__IPU2_CSI1_DATA13), CSI_PAD_CTRL), /* GPIO2[20] */ + NEW_PAD_CTRL(MX6PAD(EIM_A17__IPU2_CSI1_DATA12), CSI_PAD_CTRL), /* GPIO2[21] */ + NEW_PAD_CTRL(MX6PAD(EIM_EB0__IPU2_CSI1_DATA11), CSI_PAD_CTRL), /* GPIO2[28] */ + NEW_PAD_CTRL(MX6PAD(EIM_EB1__IPU2_CSI1_DATA10), CSI_PAD_CTRL), /* GPIO2[29] */ + NEW_PAD_CTRL(MX6PAD(EIM_A16__IPU2_CSI1_PIXCLK), CSI_PAD_CTRL), /* GPIO2[22] */ +#endif +#define GP_CAMERA_LOCK IMX_GPIO_NR(3, 8) /* low active */ + NEW_PAD_CTRL(MX6PAD(EIM_DA8__GPIO3_IO08), WEAK_PULLUP), +#define GP_CAMERA_POWER_DOWN IMX_GPIO_NR(3, 9) /* low active */ + NEW_PAD_CTRL(MX6PAD(EIM_DA9__GPIO3_IO09), WEAK_PULLDN), +#define GP_CAMERA_RX_EN IMX_GPIO_NR(3, 10) /* high active */ + NEW_PAD_CTRL(MX6PAD(EIM_DA10__GPIO3_IO10), WEAK_PULLDN), + NEW_PAD_CTRL(MX6PAD(GPIO_3__CCM_CLKO2), OUTPUT_40OHM), /* 10 Mhz - 66 MHz */ + + /* SGTL5000 */ + NEW_PAD_CTRL(MX6PAD(GPIO_0__CCM_CLKO1), OUTPUT_40OHM), /* SGTL5000 sys_mclk */ +#define GP_SGTL5000_MUTE IMX_GPIO_NR(1, 29) /* Low is muted */ + NEW_PAD_CTRL(MX6PAD(ENET_TXD1__GPIO1_IO29), WEAK_PULLDN_OUTPUT), +#define GP_HEADPHONE_DET IMX_GPIO_NR(7, 8) + NEW_PAD_CTRL(MX6PAD(SD3_RST__GPIO7_IO08), WEAK_PULLUP), + + /* UART1 */ + NEW_PAD_CTRL(MX6PAD(SD3_DAT7__UART1_TX_DATA), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT6__UART1_RX_DATA), UART_PAD_CTRL), + + /* UART2 for debug */ +#ifndef CONFIG_SILENT_UART + NEW_PAD_CTRL(MX6PAD(EIM_D26__UART2_TX_DATA), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D27__UART2_RX_DATA), UART_PAD_CTRL), +#else + NEW_PAD_CTRL(MX6PAD(EIM_D26__GPIO3_IO26), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D27__GPIO3_IO27), UART_PAD_CTRL), +#endif + /* UART3 - Broadcom Bluetooth*/ + NEW_PAD_CTRL(MX6PAD(EIM_D24__UART3_TX_DATA), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D25__UART3_RX_DATA), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D23__UART3_CTS_B), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D31__UART3_RTS_B), UART_PAD_CTRL), + + /* USBH1 */ +#define GP_USB_H1_PWR IMX_GPIO_NR(7, 12) + NEW_PAD_CTRL(MX6PAD(GPIO_17__GPIO7_IO12), WEAK_PULLDN_OUTPUT), /* USB Hub Reset for USB2512 4 port hub */ + NEW_PAD_CTRL(MX6PAD(EIM_D30__USB_H1_OC), WEAK_PULLUP), + + /* USBOTG - J3 */ + NEW_PAD_CTRL(MX6PAD(GPIO_1__USB_OTG_ID) , WEAK_PULLUP), + NEW_PAD_CTRL(MX6PAD(KEY_COL4__USB_OTG_OC), WEAK_PULLUP), +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) + NEW_PAD_CTRL(MX6PAD(EIM_D22__GPIO3_IO22), WEAK_PULLDN_OUTPUT), + + /* USDHC2: TiWi-R2 */ + NEW_PAD_CTRL(MX6PAD(SD2_CLK__SD2_CLK), USDHC_CLK_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD2_CMD__SD2_CMD), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD2_DAT0__SD2_DATA0), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD2_DAT1__SD2_DATA1), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD2_DAT2__SD2_DATA2), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD2_DAT3__SD2_DATA3), USDHC_PAD_CTRL), + +#define GP_WL_EN IMX_GPIO_NR(6, 15) + NEW_PAD_CTRL(MX6PAD(NANDF_CS2__GPIO6_IO15), WEAK_PULLDN), +#define GP_BT_EN IMX_GPIO_NR(6, 16) + NEW_PAD_CTRL(MX6PAD(NANDF_CS3__GPIO6_IO16), WEAK_PULLDN), + +#define GP_WL_IRQ IMX_GPIO_NR(6, 11) + NEW_PAD_CTRL(MX6PAD(NANDF_CS0__GPIO6_IO11), WEAK_PULLDN), +// NEW_PAD_CTRL(MX6PAD(SD1_CLK__OSC32K_32K_OUT), OUTPUT_40OHM), /* slow clock */ + + /* USDHC3 - sd */ + NEW_PAD_CTRL(MX6PAD(SD3_CLK__SD3_CLK), USDHC_CLK_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_CMD__SD3_CMD), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT0__SD3_DATA0), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT1__SD3_DATA1), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT2__SD3_DATA2), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT3__SD3_DATA3), USDHC_PAD_CTRL), +#define GP_SD3_CD IMX_GPIO_NR(7, 0) + NEW_PAD_CTRL(MX6PAD(SD3_DAT5__GPIO7_IO00), NO_PAD_CTRL), +#define GP_SD3_WP IMX_GPIO_NR(7, 1) + NEW_PAD_CTRL(MX6PAD(SD3_DAT4__GPIO7_IO01), NO_PAD_CTRL), + + /* USDHC4 - eMMC */ + NEW_PAD_CTRL(MX6PAD(SD4_CLK__SD4_CLK), USDHC_CLK_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_CMD__SD4_CMD), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_DAT0__SD4_DATA0), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_DAT1__SD4_DATA1), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_DAT2__SD4_DATA2), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_DAT3__SD4_DATA3), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_DAT4__SD4_DATA4), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_DAT5__SD4_DATA5), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_DAT6__SD4_DATA6), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_DAT7__SD4_DATA7), USDHC_PAD_CTRL), +#define GP_EMMC_RESET IMX_GPIO_NR(2, 6) + NEW_PAD_CTRL(MX6PAD(NANDF_D6__GPIO2_IO06), OUTPUT_40OHM), +}; + +#if defined(CONFIG_VIDEO_IPUV3) +static const iomux_v3_cfg_t MX6NAME(rgb_pads)[] = { + MX6PAD(DI0_DISP_CLK__IPU1_DI0_DISP_CLK), + MX6PAD(DI0_PIN15__IPU1_DI0_PIN15), /* DRDY */ + MX6PAD(DI0_PIN2__IPU1_DI0_PIN02), /* HSYNC */ + MX6PAD(DI0_PIN3__IPU1_DI0_PIN03), /* VSYNC */ + MX6PAD(DI0_PIN4__GPIO4_IO20), /* Contrast */ + MX6PAD(DISP0_DAT0__IPU1_DISP0_DATA00), + MX6PAD(DISP0_DAT1__IPU1_DISP0_DATA01), + MX6PAD(DISP0_DAT2__IPU1_DISP0_DATA02), + MX6PAD(DISP0_DAT3__IPU1_DISP0_DATA03), + MX6PAD(DISP0_DAT4__IPU1_DISP0_DATA04), + MX6PAD(DISP0_DAT5__IPU1_DISP0_DATA05), + MX6PAD(DISP0_DAT6__IPU1_DISP0_DATA06), + MX6PAD(DISP0_DAT7__IPU1_DISP0_DATA07), + MX6PAD(DISP0_DAT8__IPU1_DISP0_DATA08), + MX6PAD(DISP0_DAT9__IPU1_DISP0_DATA09), + MX6PAD(DISP0_DAT10__IPU1_DISP0_DATA10), + MX6PAD(DISP0_DAT11__IPU1_DISP0_DATA11), + MX6PAD(DISP0_DAT12__IPU1_DISP0_DATA12), + MX6PAD(DISP0_DAT13__IPU1_DISP0_DATA13), + MX6PAD(DISP0_DAT14__IPU1_DISP0_DATA14), + MX6PAD(DISP0_DAT15__IPU1_DISP0_DATA15), + MX6PAD(DISP0_DAT16__IPU1_DISP0_DATA16), + MX6PAD(DISP0_DAT17__IPU1_DISP0_DATA17), + MX6PAD(DISP0_DAT18__IPU1_DISP0_DATA18), + MX6PAD(DISP0_DAT19__IPU1_DISP0_DATA19), + MX6PAD(DISP0_DAT20__IPU1_DISP0_DATA20), + MX6PAD(DISP0_DAT21__IPU1_DISP0_DATA21), + MX6PAD(DISP0_DAT22__IPU1_DISP0_DATA22), + MX6PAD(DISP0_DAT23__IPU1_DISP0_DATA23), +}; +#endif + +/* + * + */ +#define PC I2C_PAD_CTRL + +static struct i2c_pads_info MX6NAME(i2c_pad_info)[] = { +{ + /* I2C1, SGTL5000, RTC */ + .scl = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(EIM_D21__I2C1_SCL), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(EIM_D21__GPIO3_IO21), PC), + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(EIM_D28__I2C1_SDA), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(EIM_D28__GPIO3_IO28), PC), + .gp = IMX_GPIO_NR(3, 28) + } +}, { + /* I2C2 - hdmi */ + .scl = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(KEY_COL3__I2C2_SCL), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(KEY_COL3__GPIO4_IO12), PC), + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(KEY_ROW3__I2C2_SDA), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(KEY_ROW3__GPIO4_IO13), PC), + .gp = IMX_GPIO_NR(4, 13) + } +}, { + /* I2C3, Charger, PCIe */ + .scl = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(GPIO_5__I2C3_SCL), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(GPIO_5__GPIO1_IO05), PC), + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(GPIO_16__I2C3_SDA), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(GPIO_16__GPIO7_IO11), PC), + .gp = IMX_GPIO_NR(7, 11) + } +} +}; diff --git a/board/boundary/ioc/Kconfig b/board/boundary/ioc/Kconfig new file mode 100644 index 0000000..0098417 --- /dev/null +++ b/board/boundary/ioc/Kconfig @@ -0,0 +1,18 @@ +if TARGET_IOC + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "ioc" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "ioc" + +endif diff --git a/board/boundary/ioc/Makefile b/board/boundary/ioc/Makefile new file mode 100644 index 0000000..816f16c --- /dev/null +++ b/board/boundary/ioc/Makefile @@ -0,0 +1,10 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := ioc.o +obj-$(CONFIG_MXC_SPI_DISPLAY) += spi_display.o \ No newline at end of file diff --git a/board/boundary/ioc/ioc.c b/board/boundary/ioc/ioc.c new file mode 100644 index 0000000..1a0b021 --- /dev/null +++ b/board/boundary/ioc/ioc.c @@ -0,0 +1,795 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "spi_display.h" + +DECLARE_GLOBAL_DATA_PTR; +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +static iomux_v3_cfg_t const init_pads[] = { + NEW_PAD_CTRL(MX6_PAD_GPIO_0__CCM_CLKO1, OUTPUT_40OHM), /* SGTL5000 sys_mclk */ + NEW_PAD_CTRL(MX6_PAD_GPIO_3__CCM_CLKO2, OUTPUT_40OHM), /* J5 - Camera MCLK */ + + /* wl1271 pads */ +#define WL12XX_WL_IRQ_GP IMX_GPIO_NR(6, 14) + NEW_PAD_CTRL(MX6_PAD_NANDF_CS1__GPIO6_IO14, WEAK_PULLDOWN), + /* WL12XX_WL_ENABLE_GP */ + NEW_PAD_CTRL(MX6_PAD_NANDF_CS2__GPIO6_IO15, OUTPUT_40OHM), + /* WL12XX_BT_ENABLE_GP */ + NEW_PAD_CTRL(MX6_PAD_NANDF_CS3__GPIO6_IO16, OUTPUT_40OHM), + /* USB otg power */ + NEW_PAD_CTRL(MX6_PAD_EIM_D22__GPIO3_IO22, OUTPUT_40OHM), + NEW_PAD_CTRL(MX6_PAD_NANDF_D5__GPIO2_IO05, OUTPUT_40OHM), + NEW_PAD_CTRL(MX6_PAD_NANDF_WP_B__GPIO6_IO09, OUTPUT_40OHM), + NEW_PAD_CTRL(MX6_PAD_GPIO_8__GPIO1_IO08, OUTPUT_40OHM), + NEW_PAD_CTRL(MX6_PAD_GPIO_6__GPIO1_IO06, OUTPUT_40OHM), + + /* Backlight on RGB connector: J15 */ +#define RGB_BACKLIGHT_GP IMX_GPIO_NR(1, 21) + MX6_PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL), + + /* Backlight on LVDS connector: J6 */ +#define LVDS_BACKLIGHT_GP IMX_GPIO_NR(1, 18) + MX6_PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); + + return 0; +} + +/* #define CONFIG_SILENT_UART */ +static iomux_v3_cfg_t const uart2_pads[] = { +#ifndef CONFIG_SILENT_UART + MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +#else + MX6_PAD_EIM_D26__GPIO3_IO26 | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_EIM_D27__GPIO3_IO27 | MUX_PAD_CTRL(UART_PAD_CTRL), +#endif +}; + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +/* I2C1, SGTL5000 */ +static struct i2c_pads_info i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}; + +/* I2C2 Camera, MIPI */ +static struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}; + +/* I2C3, J15 - RGB connector */ +static struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC, + .gp = IMX_GPIO_NR(7, 11) + } +}; + +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc3_pads[] = { + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +static iomux_v3_cfg_t const enet_pads1[] = { + MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), + /* pin 35 - 1 (PHY_AD2) on reset */ + MX6_PAD_RGMII_RXC__GPIO6_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 32 - 1 - (MODE0) all */ + MX6_PAD_RGMII_RD0__GPIO6_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 31 - 1 - (MODE1) all */ + MX6_PAD_RGMII_RD1__GPIO6_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 28 - 1 - (MODE2) all */ + MX6_PAD_RGMII_RD2__GPIO6_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 27 - 1 - (MODE3) all */ + MX6_PAD_RGMII_RD3__GPIO6_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + MX6_PAD_RGMII_RX_CTL__GPIO6_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 42 PHY nRST */ + MX6_PAD_EIM_D23__GPIO3_IO23 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static iomux_v3_cfg_t const enet_pads2[] = { + MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), +}; + +static iomux_v3_cfg_t const misc_pads[] = { + MX6_PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_KEY_COL4__USB_OTG_OC | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_EIM_D30__USB_H1_OC | MUX_PAD_CTRL(WEAK_PULLUP), + /* OTG Power enable */ + MX6_PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(OUTPUT_40OHM), +}; + +/* wl1271 pads */ +static iomux_v3_cfg_t const wl12xx_pads[] = { + (MX6_PAD_NANDF_CS1__GPIO6_IO14 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(WEAK_PULLDOWN), + (MX6_PAD_NANDF_CS2__GPIO6_IO15 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), + (MX6_PAD_NANDF_CS3__GPIO6_IO16 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), +}; +#define WL12XX_WL_IRQ_GP IMX_GPIO_NR(6, 14) +#define WL12XX_WL_ENABLE_GP IMX_GPIO_NR(6, 15) +#define WL12XX_BT_ENABLE_GP IMX_GPIO_NR(6, 16) + +/* Button assignments for J14 */ +static iomux_v3_cfg_t const button_pads[] = { + /* Menu */ + MX6_PAD_NANDF_D1__GPIO2_IO01 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Back */ + MX6_PAD_NANDF_D2__GPIO2_IO02 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Labelled Search (mapped to Power under Android) */ + MX6_PAD_NANDF_D3__GPIO2_IO03 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Home */ + MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Volume Down */ + MX6_PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Volume Up */ + MX6_PAD_GPIO_18__GPIO7_IO13 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), +}; + +static void setup_iomux_enet(void) +{ + gpio_direction_output(IMX_GPIO_NR(1, 27), 0); /* PHY rst */ + gpio_direction_output(IMX_GPIO_NR(6, 30), 1); + gpio_direction_output(IMX_GPIO_NR(6, 25), 1); + gpio_direction_output(IMX_GPIO_NR(6, 27), 1); + gpio_direction_output(IMX_GPIO_NR(6, 28), 1); + gpio_direction_output(IMX_GPIO_NR(6, 29), 1); + imx_iomux_v3_setup_multiple_pads(enet_pads1, ARRAY_SIZE(enet_pads1)); + gpio_direction_output(IMX_GPIO_NR(6, 24), 1); + + /* Need delay 10ms according to KSZ9021 spec */ + udelay(1000 * 10); + gpio_set_value(IMX_GPIO_NR(1, 27), 1); /* PHY reset */ + + imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2)); + udelay(100); /* Wait 100 us before using mii interface */ +} + +static iomux_v3_cfg_t const usb_pads[] = { + MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); + + /* Reset USB hub */ + gpio_direction_output(IMX_GPIO_NR(7, 12), 0); + mdelay(2); + gpio_set_value(IMX_GPIO_NR(7, 12), 1); + + return 0; +} + +int board_ehci_power(int port, int on) +{ + if (port) + return 0; + gpio_set_value(GP_USB_OTG_PWR, on); + return 0; +} + +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC3_BASE_ADDR}, + {USDHC4_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int gp_cd = IMX_GPIO_NR(2, 6); + + if (cfg->esdhc_base == USDHC3_BASE_ADDR) + return 1; /* eMMC always present */ + + gpio_direction_input(gp_cd); + return !gpio_get_value(gp_cd); +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + usdhc_cfg[0].max_bus_width = 8; + usdhc_cfg[1].max_bus_width = 4; + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + break; + case 1: + imx_iomux_v3_setup_multiple_pads( + usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +#ifdef CONFIG_MXC_SPI +#define GP_ECSPI2_CS IMX_GPIO_NR(5, 29) + +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + if (bus == 0 && cs == 0) + return IMX_GPIO_NR(3, 19); + if (bus == 1 && cs == 0) + return GP_ECSPI2_CS; + if (cs >> 8) + return (cs >> 8); + return -1; +} + +static iomux_v3_cfg_t const ecspi1_pads[] = { + /* SS1 */ + MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; + +static void setup_spi(void) +{ + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, + ARRAY_SIZE(ecspi1_pads)); +} +#endif + +int board_phy_config(struct phy_device *phydev) +{ + /* min rx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0); + /* min tx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0); + /* max rx/tx clock delay, min rx/tx control */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0); + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + +#ifdef CONFIG_FEC_MXC + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + /* scan phy 4,5,6,7 */ + phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } +#endif + +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + + +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) { + return -1; + } + + env_loadsplash = getenv("loadsplash"); + if (env_loadsplash == NULL) { + printf("Environment variable loadsplash not found!\n"); + return -1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("failed to run loadsplash %s\n\n", env_loadsplash); + return -1; + } + + return 0; +} + +static void setup_buttons(void) +{ + imx_iomux_v3_setup_multiple_pads(button_pads, + ARRAY_SIZE(button_pads)); +} + +#if defined(CONFIG_VIDEO_IPUV3) + +static iomux_v3_cfg_t const backlight_pads[] = { +}; + +static iomux_v3_cfg_t const rgb_pads[] = { + MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, + MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15, + MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02, + MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03, + MX6_PAD_DI0_PIN4__GPIO4_IO20, + MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00, + MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01, + MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02, + MX6_PAD_DISP0_DAT3__IPU1_DISP0_DATA03, + MX6_PAD_DISP0_DAT4__IPU1_DISP0_DATA04, + MX6_PAD_DISP0_DAT5__IPU1_DISP0_DATA05, + MX6_PAD_DISP0_DAT6__IPU1_DISP0_DATA06, + MX6_PAD_DISP0_DAT7__IPU1_DISP0_DATA07, + MX6_PAD_DISP0_DAT8__IPU1_DISP0_DATA08, + MX6_PAD_DISP0_DAT9__IPU1_DISP0_DATA09, + MX6_PAD_DISP0_DAT10__IPU1_DISP0_DATA10, + MX6_PAD_DISP0_DAT11__IPU1_DISP0_DATA11, + MX6_PAD_DISP0_DAT12__IPU1_DISP0_DATA12, + MX6_PAD_DISP0_DAT13__IPU1_DISP0_DATA13, + MX6_PAD_DISP0_DAT14__IPU1_DISP0_DATA14, + MX6_PAD_DISP0_DAT15__IPU1_DISP0_DATA15, + MX6_PAD_DISP0_DAT16__IPU1_DISP0_DATA16, + MX6_PAD_DISP0_DAT17__IPU1_DISP0_DATA17, + MX6_PAD_DISP0_DAT18__IPU1_DISP0_DATA18, + MX6_PAD_DISP0_DAT19__IPU1_DISP0_DATA19, + MX6_PAD_DISP0_DAT20__IPU1_DISP0_DATA20, + MX6_PAD_DISP0_DAT21__IPU1_DISP0_DATA21, + MX6_PAD_DISP0_DAT22__IPU1_DISP0_DATA22, + MX6_PAD_DISP0_DAT23__IPU1_DISP0_DATA23, +}; + +void board_enable_lvds(const struct display_info_t *di) +{ + gpio_direction_output(LVDS_BACKLIGHT_GP, 1); +} + +void board_enable_lcd(const struct display_info_t *di) +{ + imx_iomux_v3_setup_multiple_pads(rgb_pads, ARRAY_SIZE(rgb_pads)); +#ifdef CONFIG_MXC_SPI_DISPLAY + if (di->fbflags & FBF_SPI) + return enable_spi_rgb(di); +#endif + gpio_direction_output(RGB_BACKLIGHT_GP, 1); +} + +const struct display_info_t displays[] = { + /* hdmi */ + IMX_VD50_1280_720M_60(HDMI, 1, 1), + IMX_VD50_1920_1080M_60(HDMI, 0, 1), + IMX_VD50_1024_768M_60(HDMI, 0, 1), + + /* ft5x06 */ + IMX_VD38_LG1280_800(LVDS, 1, 2), + IMX_VD38_HANNSTAR7(LVDS, 0, 2), + IMX_VD38_WSVGA(LVDS, 0, 2), + + /* ili210x */ + IMX_VD41_AMP1024_600(LVDS, 1, 2), + + /* egalax_ts */ + IMX_VD04_HANNSTAR(LVDS, 1, 2), + IMX_VD04_LG9_7(LVDS, 0, 2), + + /* fusion7 specific touchscreen */ + IMX_VD10_FUSION7(LCD, 1, 2), + + IMX_VD_SHARP_LQ101K1LY04(LVDS, 0, 0), + IMX_VD_WXGA_J(LVDS, 0, 0), + IMX_VD_WXGA(LVDS, 0, 0), + IMX_VD_WVGA(LVDS, 0, 0), + IMX_VD_AA065VE11(LVDS, 0, 0), + IMX_VD_VGA(LVDS, 0, 0), + + /* tsc2004 */ + IMX_VD48_CLAA_WVGA(LCD, 1, 2), + IMX_VD48_SHARP_WVGA(LCD, 0, 2), + IMX_VD48_DC050WX(LCD, 0, 2), + IMX_VD48_QVGA(LCD, 0, 2), + IMX_VD48_AT035GT_07ET3(LCD, 0, 2), + + IMX_VD_LSA40AT9001(LCD, 0, 0), + IMX_VD_SVGA(LCD, 0, 0), +#ifdef CONFIG_MXC_SPI_DISPLAY + IMX_VD_AUO_G050(LCD, 0, 1), + IMX_VD_A030JN01_UPS051(LCD, 0, 1), +#endif +}; + +size_t display_count = ARRAY_SIZE(displays); + +int board_cfb_skip(void) +{ + return NULL != getenv("novideo"); +} +#endif + +static unsigned gpios_out_low[] = { + /* Disable wl1271 */ + IMX_GPIO_NR(6, 15), /* disable wireless */ + IMX_GPIO_NR(6, 16), /* disable bluetooth */ + IMX_GPIO_NR(3, 22), /* disable USB otg power */ + IMX_GPIO_NR(2, 5), /* ov5640 mipi camera reset */ + IMX_GPIO_NR(1, 8), /* ov5642 reset */ +}; + +static unsigned gpios_out_high[] = { + IMX_GPIO_NR(1, 6), /* ov5642 powerdown */ + IMX_GPIO_NR(6, 9), /* ov5640 mipi camera power down */ +}; + +static unsigned short gpios_in[] = { + LVDS_BACKLIGHT_GP, + RGB_BACKLIGHT_GP, + WL12XX_WL_IRQ_GP, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + + imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads)); + setup_buttons(); + +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + imx_iomux_v3_setup_multiple_pads(misc_pads, ARRAY_SIZE(misc_pads)); + imx_iomux_v3_setup_multiple_pads(wl12xx_pads, ARRAY_SIZE(wl12xx_pads)); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_MXC_SPI + setup_spi(); +#endif + imx_iomux_v3_setup_multiple_pads( + usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + +#ifdef CONFIG_CMD_SATA + setup_sata(); +#endif + + return 0; +} + +int checkboard(void) +{ + puts("Board: ioc\n"); + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; +}; + +static struct button_key const buttons[] = { + {"back", IMX_GPIO_NR(2, 2), 'B'}, + {"home", IMX_GPIO_NR(2, 4), 'H'}, + {"menu", IMX_GPIO_NR(2, 1), 'M'}, + {"search", IMX_GPIO_NR(2, 3), 'S'}, + {"volup", IMX_GPIO_NR(7, 13), 'V'}, + {"voldown", IMX_GPIO_NR(4, 5), 'v'}, +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + if (!gpio_get_value(buttons[i].gpnum)) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +#ifdef CONFIG_PREBOOT +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} +#endif + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_PREBOOT + preboot_keys(); +#endif + +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "ioc"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/ioc/ioc.cfg b/board/boundary/ioc/ioc.cfg new file mode 100644 index 0000000..1bc64ed --- /dev/null +++ b/board/boundary/ioc/ioc.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "../nitrogen6x/ddr-setup.cfg" +#include "../nitrogen6x/1066mhz_4x128mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/ioc/spi_display.c b/board/boundary/ioc/spi_display.c new file mode 100644 index 0000000..8c4bf7d --- /dev/null +++ b/board/boundary/ioc/spi_display.c @@ -0,0 +1,515 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "spi_display.h" + +#define DI0_PAD_CTRL PAD_CTL_DSE_120ohm + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define SPI_MOSI_R_PAD_CTRL SPI_PAD_CTRL | PAD_CTL_ODE | PAD_CTL_PUS_22K_UP + + +#if defined(CONFIG_MX6QDL) +#define IOMUX_PAD_CTRL(name, ctrl) NEW_PAD_CTRL(MX6Q_PAD_##name, ctrl), \ + NEW_PAD_CTRL(MX6DL_PAD_##name, ctrl) +#else +#define IOMUX_PAD_CTRL(name, ctrl) NEW_PAD_CTRL(MX6_PAD_##name, ctrl) +#endif + +static iomux_v3_cfg_t const spi_mosi_r_pads[] = { + IOMUX_PAD_CTRL(CSI0_DAT9__ECSPI2_MOSI, SPI_MOSI_R_PAD_CTRL), +}; + +static iomux_v3_cfg_t const spi_mosi_w_pads[] = { + IOMUX_PAD_CTRL(CSI0_DAT9__ECSPI2_MOSI, SPI_PAD_CTRL), +}; + +static iomux_v3_cfg_t const spi_ss0_pad[] = { + IOMUX_PAD_CTRL(CSI0_DAT11__ECSPI2_SS0, SPI_PAD_CTRL), +}; + +static iomux_v3_cfg_t const spi_ss0_gpio_pad[] = { + IOMUX_PAD_CTRL(CSI0_DAT11__GPIO5_IO29, SPI_PAD_CTRL), +}; + +static iomux_v3_cfg_t const spi_display_pads[] = { + /* ECSPI2 */ + IOMUX_PAD_CTRL(CSI0_DAT8__ECSPI2_SCLK, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT9__ECSPI2_MOSI, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT10__ECSPI2_MISO, SPI_PAD_CTRL), +#define GP_ECSPI2_CS IMX_GPIO_NR(5, 29) + IOMUX_PAD_CTRL(CSI0_DAT11__GPIO5_IO29, SPI_PAD_CTRL), +#define GP_SPI_DISPLAY_RESET IMX_GPIO_NR(4, 20) + IOMUX_PAD_CTRL(DI0_PIN4__GPIO4_IO20, SPI_PAD_CTRL), +#define GP_BACKLIGHT IMX_GPIO_NR(1, 21) /* PWM1 */ + IOMUX_PAD_CTRL(SD1_DAT3__GPIO1_IO21, SPI_PAD_CTRL), + + /* DI0 */ + IOMUX_PAD_CTRL(DI0_DISP_CLK__IPU1_DI0_DISP_CLK, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DI0_PIN15__IPU1_DI0_PIN15, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DI0_PIN2__IPU1_DI0_PIN02, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DI0_PIN3__IPU1_DI0_PIN03, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT0__IPU1_DISP0_DATA00, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT1__IPU1_DISP0_DATA01, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT2__IPU1_DISP0_DATA02, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT3__IPU1_DISP0_DATA03, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT4__IPU1_DISP0_DATA04, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT5__IPU1_DISP0_DATA05, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT6__IPU1_DISP0_DATA06, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT7__IPU1_DISP0_DATA07, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT8__IPU1_DISP0_DATA08, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT9__IPU1_DISP0_DATA09, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT10__IPU1_DISP0_DATA10, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT11__IPU1_DISP0_DATA11, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT12__IPU1_DISP0_DATA12, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT13__IPU1_DISP0_DATA13, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT14__IPU1_DISP0_DATA14, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT15__IPU1_DISP0_DATA15, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT16__IPU1_DISP0_DATA16, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT17__IPU1_DISP0_DATA17, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT18__IPU1_DISP0_DATA18, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT19__IPU1_DISP0_DATA19, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT20__IPU1_DISP0_DATA20, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT21__IPU1_DISP0_DATA21, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT22__IPU1_DISP0_DATA22, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT23__IPU1_DISP0_DATA23, DI0_PAD_CTRL), +}; + +static int AUO_G050_spi_write_rtn(struct spi_slave *spi, u8 *cmds) +{ + u8 buf[4]; + int ret = 0; + + debug("%s\n", __func__); + while (1) { + uint reg = (cmds[0] << 8) | cmds[1]; + uint len = cmds[2]; + + if (!len && !reg) + break; + cmds += 3; + do { + buf[0] = 0x20; + buf[1] = reg >> 8; + ret = spi_xfer(spi, 2 * 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to select reg1 0x%x, %d\n", __func__, reg, ret); + return ret; + } + udelay(2); + buf[0] = 0; + buf[1] = reg; + ret = spi_xfer(spi, 2 * 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to select reg2 0x%x, %d\n", __func__, reg, ret); + return ret; + } + udelay(2); + if (!len) { + debug("spi: reg:%04x\n", reg); + break; + } + buf[0] = 0x40; + buf[1] = *cmds++; + ret = spi_xfer(spi, 2 * 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to select reg3 0x%x, %d\n", __func__, reg, ret); + return ret; + } + debug("spi: reg:%04x %02x\n", reg, buf[1]); + udelay(2); + reg++; + } while (--len); + } + return ret; +} + +static int AUO_G050_spi_read_rtn(struct spi_slave *spi, int reg) +{ + u8 buf[4]; + u8 rbuf[4]; + int ret = 0; + + buf[0] = 0x20; + buf[1] = reg >> 8; + ret = spi_xfer(spi, 2 * 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to select reg1 0x%x, %d\n", __func__, reg, ret); + return ret; + } + udelay(2); + buf[0] = 0; + buf[1] = reg; + ret = spi_xfer(spi, 2 * 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to select reg2 0x%x, %d\n", __func__, reg, ret); + return ret; + } + udelay(2); + buf[0] = 0xC0; + buf[1] = 0xff; + ret = spi_xfer(spi, 2 * 8, buf, rbuf, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to select reg3 0x%x, %d\n", __func__, reg, ret); + return ret; + } + debug("spi: reg:0x%04x: %02x %02x\n", reg, rbuf[0], rbuf[1]); + udelay(2); + return rbuf[1]; +} + +#define A(reg, cnt) (reg >> 8), (reg & 0xff), cnt + +static u8 AUO_G050_display_init_cmds[] = { +/* Display Mode Setting */ + A(0xf000, 5), 0x55, 0xaa, 0x52, 0x08, 0x00, + A(0xb100, 2), 0x0c, 0x00, + A(0xbc00, 3), 0x05, 0x05, 0x05, + A(0xb700, 2), 0x22, 0x22, + A(0xb800, 4), 0x01, 0x03, 0x03, 0x03, + A(0xc803, 1), 0x96, + A(0xc805, 1), 0x96, + A(0xc807, 1), 0x96, + A(0xc809, 1), 0x96, + A(0xc80b, 1), 0x2a, + A(0xc80c, 1), 0x2a, + A(0xc80f, 1), 0x2a, + A(0xc810, 1), 0x2a, + A(0xf000, 5), 0x55, 0xaa, 0x52, 0x08, 0x01, + A(0xb900, 3), 0x34, 0x34, 0x34, + A(0xba00, 3), 0x14, 0x14, 0x14, + A(0xbe00, 2), 0x00, 0x8c, + A(0xb000, 3), 0x00, 0x00, 0x00, + A(0xb800, 3), 0x24, 0x24, 0x24, + A(0xbc00, 3), 0x00, 0x88, 0x01, + A(0xbd00, 3), 0x00, 0x88, 0x01, + A(0xd100, 52), 0x00, 0x00, 0x00, 0x10, 0x00, 0x31, 0x00, 0x5a, 0x00, 0x78, 0x00, 0x9b, 0x00, 0xbe, 0x00, 0xe6, 0x01, 0x04, + 0x01, 0x36, 0x01, 0x59, 0x01, 0x90, 0x01, 0xbd, 0x01, 0xbe, 0x01, 0xe5, 0x02, 0x0d, 0x02, 0x29, 0x02, 0x44, + 0x02, 0x5d, 0x02, 0xbc, 0x02, 0xe9, 0x03, 0x16, 0x03, 0x48, 0x03, 0xac, 0x03, 0xe8, 0x03, 0xff, + A(0xd200, 52), 0x00, 0x00, 0x00, 0x10, 0x00, 0x31, 0x00, 0x5a, 0x00, 0x78, 0x00, 0x9b, 0x00, 0xbe, 0x00, 0xe6, 0x01, 0x04, + 0x01, 0x36, 0x01, 0x59, 0x01, 0x90, 0x01, 0xbd, 0x01, 0xbe, 0x01, 0xe5, 0x02, 0x0d, 0x02, 0x29, 0x02, 0x44, + 0x02, 0x5d, 0x02, 0xbc, 0x02, 0xe9, 0x03, 0x16, 0x03, 0x48, 0x03, 0xac, 0x03, 0xe8, 0x03, 0xff, + A(0xd300, 52), 0x00, 0x00, 0x00, 0x10, 0x00, 0x31, 0x00, 0x5a, 0x00, 0x78, 0x00, 0x9b, 0x00, 0xbe, 0x00, 0xe6, 0x01, 0x04, + 0x01, 0x36, 0x01, 0x59, 0x01, 0x90, 0x01, 0xbd, 0x01, 0xbe, 0x01, 0xe5, 0x02, 0x0d, 0x02, 0x29, 0x02, 0x44, + 0x02, 0x5d, 0x02, 0xbc, 0x02, 0xe9, 0x03, 0x16, 0x03, 0x48, 0x03, 0xac, 0x03, 0xe8, 0x03, 0xff, + A(0xd400, 52), 0x00, 0x00, 0x00, 0x10, 0x00, 0x31, 0x00, 0x5a, 0x00, 0x78, 0x00, 0x9b, 0x00, 0xbe, 0x00, 0xe6, 0x01, 0x04, + 0x01, 0x36, 0x01, 0x59, 0x01, 0x90, 0x01, 0xbd, 0x01, 0xbe, 0x01, 0xe5, 0x02, 0x0d, 0x02, 0x29, 0x02, 0x44, + 0x02, 0x5d, 0x02, 0xbc, 0x02, 0xe9, 0x03, 0x16, 0x03, 0x48, 0x03, 0xac, 0x03, 0xe8, 0x03, 0xff, + A(0xd500, 52), 0x00, 0x00, 0x00, 0x10, 0x00, 0x31, 0x00, 0x5a, 0x00, 0x78, 0x00, 0x9b, 0x00, 0xbe, 0x00, 0xe6, 0x01, 0x04, + 0x01, 0x36, 0x01, 0x59, 0x01, 0x90, 0x01, 0xbd, 0x01, 0xbe, 0x01, 0xe5, 0x02, 0x0d, 0x02, 0x29, 0x02, 0x44, + 0x02, 0x5d, 0x02, 0xbc, 0x02, 0xe9, 0x03, 0x16, 0x03, 0x48, 0x03, 0xac, 0x03, 0xe8, 0x03, 0xff, + A(0xd600, 52), 0x00, 0x00, 0x00, 0x10, 0x00, 0x31, 0x00, 0x5a, 0x00, 0x78, 0x00, 0x9b, 0x00, 0xbe, 0x00, 0xe6, 0x01, 0x04, + 0x01, 0x36, 0x01, 0x59, 0x01, 0x90, 0x01, 0xbd, 0x01, 0xbe, 0x01, 0xe5, 0x02, 0x0d, 0x02, 0x29, 0x02, 0x44, + 0x02, 0x5d, 0x02, 0xbc, 0x02, 0xe9, 0x03, 0x16, 0x03, 0x48, 0x03, 0xac, 0x03, 0xe8, 0x03, 0xff, + A(0x1100, 0), /* exit sleep mode, wait 120 ms */ + A(0, 0) +}; + +static u8 AUO_G050_display_on_cmds[] = { + A(0x2900, 0), + A(0, 0) +}; + +/* *************************************************** */ + +static int A030JN01_spi_write_rtn(struct spi_slave *spi, u8 *cmds) +{ + u8 buf[4]; + int ret = 0; + + while (1) { + uint reg = (cmds[0] << 8) | cmds[1]; + uint len = cmds[2]; + + if (!len && !reg) + break; + cmds += 3; + do { + buf[0] = reg + (reg & 0x40); + buf[1] = *cmds++; + ret = spi_xfer(spi, 2 * 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed 0x%x, %d\n", __func__, reg, ret); + return ret; + } + debug("spi: reg:%02x %02x\n", reg, buf[1]); + udelay(2); + reg++; + } while (--len); + } + return ret; +} + +static int A030JN01_spi_read_rtn(struct spi_slave *spi, int reg) +{ + u8 buf[4]; + u8 rbuf[4]; + int ret = 0; + + buf[0] = (reg + (reg & 0x40)) | 0x40; + buf[1] = 0xff; + ret = spi_xfer(spi, 2 * 8, buf, rbuf, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed 0x%x, %d\n", __func__, reg, ret); + return ret; + } + debug("spi: reg:0x%02x: %02x %02x\n", reg, rbuf[0], rbuf[1]); + return rbuf[1]; +} + +static u8 A030JN01_display_YUV720_init_cmds[] = { +/* Display Mode Setting */ + A(4, 2), 0x6b, 0x5f, + A(0, 0) +}; + +static u8 A030JN01_display_UPS051_init_cmds[] = { + A(5, 1), 0x5f, + A(0, 0) +}; + +static u8 A030JN01_display_on_cmds[] = { + A(0, 0) +}; + +struct spi_display_info { + int mode; + int speed_r; + int speed_w; + int reset_active_low; + u8 *init_cmds; + u8 *on_cmds; + int (*spi_write_rtn)(struct spi_slave *spi, u8 *cmds); + int (*spi_read_rtn)(struct spi_slave *spi, int reg); +}; + +struct spi_display_info spi_di[] = { + { .mode = SPI_MODE_0, .speed_r = 10000, .speed_w = 1000000, .reset_active_low = 1, + .init_cmds = AUO_G050_display_init_cmds, .on_cmds = AUO_G050_display_on_cmds, + .spi_write_rtn = AUO_G050_spi_write_rtn, .spi_read_rtn = AUO_G050_spi_read_rtn}, + { .mode = SPI_MODE_3, .speed_r = 10000, .speed_w = 10000, .reset_active_low = 1, + .init_cmds = A030JN01_display_YUV720_init_cmds, .on_cmds = A030JN01_display_on_cmds, + .spi_write_rtn = A030JN01_spi_write_rtn, .spi_read_rtn = A030JN01_spi_read_rtn}, + { .mode = SPI_MODE_3, .speed_r = 10000, .speed_w = 10000, .reset_active_low = 1, + .init_cmds = A030JN01_display_UPS051_init_cmds, .on_cmds = A030JN01_display_on_cmds, + .spi_write_rtn = A030JN01_spi_write_rtn, .spi_read_rtn = A030JN01_spi_read_rtn}, +}; + +const struct display_info_t *g_dev; + +/* + * Return 1 for successful detection of display + */ +int detect_spi(struct display_info_t const *dev) +{ + return 1; +} + +static void init_spi(struct display_info_t const *dev) +{ + unsigned cs_gpio = GP_ECSPI2_CS; + unsigned reset_gpio = GP_SPI_DISPLAY_RESET; + struct spi_display_info *di = &spi_di[dev->addr]; + int reset_val = di->reset_active_low ? 0 : 1; + + debug("%s\n", __func__); + gpio_direction_output(cs_gpio, 1); + gpio_direction_output(reset_gpio, reset_val ^ 1); + SETUP_IOMUX_PADS(spi_display_pads); + gpio_direction_output(reset_gpio, reset_val); + udelay(200); + gpio_direction_output(reset_gpio, reset_val ^ 1); + mdelay(200); +} + +void enable_spi_rgb(struct display_info_t const *dev) +{ + unsigned cs_gpio = GP_ECSPI2_CS; + struct spi_slave *spi; + int ret; + struct spi_display_info *di = &spi_di[dev->addr]; + + g_dev = dev; + init_spi(dev); + gpio_direction_output(GP_BACKLIGHT, 1); + gpio_direction_output(cs_gpio, 1); + + enable_spi_clk(1, dev->bus); + + /* Setup spi_slave */ + spi = spi_setup_slave(dev->bus, 0, di->speed_w, di->mode); + if (!spi) { + printf("%s: Failed to set up slave\n", __func__); + return; + } + + /* Claim spi bus */ + ret = spi_claim_bus(spi); + if (ret) { + debug("%s: Failed to claim SPI bus: %d\n", __func__, ret); + goto free_bus; + } + + /* + * Initialization sequence + * 1. Display Mode Settings + * 2. Power Settings + * 3. Gamma Settings + * 4. Sleep Out + * 5. Wait >= 7 frame + * 6. Display on + */ + SETUP_IOMUX_PADS(spi_ss0_pad); + ret = di->spi_write_rtn(spi, di->init_cmds); + if (ret) { + printf("%s: Failed to display_init_cmds %d\n", __func__, ret); + goto release_bus; + } + mdelay(200); + ret = di->spi_write_rtn(spi, di->on_cmds); + if (ret) { + printf("%s: Failed to display_on_cmds %d\n", __func__, ret); + goto release_bus; + } + ret = 1; + SETUP_IOMUX_PADS(spi_ss0_gpio_pad); + + /* Release spi bus */ +release_bus: + spi_release_bus(spi); +free_bus: + spi_free_slave(spi); + enable_spi_clk(0, dev->bus); + return; +} + +static int do_spid(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unsigned cs_gpio = GP_ECSPI2_CS; + struct spi_slave *spi; + int display_index = g_dev ? g_dev->addr : 0; + int bus = g_dev ? g_dev->bus : 1; + struct spi_display_info *di = &spi_di[display_index]; + int ret = 0; + int arg = 2; + uint reg; + u8 buf[80]; + + if (argc < 2) + return 1; + gpio_direction_output(GP_BACKLIGHT, 1); + gpio_direction_output(cs_gpio, 1); + SETUP_IOMUX_PADS(spi_mosi_w_pads); + + enable_spi_clk(1, bus); + + /* Setup spi_slave */ + spi = spi_setup_slave(bus, 0, di->speed_w, di->mode); + if (!spi) { + printf("%s: Failed to set up slave\n", __func__); + return 1; + } + + /* Claim spi bus */ + ret = spi_claim_bus(spi); + if (ret) { + debug("%s: Failed to claim SPI bus: %d\n", __func__, ret); + goto free_bus; + } + + if (argc > ARRAY_SIZE(buf) - 3) + argc = ARRAY_SIZE(buf) - 3; + + reg = simple_strtoul(argv[1], NULL, 16); + buf[0] = reg >> 8; + buf[1] = reg; + buf[2] = argc - arg; + while (arg < argc) { + buf[arg + 1] = simple_strtoul(argv[arg], NULL, 16); + arg++; + } + arg++; + buf[arg++] = 0; + buf[arg++] = 0; + buf[arg++] = 0; + SETUP_IOMUX_PADS(spi_ss0_pad); + di->spi_write_rtn(spi, buf); + SETUP_IOMUX_PADS(spi_ss0_gpio_pad); + spi_release_bus(spi); +free_bus: + spi_free_slave(spi); + enable_spi_clk(0, bus); + return ret ? 1 : 0; +} + +U_BOOT_CMD( + spid, 70, 0, do_spid, + "write cmd, data to spi display", + "reg16 [byte]" +); + +static int do_spidr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unsigned cs_gpio = GP_ECSPI2_CS; + struct spi_slave *spi; + int display_index = g_dev ? g_dev->addr : 0; + int bus = g_dev ? g_dev->bus : 1; + struct spi_display_info *di = &spi_di[display_index]; + int ret = 0; + uint reg; + int val; + + if (argc != 2) + return CMD_RET_USAGE; + gpio_direction_output(GP_BACKLIGHT, 1); + gpio_direction_output(cs_gpio, 1); + SETUP_IOMUX_PADS(spi_mosi_r_pads); + + enable_spi_clk(1, bus); + + /* Setup spi_slave */ + spi = spi_setup_slave(bus, 0, di->speed_r, di->mode); + if (!spi) { + printf("%s: Failed to set up slave\n", __func__); + return 1; + } + + /* Claim spi bus */ + ret = spi_claim_bus(spi); + if (ret) { + debug("%s: Failed to claim SPI bus: %d\n", __func__, ret); + goto free_bus; + } + + reg = simple_strtoul(argv[1], NULL, 16); + SETUP_IOMUX_PADS(spi_ss0_pad); + val = di->spi_read_rtn(spi, reg); + SETUP_IOMUX_PADS(spi_ss0_gpio_pad); + printf("spidr: reg:0x%x = 0x%x\n", reg, val); + spi_release_bus(spi); +free_bus: + spi_free_slave(spi); + enable_spi_clk(0, bus); + return ret ? 1 : 0; +} + +U_BOOT_CMD( + spidr, 70, 0, do_spidr, + "read spi display register", + "reg16" +); diff --git a/board/boundary/ioc/spi_display.h b/board/boundary/ioc/spi_display.h new file mode 100644 index 0000000..e59275d --- /dev/null +++ b/board/boundary/ioc/spi_display.h @@ -0,0 +1,2 @@ +int detect_spi(struct display_info_t const *dev); +void enable_spi_rgb(struct display_info_t const *dev); diff --git a/board/boundary/ls/Kconfig b/board/boundary/ls/Kconfig new file mode 100644 index 0000000..6d6ac69 --- /dev/null +++ b/board/boundary/ls/Kconfig @@ -0,0 +1,18 @@ +if TARGET_LS + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "ls" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "ls" + +endif diff --git a/board/boundary/ls/MAINTAINERS b/board/boundary/ls/MAINTAINERS new file mode 100644 index 0000000..e8eaea7 --- /dev/null +++ b/board/boundary/ls/MAINTAINERS @@ -0,0 +1,6 @@ +LS BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/ls/ +F: include/configs/ls.h +F: configs/ls_defconfig diff --git a/board/boundary/ls/Makefile b/board/boundary/ls/Makefile new file mode 100644 index 0000000..2c4ce9f --- /dev/null +++ b/board/boundary/ls/Makefile @@ -0,0 +1,6 @@ +# +# Copyright (C) 2014, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# +obj-y := ls.o diff --git a/board/boundary/ls/ls.c b/board/boundary/ls/ls.c new file mode 100644 index 0000000..1aa44dd --- /dev/null +++ b/board/boundary/ls/ls.c @@ -0,0 +1,971 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2014, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define AUD_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define CEC_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_22K_UP | PAD_CTL_ODE | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define USDHC_CLK_PAD_CTRL (PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (USDHC_CLK_PAD_CTRL | PAD_CTL_PUS_47K_UP) + +#define WEAK_PULLDN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDN_OUTPUT (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_SLOW) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLUP_OUTPUT (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_SLOW) + + +static const iomux_v3_cfg_t ls_pads[] = { +// IOMUX_PAD_CTRL(GPIO_8__XTALOSC_REF_CLK_32K, OUTPUT_40OHM), /* TiWi, WM5102, GTM609W */ + + /* Accelerometer (MPU-9250) (i2c3) */ +#ifdef CONFIG_NEW_REV +#define GP_ACCEL_IRQ IMX_GPIO_NR(3, 28) + IOMUX_PAD_CTRL(EIM_D28__GPIO3_IO28, WEAK_PULLUP), +#else +#define GP_ACCEL_IRQ IMX_GPIO_NR(5, 30) + IOMUX_PAD_CTRL(CSI0_DAT12__GPIO5_IO30, WEAK_PULLUP), +#endif + + /* AUDMUX - GSM */ + IOMUX_PAD_CTRL(CSI0_DAT7__AUD3_RXD, AUD_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT4__AUD3_TXC, AUD_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT5__AUD3_TXD, AUD_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT6__AUD3_TXFS, AUD_PAD_CTRL), + + /* AUDMUX - wm5102 */ + IOMUX_PAD_CTRL(DI0_PIN4__AUD6_RXD, AUD_PAD_CTRL), + IOMUX_PAD_CTRL(DI0_PIN15__AUD6_TXC, AUD_PAD_CTRL), + IOMUX_PAD_CTRL(DI0_PIN2__AUD6_TXD, AUD_PAD_CTRL), + IOMUX_PAD_CTRL(DI0_PIN3__AUD6_TXFS, AUD_PAD_CTRL), + + /* Camera (mipi) - LM3555 strobe/flash */ +#ifdef CONFIG_NEW_REV +#define GP_CAM_STROBE IMX_GPIO_NR(3, 29) + IOMUX_PAD_CTRL(EIM_D29__GPIO3_IO29, WEAK_PULLDN_OUTPUT), +#define GP_CAM_TORCH IMX_GPIO_NR(3, 30) + IOMUX_PAD_CTRL(EIM_D30__GPIO3_IO30, WEAK_PULLDN_OUTPUT), +#else +#define GP_CAM_STROBE IMX_GPIO_NR(3, 18) + IOMUX_PAD_CTRL(EIM_D18__GPIO3_IO18, WEAK_PULLDN_OUTPUT), +#define GP_CAM_TORCH IMX_GPIO_NR(3, 19) + IOMUX_PAD_CTRL(EIM_D19__GPIO3_IO19, WEAK_PULLDN_OUTPUT), +#endif + +#define GP_CAM_MIPI_RESET IMX_GPIO_NR(1, 30) + IOMUX_PAD_CTRL(ENET_TXD0__GPIO1_IO30, WEAK_PULLDN_OUTPUT), +#define GP_CAM_MIPI_EN IMX_GPIO_NR(1, 29) + IOMUX_PAD_CTRL(ENET_TXD1__GPIO1_IO29, WEAK_PULLDN_OUTPUT), + IOMUX_PAD_CTRL(GPIO_3__CCM_CLKO2, OUTPUT_40OHM), /* XCLK */ + + /* Display (Braille) */ +#define GP_DISP_STROBE IMX_GPIO_NR(5, 8) + IOMUX_PAD_CTRL(DISP0_DAT14__GPIO5_IO08, WEAK_PULLDN_OUTPUT), +#define GP_DISP_HV_EN IMX_GPIO_NR(2, 24) + IOMUX_PAD_CTRL(EIM_CS1__GPIO2_IO24, WEAK_PULLDN_OUTPUT), + +#define GP_DISP_KEY_1 IMX_GPIO_NR(3, 6) + IOMUX_PAD_CTRL(EIM_DA6__GPIO3_IO06, WEAK_PULLDN), +#define GP_DISP_KEY_2 IMX_GPIO_NR(3, 7) + IOMUX_PAD_CTRL(EIM_DA7__GPIO3_IO07, WEAK_PULLDN), +#define GP_DISP_KEY_3 IMX_GPIO_NR(3, 8) + IOMUX_PAD_CTRL(EIM_DA8__GPIO3_IO08, WEAK_PULLDN), +#define GP_DISP_KEY_4 IMX_GPIO_NR(3, 9) + IOMUX_PAD_CTRL(EIM_DA9__GPIO3_IO09, WEAK_PULLDN), +#define GP_DISP_KEY_5 IMX_GPIO_NR(3, 10) + IOMUX_PAD_CTRL(EIM_DA10__GPIO3_IO10, WEAK_PULLDN), +#define GP_DISP_KEY_6 IMX_GPIO_NR(3, 11) + IOMUX_PAD_CTRL(EIM_DA11__GPIO3_IO11, WEAK_PULLDN), +#define GP_DISP_KEY_SHIFT IMX_GPIO_NR(3, 12) + IOMUX_PAD_CTRL(EIM_DA12__GPIO3_IO12, WEAK_PULLDN), +#define GP_DISP_KEY_SPACE IMX_GPIO_NR(3, 13) + IOMUX_PAD_CTRL(EIM_DA13__GPIO3_IO13, WEAK_PULLDN), +#define GP_DISP_KEY_CTRL IMX_GPIO_NR(3, 14) + IOMUX_PAD_CTRL(EIM_DA14__GPIO3_IO14, WEAK_PULLDN), +#define GP_DISP_LED_RED IMX_GPIO_NR(5, 9) + IOMUX_PAD_CTRL(DISP0_DAT15__GPIO5_IO09, WEAK_PULLDN_OUTPUT), +#ifdef CONFIG_NEW_REV +#define GP_DISP_LED_GREEN IMX_GPIO_NR(4, 25) + IOMUX_PAD_CTRL(DISP0_DAT4__GPIO4_IO25, WEAK_PULLDN_OUTPUT), +#else +#define GP_DISP_LED_GREEN IMX_GPIO_NR(5, 10) + IOMUX_PAD_CTRL(DISP0_DAT16__GPIO5_IO10, WEAK_PULLDN_OUTPUT), +#endif + + /* Keypad */ + IOMUX_PAD_CTRL(KEY_COL0__KEY_COL0, WEAK_PULLDN_OUTPUT), + IOMUX_PAD_CTRL(KEY_COL1__KEY_COL1, WEAK_PULLDN_OUTPUT), + IOMUX_PAD_CTRL(KEY_COL2__KEY_COL2, WEAK_PULLDN_OUTPUT), + IOMUX_PAD_CTRL(KEY_COL3__KEY_COL3, WEAK_PULLDN_OUTPUT), + IOMUX_PAD_CTRL(KEY_COL4__KEY_COL4, WEAK_PULLDN_OUTPUT), + IOMUX_PAD_CTRL(GPIO_19__KEY_COL5, WEAK_PULLDN_OUTPUT), + IOMUX_PAD_CTRL(KEY_ROW0__KEY_ROW0, WEAK_PULLDN_OUTPUT), + IOMUX_PAD_CTRL(KEY_ROW1__KEY_ROW1, WEAK_PULLDN_OUTPUT), + IOMUX_PAD_CTRL(KEY_ROW2__KEY_ROW2, WEAK_PULLDN_OUTPUT), + + /* ECSPI1 pads (serial nor eeprom) */ +#ifdef CONFIG_NEW_REV + IOMUX_PAD_CTRL(EIM_D17__ECSPI1_MISO, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D18__ECSPI1_MOSI, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D16__ECSPI1_SCLK, SPI_PAD_CTRL), +#define GP_ECSPI1_NOR_CS IMX_GPIO_NR(3, 19) + IOMUX_PAD_CTRL(EIM_D19__GPIO3_IO19, WEAK_PULLUP), +#else + IOMUX_PAD_CTRL(DISP0_DAT22__ECSPI1_MISO, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT21__ECSPI1_MOSI, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT20__ECSPI1_SCLK, SPI_PAD_CTRL), +#define GP_ECSPI1_NOR_CS IMX_GPIO_NR(5, 17) + IOMUX_PAD_CTRL(DISP0_DAT23__GPIO5_IO17, WEAK_PULLUP), +#endif + + /* ECSPI2 pads (Braille Display) */ +#ifdef CONFIG_NEW_REV + IOMUX_PAD_CTRL(DISP0_DAT16__ECSPI2_MOSI, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT17__ECSPI2_MISO, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT19__ECSPI2_SCLK, SPI_PAD_CTRL), +#define GP_ECSPI2_CS0 IMX_GPIO_NR(5, 12) + IOMUX_PAD_CTRL(DISP0_DAT18__GPIO5_IO12, WEAK_PULLUP), +#else +#define GP_BRL_MISO IMX_GPIO_NR(5, 18) + IOMUX_PAD_CTRL(CSI0_PIXCLK__GPIO5_IO18, WEAK_PULLUP), +#define GP_BRL_MOSI IMX_GPIO_NR(5, 29) + IOMUX_PAD_CTRL(CSI0_DAT11__GPIO5_IO29, WEAK_PULLDN_OUTPUT), +#define GP_BRL_CLK IMX_GPIO_NR(4, 16) + IOMUX_PAD_CTRL(DI0_DISP_CLK__GPIO4_IO16, WEAK_PULLDN_OUTPUT), +#define GP_BRL_DATA_BUF_EN IMX_GPIO_NR(5, 28) + IOMUX_PAD_CTRL(CSI0_DAT10__GPIO5_IO28, WEAK_PULLDN_OUTPUT), +#endif + + /* ECSPI3 pads GSM (GTM609W) */ + IOMUX_PAD_CTRL(DISP0_DAT2__ECSPI3_MISO, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT1__ECSPI3_MOSI, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT0__ECSPI3_SCLK, SPI_PAD_CTRL), +#define GP_ECSPI3_GSM IMX_GPIO_NR(4, 24) + IOMUX_PAD_CTRL(DISP0_DAT3__GPIO4_IO24, WEAK_PULLUP), + + /* ECSPI5 pads sound(wm5102) */ + IOMUX_PAD_CTRL(SD1_DAT0__ECSPI5_MISO, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(SD1_CMD__ECSPI5_MOSI, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(SD1_CLK__ECSPI5_SCLK, SPI_PAD_CTRL), +#define GP_ECSPI5_WM5102 IMX_GPIO_NR(1, 17) + IOMUX_PAD_CTRL(SD1_DAT1__GPIO1_IO17, WEAK_PULLUP), + + /* GSM sim (GTM609W) */ +#define GP_GSM_SIM_RESET IMX_GPIO_NR(5, 19) + IOMUX_PAD_CTRL(CSI0_MCLK__GPIO5_IO19, WEAK_PULLUP), +#define GP_GSM_HOST_WAKE_WWAN IMX_GPIO_NR(5, 20) + IOMUX_PAD_CTRL(CSI0_DATA_EN__GPIO5_IO20, WEAK_PULLUP), +#define GP_GSM_PWR_EN IMX_GPIO_NR(6, 2) + IOMUX_PAD_CTRL(CSI0_DAT16__GPIO6_IO02, WEAK_PULLUP), +#define GP_GSM_RESET IMX_GPIO_NR(6, 3) + IOMUX_PAD_CTRL(CSI0_DAT17__GPIO6_IO03, WEAK_PULLUP), +#define GP_GSM_ON_OFF IMX_GPIO_NR(6, 4) + IOMUX_PAD_CTRL(CSI0_DAT18__GPIO6_IO04, WEAK_PULLUP), +#define GP_GSM_HOST_WAKE IMX_GPIO_NR(6, 5) + IOMUX_PAD_CTRL(CSI0_DAT19__GPIO6_IO05, WEAK_PULLUP), +// IOMUX_PAD_CTRL(GPIO_8__XTALOSC_REF_CLK_32K, OUTPUT_40OHM), /* slow clock */ + + /* GPS */ +#define GP_GPS_HEARTBEAT IMX_GPIO_NR(4, 27) + IOMUX_PAD_CTRL(DISP0_DAT6__GPIO4_IO27, WEAK_PULLDN_OUTPUT), +#define GP_GPS_IRQ IMX_GPIO_NR(4, 28) + IOMUX_PAD_CTRL(DISP0_DAT7__GPIO4_IO28, WEAK_PULLDN_OUTPUT), +#define GP_GPS_RESET IMX_GPIO_NR(4, 30) + IOMUX_PAD_CTRL(DISP0_DAT9__GPIO4_IO30, WEAK_PULLDN_OUTPUT), + + /* HDMI CEC */ + IOMUX_PAD_CTRL(EIM_A25__HDMI_TX_CEC_LINE, CEC_PAD_CTRL), + + /* I2C1 - rv4162(rtc), */ + + /* I2C2 - J12(touch connector), */ +#define GP_I2C2_HDMI_EN IMX_GPIO_NR(5, 5) + IOMUX_PAD_CTRL(DISP0_DAT11__GPIO5_IO05, WEAK_PULLDN_OUTPUT), +#ifdef CONFIG_NEW_REV +#define GP_I2C2_CAMERA_EN IMX_GPIO_NR(2, 1) + IOMUX_PAD_CTRL(NANDF_D1__GPIO2_IO01, WEAK_PULLDN_OUTPUT), +#define GP_I2C2_FLASH_EN IMX_GPIO_NR(2, 31) + IOMUX_PAD_CTRL(EIM_EB3__GPIO2_IO31, WEAK_PULLDN_OUTPUT), +#else +#define GP_I2C2_CAMERA_EN IMX_GPIO_NR(1, 31) + IOMUX_PAD_CTRL(ENET_MDC__GPIO1_IO31, WEAK_PULLDN_OUTPUT), +#define GP_I2C2_FLASH_EN IMX_GPIO_NR(3, 17) + IOMUX_PAD_CTRL(EIM_D17__GPIO3_IO17, WEAK_PULLDN_OUTPUT), +#endif + + /* I2C3 - MPR21 cap touch, MPU-9250(accelerometer) */ +#define GP_I2C3_ACCEL_EN IMX_GPIO_NR(5, 31) + IOMUX_PAD_CTRL(CSI0_DAT13__GPIO5_IO31, WEAK_PULLDN_OUTPUT), +#ifndef CONFIG_NEW_REV +#define GP_I2C3_MAX77818_EN IMX_GPIO_NR(4, 25) + IOMUX_PAD_CTRL(DISP0_DAT4__GPIO4_IO25, WEAK_PULLDN_OUTPUT), +#endif + + /* MAX77818, ends with B(active low) */ +#define GP_MAX77818_INOKB IMX_GPIO_NR(4, 26) /* C5 */ + IOMUX_PAD_CTRL(DISP0_DAT5__GPIO4_IO26, WEAK_PULLUP), +#define GP_MAX77818_INTB IMX_GPIO_NR(5, 6) /* C3 */ + IOMUX_PAD_CTRL(DISP0_DAT12__GPIO5_IO06, WEAK_PULLUP), +#define GP_MAX77818_WCINOKB IMX_GPIO_NR(5, 7) /* A5 */ + IOMUX_PAD_CTRL(DISP0_DAT13__GPIO5_IO07, WEAK_PULLUP), + + /* Power */ +#define GP_MAIN_ON_OFF IMX_GPIO_NR(3, 20) /* input to or gate */ + IOMUX_PAD_CTRL(EIM_D20__GPIO3_IO20, WEAK_PULLUP), +#ifdef CONFIG_NEW_REV +#define GP_ON_OFF_IRQ IMX_GPIO_NR(5, 14) + IOMUX_PAD_CTRL(DISP0_DAT20__GPIO5_IO14, WEAK_PULLUP), +#else +#define GP_ON_OFF_IRQ IMX_GPIO_NR(5, 11) + IOMUX_PAD_CTRL(DISP0_DAT17__GPIO5_IO11, WEAK_PULLUP), +#endif + + /* PMIC */ +#define GP_PMIC_C0_OUT IMX_GPIO_NR(2, 28) + IOMUX_PAD_CTRL(EIM_EB0__GPIO2_IO28, WEAK_PULLUP), +#define GP_PMIC_C1_OUT IMX_GPIO_NR(2, 29) + IOMUX_PAD_CTRL(EIM_EB1__GPIO2_IO29, WEAK_PULLUP), +#define GP_PMIC_C2_OUT IMX_GPIO_NR(3, 0) + IOMUX_PAD_CTRL(EIM_DA0__GPIO3_IO00, WEAK_PULLUP), +#define GP_PMIC_C3_OUT IMX_GPIO_NR(3, 1) + IOMUX_PAD_CTRL(EIM_DA1__GPIO3_IO01, WEAK_PULLUP), +#define GP_PMIC_C4_OUT IMX_GPIO_NR(2, 25) + IOMUX_PAD_CTRL(EIM_OE__GPIO2_IO25, WEAK_PULLUP), +#define GP_PMIC_C5_OUT IMX_GPIO_NR(2, 27) + IOMUX_PAD_CTRL(EIM_LBA__GPIO2_IO27, WEAK_PULLUP), +#define GP_PMIC_R0_IN IMX_GPIO_NR(3, 2) + IOMUX_PAD_CTRL(EIM_DA2__GPIO3_IO02, WEAK_PULLUP), +#define GP_PMIC_R1_IN IMX_GPIO_NR(3, 3) + IOMUX_PAD_CTRL(EIM_DA3__GPIO3_IO03, WEAK_PULLUP), +#define GP_PMIC_R2_IN IMX_GPIO_NR(3, 4) + IOMUX_PAD_CTRL(EIM_DA4__GPIO3_IO04, WEAK_PULLUP), +#define GP_PMIC_R3_IN IMX_GPIO_NR(3, 5) + IOMUX_PAD_CTRL(EIM_DA5__GPIO3_IO05, WEAK_PULLUP), +#define GP_PMIC_R4_IN IMX_GPIO_NR(2, 23) + IOMUX_PAD_CTRL(EIM_CS0__GPIO2_IO23, WEAK_PULLUP), +#define GP_PMIC_R5_IN IMX_GPIO_NR(2, 26) + IOMUX_PAD_CTRL(EIM_RW__GPIO2_IO26, WEAK_PULLUP), +#define GP_PMIC_KEYPAD_LOCK IMX_GPIO_NR(5, 0) + IOMUX_PAD_CTRL(EIM_WAIT__GPIO5_IO00, WEAK_PULLUP), + + /* PWM1 */ +#define GP_PWM1_BUZZER IMX_GPIO_NR(4, 29) + IOMUX_PAD_CTRL(DISP0_DAT8__GPIO4_IO29, WEAK_PULLDN_OUTPUT), + + /* Regulator - HDMI, USBH1_DN3, WM5102 speaker, braille display */ +#define GP_REG_5V_EN IMX_GPIO_NR(7, 8) + IOMUX_PAD_CTRL(SD3_RST__GPIO7_IO08, WEAK_PULLUP_OUTPUT), + + /* rtc */ +#ifdef CONFIG_NEW_REV +#define GP_RTC_RV4162_IRQ IMX_GPIO_NR(5, 15) + IOMUX_PAD_CTRL(DISP0_DAT21__GPIO5_IO15, WEAK_PULLUP), +#else +#define GP_RTC_RV4162_IRQ IMX_GPIO_NR(5, 12) + IOMUX_PAD_CTRL(DISP0_DAT18__GPIO5_IO12, WEAK_PULLUP), +#endif + + /* Test points */ +#define GP_TP6 IMX_GPIO_NR(1, 4) + IOMUX_PAD_CTRL(GPIO_4__GPIO1_IO04, WEAK_PULLUP), /* 1.8V */ +#define GP_TP7 IMX_GPIO_NR(1, 7) + IOMUX_PAD_CTRL(GPIO_9__GPIO1_IO09, WEAK_PULLUP), /* 1.8V */ +#define GP_TP24 IMX_GPIO_NR(6, 31) + IOMUX_PAD_CTRL(EIM_BCLK__GPIO6_IO31, WEAK_PULLUP), /* 1.8V */ +#define GP_TP29 IMX_GPIO_NR(1, 19) + IOMUX_PAD_CTRL(SD1_DAT2__GPIO1_IO19, WEAK_PULLUP), /* 1.8V */ +#define GP_TP30 IMX_GPIO_NR(1, 21) + IOMUX_PAD_CTRL(SD1_DAT3__GPIO1_IO21, WEAK_PULLUP), /* 1.8V */ +#define GP_TP92 IMX_GPIO_NR(6, 10) + IOMUX_PAD_CTRL(NANDF_RB0__GPIO6_IO10, WEAK_PULLUP), /* 2.6V */ +#define GP_TP93 IMX_GPIO_NR(1, 27) + IOMUX_PAD_CTRL(ENET_RXD0__GPIO1_IO27, WEAK_PULLUP), /* 2.6V */ + +#ifdef CONFIG_NEW_REV +#define GP_TP28 IMX_GPIO_NR(5, 16) + IOMUX_PAD_CTRL(DISP0_DAT22__GPIO5_IO16, OUTPUT_40OHM), /* tri-state */ +#define GP_TP107 IMX_GPIO_NR(5, 17) + IOMUX_PAD_CTRL(DISP0_DAT23__GPIO5_IO17, OUTPUT_40OHM), /* tri-state */ +#define GP_TP108 IMX_GPIO_NR(5, 30) + IOMUX_PAD_CTRL(CSI0_DAT12__GPIO5_IO30, WEAK_PULLUP), +#define GP_TP110 IMX_GPIO_NR(5, 18) + IOMUX_PAD_CTRL(CSI0_PIXCLK__GPIO5_IO18, WEAK_PULLUP), +#define GP_TP111 IMX_GPIO_NR(5, 29) + IOMUX_PAD_CTRL(CSI0_DAT11__GPIO5_IO29, WEAK_PULLDN), +#else +#define GP_TP25 IMX_GPIO_NR(2, 31) + IOMUX_PAD_CTRL(EIM_EB3__GPIO2_IO31, OUTPUT_40OHM), /* tri-state */ +#define GP_TP27 IMX_GPIO_NR(3, 28) + IOMUX_PAD_CTRL(EIM_D28__GPIO3_IO28, OUTPUT_40OHM), /* tri-state */ +#define GP_TP28 IMX_GPIO_NR(3, 30) + IOMUX_PAD_CTRL(EIM_D30__GPIO3_IO30, OUTPUT_40OHM), /* tri-state */ +#define GP_TP107 IMX_GPIO_NR(4, 13) + IOMUX_PAD_CTRL(KEY_ROW3__GPIO4_IO13, OUTPUT_40OHM), /* tri-state */ +#endif + + /* UART1 */ + IOMUX_PAD_CTRL(SD3_DAT7__UART1_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT6__UART1_RX_DATA, UART_PAD_CTRL), + + /* UART2 */ + IOMUX_PAD_CTRL(EIM_D26__UART2_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D27__UART2_RX_DATA, UART_PAD_CTRL), + + /* UART3 for wl1271 */ + IOMUX_PAD_CTRL(EIM_D24__UART3_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D25__UART3_RX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D23__UART3_CTS_B, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D31__UART3_RTS_B, UART_PAD_CTRL), + + /* UART5 - gps */ + IOMUX_PAD_CTRL(CSI0_DAT14__UART5_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT15__UART5_RX_DATA, UART_PAD_CTRL), + + /* USBH1 */ +#define GP_USBH1_HUB_RESET IMX_GPIO_NR(4, 31) + IOMUX_PAD_CTRL(DISP0_DAT10__GPIO4_IO31, WEAK_PULLDN_OUTPUT), +#define GP_VBUS_GOOD IMX_GPIO_NR(3, 15) + IOMUX_PAD_CTRL(EIM_DA15__GPIO3_IO15, WEAK_PULLUP), /* 1.8V */ + + /* USB OTG */ + IOMUX_PAD_CTRL(GPIO_1__USB_OTG_ID, WEAK_PULLUP), + IOMUX_PAD_CTRL(EIM_D21__USB_OTG_OC, WEAK_PULLUP), +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) + IOMUX_PAD_CTRL(EIM_D22__GPIO3_IO22, WEAK_PULLDN_OUTPUT), + + /* USDHC2 - TiWi wl1271 pads */ + IOMUX_PAD_CTRL(SD2_CLK__SD2_CLK, USDHC_CLK_PAD_CTRL), + IOMUX_PAD_CTRL(SD2_CMD__SD2_CMD, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD2_DAT0__SD2_DATA0, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD2_DAT1__SD2_DATA1, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD2_DAT2__SD2_DATA2, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD2_DAT3__SD2_DATA3, USDHC_PAD_CTRL), +#define GP_WL12XX_WL_IRQ IMX_GPIO_NR(6, 11) + IOMUX_PAD_CTRL(NANDF_CS0__GPIO6_IO11, WEAK_PULLDN), +#define GP_WL12XX_WL_ENABLE IMX_GPIO_NR(6, 15) + IOMUX_PAD_CTRL(NANDF_CS2__GPIO6_IO15, OUTPUT_40OHM), +#define GP_WL12XX_BT_ENABLE IMX_GPIO_NR(6, 16) + IOMUX_PAD_CTRL(NANDF_CS3__GPIO6_IO16, OUTPUT_40OHM), +// IOMUX_PAD_CTRL(GPIO_8__XTALOSC_REF_CLK_32K, OUTPUT_40OHM), /* slow clock */ + + /* USDHC3 - micro SD card */ + IOMUX_PAD_CTRL(SD3_CLK__SD3_CLK, USDHC_CLK_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_CMD__SD3_CMD, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT0__SD3_DATA0, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT1__SD3_DATA1, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT2__SD3_DATA2, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT3__SD3_DATA3, USDHC_PAD_CTRL), +#define GP_SD3_WP IMX_GPIO_NR(7, 1) + IOMUX_PAD_CTRL(SD3_DAT4__GPIO7_IO01, WEAK_PULLUP), +#define GP_SD3_CD IMX_GPIO_NR(7, 0) + IOMUX_PAD_CTRL(SD3_DAT5__GPIO7_IO00, WEAK_PULLUP), + + /* USDHC4 - eMMC */ + IOMUX_PAD_CTRL(SD4_CLK__SD4_CLK, USDHC_CLK_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_CMD__SD4_CMD, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT0__SD4_DATA0, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT1__SD4_DATA1, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT2__SD4_DATA2, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT3__SD4_DATA3, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT4__SD4_DATA4, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT5__SD4_DATA5, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT6__SD4_DATA6, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT7__SD4_DATA7, USDHC_PAD_CTRL), +#define GP_EMMC_RESET IMX_GPIO_NR(2, 6) + IOMUX_PAD_CTRL(NANDF_D6__GPIO2_IO06, WEAK_PULLUP), + + /* wm5102 */ +#define GP_WM5102_GPIO4 IMX_GPIO_NR(2, 0) + IOMUX_PAD_CTRL(NANDF_D0__GPIO2_IO00, WEAK_PULLUP), +#define GP_WM5102_GPIO5 IMX_GPIO_NR(6, 9) + IOMUX_PAD_CTRL(NANDF_WP_B__GPIO6_IO09, WEAK_PULLUP), +#define GP_WM5102_LINE_HP_DET IMX_GPIO_NR(2, 21) + IOMUX_PAD_CTRL(EIM_A17__GPIO2_IO21, WEAK_PULLUP), +#define GP_WM5102_LINE_HP_DET2 IMX_GPIO_NR(2, 22) + IOMUX_PAD_CTRL(EIM_A16__GPIO2_IO22, WEAK_PULLUP), +#define GP_WM5102_IRQ IMX_GPIO_NR(2, 20) + IOMUX_PAD_CTRL(EIM_A18__GPIO2_IO20, WEAK_PULLUP), +#define GP_WM5102_RESET IMX_GPIO_NR(6, 8) + IOMUX_PAD_CTRL(NANDF_ALE__GPIO6_IO08, WEAK_PULLDN_OUTPUT), +#define GP_WM5102_LDO_EN IMX_GPIO_NR(6, 7) + IOMUX_PAD_CTRL(NANDF_CLE__GPIO6_IO07, WEAK_PULLDN_OUTPUT), + IOMUX_PAD_CTRL(GPIO_0__CCM_CLKO1, OUTPUT_40OHM), /* MCLK1 */ +// IOMUX_PAD_CTRL(GPIO_8__XTALOSC_REF_CLK_32K, OUTPUT_40OHM), /* MCLK2 */ +}; + +/* + * + */ +static struct i2c_pads_info i2c_pads[] = { + /* I2C1, rv4162 */ + I2C_PADS_INFO_ENTRY(I2C1, CSI0_DAT9, 5, 27, CSI0_DAT8, 5, 26, I2C_PAD_CTRL), +#ifdef CONFIG_NEW_REV + I2C_PADS_INFO_ENTRY(I2C2, EIM_EB2, 2, 30, KEY_ROW3, 4, 13, I2C_PAD_CTRL), +#else + I2C_PADS_INFO_ENTRY(I2C2, EIM_EB2, 2, 30, EIM_D16, 3, 16, I2C_PAD_CTRL), +#endif + I2C_PADS_INFO_ENTRY(I2C3, GPIO_5, 1, 05, GPIO_16, 7, 11, I2C_PAD_CTRL), +}; + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); +// printf("%s:%p *%p=0x%lx\n", __func__, gd, &gd->ram_size, gd->ram_size); + return 0; +} + +#ifdef CONFIG_USB_EHCI_MX6 +static void charge_from_usb(int enable) +{ + u8 val8 = enable ? 0x27 : 7; + u8 orig_i2c_bus = i2c_get_bus_num(); + + i2c_set_bus_num(2); + i2c_write(0x69, 0xc3, 1, &val8, 1); + i2c_set_bus_num(orig_i2c_bus); +} + +int board_ehci_hcd_init(int port) +{ + return 0; +} + +int board_ehci_power(int port, int on) +{ + int gp = port ? GP_USBH1_HUB_RESET : GP_USB_OTG_PWR; + + if (!port && on) + charge_from_usb(0); + gpio_set_value(gp, on); + if (!port && !on) + charge_from_usb(1); + return 0; +} + +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {.esdhc_base = USDHC3_BASE_ADDR, .max_bus_width = 4}, + {.esdhc_base = USDHC4_BASE_ADDR, .max_bus_width = 8}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int gp_cd = GP_SD3_CD; + + if (cfg->esdhc_base != USDHC3_BASE_ADDR) + return 1; /* eMMC always present */ + gpio_direction_input(gp_cd); + return !gpio_get_value(gp_cd); +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + break; + case 1: + gpio_set_value(GP_EMMC_RESET, 1); /* release reset */ + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + int gp = (bus == 0 && cs == 0) ? GP_ECSPI1_NOR_CS : -1; + return gp; +} +#endif + +int board_eth_init(bd_t *bis) +{ +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + + +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) { + return -1; + } + + env_loadsplash = getenv("loadsplash"); + if (env_loadsplash == NULL) { + printf("Environment variable loadsplash not found!\n"); + return -1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("failed to run loadsplash %s\n\n", env_loadsplash); + return -1; + } + + return 0; +} + +#if defined(CONFIG_VIDEO_IPUV3) + +const struct display_info_t displays[] = { + /* hdmi */ + IMX_VD50_1280_720M_60(HDMI, 1, 1), + IMX_VD50_1920_1080M_60(HDMI, 0, 1), + IMX_VD50_1024_768M_60(HDMI, 0, 1), +}; + +size_t display_count = ARRAY_SIZE(displays); + +int board_cfb_skip(void) +{ + return NULL != getenv("novideo"); +} +#endif + + +static unsigned short gpios_out_low[] = { + GP_CAM_STROBE, + GP_CAM_TORCH, + GP_CAM_MIPI_RESET, + GP_CAM_MIPI_EN, + GP_DISP_HV_EN, +#ifndef CONFIG_NEW_REV + GP_BRL_DATA_BUF_EN, + GP_I2C3_MAX77818_EN, +#endif + GP_DISP_LED_RED, + GP_DISP_LED_GREEN, + GP_GSM_SIM_RESET, + GP_GSM_PWR_EN, + GP_GSM_RESET, + GP_GSM_ON_OFF, + GP_GPS_RESET, + GP_I2C2_HDMI_EN, + GP_I2C2_CAMERA_EN, + GP_I2C2_FLASH_EN, + GP_I2C3_ACCEL_EN, + GP_PWM1_BUZZER, + GP_USBH1_HUB_RESET, + GP_USB_OTG_PWR, + GP_WL12XX_WL_ENABLE, + GP_WL12XX_BT_ENABLE, + GP_EMMC_RESET, + GP_WM5102_RESET, + GP_WM5102_LDO_EN, +}; + +static unsigned short gpios_out_high[] = { + GP_MAIN_ON_OFF, + GP_ECSPI1_NOR_CS, + GP_ECSPI3_GSM, + GP_ECSPI5_WM5102, + GP_REG_5V_EN, +}; + +static unsigned short gpios_in[] = { + GP_ACCEL_IRQ, + GP_DISP_KEY_1, + GP_DISP_KEY_2, + GP_DISP_KEY_3, + GP_DISP_KEY_4, + GP_DISP_KEY_5, + GP_DISP_KEY_6, + GP_DISP_KEY_SHIFT, + GP_DISP_KEY_SPACE, + GP_DISP_KEY_CTRL, + GP_DISP_STROBE, +#ifndef CONFIG_NEW_REV + GP_BRL_MISO, + GP_BRL_MOSI, + GP_BRL_CLK, +#endif + GP_VBUS_GOOD, + GP_GSM_HOST_WAKE_WWAN, + GP_GSM_HOST_WAKE, + GP_GPS_HEARTBEAT, + GP_GPS_IRQ, + GP_MAX77818_INOKB, + GP_MAX77818_INTB, + GP_MAX77818_WCINOKB, + GP_ON_OFF_IRQ, + GP_PMIC_C0_OUT, + GP_PMIC_C1_OUT, + GP_PMIC_C2_OUT, + GP_PMIC_C3_OUT, + GP_PMIC_C4_OUT, + GP_PMIC_C5_OUT, + GP_PMIC_R0_IN, + GP_PMIC_R1_IN, + GP_PMIC_R2_IN, + GP_PMIC_R3_IN, + GP_PMIC_R4_IN, + GP_PMIC_R5_IN, + GP_PMIC_KEYPAD_LOCK, + GP_RTC_RV4162_IRQ, + GP_TP6, + GP_TP7, + GP_TP24, + GP_TP29, + GP_TP30, + GP_TP92, + GP_TP93, +#ifndef CONFIG_NEW_REV + GP_TP25, + GP_TP27, +#endif + GP_TP28, + GP_TP107, +#ifdef CONFIG_NEW_REV + GP_TP108, + GP_TP110, + GP_TP111, +#endif + GP_WL12XX_WL_IRQ, + GP_SD3_WP, + GP_SD3_CD, + GP_WM5102_GPIO4, + GP_WM5102_GPIO5, + GP_WM5102_LINE_HP_DET, + GP_WM5102_LINE_HP_DET2, + GP_WM5102_IRQ, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned short *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + + SETUP_IOMUX_PADS(ls_pads); + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +void board_poweroff(void) +{ + struct snvs_regs *snvs = (struct snvs_regs *)(SNVS_BASE_ADDR); + + gpio_set_value(GP_MAIN_ON_OFF, 0); + writel(0x60, &snvs->lpcr); + mdelay(500); +} + +int board_init(void) +{ + int i; + int ret; + struct i2c_pads_info *p = i2c_pads + i2c_get_info_entry_offset(); + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + u8 orig_i2c_bus; + u8 val8; + u8 buf[2]; + + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + for (i = 0; i < 3; i++) { + setup_i2c(i, CONFIG_SYS_I2C_SPEED, 0x7f, p); + p += I2C_PADS_INFO_ENTRY_SPACING; + } + + orig_i2c_bus = i2c_get_bus_num(); + i2c_set_bus_num(2); +#ifndef CONFIG_NEW_REV + gpio_set_value(GP_I2C3_MAX77818_EN, 1); +#endif +#define I2C_ADDR_CHARGER 0x69 + val8 = 0x7f; /* 4.0A source */ + i2c_write(I2C_ADDR_CHARGER, 0xc0, 1, &val8, 1); + val8 = 0x0c; /* Protection allow 0xb9 write */ + i2c_write(I2C_ADDR_CHARGER, 0xbd, 1, &val8, 1); + val8 = 0x14; /* 1A charge */ + i2c_write(I2C_ADDR_CHARGER, 0xb9, 1, &val8, 1); + val8 = 0x27; /* enable charging from otg */ + i2c_write(I2C_ADDR_CHARGER, 0xc3, 1, &val8, 1); + val8 = 0x5; /* enable charging mode */ + i2c_write(I2C_ADDR_CHARGER, 0xb7, 1, &val8, 1); + +#define I2C_ADDR_FUELGAUGE 0x36 +#define MAX77823_REG_VCELL 0x09 + ret = i2c_read(I2C_ADDR_FUELGAUGE, MAX77823_REG_VCELL, 1, buf, 2); +#ifndef CONFIG_NEW_REV + gpio_set_value(GP_I2C3_MAX77818_EN, 0); +#endif + if (!ret) { + u32 v = (buf[1] << 8) | buf[0]; + + v = (v >> 3) * 625; + printf("battery voltage = %d uV\n", v); + if (v < 3000000) { + printf("voltage = %d uV too low, powering off\n", v); + board_poweroff(); + } + } else { + printf("error reading battery voltage\n"); + } + i2c_set_bus_num(orig_i2c_bus); + +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); +#endif + return 0; +} + +int checkboard(void) +{ + puts("Board: LS\n"); + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; +}; + +static struct button_key const buttons[] = { + { "1", GP_DISP_KEY_1, '1' }, + { "2", GP_DISP_KEY_2, '2' }, + { "3", GP_DISP_KEY_3, '3' }, + { "4", GP_DISP_KEY_4, '4' }, + { "5", GP_DISP_KEY_5, '5' }, + { "6", GP_DISP_KEY_6, '6' }, + { "S", GP_DISP_KEY_SHIFT, 'S' }, + { "P", GP_DISP_KEY_SPACE, 'P' }, + { "C", GP_DISP_KEY_CTRL, 'C' }, +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + if (gpio_get_value(buttons[i].gpnum)) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +#ifdef CONFIG_PREBOOT +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} +#endif + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x60, 0x58, 0x00, 0x00)}, /* 8-bit eMMC */ + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_PREBOOT + preboot_keys(); +#endif + +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + unsigned char mac_address[6]; + char macbuf[18]; + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "ls"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + imx_get_mac_from_fuse(0, mac_address); + snprintf(macbuf, sizeof(macbuf), "%pM", mac_address); + setenv("wlmac", macbuf); + return 0; +} + +static int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + board_poweroff(); + return 0; +} + +U_BOOT_CMD( + poweroff, 70, 0, do_poweroff, + "power down board", + "" +); diff --git a/board/boundary/ls/ls2g.cfg b/board/boundary/ls/ls2g.cfg new file mode 100644 index 0000000..1f8bad6 --- /dev/null +++ b/board/boundary/ls/ls2g.cfg @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2014 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +/* turn on main power */ +DATA 4, 0x020e03b4, 0xf0b0 +DATA 4, 0x020e00a0, 5 + +#include "../nitrogen6_max/ddr-setup.cfg" +#include "../nitrogen6x/1066mhz_4x256mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/mcs/6x_bootscript-recovery.txt b/board/boundary/mcs/6x_bootscript-recovery.txt new file mode 100644 index 0000000..3ca24bb --- /dev/null +++ b/board/boundary/mcs/6x_bootscript-recovery.txt @@ -0,0 +1,39 @@ +setenv stdout serial,vga; + +setenv bootargs enable_wait_mode=off console=ttymxc1,115200 consoleblank=0 +setenv bootargs $bootargs rootwait root=/dev/mmcblk0p1 + +fivewire=''; +if gpio input 193 ; then ; else fivewire=1 ; fi +if gpio input 130 ; then fivewire=1 ; fi + +if itest.s x == x$fivewire ; then + # pin 193 (GP7:1) is low - 4-wire screen + echo "------ Four wire screen" ; + setenv bootargs $bootargs ar1020_i2c.calibration=-20,-21308,85584968,13901,-11,-1120224,65536,1280,800 + setenv bootargs $bootargs video=mxcfb0:dev=ldb,1280x800MR@60,if=RGB666 +else + echo "------ Five wire screen" ; + setenv bootargs $bootargs ar1020_i2c.calibration=22737,-182,-4169360,5,-14290,54938792,65536,1280,800 + setenv bootargs $bootargs video=mxcfb0:dev=ldb,1280x800MR@60,if=RGB24 +fi + +setenv nextcon 1; +while test "4" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +if ${fs}load ${dtype} ${disk}:1 10800000 uImage-usbwrite ; then + if ${fs}load ${dtype} ${disk}:1 12800000 uramdisk-usbwrite.img ; then + if itest.s x$havedtb == x ; then + bootm 10800000 12800000 ; + else + bootm 10800000 12800000 12000000 ; + fi + else + echo "------ error loading ram-disk uramdisk-usbwrite.img"; + fi +else + echo "------ error loading kernel uImage-usbwrite"; +fi diff --git a/board/boundary/mcs/6x_bootscript.txt b/board/boundary/mcs/6x_bootscript.txt new file mode 100644 index 0000000..f94cefc --- /dev/null +++ b/board/boundary/mcs/6x_bootscript.txt @@ -0,0 +1,55 @@ +setenv stdout serial,vga; + +setenv bootargs enable_wait_mode=off console=ttymxc1,115200 consoleblank=0 +setenv bootargs $bootargs rootwait root=/dev/mmcblk0p1 + +fivewire=''; +if gpio input 193 ; then ; else fivewire=1 ; fi +if gpio input 130 ; then ; else fivewire=1 ; fi + +if itest.s x == x$fivewire ; then + # pin 193 (GP7:1) is low - 4-wire screen + echo "------ Four wire screen" ; + setenv bootargs $bootargs ar1020_i2c.calibration=-20808,53,84144280,-140,13747,-878712,65536,1280,800 + setenv bootargs $bootargs video=mxcfb0:dev=ldb,1280x800MR@60,if=RGB666 +else + echo "------ Five wire screen" ; + setenv bootargs $bootargs ar1020_i2c.calibration=22737,-182,-4169360,5,-14290,54938792,65536,1280,800 + setenv bootargs $bootargs video=mxcfb0:dev=ldb,1280x800MR@60,if=RGB24 +fi + +setenv nextcon 1; +while test "4" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +if kbd ; then + if itest.s xP == x$keybd ; then + if ${fs}load ${dtype} ${disk}:1 10800000 /boot/uImage-usbwrite ; then + if ${fs}load ${dtype} ${disk}:1 12800000 /boot/uramdisk-usbwrite.img ; then + if itest.s x$havedtb == x ; then + bootm 10800000 12800000 ; + else + bootm 10800000 12800000 12000000 ; + fi + fi + fi + fi +fi + +setenv initrd_addr 0x12a00000 +setenv initrd_high 0xffffffff + +if ${fs}load mmc ${disk}:1 ${initrd_addr} /initrd.img ; then + haverd=1; + setenv initrd_size ${filesize} +else + haverd= +fi + +echo 'Loading Linux...' ; +if ${fs}load mmc ${disk}:1 10800000 /vmlinuz ; then + bootz 10800000 ${initrd_addr}:${initrd_size} +fi +echo "Error loading kernel image" diff --git a/board/boundary/mcs/Kconfig b/board/boundary/mcs/Kconfig new file mode 100644 index 0000000..6080b0f --- /dev/null +++ b/board/boundary/mcs/Kconfig @@ -0,0 +1,18 @@ +if TARGET_MCS + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "mcs" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "mcs" + +endif diff --git a/board/boundary/mcs/MAINTAINERS b/board/boundary/mcs/MAINTAINERS new file mode 100644 index 0000000..9ae0bea --- /dev/null +++ b/board/boundary/mcs/MAINTAINERS @@ -0,0 +1,8 @@ +MCS BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/mcs/ +F: include/configs/mcs.h +F: configs/mcsquad_defconfig +F: configs/mcssolo_defconfig + diff --git a/board/boundary/mcs/Makefile b/board/boundary/mcs/Makefile new file mode 100644 index 0000000..c29ccac --- /dev/null +++ b/board/boundary/mcs/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := mcs.o diff --git a/board/boundary/mcs/mcs.c b/board/boundary/mcs/mcs.c new file mode 100644 index 0000000..2bcfb12 --- /dev/null +++ b/board/boundary/mcs/mcs.c @@ -0,0 +1,643 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDOWN (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); + + return 0; +} + +static iomux_v3_cfg_t const init_pads[] = { + NEW_PAD_CTRL(MX6_PAD_EIM_D26__UART2_TX_DATA, UART_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_EIM_D27__UART2_RX_DATA, UART_PAD_CTRL), + + /* UART3 TX enable */ + NEW_PAD_CTRL(MX6_PAD_EIM_RW__GPIO2_IO26, WEAK_PULLDOWN), + NEW_PAD_CTRL(MX6_PAD_EIM_D24__UART3_TX_DATA, UART_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_EIM_D25__UART3_RX_DATA, UART_PAD_CTRL), + + /* UART4 TX enable */ + NEW_PAD_CTRL(MX6_PAD_EIM_OE__GPIO2_IO25, WEAK_PULLDOWN), + NEW_PAD_CTRL(MX6_PAD_CSI0_DAT12__UART4_TX_DATA, UART_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_CSI0_DAT13__UART4_RX_DATA, UART_PAD_CTRL), + + /* UART5 TX enable */ + NEW_PAD_CTRL(MX6_PAD_EIM_LBA__GPIO2_IO27, WEAK_PULLDOWN), + NEW_PAD_CTRL(MX6_PAD_CSI0_DAT14__UART5_TX_DATA, UART_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_CSI0_DAT15__UART5_RX_DATA, UART_PAD_CTRL), + + /* PWM on LVDS connector: J6 */ +#define LVDS_BACKLIGHT_PWM IMX_GPIO_NR(1, 18) + MX6_PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL), + + /* Shutdown request on J55 */ + MX6_PAD_KEY_ROW4__GPIO4_IO15| MUX_PAD_CTRL(WEAK_PULLUP), + /* EIM_A19 - J54 pin 9 */ + MX6_PAD_EIM_A19__GPIO2_IO19 | MUX_PAD_CTRL(WEAK_PULLUP), + /* EIM_A20 - J54 pin 6 */ + MX6_PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(WEAK_PULLUP), + /* EIM_A21 - J54 pin 5 */ + MX6_PAD_EIM_A21__GPIO2_IO17 | MUX_PAD_CTRL(WEAK_PULLUP), + /* EIM_A22 - J54 pin 4 */ + MX6_PAD_EIM_A22__GPIO2_IO16 | MUX_PAD_CTRL(WEAK_PULLUP), + /* EIM_A23 - J54 pin 3 */ + MX6_PAD_EIM_A23__GPIO6_IO06 | MUX_PAD_CTRL(WEAK_PULLUP), + /* EIM_A24 - J54 pin 2 */ + MX6_PAD_EIM_A24__GPIO5_IO04 | MUX_PAD_CTRL(WEAK_PULLUP), + /* EIM_A25 - J5 4-wire/5-wire select (4-wire is 0) */ +#define GP_4_5_WIRE_SELECT IMX_GPIO_NR(5, 2) + MX6_PAD_EIM_A25__GPIO5_IO02 | MUX_PAD_CTRL(WEAK_PULLDOWN), + /* SD3_DAT4 - jumpered 4-wire/5-wire select on first rev (4-wire was low) */ +#define GP_4_5_WIRE_SELECT_R1 IMX_GPIO_NR(7, 1) + MX6_PAD_SD3_DAT4__GPIO7_IO01 | MUX_PAD_CTRL(WEAK_PULLDOWN), +}; + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +/* I2C1 - RV4162 RTC */ +static struct i2c_pads_info i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}; + +/* I2C2 - through TXS0108E buffer - external J54 pins 7(clock) and 8(data) */ +static struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}; + +/* I2C3 - AR1021 touch, external J4 (pin 30 clock, 32 data) */ +static struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC, + .gp = IMX_GPIO_NR(7, 11) + } +}; + +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_RST__GPIO7_IO08 /* CD */ +}; + +static iomux_v3_cfg_t const usdhc3_pads[] = { + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +static iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D5__GPIO2_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL), /* RESET */ +}; + +static iomux_v3_cfg_t const enet_pads1[] = { + MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), + /* pin 35 - 1 (PHY_AD2) on reset */ + MX6_PAD_RGMII_RXC__GPIO6_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 32 - 1 - (MODE0) all */ + MX6_PAD_RGMII_RD0__GPIO6_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 31 - 1 - (MODE1) all */ + MX6_PAD_RGMII_RD1__GPIO6_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 28 - 1 - (MODE2) all */ + MX6_PAD_RGMII_RD2__GPIO6_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 27 - 1 - (MODE3) all */ + MX6_PAD_RGMII_RD3__GPIO6_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + MX6_PAD_RGMII_RX_CTL__GPIO6_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 42 PHY nRST */ + MX6_PAD_EIM_D23__GPIO3_IO23 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static iomux_v3_cfg_t const enet_pads2[] = { + MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), +}; + +static void setup_iomux_enet(void) +{ + gpio_direction_output(IMX_GPIO_NR(1, 27), 0); /* PHY rst */ + gpio_direction_output(IMX_GPIO_NR(6, 30), 1); + gpio_direction_output(IMX_GPIO_NR(6, 25), 1); + gpio_direction_output(IMX_GPIO_NR(6, 27), 1); + gpio_direction_output(IMX_GPIO_NR(6, 28), 1); + gpio_direction_output(IMX_GPIO_NR(6, 29), 1); + imx_iomux_v3_setup_multiple_pads(enet_pads1, ARRAY_SIZE(enet_pads1)); + gpio_direction_output(IMX_GPIO_NR(6, 24), 1); + + /* Need delay 10ms according to KSZ9021 spec */ + udelay(1000 * 10); + gpio_set_value(IMX_GPIO_NR(1, 27), 1); /* PHY reset */ + + imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2)); +} + +static iomux_v3_cfg_t const usb_pads[] = { + MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_EIM_D22__GPIO3_IO22, WEAK_PULLUP), /* usbotg power */ +}; + +int board_ehci_power(int port, int on) +{ + if (port) + return 0; + gpio_set_value(GP_USB_OTG_PWR, on); + return 0; +} + +int board_ehci_hcd_init(int port) +{ + imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); + + /* Reset USB hub */ + gpio_direction_output(IMX_GPIO_NR(7, 12), 0); + mdelay(2); + gpio_set_value(IMX_GPIO_NR(7, 12), 1); + + return 0; +} + +static struct fsl_esdhc_cfg usdhc_cfg[3] = { + {USDHC3_BASE_ADDR}, + {USDHC2_BASE_ADDR}, + { + .esdhc_base = USDHC4_BASE_ADDR, + .max_bus_width = 8 + } +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret = -1; + +printf("%s: address 0x%08x, width %u\n", __func__, cfg->esdhc_base, cfg->max_bus_width); + + switch(cfg->esdhc_base) { + case USDHC2_BASE_ADDR: + gpio_direction_input(IMX_GPIO_NR(7, 8)); + ret = !gpio_get_value(IMX_GPIO_NR(7, 8)); + break; + case USDHC3_BASE_ADDR: + gpio_direction_input(IMX_GPIO_NR(7, 0)); + ret = !gpio_get_value(IMX_GPIO_NR(7, 0)); + break; + case USDHC4_BASE_ADDR: + ret = 1; /* eMMC is always present */ + } + + return ret; +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + usdhc_cfg[2].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].max_bus_width = 4; + usdhc_cfg[2].max_bus_width = 8; + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + break; + case 1: + imx_iomux_v3_setup_multiple_pads( + usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + break; + case 2: + imx_iomux_v3_setup_multiple_pads( + usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + gpio_direction_output(IMX_GPIO_NR(2, 5), 1); /* de-assert nRESET */ + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + printf("%s: index %d, status %d\n", __func__, index, status); + } + + return status; +} + +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -1; +} + +static iomux_v3_cfg_t const ecspi1_pads[] = { + /* SS1 */ + MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; + +static void setup_spi(void) +{ + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, + ARRAY_SIZE(ecspi1_pads)); +} + +int board_phy_config(struct phy_device *phydev) +{ + /* min rx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0); + /* min tx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0); + /* max rx/tx clock delay, min rx/tx control */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0); + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + /* scan phy 4,5,6,7 */ + phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } + + /* For otg ethernet*/ + usb_eth_initialize(bis); + + return 0; +} + +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) { + return -1; + } + + env_loadsplash = getenv("loadsplash"); + if (env_loadsplash == NULL) { + printf("Environment variable loadsplash not found!\n"); + return -1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("failed to run loadsplash %s\n\n", env_loadsplash); + return -1; + } + + return 0; +} + +void board_enable_lvds(const struct display_info_t *di) +{ + gpio_direction_output(LVDS_BACKLIGHT_PWM, 1); +} + +const struct display_info_t displays[] = { + IMX_VD_WXGA_J(LVDS, 0, 0), +}; + +size_t display_count = ARRAY_SIZE(displays); + +int board_cfb_skip(void) +{ + return NULL != getenv("novideo"); +} + +static void setup_display(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + int reg; + + reg = readl(&mxc_ccm->chsccdr); + reg &= ~(MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK | + MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK); + reg |= (CHSCCDR_PODF_DIVIDE_BY_3 <chsccdr); +} + +static unsigned short gpios_in[] = { + LVDS_BACKLIGHT_PWM, + GP_4_5_WIRE_SELECT, + GP_4_5_WIRE_SELECT_R1, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +int board_early_init_f(void) +{ + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads)); + + imx_setup_display(); + setup_display(); + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + setup_spi(); + + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + + return 0; +} + +int checkboard(void) +{ + puts("Board: Boundary MCS\n"); + + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; + unsigned char active_low; +}; + +static struct button_key const buttons[] = { + {"power", IMX_GPIO_NR(4, 15), 'P', 1}, +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + int val; + + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + val = gpio_get_value(buttons[i].gpnum); + if (buttons[i].active_low) + val = !val; + if (val) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} + +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; + +int misc_init_r(void) +{ + preboot_keys(); + add_board_boot_modes(board_boot_modes); + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "mcs"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/mcs/mcsquad.cfg b/board/boundary/mcs/mcsquad.cfg new file mode 100644 index 0000000..d462ca4 --- /dev/null +++ b/board/boundary/mcs/mcsquad.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "../nitrogen6x/ddr-setup.cfg" +#include "../nitrogen6x/1066mhz_4x256mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/mcs/mcssolo.cfg b/board/boundary/mcs/mcssolo.cfg new file mode 100644 index 0000000..008902b --- /dev/null +++ b/board/boundary/mcs/mcssolo.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "../nitrogen6x/ddr-setup.cfg" +#include "../nitrogen6x/800mhz_2x256mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/mcs/mcssolo1g_64bit.cfg b/board/boundary/mcs/mcssolo1g_64bit.cfg new file mode 100644 index 0000000..ed035d5 --- /dev/null +++ b/board/boundary/mcs/mcssolo1g_64bit.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "../nitrogen6x/ddr-setup.cfg" +#include "../nitrogen6x/800mhz_4x128mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/mcs/savesplash.txt b/board/boundary/mcs/savesplash.txt new file mode 100644 index 0000000..93537ce --- /dev/null +++ b/board/boundary/mcs/savesplash.txt @@ -0,0 +1,41 @@ +if itest.s a$splashfile == a; then + splashfile=mcs.bmp.gz +fi + +splashflashaddr=0xf0000; + +setenv stdout serial,vga +if ${fs}load ${dtype} ${disk}:1 12000000 $splashfile ; then + echo "read $filesize bytes from SD card" ; + if sf probe ; then + if sf read 0x12400000 $splashflashaddr $filesize ; then + if cmp.b 0x12000000 0x12400000 $filesize ; then + echo "------- splash images match" ; + else + echo "re-program splash image" ; + sf erase $splashflashaddr +0x$filesize ; + sf write 0x12000000 $splashflashaddr $filesize ; + echo "verifying" ; + if sf read 0x12400000 $splashflashaddr $filesize ; then + if cmp.b 0x12000000 0x12400000 $filesize ; then + echo "Splash image upgraded."; + else + echo "Read verification error" ; + fi + else + echo "Error re-reading EEPROM" ; + fi + fi + if itest.s "$bmpsize" != "$filesize" ; then + setenv bmpsize $filesize; + saveenv; + fi + else + echo "Error reading splash image from EEPROM" ; + fi + else + echo "Error initializing EEPROM" ; + fi ; +else + echo "No splash image $splashfile found on SD card" ; +fi diff --git a/board/boundary/med/6x_bootscript-yocto.txt b/board/boundary/med/6x_bootscript-yocto.txt new file mode 100644 index 0000000..c765140 --- /dev/null +++ b/board/boundary/med/6x_bootscript-yocto.txt @@ -0,0 +1,130 @@ +# Yocto-specifics +setenv bootpart 2 +setenv bootdir / + +if ${fs}load mmc ${disk}:1 10008000 logo.bmp.gz ; then + bmp d 10008000 +fi + +setenv bootargs enable_wait_mode=off + +setenv i2cres rtcerr +if i2c dev 2 ; then + if i2c read 0x6f 0.1 6 0x10004000 ; then + mw.b 10004006 0 6 + if cmp.b 10004000 10004006 6 ; then + echo "RTC not programmed" ; + if i2c mw 0x6f 7.1 0x90 ; then + if i2c mw 0x6f 0.1 0x04 6 ; then + echo "Initialized RTC" ; + setenv i2cres rtcinit ; + else + setenv i2cres rtcerr-fill + fi + else + setenv i2cres rtcerr-wrinit + fi + else + echo "non-blank RTC data"; + setenv i2cres rtcok ; + fi + else + setenv i2cres rtcerr-read + fi +else + setenv i2cres rtcerr-dev +fi +setenv bootargs $bootargs $i2cres +setenv i2cres + +setenv nextcon 0; +setenv bootargs $bootargs video=mxcfb0:dev=lcd,LB043,if=RGB24 +setenv bootargs $bootargs ft5x06_ts.screenres=800,1280 +# rotate touch coordinates 90 degrees clockwise +setenv bootargs $bootargs ft5x06_ts.calibration=0,-40928,31391744,40941,0,0,65536 +setenv bootargs $bootargs g_ether.dev_addr=55:aa:55:aa:55:aa +setenv bootargs $bootargs video=mxcfb1:dev=hdmi,1280x720M@60 video=mxcfb2:off video=mxcfb3:off +setenv fbmem 28M +setenv nextcon 1 + +i2c dev 1 ; +if i2c probe 0x50 ; then + setenv bootargs $bootargs video=mxcfb1:dev=hdmi,1280x720M@60 video=mxcfb2:off video=mxcfb3:off + setenv fbmem $fbmem,28M + setexpr nextcon $nextcon + 1 +else + echo "------ no HDMI monitor"; +fi + +while test "4" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +setenv bootargs $bootargs $fbmem +setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait" + +if itest.s x$bootpart == x ; then + bootpart=1 +fi + +if test "sata" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; +else + setenv bootargs "$bootargs root=/dev/mmcblk0p$bootpart" ; +fi + +dtbname="imx6"; +if itest.s x6S != "x$cpu" ; then + dtbname=${dtbname}q-; +else + dtbname=${dtbname}s-; +fi + +if itest.s x == "x$board" ; then + board=sabrelite +fi +dtbname=${dtbname}${board}.dtb; + +if itest.s x == x${bootdir} ; then + bootdir=/boot/ +fi + +if ${fs}load ${dtype} ${disk}:1 12000000 ${bootdir}$dtbname ; then + havedtb=1; + setenv fdt_addr 0x11000000 + setenv fdt_high 0xffffffff +else + havedtb= +fi + +if itest.s x == x$allow_noncea ; then + setenv bootargs $bootargs mxc_hdmi.only_cea=1; + echo "only CEA modes allowed on HDMI port"; +else + setenv bootargs $bootargs mxc_hdmi.only_cea=0; + echo "non-CEA modes allowed on HDMI, audio may be affected"; +fi + +if kbd ; then + if itest.s xD == x$keybd ; then + if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage-usbwrite ; then + if ${fs}load ${dtype} ${disk}:1 12800000 ${bootdir}uramdisk-usbwrite.img ; then + if itest.s x$havedtb == x ; then + bootm 10800000 12800000 ; + else + bootm 10800000 12800000 12000000 ; + fi + fi + fi + fi +fi + +if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then + if itest.s x$havedtb == x ; then + bootm 10800000 ; + else + bootm 10800000 - 12000000 + fi +fi +echo "Error loading kernel image" diff --git a/board/boundary/med/6x_bootscript.txt b/board/boundary/med/6x_bootscript.txt new file mode 100644 index 0000000..4de1a51 --- /dev/null +++ b/board/boundary/med/6x_bootscript.txt @@ -0,0 +1,126 @@ +if ${fs}load mmc ${disk}:1 10008000 logo.bmp.gz ; then + bmp d 10008000 +fi + +setenv bootargs enable_wait_mode=off + +setenv i2cres rtcerr +if i2c dev 2 ; then + if i2c read 0x6f 0.1 6 0x10004000 ; then + mw.b 10004006 0 6 + if cmp.b 10004000 10004006 6 ; then + echo "RTC not programmed" ; + if i2c mw 0x6f 7.1 0x90 ; then + if i2c mw 0x6f 0.1 0x04 6 ; then + echo "Initialized RTC" ; + setenv i2cres rtcinit ; + else + setenv i2cres rtcerr-fill + fi + else + setenv i2cres rtcerr-wrinit + fi + else + echo "non-blank RTC data"; + setenv i2cres rtcok ; + fi + else + setenv i2cres rtcerr-read + fi +else + setenv i2cres rtcerr-dev +fi +setenv bootargs $bootargs $i2cres +setenv i2cres + +setenv nextcon 0; +setenv bootargs $bootargs video=mxcfb0:dev=lcd,LB043,if=RGB24 +setenv bootargs $bootargs ft5x06_ts.screenres=800,1280 +# rotate touch coordinates 90 degrees clockwise +setenv bootargs $bootargs ft5x06_ts.calibration=0,-40928,31391744,40941,0,0,65536 +setenv bootargs $bootargs g_ether.dev_addr=55:aa:55:aa:55:aa +setenv bootargs $bootargs video=mxcfb1:dev=hdmi,1280x720M@60 video=mxcfb2:off video=mxcfb3:off +setenv fbmem 28M +setenv nextcon 1 + +i2c dev 1 ; +if i2c probe 0x50 ; then + setenv bootargs $bootargs video=mxcfb1:dev=hdmi,1280x720M@60 video=mxcfb2:off video=mxcfb3:off + setenv fbmem $fbmem,28M + setexpr nextcon $nextcon + 1 +else + echo "------ no HDMI monitor"; +fi + +while test "4" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +setenv bootargs $bootargs $fbmem +setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait" + +if itest.s x$bootpart == x ; then + bootpart=1 +fi + +if test "sata" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; +else + setenv bootargs "$bootargs root=/dev/mmcblk0p$bootpart" ; +fi + +dtbname="imx6"; +if itest.s x6S != "x$cpu" ; then + dtbname=${dtbname}q-; +else + dtbname=${dtbname}s-; +fi + +if itest.s x == "x$board" ; then + board=sabrelite +fi +dtbname=${dtbname}${board}.dtb; + +if itest.s x == x${bootdir} ; then + bootdir=/boot/ +fi + +if ${fs}load ${dtype} ${disk}:1 12000000 ${bootdir}$dtbname ; then + havedtb=1; + setenv fdt_addr 0x11000000 + setenv fdt_high 0xffffffff +else + havedtb= +fi + +if itest.s x == x$allow_noncea ; then + setenv bootargs $bootargs mxc_hdmi.only_cea=1; + echo "only CEA modes allowed on HDMI port"; +else + setenv bootargs $bootargs mxc_hdmi.only_cea=0; + echo "non-CEA modes allowed on HDMI, audio may be affected"; +fi + +if kbd ; then + if itest.s xD == x$keybd ; then + if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage-usbwrite ; then + if ${fs}load ${dtype} ${disk}:1 12800000 ${bootdir}uramdisk-usbwrite.img ; then + if itest.s x$havedtb == x ; then + bootm 10800000 12800000 ; + else + bootm 10800000 12800000 12000000 ; + fi + fi + fi + fi +fi + +if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then + if itest.s x$havedtb == x ; then + bootm 10800000 ; + else + bootm 10800000 - 12000000 + fi +fi +echo "Error loading kernel image" diff --git a/board/boundary/med/Kconfig b/board/boundary/med/Kconfig new file mode 100644 index 0000000..727c7d1 --- /dev/null +++ b/board/boundary/med/Kconfig @@ -0,0 +1,18 @@ +if TARGET_MED + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "med" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "med" + +endif diff --git a/board/boundary/med/MAINTAINERS b/board/boundary/med/MAINTAINERS new file mode 100644 index 0000000..7725ac5 --- /dev/null +++ b/board/boundary/med/MAINTAINERS @@ -0,0 +1,6 @@ +MED BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/med/ +F: include/configs/med.h +F: configs/med_defconfig diff --git a/board/boundary/med/Makefile b/board/boundary/med/Makefile new file mode 100644 index 0000000..dc4756c --- /dev/null +++ b/board/boundary/med/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := med.o diff --git a/board/boundary/med/med.c b/board/boundary/med/med.c new file mode 100644 index 0000000..45e18db --- /dev/null +++ b/board/boundary/med/med.c @@ -0,0 +1,524 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC4_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +static iomux_v3_cfg_t const init_pads[] = { + /* Misc inputs */ + MX6_PAD_GPIO_18__GPIO7_IO13, /* bidirectional - NXP P0-8 */ + MX6_PAD_NANDF_WP_B__GPIO6_IO09, /* bidirectional - NXP P0-14 */ + MX6_PAD_KEY_COL2__GPIO4_IO10, /* bidirectional - NXP P0-21 */ + MX6_PAD_KEY_ROW2__GPIO4_IO11, /* bidirectional - NXP P0-21 */ + MX6_PAD_CSI0_DATA_EN__GPIO5_IO20, /* bidirectional - NXP P2-10 */ + MX6_PAD_SD1_DAT1__GPIO1_IO17, /* bidirectional - NXP RST_OUT */ + /* Misc outputs */ + MX6_PAD_EIM_DA0__GPIO3_IO00, /* TPS3823 - reset generator for NXP active hi */ + MX6_PAD_EIM_DA1__GPIO3_IO01, /* output - to NXP P4-30 */ + MX6_PAD_EIM_DA2__GPIO3_IO02, /* 74LVC1G32 - WDT active low - reset to I.MX */ + MX6_PAD_EIM_OE__GPIO2_IO25, /* output - to NXP P4-31 */ + MX6_PAD_EIM_D20__GPIO3_IO20, /* output - to NXP P1-10 */ + + /* Backlight on LVDS connector */ +#define BACKLIGHT_GP IMX_GPIO_NR(1, 18) + MX6_PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); + + return 0; +} + +static iomux_v3_cfg_t const uart2_pads[] = { + MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +/* I2C1, SGTL5000, J15:pins 5-6 */ +static struct i2c_pads_info i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}; + +/* I2C2 HDMI EDID, RTC */ +static struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}; + +/* I2C3 - Touch screen, FDC6301 */ +static struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC, + .gp = IMX_GPIO_NR(7, 11) + } +}; + +static iomux_v3_cfg_t const usdhc_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC4_PAD_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC4_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC4_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC4_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC4_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC4_PAD_CTRL), + MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +static iomux_v3_cfg_t const button_pads[] = { + /* GPIO_KEYS */ + NEW_PAD_CTRL(MX6_PAD_EIM_DA3__GPIO3_IO03, WEAK_PULLUP), /* S2 */ + NEW_PAD_CTRL(MX6_PAD_EIM_DA4__GPIO3_IO04, WEAK_PULLUP), /* S4 */ + NEW_PAD_CTRL(MX6_PAD_EIM_DA5__GPIO3_IO05, WEAK_PULLUP), /* S3 */ +}; + +static iomux_v3_cfg_t const enet_pads1[] = { + MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), + /* pin 35 - 1 (PHY_AD2) on reset */ + MX6_PAD_RGMII_RXC__GPIO6_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 32 - 1 - (MODE0) all */ + MX6_PAD_RGMII_RD0__GPIO6_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 31 - 1 - (MODE1) all */ + MX6_PAD_RGMII_RD1__GPIO6_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 28 - 1 - (MODE2) all */ + MX6_PAD_RGMII_RD2__GPIO6_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 27 - 1 - (MODE3) all */ + MX6_PAD_RGMII_RD3__GPIO6_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + MX6_PAD_RGMII_RX_CTL__GPIO6_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 42 PHY nRST */ + MX6_PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static iomux_v3_cfg_t const enet_pads2[] = { + MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), +}; + +static void setup_iomux_enet(void) +{ + gpio_direction_output(IMX_GPIO_NR(1, 27), 0); /* PHY rst */ + gpio_direction_output(IMX_GPIO_NR(6, 30), 1); + gpio_direction_output(IMX_GPIO_NR(6, 25), 1); + gpio_direction_output(IMX_GPIO_NR(6, 27), 1); + gpio_direction_output(IMX_GPIO_NR(6, 28), 1); + gpio_direction_output(IMX_GPIO_NR(6, 29), 1); + imx_iomux_v3_setup_multiple_pads(enet_pads1, ARRAY_SIZE(enet_pads1)); + gpio_direction_output(IMX_GPIO_NR(6, 24), 1); + + /* Need delay 10ms according to KSZ9021 spec */ + udelay(1000 * 10); + gpio_set_value(IMX_GPIO_NR(1, 27), 1); /* PHY reset */ + + imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2)); + udelay(100); /* Wait 100 us before using mii interface */ +} + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + /* scan phy 4,5,6,7 */ + phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } + + /* For otg ethernet*/ + usb_eth_initialize(bis); + return 0; +} + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); +} + +int board_ehci_hcd_init(int port) +{ + return 0; +} + +static struct fsl_esdhc_cfg usdhc_cfgs[] = { + {.esdhc_base= USDHC4_BASE_ADDR, .max_bus_width=4}, + {.esdhc_base= USDHC3_BASE_ADDR, .max_bus_width=8} +}; + +static int usdhc_clocks[] = { + MXC_ESDHC4_CLK, + MXC_ESDHC3_CLK +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + return 1; /* eMMC is always present */ +} + +int board_mmc_init(bd_t *bis) +{ + int i, status = 0; + imx_iomux_v3_setup_multiple_pads( + usdhc_pads, ARRAY_SIZE(usdhc_pads)); + + for (i=0; i < ARRAY_SIZE(usdhc_cfgs); i++) { + usdhc_cfgs[i].sdhc_clk = mxc_get_clock(usdhc_clocks[i]); + status |= fsl_esdhc_initialize(bis, &usdhc_cfgs[i]); + } + printf("%s: status = 0x%x\n", __func__, status); + return status; +} + +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -1; +} + +static iomux_v3_cfg_t const ecspi1_pads[] = { + /* SS1 */ + MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; + +static void setup_spi(void) +{ + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, + ARRAY_SIZE(ecspi1_pads)); +} + +int board_phy_config(struct phy_device *phydev) +{ + /* min rx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0); + /* min tx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0); + /* max rx/tx clock delay, min rx/tx control */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0); + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +static void setup_buttons(void) +{ + imx_iomux_v3_setup_multiple_pads(button_pads, + ARRAY_SIZE(button_pads)); +} + +void board_enable_lvds(const struct display_info_t *di) +{ + gpio_direction_output(BACKLIGHT_GP, 1); +} + +const struct display_info_t displays[] = { + IMX_VD_WXGA_J(LVDS, 0, 0), + + /* hdmi */ + IMX_VD50_1280_720M_60(HDMI, 1, 1), + IMX_VD50_1920_1080M_60(HDMI, 0, 1), + IMX_VD50_1024_768M_60(HDMI, 0, 1), +}; + +size_t display_count = ARRAY_SIZE(displays); + +int board_cfb_skip(void) +{ + return 1; +} + +static unsigned short gpios_in[] = { + BACKLIGHT_GP, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads)); + setup_buttons(); + +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + + setup_spi(); + + return 0; +} + +int checkboard(void) +{ + puts("Board: " CONFIG_BOARD_NAME "\n"); + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; + unsigned char active_low; +}; + +static struct button_key const buttons[] = { + {"S2", IMX_GPIO_NR(3, 3), '2', 1}, + {"S4", IMX_GPIO_NR(3, 4), '4', 1}, + {"S3", IMX_GPIO_NR(3, 5), '3', 1}, +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + int val; + + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + val = gpio_get_value(buttons[i].gpnum); + if (buttons[i].active_low) + val = !val; + if (val) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} + +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; + +int misc_init_r(void) +{ + preboot_keys(); + add_board_boot_modes(board_boot_modes); + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", CONFIG_BOARD_NAME); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/med/savesplash.txt b/board/boundary/med/savesplash.txt new file mode 100644 index 0000000..27c1a34 --- /dev/null +++ b/board/boundary/med/savesplash.txt @@ -0,0 +1,46 @@ +if itest.s a$splashfile == a; then + splashfile=${board}.bmp.gz +fi + +setenv stdout serial,vga +if ${fs}load ${dtype} ${disk}:1 12000000 $splashfile ; then + echo "read $filesize bytes from SD card" ; + if sf probe ; then + if sf read 0x12400000 $splashflash $filesize ; then + if cmp.b 0x12000000 0x12400000 $filesize ; then + echo "------- splash images match" ; + if itest.s "x$filesize" != "x$splashsize" ; then + echo "update splashsize" ; + setenv splashsize $filesize; + saveenv + fi + else + echo "re-program splash image" ; + sf erase $splashflash +0x$filesize ; + sf write 0x12000000 $splashflash $filesize ; + echo "verifying" ; + if sf read 0x12400000 $splashflash $filesize ; then + if cmp.b 0x12000000 0x12400000 $filesize ; then + echo "Splash image upgraded."; + setenv splashsize $filesize; + saveenv + else + echo "Read verification error" ; + fi + else + echo "Error re-reading EEPROM" ; + fi + fi + if itest.s "$bmpsize" != "$filesize" ; then + setenv bmpsize $filesize; + saveenv; + fi + else + echo "Error reading splash image from EEPROM" ; + fi + else + echo "Error initializing EEPROM" ; + fi ; +else + echo "No splash image $splashfile found on SD card" ; +fi diff --git a/board/boundary/mtp/1066mhz_4x128mx16.cfg b/board/boundary/mtp/1066mhz_4x128mx16.cfg new file mode 100644 index 0000000..45e938b --- /dev/null +++ b/board/boundary/mtp/1066mhz_4x128mx16.cfg @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 +DATA 4, MX6_MMDC_P0_MDCFG0, 0x555A7974 +DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64 +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB +DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 +DATA 4, MX6_MMDC_P0_MDOR, 0x005A1023 +DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040 +DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576 +DATA 4, MX6_MMDC_P0_MDASP, 0x00000027 +DATA 4, MX6_MMDC_P0_MDCTL, 0x831A0000 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00428031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x19308030 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P0_MDREF, 0x00005800 +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42720306 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x026F0266 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x4273030A +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x02740240 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x45393B3E +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x403A3747 +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x40434541 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x473E4A3B +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0011000E +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x000E001B +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00190015 +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00070018 +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/boundary/mtp/Kconfig b/board/boundary/mtp/Kconfig new file mode 100644 index 0000000..812062a --- /dev/null +++ b/board/boundary/mtp/Kconfig @@ -0,0 +1,18 @@ +if TARGET_MTP + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "mtp" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "mtp" + +endif diff --git a/board/boundary/mtp/MAINTAINERS b/board/boundary/mtp/MAINTAINERS new file mode 100644 index 0000000..c232241 --- /dev/null +++ b/board/boundary/mtp/MAINTAINERS @@ -0,0 +1,7 @@ +MTP BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/mtp/ +F: include/configs/mtp.h +F: configs/mtp_defconfig + diff --git a/board/boundary/mtp/Makefile b/board/boundary/mtp/Makefile new file mode 100644 index 0000000..0f7a4a3 --- /dev/null +++ b/board/boundary/mtp/Makefile @@ -0,0 +1,10 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := mtp.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/boundary/mtp/clocks.cfg b/board/boundary/mtp/clocks.cfg new file mode 100644 index 0000000..8bddb91 --- /dev/null +++ b/board/boundary/mtp/clocks.cfg @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* set the default clock gate to save power */ +DATA 4, CCM_CCGR0, 0x00C03F3F +DATA 4, CCM_CCGR1, 0x0030FC03 +DATA 4, CCM_CCGR2, 0x0FFFC000 +DATA 4, CCM_CCGR3, 0x3FF00000 +DATA 4, CCM_CCGR4, 0x00FFF300 +DATA 4, CCM_CCGR5, 0x0F0000C3 +DATA 4, CCM_CCGR6, 0x000003FF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4, MX6_IOMUXC_GPR6, 0x007F007F +DATA 4, MX6_IOMUXC_GPR7, 0x007F007F + +/* + * Setup CCM_CCOSR register as follows: + * + * cko1_en = 1 --> CKO1 enabled + * cko1_div = 111 --> divide by 8 + * cko1_sel = 1011 --> ahb_clk_root + * + * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz + */ +DATA 4, CCM_CCOSR, 0x000000fb diff --git a/board/boundary/mtp/ddr-setup.cfg b/board/boundary/mtp/ddr-setup.cfg new file mode 100644 index 0000000..2748d40 --- /dev/null +++ b/board/boundary/mtp/ddr-setup.cfg @@ -0,0 +1,96 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* + * DDR3 settings + * MX6Q ddr is limited to 1066 Mhz currently 1056 MHz(528 MHz clock), + * memory bus width: 64 bits x16/x32/x64 + * MX6DL ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 64 bits x16/x32/x64 + * MX6SOLO ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 32 bits x16/x32 + */ +DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030 + +DATA 4, MX6_IOM_GRP_B0DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B1DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B2DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B3DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B4DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B5DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B6DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B7DS, 0x00000030 +DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030 +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ +DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030 + +DATA 4, MX6_IOM_DRAM_DQM0, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM1, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM2, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM3, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM4, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM5, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM6, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM7, 0x00020030 + +DATA 4, MX6_IOM_DRAM_CAS, 0x00020030 +DATA 4, MX6_IOM_DRAM_RAS, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00020030 + +DATA 4, MX6_IOM_DRAM_RESET, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 +DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00003000 + +DATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030 +DATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030 + +/* (differential input) */ +DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000 +/* (differential input) */ +DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000 +/* disable ddr pullups */ +DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000 +DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000 +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ +DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000 + +/* Read data DQ Byte0-3 delay */ +DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333 + +/* + * MDMISC mirroring interleaved (row/bank/col) + */ +DATA 4, MX6_MMDC_P0_MDMISC, 0x00081740 + +/* + * MDSCR con_req + */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 diff --git a/board/boundary/mtp/mtp.c b/board/boundary/mtp/mtp.c new file mode 100644 index 0000000..f802f4b --- /dev/null +++ b/board/boundary/mtp/mtp.c @@ -0,0 +1,256 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#define CONFIG_MX6QDL +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_MX6Q +#include "pads-mtp.h" +#endif +#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +#define FOR_DL_SOLO +#include "pads-mtp.h" +#endif + + +DECLARE_GLOBAL_DATA_PTR; + +#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +#ifdef CONFIG_MX6Q +#define GET_MX6_REF(ref) (is_cpu_type(MXC_CPU_MX6Q) ? mx6q_##ref : mx6dl_solo_##ref) +#define IOMUX_SETUP(list) iomux_setup(mx6q_##list, ARRAY_SIZE(mx6q_##list), \ + mx6dl_solo_##list, ARRAY_SIZE(mx6dl_solo_##list)) + +int iomux_setup(iomux_v3_cfg_t *mx6q_pad_list, int mx6q_pad_cnt, + iomux_v3_cfg_t *mx6dl_solo_pad_list, int mx6dl_solo_pad_cnt) +{ + int mx6q = is_cpu_type(MXC_CPU_MX6Q); + iomux_v3_cfg_t *p = mx6q ? mx6q_pad_list : mx6dl_solo_pad_list; + int cnt = mx6q ? mx6q_pad_cnt : mx6dl_solo_pad_cnt; + + return imx_iomux_v3_setup_multiple_pads(p, cnt); +} +#else +#define GET_MX6_REF(ref) (mx6dl_solo_##ref) +#define IOMUX_SETUP(list) imx_iomux_v3_setup_multiple_pads( \ + mx6dl_solo_##list, ARRAY_SIZE(mx6dl_solo_##list)) +#endif +#else +#define GET_MX6_REF(ref) (mx6q_##ref) +#define IOMUX_SETUP(list) imx_iomux_v3_setup_multiple_pads( \ + mx6q_##list, ARRAY_SIZE(mx6q_##list)) +#endif + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); +// printf("%s:%p *%p=0x%lx\n", __func__, gd, &gd->ram_size, gd->ram_size); + return 0; +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + /* Reset USB hub */ + gpio_direction_output(GP_USB_HUB_RESET, 0); + mdelay(2); + gpio_set_value(GP_USB_HUB_RESET, 1); + return 0; +} + +int board_ehci_power(int port, int on) +{ + if (port) + return 0; + gpio_set_value(GP_USB_OTG_PWR, on); + return 0; +} + +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC3_BASE_ADDR}, + {USDHC4_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int gp_cd = GP_SD3_CD; + + if (cfg->esdhc_base != USDHC3_BASE_ADDR) + return 1; /* eMMC always present */ + gpio_direction_input(gp_cd); + return !gpio_get_value(gp_cd); +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].max_bus_width = 8; + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + break; + case 1: + gpio_set_value(GP_EMMC_RESET, 1); /* release reset */ + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? GP_ECSPI1_SS1 : -1; +} + +int board_eth_init(bd_t *bis) +{ +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + +static unsigned short gpios_out_low[] = { + GP_USB_OTG_PWR, /* disable USB otg power */ + GP_USB_HUB_RESET, /* disable hub */ + /* Disable wl1271 */ + GP_WL12XX_WL_ENABLE, /* disable wireless */ + GP_WL12XX_BT_ENABLE, /* disable bluetooth */ + GP_EMMC_RESET, /* hold in reset */ + GP_PCIE_RESET, +}; + +static unsigned short gpios_out_high[] = { + GP_ECSPI1_SS1, /* SS1 of spi nor */ +}; + +static void set_gpios(unsigned short *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + gpio_direction_input(GP_WL12XX_WL_IRQ); + + IOMUX_SETUP(mtp_pads); + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + struct i2c_pads_info *p = GET_MX6_REF(i2c_pad_info); + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &p[0]); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &p[1]); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &p[2]); + return 0; +} + + +int checkboard(void) +{ + puts("Board: mtp\n"); + return 0; +} + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board","mtp"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/mtp/mtp.cfg b/board/boundary/mtp/mtp.cfg new file mode 100644 index 0000000..b6642e6 --- /dev/null +++ b/board/boundary/mtp/mtp.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "ddr-setup.cfg" +#include "1066mhz_4x128mx16.cfg" +#include "clocks.cfg" diff --git a/board/boundary/mtp/pads-mtp.h b/board/boundary/mtp/pads-mtp.h new file mode 100644 index 0000000..a715058 --- /dev/null +++ b/board/boundary/mtp/pads-mtp.h @@ -0,0 +1,172 @@ +/* + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#undef MX6PAD +#undef MX6NAME + +#ifdef FOR_DL_SOLO +#define MX6PAD(a) MX6DL_PAD_##a +#define MX6NAME(a) mx6dl_solo_##a +#else +#define MX6PAD(a) MX6Q_PAD_##a +#define MX6NAME(a) mx6q_##a +#endif + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +static const iomux_v3_cfg_t MX6NAME(mtp_pads)[] = { + /* USB OTG */ + NEW_PAD_CTRL(MX6PAD(GPIO_1__USB_OTG_ID) , WEAK_PULLUP), + NEW_PAD_CTRL(MX6PAD(KEY_COL4__USB_OTG_OC), WEAK_PULLUP), +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) /* USB otg power */ + NEW_PAD_CTRL(MX6PAD(EIM_D22__GPIO3_IO22), OUTPUT_40OHM), + + /* USB host */ + NEW_PAD_CTRL(MX6PAD(EIM_D30__USB_H1_OC) , WEAK_PULLUP), +#define GP_USB_HUB_RESET IMX_GPIO_NR(7, 12) + NEW_PAD_CTRL(MX6PAD(GPIO_17__GPIO7_IO12), OUTPUT_40OHM), + + /* UART1 */ + NEW_PAD_CTRL(MX6PAD(SD3_DAT7__UART1_TX_DATA), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT6__UART1_RX_DATA), UART_PAD_CTRL), + + /* UART2 */ + NEW_PAD_CTRL(MX6PAD(EIM_D26__UART2_TX_DATA), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D27__UART2_RX_DATA), UART_PAD_CTRL), + + /* UART3 for wl1271 */ + NEW_PAD_CTRL(MX6PAD(EIM_D24__UART3_TX_DATA), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D25__UART3_RX_DATA), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D23__UART3_CTS_B), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D31__UART3_RTS_B), UART_PAD_CTRL), + + /* USDHC2 - TiWi wl1271 pads */ + NEW_PAD_CTRL(MX6PAD(SD2_CLK__SD2_CLK), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD2_CMD__SD2_CMD), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD2_DAT0__SD2_DATA0), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD2_DAT1__SD2_DATA1), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD2_DAT2__SD2_DATA2), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD2_DAT3__SD2_DATA3), USDHC_PAD_CTRL), +#define GP_WL12XX_WL_IRQ IMX_GPIO_NR(6, 14) + NEW_PAD_CTRL(MX6PAD(NANDF_CS1__GPIO6_IO14), WEAK_PULLDN), +#define GP_WL12XX_WL_ENABLE IMX_GPIO_NR(6, 15) + NEW_PAD_CTRL(MX6PAD(NANDF_CS2__GPIO6_IO15), OUTPUT_40OHM), +#define GP_WL12XX_BT_ENABLE IMX_GPIO_NR(6, 16) + NEW_PAD_CTRL(MX6PAD(NANDF_CS3__GPIO6_IO16), OUTPUT_40OHM), + + /* USDHC3 - sdcard */ + NEW_PAD_CTRL(MX6PAD(SD3_CLK__SD3_CLK), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_CMD__SD3_CMD), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT0__SD3_DATA0), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT1__SD3_DATA1), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT2__SD3_DATA2), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD3_DAT3__SD3_DATA3), USDHC_PAD_CTRL), +#define GP_SD3_CD IMX_GPIO_NR(7, 0) + NEW_PAD_CTRL(MX6PAD(SD3_DAT5__GPIO7_IO00), WEAK_PULLUP), + + /* USDHC4 - emmc */ + NEW_PAD_CTRL(MX6PAD(SD4_CLK__SD4_CLK), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_CMD__SD4_CMD), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_DAT0__SD4_DATA0), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_DAT1__SD4_DATA1), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_DAT2__SD4_DATA2), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_DAT3__SD4_DATA3), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_DAT4__SD4_DATA4), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_DAT5__SD4_DATA5), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_DAT6__SD4_DATA6), USDHC_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(SD4_DAT7__SD4_DATA7), USDHC_PAD_CTRL), +#define GP_EMMC_RESET IMX_GPIO_NR(6, 11) + NEW_PAD_CTRL(MX6PAD(NANDF_CS0__GPIO6_IO11), OUTPUT_40OHM), /* eMMC reset */ + + /* ECSPI1 pads */ +#define GP_ECSPI1_SS1 IMX_GPIO_NR(3, 19) + NEW_PAD_CTRL(MX6PAD(EIM_D19__GPIO3_IO19), NO_PAD_CTRL), /* SS1 */ + NEW_PAD_CTRL(MX6PAD(EIM_D17__ECSPI1_MISO), SPI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D18__ECSPI1_MOSI), SPI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D16__ECSPI1_SCLK), SPI_PAD_CTRL), + + /* PCIe */ +#define GP_PCIE_RESET IMX_GPIO_NR(2, 18) + NEW_PAD_CTRL(MX6PAD(EIM_A20__GPIO2_IO18), OUTPUT_40OHM), + + /* rtc */ +#define GP_RTC_RV4162_IRQ IMX_GPIO_NR(4, 9) + NEW_PAD_CTRL(MX6PAD(KEY_ROW1__GPIO4_IO09), WEAK_PULLUP), +}; + +/* + * + */ +#define PC I2C_PAD_CTRL + +static struct i2c_pads_info MX6NAME(i2c_pad_info)[] = { +{ + /* I2C1, SGTL5000 */ + .scl = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(EIM_D21__I2C1_SCL), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(EIM_D21__GPIO3_IO21), PC), + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(EIM_D28__I2C1_SDA), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(EIM_D28__GPIO3_IO28), PC), + .gp = IMX_GPIO_NR(3, 28) + } +}, { + /* I2C2 Camera, MIPI */ + .scl = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(KEY_COL3__I2C2_SCL), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(KEY_COL3__GPIO4_IO12), PC), + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(KEY_ROW3__I2C2_SDA), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(KEY_ROW3__GPIO4_IO13), PC), + .gp = IMX_GPIO_NR(4, 13) + } +}, { + /* I2C3, J15 - RGB connector */ + .scl = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(GPIO_5__I2C3_SCL), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(GPIO_5__GPIO1_IO05), PC), + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(GPIO_16__I2C3_SDA), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(GPIO_16__GPIO7_IO11), PC), + .gp = IMX_GPIO_NR(7, 11) + } +} +}; diff --git a/board/boundary/mtp/spl.c b/board/boundary/mtp/spl.c new file mode 100644 index 0000000..f68a458 --- /dev/null +++ b/board/boundary/mtp/spl.c @@ -0,0 +1,115 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#if 0 +void board_init_f(ulong dummy) +{ +#if 0 + arch_cpu_init(); + board_early_init_f(); + timer_init(); + preloader_console_init(); + + print_cpuinfo(); + board_init_r(NULL, 0); +#endif +} +#endif + +void spl_board_init(void) +{ +#if 0 + int i; + u32 const *regs ; + int num_regs; + unsigned char mac_address[6]; + imx_get_mac_from_fuse(0,mac_address); + printf("ethaddr: %pM\n", mac_address); + + if (is_cpu_type(MXC_CPU_MX6Q)) { +#if 1 + regs = mx6q_1g; + num_regs = ARRAY_SIZE(mx6q_1g); +#else + regs = mx6q_2g; + num_regs = ARRAY_SIZE(mx6q_2g); +#endif + } else { +#if CONFIG_DDR_MB == 512 + regs = mx6dl_512m; + num_regs = ARRAY_SIZE(mx6dl_512m); +printf("Configuring for 512MiB narrow memory bus\n"); +#elif CONFIG_DDR_MB == 1024 + regs = mx6dl_1gn; + num_regs = ARRAY_SIZE(mx6dl_1gn); +printf("Configuring for 1GiB narrow memory bus\n"); +#elif CONFIG_DDR_MB == 2048 + regs = mx6dl_2g; + num_regs = ARRAY_SIZE(mx6dl_2g); +printf("Configuring for 2GiB wide memory bus\n"); +#endif + } + for (i=0; i < num_regs; i+=2) { + writel(regs[i+1],regs[i]); + } + dram_init(); +#endif + printf("%s\n", __func__); +} + +u32 spl_boot_device(void) +{ + printf("%s\n", __func__); +#if 0 + unsigned reg; + struct src *psrc = (struct src *)SRC_BASE_ADDR; + printf("%s: sbmr1 == 0x%08x\n", __func__, psrc->sbmr1); + printf("%s: gpr9 == 0x%08x\n", __func__, psrc->gpr9); + printf("%s: gpr10 == 0x%08x\n", __func__, psrc->gpr10); + return BOOT_DEVICE_USB; +#endif +#if 1 + return BOOT_DEVICE_SPI; +#endif +} + +#if 0 +void spl_usb_load_image(void) +{ + boot_mode_apply(MAKE_CFGVAL(0x01, 0x00, 0x00, 0x00)); + reset_cpu(0); +} + +#endif diff --git a/board/boundary/mx6_r/6x_bootscript-yocto.txt b/board/boundary/mx6_r/6x_bootscript-yocto.txt new file mode 100644 index 0000000..c765140 --- /dev/null +++ b/board/boundary/mx6_r/6x_bootscript-yocto.txt @@ -0,0 +1,130 @@ +# Yocto-specifics +setenv bootpart 2 +setenv bootdir / + +if ${fs}load mmc ${disk}:1 10008000 logo.bmp.gz ; then + bmp d 10008000 +fi + +setenv bootargs enable_wait_mode=off + +setenv i2cres rtcerr +if i2c dev 2 ; then + if i2c read 0x6f 0.1 6 0x10004000 ; then + mw.b 10004006 0 6 + if cmp.b 10004000 10004006 6 ; then + echo "RTC not programmed" ; + if i2c mw 0x6f 7.1 0x90 ; then + if i2c mw 0x6f 0.1 0x04 6 ; then + echo "Initialized RTC" ; + setenv i2cres rtcinit ; + else + setenv i2cres rtcerr-fill + fi + else + setenv i2cres rtcerr-wrinit + fi + else + echo "non-blank RTC data"; + setenv i2cres rtcok ; + fi + else + setenv i2cres rtcerr-read + fi +else + setenv i2cres rtcerr-dev +fi +setenv bootargs $bootargs $i2cres +setenv i2cres + +setenv nextcon 0; +setenv bootargs $bootargs video=mxcfb0:dev=lcd,LB043,if=RGB24 +setenv bootargs $bootargs ft5x06_ts.screenres=800,1280 +# rotate touch coordinates 90 degrees clockwise +setenv bootargs $bootargs ft5x06_ts.calibration=0,-40928,31391744,40941,0,0,65536 +setenv bootargs $bootargs g_ether.dev_addr=55:aa:55:aa:55:aa +setenv bootargs $bootargs video=mxcfb1:dev=hdmi,1280x720M@60 video=mxcfb2:off video=mxcfb3:off +setenv fbmem 28M +setenv nextcon 1 + +i2c dev 1 ; +if i2c probe 0x50 ; then + setenv bootargs $bootargs video=mxcfb1:dev=hdmi,1280x720M@60 video=mxcfb2:off video=mxcfb3:off + setenv fbmem $fbmem,28M + setexpr nextcon $nextcon + 1 +else + echo "------ no HDMI monitor"; +fi + +while test "4" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +setenv bootargs $bootargs $fbmem +setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait" + +if itest.s x$bootpart == x ; then + bootpart=1 +fi + +if test "sata" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; +else + setenv bootargs "$bootargs root=/dev/mmcblk0p$bootpart" ; +fi + +dtbname="imx6"; +if itest.s x6S != "x$cpu" ; then + dtbname=${dtbname}q-; +else + dtbname=${dtbname}s-; +fi + +if itest.s x == "x$board" ; then + board=sabrelite +fi +dtbname=${dtbname}${board}.dtb; + +if itest.s x == x${bootdir} ; then + bootdir=/boot/ +fi + +if ${fs}load ${dtype} ${disk}:1 12000000 ${bootdir}$dtbname ; then + havedtb=1; + setenv fdt_addr 0x11000000 + setenv fdt_high 0xffffffff +else + havedtb= +fi + +if itest.s x == x$allow_noncea ; then + setenv bootargs $bootargs mxc_hdmi.only_cea=1; + echo "only CEA modes allowed on HDMI port"; +else + setenv bootargs $bootargs mxc_hdmi.only_cea=0; + echo "non-CEA modes allowed on HDMI, audio may be affected"; +fi + +if kbd ; then + if itest.s xD == x$keybd ; then + if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage-usbwrite ; then + if ${fs}load ${dtype} ${disk}:1 12800000 ${bootdir}uramdisk-usbwrite.img ; then + if itest.s x$havedtb == x ; then + bootm 10800000 12800000 ; + else + bootm 10800000 12800000 12000000 ; + fi + fi + fi + fi +fi + +if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then + if itest.s x$havedtb == x ; then + bootm 10800000 ; + else + bootm 10800000 - 12000000 + fi +fi +echo "Error loading kernel image" diff --git a/board/boundary/mx6_r/6x_bootscript.txt b/board/boundary/mx6_r/6x_bootscript.txt new file mode 100644 index 0000000..4de1a51 --- /dev/null +++ b/board/boundary/mx6_r/6x_bootscript.txt @@ -0,0 +1,126 @@ +if ${fs}load mmc ${disk}:1 10008000 logo.bmp.gz ; then + bmp d 10008000 +fi + +setenv bootargs enable_wait_mode=off + +setenv i2cres rtcerr +if i2c dev 2 ; then + if i2c read 0x6f 0.1 6 0x10004000 ; then + mw.b 10004006 0 6 + if cmp.b 10004000 10004006 6 ; then + echo "RTC not programmed" ; + if i2c mw 0x6f 7.1 0x90 ; then + if i2c mw 0x6f 0.1 0x04 6 ; then + echo "Initialized RTC" ; + setenv i2cres rtcinit ; + else + setenv i2cres rtcerr-fill + fi + else + setenv i2cres rtcerr-wrinit + fi + else + echo "non-blank RTC data"; + setenv i2cres rtcok ; + fi + else + setenv i2cres rtcerr-read + fi +else + setenv i2cres rtcerr-dev +fi +setenv bootargs $bootargs $i2cres +setenv i2cres + +setenv nextcon 0; +setenv bootargs $bootargs video=mxcfb0:dev=lcd,LB043,if=RGB24 +setenv bootargs $bootargs ft5x06_ts.screenres=800,1280 +# rotate touch coordinates 90 degrees clockwise +setenv bootargs $bootargs ft5x06_ts.calibration=0,-40928,31391744,40941,0,0,65536 +setenv bootargs $bootargs g_ether.dev_addr=55:aa:55:aa:55:aa +setenv bootargs $bootargs video=mxcfb1:dev=hdmi,1280x720M@60 video=mxcfb2:off video=mxcfb3:off +setenv fbmem 28M +setenv nextcon 1 + +i2c dev 1 ; +if i2c probe 0x50 ; then + setenv bootargs $bootargs video=mxcfb1:dev=hdmi,1280x720M@60 video=mxcfb2:off video=mxcfb3:off + setenv fbmem $fbmem,28M + setexpr nextcon $nextcon + 1 +else + echo "------ no HDMI monitor"; +fi + +while test "4" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +setenv bootargs $bootargs $fbmem +setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait" + +if itest.s x$bootpart == x ; then + bootpart=1 +fi + +if test "sata" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; +else + setenv bootargs "$bootargs root=/dev/mmcblk0p$bootpart" ; +fi + +dtbname="imx6"; +if itest.s x6S != "x$cpu" ; then + dtbname=${dtbname}q-; +else + dtbname=${dtbname}s-; +fi + +if itest.s x == "x$board" ; then + board=sabrelite +fi +dtbname=${dtbname}${board}.dtb; + +if itest.s x == x${bootdir} ; then + bootdir=/boot/ +fi + +if ${fs}load ${dtype} ${disk}:1 12000000 ${bootdir}$dtbname ; then + havedtb=1; + setenv fdt_addr 0x11000000 + setenv fdt_high 0xffffffff +else + havedtb= +fi + +if itest.s x == x$allow_noncea ; then + setenv bootargs $bootargs mxc_hdmi.only_cea=1; + echo "only CEA modes allowed on HDMI port"; +else + setenv bootargs $bootargs mxc_hdmi.only_cea=0; + echo "non-CEA modes allowed on HDMI, audio may be affected"; +fi + +if kbd ; then + if itest.s xD == x$keybd ; then + if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage-usbwrite ; then + if ${fs}load ${dtype} ${disk}:1 12800000 ${bootdir}uramdisk-usbwrite.img ; then + if itest.s x$havedtb == x ; then + bootm 10800000 12800000 ; + else + bootm 10800000 12800000 12000000 ; + fi + fi + fi + fi +fi + +if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then + if itest.s x$havedtb == x ; then + bootm 10800000 ; + else + bootm 10800000 - 12000000 + fi +fi +echo "Error loading kernel image" diff --git a/board/boundary/mx6_r/Kconfig b/board/boundary/mx6_r/Kconfig new file mode 100644 index 0000000..7f54f40 --- /dev/null +++ b/board/boundary/mx6_r/Kconfig @@ -0,0 +1,18 @@ +if TARGET_MX6_R + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "mx6_r" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "mx6_r" + +endif diff --git a/board/boundary/mx6_r/MAINTAINERS b/board/boundary/mx6_r/MAINTAINERS new file mode 100644 index 0000000..cdb0725 --- /dev/null +++ b/board/boundary/mx6_r/MAINTAINERS @@ -0,0 +1,7 @@ +MX6_R BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/mx6_r/ +F: include/configs/mx6_r.h +F: configs/mx6_r_defconfig + diff --git a/board/boundary/mx6_r/Makefile b/board/boundary/mx6_r/Makefile new file mode 100644 index 0000000..7f545fc --- /dev/null +++ b/board/boundary/mx6_r/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := mx6_r.o diff --git a/board/boundary/mx6_r/mx6_r.c b/board/boundary/mx6_r/mx6_r.c new file mode 100644 index 0000000..b432e2a --- /dev/null +++ b/board/boundary/mx6_r/mx6_r.c @@ -0,0 +1,925 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +static iomux_v3_cfg_t const init_pads[] = { + /* WL12XX_WL_IRQ_GP */ + NEW_PAD_CTRL(MX6_PAD_NANDF_CS1__GPIO6_IO14, WEAK_PULLDOWN), + /* WL12XX_WL_ENABLE_GP */ + NEW_PAD_CTRL(MX6_PAD_NANDF_CS2__GPIO6_IO15, OUTPUT_40OHM), + /* WL12XX_BT_ENABLE_GP */ + NEW_PAD_CTRL(MX6_PAD_NANDF_CS3__GPIO6_IO16, OUTPUT_40OHM), + /* USB otg power */ + NEW_PAD_CTRL(MX6_PAD_EIM_D22__GPIO3_IO22, OUTPUT_40OHM), + /* Main power */ + NEW_PAD_CTRL(MX6_PAD_SD1_DAT0__GPIO1_IO16, OUTPUT_40OHM), + /* Mipi Camera Reset */ + NEW_PAD_CTRL(MX6_PAD_CSI0_DATA_EN__GPIO5_IO20, OUTPUT_40OHM), + /* Mipi Powerdown */ + NEW_PAD_CTRL(MX6_PAD_CSI0_VSYNC__GPIO5_IO21, OUTPUT_40OHM), + /* LED control */ + NEW_PAD_CTRL(MX6_PAD_EIM_D20__GPIO3_IO20, OUTPUT_40OHM), + /* 5VEN */ + NEW_PAD_CTRL(MX6_PAD_NANDF_WP_B__GPIO6_IO09, OUTPUT_40OHM), + /* 3P3VEN */ + NEW_PAD_CTRL(MX6_PAD_EIM_RW__GPIO2_IO26, OUTPUT_40OHM), + /* 5P4VEN */ + NEW_PAD_CTRL(MX6_PAD_NANDF_D1__GPIO2_IO01, OUTPUT_40OHM), + /* ??? function */ + NEW_PAD_CTRL(MX6_PAD_EIM_D29__GPIO3_IO29, OUTPUT_40OHM), + /* BAT status */ + NEW_PAD_CTRL(MX6_PAD_NANDF_D2__GPIO2_IO02, WEAK_PULLUP), + /* Misc outputs */ + NEW_PAD_CTRL(MX6_PAD_GPIO_3__GPIO1_IO03, OUTPUT_40OHM), + + /* Backlight on RGB connector: J15 */ +#define RGB_BACKLIGHT_GP IMX_GPIO_NR(1, 21) + MX6_PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); + + return 0; +} + +static iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const uart2_pads[] = { + MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +/* I2C1, SGTL5000 */ +static struct i2c_pads_info i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}; + +/* I2C2 Camera, MIPI */ +static struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}; + +/* I2C3, J15 - RGB connector */ +static struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC, + .gp = IMX_GPIO_NR(7, 11) + } +}; + +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc3_pads[] = { + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_DI0_PIN4__GPIO4_IO20 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +/* Button assignments for J14 */ +static iomux_v3_cfg_t const button_pads[] = { + /* GPIO_KEYS - J4 */ + NEW_PAD_CTRL(MX6_PAD_EIM_DA0__GPIO3_IO00, WEAK_PULLUP), /* pin 1 - back */ + NEW_PAD_CTRL(MX6_PAD_EIM_DA1__GPIO3_IO01, WEAK_PULLUP), /* pin 2 - Home(left) */ + NEW_PAD_CTRL(MX6_PAD_EIM_DA2__GPIO3_IO02, WEAK_PULLUP), /* pin 3 - Menu */ + NEW_PAD_CTRL(MX6_PAD_EIM_DA3__GPIO3_IO03, WEAK_PULLUP), /* pin 4 - Down */ + NEW_PAD_CTRL(MX6_PAD_GPIO_18__GPIO7_IO13, WEAK_PULLUP), /* pin 5 - up */ + NEW_PAD_CTRL(MX6_PAD_GPIO_19__GPIO4_IO05, WEAK_PULLUP), /* pin 6 - right */ + NEW_PAD_CTRL(MX6_PAD_KEY_COL2__GPIO4_IO10, WEAK_PULLUP), /* pin 7 - NC */ + NEW_PAD_CTRL(MX6_PAD_KEY_ROW2__GPIO4_IO11, WEAK_PULLUP), /* pin 8 - NC */ + NEW_PAD_CTRL(MX6_PAD_CSI0_DAT15__GPIO6_IO01, WEAK_PULLDOWN),/* pin 9 inverted, Main power off request */ + NEW_PAD_CTRL(MX6_PAD_NANDF_CS0__GPIO6_IO11, WEAK_PULLUP), /* pin 10 - NC */ + NEW_PAD_CTRL(MX6_PAD_SD1_DAT1__GPIO1_IO17, WEAK_PULLUP), /* pin 11 - NC */ +}; + +int board_eth_init(bd_t *bis) +{ +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + +static iomux_v3_cfg_t const usb_pads[] = { + MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); + imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); + + /* Reset USB hub */ + gpio_direction_output(IMX_GPIO_NR(7, 12), 0); + mdelay(2); + gpio_set_value(IMX_GPIO_NR(7, 12), 1); + + return 0; +} +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC4_BASE_ADDR}, + {USDHC3_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int gp_cd = (cfg->esdhc_base == USDHC3_BASE_ADDR) ? CONFIG_SDHC3_CD : + CONFIG_SDHC4_CD; + + if (gp_cd >= 0) { + gpio_direction_input(gp_cd); + return !gpio_get_value(gp_cd); + } + return 1; /* eMMC is always present */ +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].max_bus_width = 8; + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 1: + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + break; + case 0: + imx_iomux_v3_setup_multiple_pads( + usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -1; +} + +static iomux_v3_cfg_t const ecspi1_pads[] = { + /* SS1 */ + MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; + +static void setup_spi(void) +{ + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, + ARRAY_SIZE(ecspi1_pads)); +} +#endif + +int board_phy_config(struct phy_device *phydev) +{ + /* min rx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0); + /* min tx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0); + /* max rx/tx clock delay, min rx/tx control */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0); + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) { + return -1; + } + + env_loadsplash = getenv("loadsplash"); + if (env_loadsplash == NULL) { + printf("Environment variable loadsplash not found!\n"); + return -1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("failed to run loadsplash %s\n\n", env_loadsplash); + return -1; + } + + return 0; +} + +static void setup_buttons(void) +{ + imx_iomux_v3_setup_multiple_pads(button_pads, + ARRAY_SIZE(button_pads)); +} + +#if defined(CONFIG_VIDEO_IPUV3) + +static iomux_v3_cfg_t const rgb_pads[] = { + MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, + MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15, + MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02, + MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03, + MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00, + MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01, + MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02, + MX6_PAD_DISP0_DAT3__IPU1_DISP0_DATA03, + MX6_PAD_DISP0_DAT4__IPU1_DISP0_DATA04, + MX6_PAD_DISP0_DAT5__IPU1_DISP0_DATA05, + MX6_PAD_DISP0_DAT6__IPU1_DISP0_DATA06, + MX6_PAD_DISP0_DAT7__IPU1_DISP0_DATA07, + MX6_PAD_DISP0_DAT8__IPU1_DISP0_DATA08, + MX6_PAD_DISP0_DAT9__IPU1_DISP0_DATA09, + MX6_PAD_DISP0_DAT10__IPU1_DISP0_DATA10, + MX6_PAD_DISP0_DAT11__IPU1_DISP0_DATA11, + MX6_PAD_DISP0_DAT12__IPU1_DISP0_DATA12, + MX6_PAD_DISP0_DAT13__IPU1_DISP0_DATA13, + MX6_PAD_DISP0_DAT14__IPU1_DISP0_DATA14, + MX6_PAD_DISP0_DAT15__IPU1_DISP0_DATA15, + MX6_PAD_DISP0_DAT16__IPU1_DISP0_DATA16, + MX6_PAD_DISP0_DAT17__IPU1_DISP0_DATA17, + MX6_PAD_DISP0_DAT18__IPU1_DISP0_DATA18, + MX6_PAD_DISP0_DAT19__IPU1_DISP0_DATA19, + MX6_PAD_DISP0_DAT20__IPU1_DISP0_DATA20, + MX6_PAD_DISP0_DAT21__IPU1_DISP0_DATA21, + MX6_PAD_DISP0_DAT22__IPU1_DISP0_DATA22, + MX6_PAD_DISP0_DAT23__IPU1_DISP0_DATA23, +}; + +#ifdef CONFIG_MXC_SPI_DISPLAY +static iomux_v3_cfg_t const ecspi2_pads[] = { + MX6_PAD_CSI0_DAT8__ECSPI2_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_CSI0_DAT9__ECSPI2_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_CSI0_DAT10__ECSPI2_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_CSI0_DAT11__GPIO5_IO29 | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; + +static int spi_display_read(struct spi_slave *spi, u8 addr, u8 reg, u8 *data, size_t data_len) +{ + u8 cmd[2]; + int ret; + + cmd[0] = addr; + cmd[1] = reg; + ret = spi_xfer(spi, 2 * 8, cmd, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to select reg 0x%x, %d\n", __func__, reg, ret); + return ret; + } + udelay(3); + cmd[0] = addr | 3; + ret = spi_xfer(spi, 1 * 8, cmd, NULL, SPI_XFER_BEGIN); + if (ret) { + debug("%s: Failed to start read for reg 0x%x, %d\n", __func__, reg, ret); + return ret; + } + ret = spi_xfer(spi, data_len * 8, NULL, data, SPI_XFER_END); + if (ret) { + debug("%s: Failed to read data for reg 0x%x, %d\n", __func__, reg, ret); + return ret; + } + return ret; +} + +static int spi_display_cmds(struct spi_slave *spi, u8 addr, u8 *cmds) +{ + u8 cmd_buf[16]; + int ret = 0; + + printf("%s\n", __func__); + while (*cmds) { + u8 reg = *cmds++; + size_t len = *cmds++; + + cmd_buf[0] = addr; + cmd_buf[1] = reg; + ret = spi_xfer(spi, 2 * 8, cmd_buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to select reg 0x%x, %d\n", __func__, reg, ret); + return ret; + } + udelay(3); + cmd_buf[0] = addr | 2; + memcpy(&cmd_buf[1], cmds, len); + cmds += len; + ret = spi_xfer(spi, (len + 1) * 8, cmd_buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to write for reg 0x%x, %d\n", __func__, reg, ret); + return ret; + } + } + return ret; +} + +static u8 display_init_cmds[] = { +/* Display Mode Setting */ + 0x36, 1, 0x08, + 0x3a, 1, 0x70, + 0xb1, 3, 0x0e, 0x28, 0x0a, + 0xb2, 2, 0x00, 0xc8, + 0xb3, 1, 0x00, + 0xb4, 1, 0x04, + 0xb5, 5, 0x42, 0x10, 0x10, 0x00, 0x20, + 0xb6, 6, 0x0b, 0x0f, 0x3c, 0x13, 0x13, 0xe8, + 0xb7, 5, 0x46, 0x06, 0x0c, 0x00, 0x00, +/* Power Setting */ + 0xc0, 2, 0x01, 0x11, + 0xc3, 5, 0x07, 0x03, 0x04, 0x04, 0x04, + 0xc4, 6, 0x12, 0x24, 0x18, 0x18, 0x02, 0x49, + 0xc5, 1, 0x6f, + 0xc6, 2, 0x41, 0x63, +/* Gamma Setting */ + 0xd0, 9, 0x03, 0x07, 0x73, 0x35, 0x00, 0x01, 0x20, 0x00, 0x03, + 0xd2, 9, 0x03, 0x07, 0x73, 0x35, 0x00, 0x01, 0x20, 0x00, 0x03, + 0xd4, 9, 0x03, 0x07, 0x73, 0x35, 0x00, 0x01, 0x20, 0x00, 0x03, + 0xd1, 9, 0x03, 0x07, 0x73, 0x35, 0x00, 0x01, 0x20, 0x00, 0x03, + 0xd3, 9, 0x03, 0x07, 0x73, 0x35, 0x00, 0x01, 0x20, 0x00, 0x03, + 0xd5, 9, 0x03, 0x07, 0x73, 0x35, 0x00, 0x01, 0x20, 0x00, 0x03, +/* Sleep out */ + 0x11, 0, + 0 +}; + +static u8 display_on_cmds[] = { + 0x29, 0, + 0 +}; + +static void enable_spi_rgb(struct display_info_t const *dev) +{ + unsigned cs_gpio = IMX_GPIO_NR(5, 29); + struct spi_slave *spi; + int ret; + + printf("%s\n", __func__); + gpio_direction_output(IMX_GPIO_NR(1, 21), 1); /* set sd1_dat3 pwm1 high */ + gpio_direction_output(RGB_BACKLIGHT_GP, 1); + gpio_direction_output(cs_gpio, 1); + + enable_spi_clk(1, dev->bus); + + /* Setup spi_slave */ + spi = spi_setup_slave(dev->bus, cs_gpio << 8, 1000000, SPI_MODE_3); + if (!spi) { + printf("%s: Failed to set up slave\n", __func__); + return; + } + + /* Claim spi bus */ + ret = spi_claim_bus(spi); + if (ret) { + debug("%s: Failed to claim SPI bus: %d\n", __func__, ret); + goto free_bus; + } + + /* + * Initialization sequence + * 1. Display Mode Settings + * 2. Power Settings + * 3. Gamma Settings + * 4. Sleep Out + * 5. Wait >= 7 frame + * 6. Display on + */ + ret = spi_display_cmds(spi, dev->addr, display_init_cmds); + if (ret) { + printf("%s: Failed to display_init_cmds %d\n", __func__, ret); + goto release_bus; + } + mdelay(200); + ret = spi_display_cmds(spi, dev->addr, display_on_cmds); + if (ret) { + printf("%s: Failed to display_on_cmds %d\n", __func__, ret); + goto release_bus; + } + ret = 1; + + /* Release spi bus */ +release_bus: + spi_release_bus(spi); +free_bus: + spi_free_slave(spi); + enable_spi_clk(0, dev->bus); + return; +} + +/* + * Return 1 for successful detection of display + */ +static int detect_spi(struct display_info_t const *dev) +{ + int ret; + unsigned cs_gpio = IMX_GPIO_NR(5, 29); + unsigned reset_gpio = IMX_GPIO_NR(2, 5); /* nandf_d5 */ + struct spi_slave *spi; + u8 data[8]; + + printf("%s\n", __func__); + gpio_direction_output(cs_gpio, 1); + gpio_direction_output(reset_gpio, 1); + imx_iomux_v3_setup_multiple_pads(ecspi2_pads, ARRAY_SIZE(ecspi2_pads)); + udelay(1); + gpio_direction_output(reset_gpio, 0); + udelay(2000); + gpio_direction_output(reset_gpio, 1); + udelay(1); + enable_spi_clk(1, dev->bus); + + /* Setup spi_slave */ + spi = spi_setup_slave(dev->bus, cs_gpio << 8, 1000000, SPI_MODE_3); + if (!spi) { + printf("%s: Failed to set up slave\n", __func__); + return 0; + } + + /* Claim spi bus */ + ret = spi_claim_bus(spi); + if (ret) { + debug("%s: Failed to claim SPI bus: %d\n", __func__, ret); + ret = 0; + goto free_bus; + } + + /* Read the dispctl1 */ + ret = spi_display_read(spi, dev->addr, 0xb5, data, 2); + if (ret) { + printf("%s: Failed to read dispctl1, %d\n", __func__, ret); + ret = 0; + goto release_bus; + } + debug("%s: *(0x%02x) = 0x%02x 0x%02x\n", __func__, 0xb5, data[0], data[1]); + + if ((data[1] == 0) || (data[1] == 0xff)) { + ret = 0; + goto release_bus; + } + /* + * Initialization sequence + * 1. Display Mode Settings + * 2. Power Settings + * 3. Gamma Settings + * 4. Sleep Out + * 5. Wait >= 7 frame + * 6. Display on + */ + ret = spi_display_cmds(spi, dev->addr, display_init_cmds); + if (ret) { + printf("%s: Failed to init %d\n", __func__, ret); + ret = 0; + goto release_bus; + } + ret = 1; + + /* Release spi bus */ +release_bus: + spi_release_bus(spi); +free_bus: + spi_free_slave(spi); + enable_spi_clk(0, dev->bus); + return ret; +} +#endif + +void board_enable_lcd(const struct display_info_t *di) +{ + imx_iomux_v3_setup_multiple_pads(rgb_pads, ARRAY_SIZE(rgb_pads)); +#ifdef CONFIG_MXC_SPI_DISPLAY + if (di->fbflags & FBF_SPI) + return enable_spi_rgb(di); +#endif + gpio_direction_output(RGB_BACKLIGHT_GP, 1); +} + +#define IMX_VD_LB043(_mode, _detect, _bus) \ +{\ + .bus = _bus,\ + .addr = 0x70,\ + .pixfmt = IPU_PIX_FMT_RGB24,\ + .detect = detect_spi,\ + .enable = imx_enable_fb,\ + .fbtype = FB_##_mode,\ + .fbflags = FBF_MODESTR | FBF_SPI,\ + .mode = {\ + .name = "LB043",\ + .refresh = 57,\ + .xres = 480,\ + .yres = 800,\ + .pixclock = 37037,\ + .left_margin = 40,\ + .right_margin = 60,\ + .upper_margin = 10,\ + .lower_margin = 10,\ + .hsync_len = 20,\ + .vsync_len = 10,\ + .sync = FB_SYNC_CLK_LAT_FALL,\ + .vmode = FB_VMODE_NONINTERLACED\ + },\ +} + +const struct display_info_t displays[] = { +#ifdef CONFIG_MXC_SPI_DISPLAY + IMX_VD_LB043(LCD, 1, 1), +#endif + /* hdmi */ + IMX_VD50_1280_720M_60(HDMI, 1, 1), + IMX_VD50_1920_1080M_60(HDMI, 0, 1), + IMX_VD50_1024_768M_60(HDMI, 0, 1), + + /* tsc2004 */ + IMX_VD48_CLAA_WVGA(LCD, 1, 2), + IMX_VD48_QVGA(LCD, 0, 2), +}; + +size_t display_count = ARRAY_SIZE(displays); + +int board_cfb_skip(void) +{ + return NULL != getenv("novideo"); +} +#endif + +#define WL12XX_WL_IRQ_GP IMX_GPIO_NR(6, 14) + +static unsigned gpios_out_low[] = { + /* Disable wl1271 */ + IMX_GPIO_NR(6, 15), /* disable wireless */ + IMX_GPIO_NR(6, 16), /* disable bluetooth */ + IMX_GPIO_NR(3, 22), /* disable USB otg power */ + IMX_GPIO_NR(5, 20), /* ov5640 mipi camera reset */ + IMX_GPIO_NR(3, 20), /* turn led off */ + /* No 5VEN */ + IMX_GPIO_NR(6, 9), + /* No 3P3VEN */ + IMX_GPIO_NR(2, 26), + /* No 5P4VEN */ + IMX_GPIO_NR(2, 1), + IMX_GPIO_NR(1, 3), /* Unknown function */ +}; + +static unsigned gpios_out_high[] = { + IMX_GPIO_NR(1, 16), /* Enable main power */ + IMX_GPIO_NR(5, 21), /* ov5640 mipi camera power down */ + IMX_GPIO_NR(3, 29), /* Unknown function */ +}; + +static unsigned short gpios_in[] = { + RGB_BACKLIGHT_GP, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + gpio_direction_input(WL12XX_WL_IRQ_GP); + + imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads)); + setup_buttons(); + +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_MXC_SPI + setup_spi(); +#endif + imx_iomux_v3_setup_multiple_pads( + usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + +#ifdef CONFIG_CMD_SATA + setup_sata(); +#endif + + return 0; +} + +int checkboard(void) +{ + puts("Board: " CONFIG_BOARD_NAME "\n"); + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; + unsigned char active_low; +}; + +static struct button_key const buttons[] = { + {"back", IMX_GPIO_NR(3, 0), 'B', 1}, + {"up", IMX_GPIO_NR(3, 1), 'U', 1}, + {"menu", IMX_GPIO_NR(3, 2), 'M', 1}, + {"left", IMX_GPIO_NR(3, 3), 'L', 1}, + {"right", IMX_GPIO_NR(7, 13), 'R', 1}, + {"down", IMX_GPIO_NR(4, 5), 'D', 1}, + {"power", IMX_GPIO_NR(6, 1), 'P', 0}, +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + int val; + + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + val = gpio_get_value(buttons[i].gpnum); + if (buttons[i].active_low) + val = !val; + if (val) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +#ifdef CONFIG_PREBOOT +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} +#endif + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_PREBOOT + preboot_keys(); +#endif + +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", CONFIG_BOARD_NAME); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} + +void board_poweroff(void) +{ + /* Turn off main power */ + gpio_direction_output(IMX_GPIO_NR(1, 16), 0); + udelay(1000000); +} + +static int do_poweroff(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) +{ + board_poweroff(); + return 0; +} + +U_BOOT_CMD(poweroff, 1, 1, do_poweroff, "Turn off power", ""); diff --git a/board/boundary/nit6xlite/6x_bootscript-yocto-3.10.53.txt b/board/boundary/nit6xlite/6x_bootscript-yocto-3.10.53.txt new file mode 100644 index 0000000..8428b63 --- /dev/null +++ b/board/boundary/nit6xlite/6x_bootscript-yocto-3.10.53.txt @@ -0,0 +1,117 @@ +# Yocto-specifics +setenv bootpart 2 +setenv bootdir / + +setenv bootargs '' + +if ${fs}load ${dtype} ${disk}:1 10800000 uEnv.txt ; then + env import -t 10800000 $filesize +fi + +if itest.s "x" == "x$dtbname" ; then + dtbname=imx6dl-nit6xlite.dtb; +fi + +if itest.s x == x${bootdir} ; then + bootdir=/boot/ +fi + +setenv fdt_addr 0x12000000 +if ${fs}load ${dtype} ${disk}:1 $fdt_addr ${bootdir}$dtbname ; then + fdt addr $fdt_addr + setenv fdt_high 0xffffffff +else + echo "!!!! Error loading ${bootdir}$dtbname"; + exit; +fi + +# ------------------- HDMI detection +i2c dev 1 ; +if i2c probe 0x50 ; then + echo "------ have HDMI monitor"; + if itest.s x == x$allow_noncea ; then + setenv bootargs $bootargs mxc_hdmi.only_cea=1; + echo "only CEA modes allowed on HDMI port"; + else + setenv bootargs $bootargs mxc_hdmi.only_cea=0; + echo "non-CEA modes allowed on HDMI, audio may be affected"; + fi +else + fdt rm hdmi_display + echo "------ no HDMI monitor"; +fi + +# ------------------- LVDS detection +# -------- LVDS0 +setenv have_lvds +i2c dev 2 +if i2c probe 0x04 ; then + echo "------ have Freescale display"; + setenv have_lvds 1 +else + echo "------ no Freescale display"; + fdt rm hannstar; +fi + +if i2c probe 0x38 ; then + if itest.s "xLDB-WXGA" == "x$panel"; then + screenres=1280,800 + fdt rm okaya1024x600 + else + screenres=1024,600 + fdt rm lg1280x800 + fi + setenv have_lvds 1 + setenv bootargs $bootargs ft5x06_ts.screenres=$screenres + if itest.s "x" -ne "x$calibration" ; then + setenv bootargs $bootargs ft5x06_ts.calibration=$calibration + fi +else + echo "------ no ft5x06 touch controller"; + fdt rm okaya1024x600 + fdt rm lg1280x800 +fi + +if itest.s "x" == "x$have_lvds"; then + fdt rm lvds_display; +fi + +# ------------------- LCD detection +# since the Nitrogen6_Lite board has on-board TSC2004, +# we can't test for it. +# +# set ignore_lcd to 1 to disable the 480x272 display +# +if itest.s "x" != "x$ignore_lcd" ; then + echo "------ ignoring LCD display"; + fdt rm lcd_display; +fi + +setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait" + +if itest.s x$bootpart == x ; then + bootpart=1 +fi + +if test "usb" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; +elif itest 0 -eq ${disk}; then + setenv bootargs "$bootargs root=/dev/mmcblk2p$bootpart" ; +else + setenv bootargs "$bootargs root=/dev/mmcblk3p$bootpart" ; +fi + +setenv bootargs $bootargs fec.disable_giga=1 + +if itest.s "x" != "x$show_fdt" ; then + fdt print / +fi + +if itest.s "x" != "x$show_env" ; then + printenv +fi + +if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then + bootm 10800000 - $fdt_addr +fi +echo "Error loading kernel image" diff --git a/board/boundary/nit6xlite/6x_bootscript-yocto.txt b/board/boundary/nit6xlite/6x_bootscript-yocto.txt new file mode 100644 index 0000000..efbf8af --- /dev/null +++ b/board/boundary/nit6xlite/6x_bootscript-yocto.txt @@ -0,0 +1,112 @@ +# Yocto-specifics +setenv bootpart 2 +setenv bootdir / + +setenv bootargs enable_wait_mode=off fec.disable_giga=1; +setenv nextcon 0; +setenv lvds 0; + +if test -n "$tempfuse" ; then + setenv bootargs $bootargs thermal.fusedata=$tempfuse +fi + +i2c dev 1 ; +if i2c probe 0x50 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24 + setenv fbmem "fbmem=28M"; + setexpr nextcon $nextcon + 1 +else + echo "------ no HDMI monitor"; +fi + +i2c dev 2 +if i2c probe 0x04 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LDB-XGA,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no Freescale display"; +fi + +if i2c probe 0x38 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no 1024x600 display"; +fi + +if i2c probe 0x41 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no ILI210x touch controller"; +fi + +if test "0" -eq $lvds; then + echo "Default to wqvga (480x272) display"; + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,okaya_480x272,if=RGB24 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +fi + +while test "4" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +setenv bootargs $bootargs $fbmem +setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait" + +if itest.s x$bootpart == x ; then + bootpart=1 +fi + +if test "usb" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; +elif itest.s "x" == "x$sdphys" ; then + setenv bootargs "$bootargs root=/dev/mmcblk0p$bootpart" ; +elif itest 0 -eq ${disk}; then + setenv bootargs "$bootargs root=/dev/mmcblk2p$bootpart" ; +else + setenv bootargs "$bootargs root=/dev/mmcblk3p$bootpart" ; +fi + +if itest.s x == x${bootdir} ; then + bootdir=/boot/ +fi + +dtbname="imx6dl-nit6xlite.dtb"; +if ${fs}load ${dtype} ${disk}:1 12000000 ${bootdir}$dtbname ; then + havedtb=1; + setenv fdt_addr 0x11000000 + setenv fdt_high 0xffffffff +else + havedtb= +fi + +if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then + if itest.s x$havedtb == x ; then + bootm 10800000 ; + else + bootm 10800000 - 12000000 + fi +fi +echo "Error loading kernel image" diff --git a/board/boundary/nit6xlite/6x_bootscript.txt b/board/boundary/nit6xlite/6x_bootscript.txt new file mode 100644 index 0000000..7d8ca3e --- /dev/null +++ b/board/boundary/nit6xlite/6x_bootscript.txt @@ -0,0 +1,108 @@ +setenv bootargs enable_wait_mode=off fec.disable_giga=1; +setenv nextcon 0; +setenv lvds 0; + +if test -n "$tempfuse" ; then + setenv bootargs $bootargs thermal.fusedata=$tempfuse +fi + +i2c dev 1 ; +if i2c probe 0x50 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24 + setenv fbmem "fbmem=28M"; + setexpr nextcon $nextcon + 1 +else + echo "------ no HDMI monitor"; +fi + +i2c dev 2 +if i2c probe 0x04 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LDB-XGA,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no Freescale display"; +fi + +if i2c probe 0x38 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no 1024x600 display"; +fi + +if i2c probe 0x41 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no ILI210x touch controller"; +fi + +if test "0" -eq $lvds; then + echo "Default to wqvga (480x272) display"; + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,okaya_480x272,if=RGB24 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +fi + +while test "4" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +setenv bootargs $bootargs $fbmem +setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait" + +if itest.s x$bootpart == x ; then + bootpart=1 +fi + +if test "usb" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; +elif itest.s "x" == "x$sdphys" ; then + setenv bootargs "$bootargs root=/dev/mmcblk0p$bootpart" ; +elif itest 0 -eq ${disk}; then + setenv bootargs "$bootargs root=/dev/mmcblk2p$bootpart" ; +else + setenv bootargs "$bootargs root=/dev/mmcblk3p$bootpart" ; +fi + +if itest.s x == x${bootdir} ; then + bootdir=/boot/ +fi + +dtbname="imx6dl-nit6xlite.dtb"; +if ${fs}load ${dtype} ${disk}:1 12000000 ${bootdir}$dtbname ; then + havedtb=1; + setenv fdt_addr 0x11000000 + setenv fdt_high 0xffffffff +else + havedtb= +fi + +if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then + if itest.s x$havedtb == x ; then + bootm 10800000 ; + else + bootm 10800000 - 12000000 + fi +fi +echo "Error loading kernel image" diff --git a/board/boundary/nit6xlite/Kconfig b/board/boundary/nit6xlite/Kconfig new file mode 100644 index 0000000..3199cc9 --- /dev/null +++ b/board/boundary/nit6xlite/Kconfig @@ -0,0 +1,18 @@ +if TARGET_NIT6XLITE + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "nit6xlite" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "nit6xlite" + +endif diff --git a/board/boundary/nit6xlite/MAINTAINERS b/board/boundary/nit6xlite/MAINTAINERS new file mode 100644 index 0000000..4c90564 --- /dev/null +++ b/board/boundary/nit6xlite/MAINTAINERS @@ -0,0 +1,8 @@ +NIT6XLITE BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/nit6xlite/ +F: include/configs/nit6xlite.h +F: configs/nit6xlite_defconfig +F: configs/nit6xlite1g_defconfig + diff --git a/board/boundary/nit6xlite/Makefile b/board/boundary/nit6xlite/Makefile new file mode 100644 index 0000000..f5acb63 --- /dev/null +++ b/board/boundary/nit6xlite/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := nit6xlite.o diff --git a/board/boundary/nit6xlite/nit6xlite.c b/board/boundary/nit6xlite/nit6xlite.c new file mode 100644 index 0000000..bc07ae4 --- /dev/null +++ b/board/boundary/nit6xlite/nit6xlite.c @@ -0,0 +1,607 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Special MXCFB sync flags are here. */ +#include "../drivers/video/mxcfb.h" + +DECLARE_GLOBAL_DATA_PTR; +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) +#define GP_SPI1_CS0 IMX_GPIO_NR(3, 19) + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDOWN (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +static iomux_v3_cfg_t const init_pads[] = { + /* WiFi/BT pads */ +#define WIFI_WL_IRQ_GP IMX_GPIO_NR(6, 14) + (MX6_PAD_NANDF_CS1__GPIO6_IO14 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(WEAK_PULLDOWN), +#define WIFI_BT_REG_ON IMX_GPIO_NR(6, 15) + (MX6_PAD_NANDF_CS2__GPIO6_IO15 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), + (MX6_PAD_NANDF_CS3__GPIO6_IO16 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(WEAK_PULLUP), +#define WIFI_WL_ENABLE_GP IMX_GPIO_NR(6, 7) + (MX6_PAD_NANDF_CLE__GPIO6_IO07 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), + (MX6_PAD_NANDF_WP_B__GPIO6_IO09 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(WEAK_PULLDOWN), +#define WIFI_WL_CLK_REQ IMX_GPIO_NR(6, 8) + + /* Backlight on RGB connector: J15 */ +#define RGB_BACKLIGHT_GP IMX_GPIO_NR(1, 21) + MX6_PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* PWM on LVDS connector: J6 */ +#define LVDS_BACKLIGHT_PWM IMX_GPIO_NR(1, 18) + MX6_PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* Backlight on LVDS connector: J6 */ +#define LVDS_BACKLIGHT_EN IMX_GPIO_NR(1, 17) + MX6_PAD_SD1_DAT1__GPIO1_IO17 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); + + return 0; +} + +static iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +/* #define CONFIG_SILENT_UART */ +static iomux_v3_cfg_t const uart2_pads[] = { +#ifndef CONFIG_SILENT_UART + MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +#else + MX6_PAD_EIM_D26__GPIO3_IO26 | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_EIM_D27__GPIO3_IO27 | MUX_PAD_CTRL(UART_PAD_CTRL), +#endif +}; + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +/* I2C1, SGTL5000 */ +static struct i2c_pads_info i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}; + +/* I2C2 Camera, MIPI */ +static struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}; + +/* I2C3, J15 - RGB connector */ +static struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC, + .gp = IMX_GPIO_NR(7, 11) + } +}; + +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc3_pads[] = { + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +static iomux_v3_cfg_t const enet_pads1[] = { + MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), + /* pin 35 - 1 (PHY_AD2) on reset */ + MX6_PAD_RGMII_RXC__GPIO6_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 32 - 1 - (MODE0) all */ + MX6_PAD_RGMII_RD0__GPIO6_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 31 - 1 - (MODE1) all */ + MX6_PAD_RGMII_RD1__GPIO6_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 28 - 1 - (MODE2) all */ + MX6_PAD_RGMII_RD2__GPIO6_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 27 - 1 - (MODE3) all */ + MX6_PAD_RGMII_RD3__GPIO6_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + MX6_PAD_RGMII_RX_CTL__GPIO6_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 42 PHY nRST */ + MX6_PAD_EIM_D23__GPIO3_IO23 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static iomux_v3_cfg_t const enet_pads2[] = { + MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), +}; + +static iomux_v3_cfg_t const misc_pads[] = { + MX6_PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_KEY_COL4__USB_OTG_OC | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_EIM_D30__USB_H1_OC | MUX_PAD_CTRL(WEAK_PULLUP), + /* OTG Power enable */ + MX6_PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(OUTPUT_40OHM), +}; + +static void setup_iomux_enet(void) +{ + gpio_direction_output(IMX_GPIO_NR(1, 27), 0); /* PHY rst */ + gpio_direction_output(IMX_GPIO_NR(6, 30), 1); + gpio_direction_output(IMX_GPIO_NR(6, 25), 1); + gpio_direction_output(IMX_GPIO_NR(6, 27), 1); + gpio_direction_output(IMX_GPIO_NR(6, 28), 1); + gpio_direction_output(IMX_GPIO_NR(6, 29), 1); + imx_iomux_v3_setup_multiple_pads(enet_pads1, ARRAY_SIZE(enet_pads1)); + gpio_direction_output(IMX_GPIO_NR(6, 24), 1); + + /* Need delay 10ms according to KSZ9021 spec */ + udelay(1000 * 10); + gpio_set_value(IMX_GPIO_NR(1, 27), 1); /* PHY reset */ + + imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2)); +} + +static iomux_v3_cfg_t const usb_pads[] = { + MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); + imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); + + /* Reset USB hub */ + gpio_direction_output(IMX_GPIO_NR(7, 12), 0); + mdelay(2); + gpio_set_value(IMX_GPIO_NR(7, 12), 1); + + return 0; +} + +int board_ehci_power(int port, int on) +{ + if (port) + return 0; + gpio_set_value(GP_USB_OTG_PWR, on); + return 0; +} + +#endif + +#ifdef CONFIG_FSL_ESDHC + +int board_mmc_getcd(struct mmc *mmc) +{ + int ret; + + gpio_direction_input(IMX_GPIO_NR(7, 0)); + ret = !gpio_get_value(IMX_GPIO_NR(7, 0)); + + return ret; +} + +static struct fsl_esdhc_cfg usdhc_cfg = { + .esdhc_base = USDHC3_BASE_ADDR, + .max_bus_width = 4 +}; + +int board_mmc_init(bd_t *bis) +{ + printf("%s:\n", __func__ ); + usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + + printf("%s:setup pads\n", __func__ ); + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + printf("%s:initialize\n", __func__ ); + return fsl_esdhc_initialize(bis, &usdhc_cfg); +} +#endif + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? GP_SPI1_CS0 : -1; +} + +static iomux_v3_cfg_t const ecspi1_pads[] = { + /* SS1 */ + MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; + +static void setup_spi(void) +{ + gpio_direction_output(CONFIG_SF_DEFAULT_CS, 1); + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, + ARRAY_SIZE(ecspi1_pads)); +} +#endif + +int board_phy_config(struct phy_device *phydev) +{ + /* ksz9021 */ + /* min rx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0); + /* min tx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0); + /* max rx/tx clock delay, min rx/tx control */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0); + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + +#ifdef CONFIG_FEC_MXC + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + /* scan phy 4,5,6,7 */ + phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } +#endif +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + +#if defined(CONFIG_VIDEO_IPUV3) + +static iomux_v3_cfg_t const rgb_pads[] = { + MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, + MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15, + MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02, + MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03, + MX6_PAD_DI0_PIN4__GPIO4_IO20, + MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00, + MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01, + MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02, + MX6_PAD_DISP0_DAT3__IPU1_DISP0_DATA03, + MX6_PAD_DISP0_DAT4__IPU1_DISP0_DATA04, + MX6_PAD_DISP0_DAT5__IPU1_DISP0_DATA05, + MX6_PAD_DISP0_DAT6__IPU1_DISP0_DATA06, + MX6_PAD_DISP0_DAT7__IPU1_DISP0_DATA07, + MX6_PAD_DISP0_DAT8__IPU1_DISP0_DATA08, + MX6_PAD_DISP0_DAT9__IPU1_DISP0_DATA09, + MX6_PAD_DISP0_DAT10__IPU1_DISP0_DATA10, + MX6_PAD_DISP0_DAT11__IPU1_DISP0_DATA11, + MX6_PAD_DISP0_DAT12__IPU1_DISP0_DATA12, + MX6_PAD_DISP0_DAT13__IPU1_DISP0_DATA13, + MX6_PAD_DISP0_DAT14__IPU1_DISP0_DATA14, + MX6_PAD_DISP0_DAT15__IPU1_DISP0_DATA15, + MX6_PAD_DISP0_DAT16__IPU1_DISP0_DATA16, + MX6_PAD_DISP0_DAT17__IPU1_DISP0_DATA17, + MX6_PAD_DISP0_DAT18__IPU1_DISP0_DATA18, + MX6_PAD_DISP0_DAT19__IPU1_DISP0_DATA19, + MX6_PAD_DISP0_DAT20__IPU1_DISP0_DATA20, + MX6_PAD_DISP0_DAT21__IPU1_DISP0_DATA21, + MX6_PAD_DISP0_DAT22__IPU1_DISP0_DATA22, + MX6_PAD_DISP0_DAT23__IPU1_DISP0_DATA23, +}; + +void board_enable_lvds(const struct display_info_t *di) +{ + gpio_direction_output(LVDS_BACKLIGHT_PWM, 1); + gpio_direction_output(LVDS_BACKLIGHT_EN, 1); +} + +void board_enable_lcd(const struct display_info_t *di) +{ + imx_iomux_v3_setup_multiple_pads(rgb_pads, ARRAY_SIZE(rgb_pads)); + gpio_direction_output(RGB_BACKLIGHT_GP, 1); +} + +const struct display_info_t displays[] = { + /* don't auto-detect because TSC2004 is on-board */ + IMX_VD48_OKAYA_480_272(LCD, 0, 2), + IMX_VD48_HITACHI_HVGA(LCD, 0, 2), + IMX_VD48_CLAA_WVGA(LCD, 0, 2), + + /* hdmi */ + IMX_VD50_1280_720M_60(HDMI, 1, 1), + IMX_VD50_1920_1080M_60(HDMI, 0, 1), + IMX_VD50_1024_768M_60(HDMI, 0, 1), + + IMX_VD04_HANNSTAR(LVDS, 1, 2), + IMX_VD04_LG9_7(LVDS, 0, 2), + IMX_VD38_WSVGA(LVDS, 1, 2), + + IMX_VD_WXGA_J(LVDS, 0, 0), + IMX_VD_WVGA_J(LVDS, 0, 0), +}; + +size_t display_count = ARRAY_SIZE(displays); + +static void setup_display(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + int reg; + + reg = readl(&mxc_ccm->chsccdr); + reg &= ~(MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK | + MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK); + reg |= (CHSCCDR_PODF_DIVIDE_BY_3 << MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET) | + (CHSCCDR_IPU_PRE_CLK_540M_PFD <chsccdr); +} +#endif + +static unsigned gpios_out_low[] = { + /* Disable wifi */ + WIFI_WL_ENABLE_GP, + WIFI_BT_REG_ON, +}; + +static unsigned short gpios_in[] = { + LVDS_BACKLIGHT_PWM, + LVDS_BACKLIGHT_EN, + WIFI_WL_IRQ_GP, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads)); + +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); + setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +static iomux_v3_cfg_t const i2c0_mux_pads[] = { + MX6_PAD_EIM_D20__GPIO3_IO20 | MUX_PAD_CTRL(I2C_PAD_CTRL), /* CAM */ + MX6_PAD_EIM_CS0__GPIO2_IO23 |MUX_PAD_CTRL(I2C_PAD_CTRL) /* RTC */ +}; + +static iomux_v3_cfg_t const gpio_pads[] = { + MX6_PAD_GPIO_2__GPIO1_IO02 | MUX_PAD_CTRL(PAD_CTL_DSE_240ohm), + MX6_PAD_GPIO_3__GPIO1_IO03 | MUX_PAD_CTRL(PAD_CTL_DSE_240ohm), + MX6_PAD_GPIO_6__GPIO1_IO06 | MUX_PAD_CTRL(PAD_CTL_DSE_240ohm), + MX6_PAD_GPIO_7__GPIO1_IO07 | MUX_PAD_CTRL(PAD_CTL_DSE_240ohm) +}; + +static int gpio_pins[] = { + 2, 3, 6, 7 +}; + +int board_init(void) +{ + int i; + + imx_iomux_v3_setup_multiple_pads(misc_pads, ARRAY_SIZE(misc_pads)); + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_MXC_SPI + setup_spi(); +#endif + imx_iomux_v3_setup_multiple_pads( + usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + imx_iomux_v3_setup_multiple_pads(i2c0_mux_pads, + ARRAY_SIZE(i2c0_mux_pads)); + imx_iomux_v3_setup_multiple_pads( + gpio_pads, ARRAY_SIZE(gpio_pads)); + + for(i=0; i < ARRAY_SIZE(gpio_pins); i++) + gpio_direction_output(IMX_GPIO_NR(1,gpio_pins[i]),0); + + gpio_direction_output(WIFI_WL_ENABLE_GP,1); + gpio_direction_output(WIFI_WL_CLK_REQ,1); + gpio_direction_output(IMX_GPIO_NR(3,20),0); + gpio_direction_output(IMX_GPIO_NR(2,23),1); /* enable RTC */ + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + + mdelay(2); + gpio_direction_output(WIFI_WL_ENABLE_GP,0); + return 0; +} + +int checkboard(void) +{ + puts("Board: Boundary Nit6x-Lite\n"); + + return 0; +} + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board","nit6xlite"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/nit6xlite/nit6xlite.cfg b/board/boundary/nit6xlite/nit6xlite.cfg new file mode 100644 index 0000000..8006e59 --- /dev/null +++ b/board/boundary/nit6xlite/nit6xlite.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "../nitrogen6x/ddr-setup.cfg" +#include "../nitrogen6x/800mhz_2x128mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/nit6xlite/nit6xlite1g.cfg b/board/boundary/nit6xlite/nit6xlite1g.cfg new file mode 100644 index 0000000..008902b --- /dev/null +++ b/board/boundary/nit6xlite/nit6xlite1g.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "../nitrogen6x/ddr-setup.cfg" +#include "../nitrogen6x/800mhz_2x256mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/nitrogen6_max/1066mhz_4x512mx16.cfg b/board/boundary/nitrogen6_max/1066mhz_4x512mx16.cfg new file mode 100644 index 0000000..ce0d18e --- /dev/null +++ b/board/boundary/nitrogen6_max/1066mhz_4x512mx16.cfg @@ -0,0 +1,119 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/* + * MT41K512M16TNA-125:E + * 15 row + 3 bank + 10 col + 1 rank + 3 width = 32 = 4 GB + * tRCD 13125 ps + * tRP 13125 ps + * tCL 13125 ps + * 528M DDR clock = .528G = 1893.9ps/clocks + * 13125ps / 1893.9ps/clocks = 6.93 clocks + */ + +DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036 /* them 25576 */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 +/* + * tRFC:0x89:138 clocks (260000/1893.9) + * tXS:0x8e:143 clocks (270000/1893.9) + * tXP:b'011': 4 clocks (6000/1893.9) + * tXPDLL:b'1100': 13 clocks (24000/1893.9) + * tFAW:b'11010': 27 clocks (50000/1893.9) + * tCL:b'0100': 7 clocks (13125/1893.9) + */ +DATA 4, MX6_MMDC_P0_MDCFG0, 0x898E79a4 /* them 555A7975 */ +/* + * tRCD:b'110': 7 clocks (13125/1893.9) + * tRP:b'110': 7 clocks (13125/1893.9) + * tRC:b'11010': 27 clocks (50625/1893.9) + * tRAS:b'10011': 20 clocks (37500/1893.9) + * tRPA:b'1': 8 clocks (tRP[+1]) 7 + * tWR:b'111': 8 clocks (15000/1893.9) + * tMRD:b'1011': 12 clocks (min 4 clocks)4 + * tCWL:b'100': 6 clocks (tCL-1) + */ +DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64 /* them FF538E64 */ +/* + * tDLLK:0x1ff, 512 clocks (Jedec for DDR3) + * tRTP:b'011': 4 clocks (7500/1893.9) + * tWTR:same bank b'011': 4 clocks (7500/1893.9) + * tRRD:b'101': 6 clocks (10000/1893.9) + */ +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DD +/* + * RTW_SAME: 2 cycles, + * WTR_DIFF: 3 cycles, + * WTW_DIFF: 3 cycles, + * RTW_DIFF: 2 cycles, + * RTR_DIFF: 2 cycles + */ +DATA 4, MX6_MMDC_P0_MDRWD, 0x0f9f26d2 +/* + * tXPR:0x8e: 143 cycles, (270000/1893.9) + * SDE_to_RST:0x10: 14 cycles, (Jedec) + * RST_to_CKE:0x23: 33 cycles (Jedec) + */ +DATA 4, MX6_MMDC_P0_MDOR, 0x008E1023 /* them 005B0E21 */ +DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040 +DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576 +/* end of CS0 US 0x90000000-1 */ +DATA 4, MX6_MMDC_P0_MDASP, 0x00000047 /* them 00000027, 0x50000000-1 */ +/* row:15 bits */ +#if 1 +DATA 4, MX6_MMDC_P0_MDCTL, 0xC41A0000 /* them c31a0000, row 14 bits */ +#else +DATA 4, MX6_MMDC_P0_MDCTL, 0x841A0000 /* them c31a0000, row 14 bits */ +#endif +DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x0408803a +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 +DATA 4, MX6_MMDC_P0_MDSCR, 0x0000803b +DATA 4, MX6_MMDC_P0_MDSCR, 0x00428031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00428039 +/* A12 - 1 dll on(fast exit), CAS 7 */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x19308030 /* them 09408030, A12 - 0 dll powrdown, CAS 8 */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x19308038 /* them 09408038 */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008048 +/* force a calibration */ +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 /* them A1380003, no calibration */ +DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 /* them A1380003, no calibration */ +/* 8 refreshes at a time */ +DATA 4, MX6_MMDC_P0_MDREF, 0x00007800 /* them 00005800, 6 refreshes at a time */ +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 + +#if 1 +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x433C0350 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x03400338 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x433C0350 +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x03400304 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x423A3E4A +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x443A3648 +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x383E4238 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x42364A3E +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001f0024 +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x00240021 +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00150028 +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0009001c +#else +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x43540368 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x03440340 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x43540368 +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x034C0310 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x42363844 +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x463E384E +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x3A363C34 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x40364A3E +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001F0024 +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x00210024 +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x0016002A +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x00180025 +#endif + +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/boundary/nitrogen6_max/Kconfig b/board/boundary/nitrogen6_max/Kconfig new file mode 100644 index 0000000..63c3177 --- /dev/null +++ b/board/boundary/nitrogen6_max/Kconfig @@ -0,0 +1,18 @@ +if TARGET_NITROGEN6_MAX + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "nitrogen6_max" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "nitrogen6_max" + +endif diff --git a/board/boundary/nitrogen6_max/MAINTAINERS b/board/boundary/nitrogen6_max/MAINTAINERS new file mode 100644 index 0000000..9b4bab0 --- /dev/null +++ b/board/boundary/nitrogen6_max/MAINTAINERS @@ -0,0 +1,7 @@ +NITROGEN6_MAX BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/nitrogen6_max/ +F: include/configs/nitrogen6_max.h +F: configs/nitrogen6_max_defconfig + diff --git a/board/boundary/nitrogen6_max/Makefile b/board/boundary/nitrogen6_max/Makefile new file mode 100644 index 0000000..ff2754a --- /dev/null +++ b/board/boundary/nitrogen6_max/Makefile @@ -0,0 +1,10 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := nitrogen6_max.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/boundary/nitrogen6_max/ddr-setup.cfg b/board/boundary/nitrogen6_max/ddr-setup.cfg new file mode 100644 index 0000000..04dffa7 --- /dev/null +++ b/board/boundary/nitrogen6_max/ddr-setup.cfg @@ -0,0 +1,96 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* + * DDR3 settings + * MX6Q ddr is limited to 1066 Mhz currently 1056 MHz(528 MHz clock), + * memory bus width: 64 bits x16/x32/x64 + * MX6DL ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 64 bits x16/x32/x64 + * MX6SOLO ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 32 bits x16/x32 + */ +DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030 + +DATA 4, MX6_IOM_GRP_B0DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B1DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B2DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B3DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B4DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B5DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B6DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B7DS, 0x00000030 +DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030 +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ +DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030 + +DATA 4, MX6_IOM_DRAM_DQM0, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM1, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM2, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM3, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM4, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM5, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM6, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM7, 0x00020030 + +DATA 4, MX6_IOM_DRAM_CAS, 0x00020030 +DATA 4, MX6_IOM_DRAM_RAS, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00020030 + +DATA 4, MX6_IOM_DRAM_RESET, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 +DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00003000 + +DATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030 +DATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030 + +/* (differential input) */ +DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000 +/* (differential input) */ +DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000 +/* disable ddr pullups */ +DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000 +DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000 +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ +DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000 + +/* Read data DQ Byte0-3 delay */ +DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333 + +/* + * MDMISC mirroring-off interleaved (row/bank/col) + */ +DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740 + +/* + * MDSCR con_req + */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 diff --git a/board/boundary/nitrogen6_max/nitrogen6_max.c b/board/boundary/nitrogen6_max/nitrogen6_max.c new file mode 100644 index 0000000..073386c --- /dev/null +++ b/board/boundary/nitrogen6_max/nitrogen6_max.c @@ -0,0 +1,834 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) +#define GP_USB_HUB_RESET IMX_GPIO_NR(7, 12) +#define GP_UART5_RX_EN IMX_GPIO_NR(6, 10) +#define GP_UART5_TX_EN IMX_GPIO_NR(6, 7) +#define GP_UART5_RS485_EN IMX_GPIO_NR(2, 24) +#define GP_UART5_AON IMX_GPIO_NR(6, 8) +#define GP_WL12XX_WL_IRQ IMX_GPIO_NR(6, 11) +#define GP_WL12XX_WL_ENABLE IMX_GPIO_NR(6, 15) +#define GP_WL12XX_BT_ENABLE IMX_GPIO_NR(6, 16) +#define GP_SD3_CD IMX_GPIO_NR(7, 0) +#define GP_SD3_POWER_SEL IMX_GPIO_NR(6, 14) +#define GP_EMMC_RESET IMX_GPIO_NR(2, 6) +#define GP_ENET_PHY_RESET IMX_GPIO_NR(1, 27) +#define GP_ECSPI1_SS1 IMX_GPIO_NR(3, 19) +#define GP_BUTTON_MENU IMX_GPIO_NR(2, 1) +#define GP_BUTTON_BACK IMX_GPIO_NR(2, 2) +#define GP_BUTTON_SEARCH IMX_GPIO_NR(2, 3) +#define GP_BUTTON_HOME IMX_GPIO_NR(2, 4) +#define GP_BUTTON_VOLDOWN IMX_GPIO_NR(7, 1) +#define GP_BUTTON_VOLUP IMX_GPIO_NR(7, 13) +#define GP_RGB_BACKLIGHT IMX_GPIO_NR(1, 21) +#define GP_LVDS_BACKLIGHT IMX_GPIO_NR(1, 18) +#define GP_OV5642_CSI0_PWRDN IMX_GPIO_NR(3, 29) +#define GP_OV5642_CSI0_RESET IMX_GPIO_NR(1, 4) +#define GP_OV5640_CSI1_PWRDN IMX_GPIO_NR(3, 13) +#define GP_OV5640_CSI1_RESET IMX_GPIO_NR(3, 14) +#define GP_OV5640_MIPI_PWRDN IMX_GPIO_NR(6, 9) +#define GP_OV5640_MIPI_RESET IMX_GPIO_NR(2, 5) +#define GP_PCIE_RESET IMX_GPIO_NR(6, 31) +#define GP_RTC_RV4162_IRQ IMX_GPIO_NR(4, 6) +#define GP_I2C_EN_OV5642 IMX_GPIO_NR(3, 20) +#define GP_I2C_EN_OV5640_MIPI IMX_GPIO_NR(3, 20) +#define GP_I2C_EN_PCIE IMX_GPIO_NR(3, 20) + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +static const iomux_v3_cfg_t nitrogen6_max_pads[] = { + /* USB OTG */ + IOMUX_PADS(PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(WEAK_PULLUP)), + IOMUX_PADS(PAD_KEY_COL4__USB_OTG_OC | MUX_PAD_CTRL(WEAK_PULLUP)), + IOMUX_PADS(PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(OUTPUT_40OHM)), + + /* USB host */ + IOMUX_PADS(PAD_EIM_D30__USB_H1_OC | MUX_PAD_CTRL(WEAK_PULLUP)), + IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(OUTPUT_40OHM)), + + /* UART1 */ + IOMUX_PADS(PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), + + /* UART2 */ + IOMUX_PADS(PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), + + /* UART3 for wl1271 */ + IOMUX_PADS(PAD_EIM_D24__UART3_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D25__UART3_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D23__UART3_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D31__UART3_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL)), + + /* UART5 - ISL3330IAZ rs485/rs232 selection */ + IOMUX_PADS(PAD_KEY_COL1__UART5_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_ROW1__UART5_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), + /* RS485 RX Enable */ + IOMUX_PADS(PAD_NANDF_RB0__GPIO6_IO10 | MUX_PAD_CTRL(WEAK_PULLDN)), + /* RS485 TX Enable */ + IOMUX_PADS(PAD_NANDF_CLE__GPIO6_IO07 | MUX_PAD_CTRL(WEAK_PULLDN)), + /* RS485/RS232 Select 2.5V */ + IOMUX_PADS(PAD_EIM_CS1__GPIO2_IO24 | MUX_PAD_CTRL(WEAK_PULLDN)), + /* ON - meaning depends on others */ + IOMUX_PADS(PAD_NANDF_ALE__GPIO6_IO08 | MUX_PAD_CTRL(WEAK_PULLDN)), + + /* USDHC2 - TiWi wl1271 pads */ + IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_CS0__GPIO6_IO11 | MUX_PAD_CTRL(WEAK_PULLDN)), + IOMUX_PADS(PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(OUTPUT_40OHM)), + IOMUX_PADS(PAD_NANDF_CS3__GPIO6_IO16 | MUX_PAD_CTRL(OUTPUT_40OHM)), + + /* USDHC3 - sdcard */ + IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(WEAK_PULLUP)), + IOMUX_PADS(PAD_NANDF_CS1__SD3_VSELECT | MUX_PAD_CTRL(OUTPUT_40OHM)), + + /* USDHC4 - emmc */ + IOMUX_PADS(PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + /* EMMC_RESET */ + IOMUX_PADS(PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(OUTPUT_40OHM)), + + /* ENET pads that don't change for PHY reset */ + IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL)), + /* pin 42 PHY nRST */ + IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(OUTPUT_40OHM)), + + /* ECSPI1 pads */ + /* SS1 */ + IOMUX_PADS(PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL)), + + /* Button pad assignments for J14 */ + IOMUX_PADS(PAD_NANDF_D1__GPIO2_IO01 | MUX_PAD_CTRL(BUTTON_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D2__GPIO2_IO02 | MUX_PAD_CTRL(BUTTON_PAD_CTRL)), + /* Labeled Search (mapped to Power under Android) */ + IOMUX_PADS(PAD_NANDF_D3__GPIO2_IO03 | MUX_PAD_CTRL(BUTTON_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(BUTTON_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT4__GPIO7_IO01 | MUX_PAD_CTRL(BUTTON_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_18__GPIO7_IO13 | MUX_PAD_CTRL(BUTTON_PAD_CTRL)), + + /* Backlight on RGB connector: J15, pin 37 */ + IOMUX_PADS(PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(OUTPUT_40OHM)), + /* Backlight on LVDS connector: J6, pin 20 */ + IOMUX_PADS(PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(OUTPUT_40OHM)), + + /* Camera controls */ + IOMUX_PADS(PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(OUTPUT_40OHM)), + IOMUX_PADS(PAD_GPIO_4__GPIO1_IO04 | MUX_PAD_CTRL(OUTPUT_40OHM)), + + IOMUX_PADS(PAD_EIM_DA13__GPIO3_IO13), /* pin 32 - Power */ + IOMUX_PADS(PAD_EIM_DA14__GPIO3_IO14), /* pin 36 - Reset */ + + IOMUX_PADS(PAD_NANDF_WP_B__GPIO6_IO09 | MUX_PAD_CTRL(OUTPUT_40OHM)), + IOMUX_PADS(PAD_NANDF_D5__GPIO2_IO05 | MUX_PAD_CTRL(OUTPUT_40OHM)), + + /* PCIe */ + IOMUX_PADS(PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(OUTPUT_40OHM)), + + /* rtc */ + IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | MUX_PAD_CTRL(WEAK_PULLUP)), + + /* i2c enables */ + /* ov5642 camera i2c enable */ + IOMUX_PADS(PAD_EIM_D20__GPIO3_IO20 | MUX_PAD_CTRL(OUTPUT_40OHM)), + /* ov5640_mipi camera i2c enable */ + IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(OUTPUT_40OHM)), + /* pcie i2c enable */ + IOMUX_PADS(PAD_EIM_OE__GPIO2_IO25 | MUX_PAD_CTRL(OUTPUT_40OHM)), + + /* Amplifier Mute */ + IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(WEAK_PULLDN)), +}; + +static const iomux_v3_cfg_t enet_pads1[] = { + /* pin 35 - 1 (PHY_AD2) on reset */ + IOMUX_PADS(PAD_RGMII_RXC__GPIO6_IO30 | MUX_PAD_CTRL(OUTPUT_40OHM)), + /* pin 32 - 1 - (MODE0) all */ + IOMUX_PADS(PAD_RGMII_RD0__GPIO6_IO25 | MUX_PAD_CTRL(OUTPUT_40OHM)), + /* pin 31 - 1 - (MODE1) all */ + IOMUX_PADS(PAD_RGMII_RD1__GPIO6_IO27 | MUX_PAD_CTRL(OUTPUT_40OHM)), + /* pin 28 - 1 - (MODE2) all */ + IOMUX_PADS(PAD_RGMII_RD2__GPIO6_IO28 | MUX_PAD_CTRL(OUTPUT_40OHM)), + /* pin 27 - 1 - (MODE3) all */ + IOMUX_PADS(PAD_RGMII_RD3__GPIO6_IO29 | MUX_PAD_CTRL(OUTPUT_40OHM)), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + IOMUX_PADS(PAD_RGMII_RX_CTL__GPIO6_IO24 | MUX_PAD_CTRL(OUTPUT_40OHM)), +}; + +static const iomux_v3_cfg_t enet_pads2[] = { + IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL)), +}; + +static const iomux_v3_cfg_t rgb_pads[] = { + IOMUX_PADS(PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK), + IOMUX_PADS(PAD_DI0_PIN15__IPU1_DI0_PIN15), + IOMUX_PADS(PAD_DI0_PIN2__IPU1_DI0_PIN02), + IOMUX_PADS(PAD_DI0_PIN3__IPU1_DI0_PIN03), + IOMUX_PADS(PAD_DI0_PIN4__GPIO4_IO20), + IOMUX_PADS(PAD_DISP0_DAT0__IPU1_DISP0_DATA00), + IOMUX_PADS(PAD_DISP0_DAT1__IPU1_DISP0_DATA01), + IOMUX_PADS(PAD_DISP0_DAT2__IPU1_DISP0_DATA02), + IOMUX_PADS(PAD_DISP0_DAT3__IPU1_DISP0_DATA03), + IOMUX_PADS(PAD_DISP0_DAT4__IPU1_DISP0_DATA04), + IOMUX_PADS(PAD_DISP0_DAT5__IPU1_DISP0_DATA05), + IOMUX_PADS(PAD_DISP0_DAT6__IPU1_DISP0_DATA06), + IOMUX_PADS(PAD_DISP0_DAT7__IPU1_DISP0_DATA07), + IOMUX_PADS(PAD_DISP0_DAT8__IPU1_DISP0_DATA08), + IOMUX_PADS(PAD_DISP0_DAT9__IPU1_DISP0_DATA09), + IOMUX_PADS(PAD_DISP0_DAT10__IPU1_DISP0_DATA10), + IOMUX_PADS(PAD_DISP0_DAT11__IPU1_DISP0_DATA11), + IOMUX_PADS(PAD_DISP0_DAT12__IPU1_DISP0_DATA12), + IOMUX_PADS(PAD_DISP0_DAT13__IPU1_DISP0_DATA13), + IOMUX_PADS(PAD_DISP0_DAT14__IPU1_DISP0_DATA14), + IOMUX_PADS(PAD_DISP0_DAT15__IPU1_DISP0_DATA15), + IOMUX_PADS(PAD_DISP0_DAT16__IPU1_DISP0_DATA16), + IOMUX_PADS(PAD_DISP0_DAT17__IPU1_DISP0_DATA17), + IOMUX_PADS(PAD_DISP0_DAT18__IPU1_DISP0_DATA18), + IOMUX_PADS(PAD_DISP0_DAT19__IPU1_DISP0_DATA19), + IOMUX_PADS(PAD_DISP0_DAT20__IPU1_DISP0_DATA20), + IOMUX_PADS(PAD_DISP0_DAT21__IPU1_DISP0_DATA21), + IOMUX_PADS(PAD_DISP0_DAT22__IPU1_DISP0_DATA22), + IOMUX_PADS(PAD_DISP0_DAT23__IPU1_DISP0_DATA23), +}; + +/* + * + */ +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +static struct i2c_pads_info i2c_pads[] = { +{ + /* I2C1, SGTL5000 */ + .scl = { + .i2c_mode = MX6Q_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6Q_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6Q_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6Q_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}, { + /* I2C1, SGTL5000 */ + .scl = { + .i2c_mode = MX6DL_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6DL_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6DL_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6DL_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}, { + /* I2C2 Camera, MIPI */ + .scl = { + .i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}, { + /* I2C2 Camera, MIPI */ + .scl = { + .i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}, { + /* I2C3, J15 - RGB connector */ + .scl = { + .i2c_mode = MX6Q_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6Q_PAD_GPIO_5__GPIO1_IO05 | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6Q_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6Q_PAD_GPIO_16__GPIO7_IO11 | PC, + .gp = IMX_GPIO_NR(7, 11) + } +}, { + /* I2C3, J15 - RGB connector */ + .scl = { + .i2c_mode = MX6DL_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6DL_PAD_GPIO_5__GPIO1_IO05 | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6DL_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6DL_PAD_GPIO_16__GPIO7_IO11 | PC, + .gp = IMX_GPIO_NR(7, 11) + } +}}; + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); +// printf("%s:%p *%p=0x%lx\n", __func__, gd, &gd->ram_size, gd->ram_size); + return 0; +} + +static void setup_iomux_enet(void) +{ + gpio_direction_output(GP_ENET_PHY_RESET, 0); /* PHY rst */ + gpio_direction_output(IMX_GPIO_NR(6, 30), 1); + gpio_direction_output(IMX_GPIO_NR(6, 25), 1); + gpio_direction_output(IMX_GPIO_NR(6, 27), 1); + gpio_direction_output(IMX_GPIO_NR(6, 28), 1); + gpio_direction_output(IMX_GPIO_NR(6, 29), 1); + SETUP_IOMUX_PADS(enet_pads1); + gpio_direction_output(IMX_GPIO_NR(6, 24), 1); + + /* Need delay 10ms according to KSZ9021 spec */ + udelay(1000 * 10); + gpio_set_value(GP_ENET_PHY_RESET, 1); /* PHY reset */ + + SETUP_IOMUX_PADS(enet_pads2); + udelay(100); /* Wait 100 us before using mii interface */ +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + /* Reset USB hub */ + gpio_direction_output(GP_USB_HUB_RESET, 0); + mdelay(2); + gpio_set_value(GP_USB_HUB_RESET, 1); + return 0; +} + +int board_ehci_power(int port, int on) +{ + if (port) + return 0; + gpio_set_value(GP_USB_OTG_PWR, on); + return 0; +} + +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC3_BASE_ADDR}, + {USDHC4_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int gp_cd = GP_SD3_CD; + + if (cfg->esdhc_base != USDHC3_BASE_ADDR) + return 1; /* eMMC always present */ + gpio_direction_input(gp_cd); + return !gpio_get_value(gp_cd); +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].max_bus_width = 8; + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + break; + case 1: + gpio_set_value(GP_EMMC_RESET, 1); /* release reset */ + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + int gp = (bus == 0 && cs == 0) ? GP_ECSPI1_SS1 : -1; + printf("%s: return GP(%d) for spi bus %d, chip select %d\n", __func__, gp, bus, cs); + return gp; +} +#endif + +int board_phy_config(struct phy_device *phydev) +{ + /* min rx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0); + /* min tx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0); + /* max rx/tx clock delay, min rx/tx control */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0); + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + +#ifdef CONFIG_FEC_MXC + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + /* scan phy 4,5,6,7 */ + phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } +#endif + +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + + +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) { + return -1; + } + + env_loadsplash = getenv("loadsplash"); + if (env_loadsplash == NULL) { + printf("Environment variable loadsplash not found!\n"); + return -1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("failed to run loadsplash %s\n\n", env_loadsplash); + return -1; + } + + return 0; +} + +#if defined(CONFIG_VIDEO_IPUV3) + +void board_enable_lvds(const struct display_info_t *di) +{ + gpio_direction_output(GP_LVDS_BACKLIGHT, 1); +} + +void board_enable_lcd(const struct display_info_t *di) +{ + SETUP_IOMUX_PADS(rgb_pads); + gpio_direction_output(GP_RGB_BACKLIGHT, 1); +} + +const struct display_info_t displays[] = { + /* hdmi */ + IMX_VD50_1280_720M_60(HDMI, 1, 1), + IMX_VD50_1920_1080M_60(HDMI, 0, 1), + IMX_VD50_1024_768M_60(HDMI, 0, 1), + + /* ft5x06 */ + IMX_VD38_LG1280_800(LVDS, 1, 2), + IMX_VD38_LG1280_800(LVDS2, 0, 2), + IMX_VD38_HANNSTAR7(LVDS, 0, 2), + IMX_VD38_HANNSTAR7(LVDS2, 0, 2), + IMX_VD38_WSVGA(LVDS, 0, 2), + + /* ili210x */ + IMX_VD41_AMP1024_600(LVDS, 1, 2), + + /* egalax_ts */ + IMX_VD04_HANNSTAR(LVDS, 1, 2), + IMX_VD04_HANNSTAR(LVDS2, 0, 2), + IMX_VD04_LG9_7(LVDS, 0, 2), + + /* fusion7 specific touchscreen */ + IMX_VD10_FUSION7(LCD, 1, 2), + + IMX_VD_SHARP_LQ101K1LY04(LVDS, 0, 0), + IMX_VD_WXGA(LVDS, 0, 0), + IMX_VD_WVGA(LVDS, 0, 0), + IMX_VD_AA065VE11(LVDS, 0, 0), + IMX_VD_VGA(LVDS, 0, 0), + + /* uses both lvds connectors */ + IMX_VD_1080P60(LVDS, 0, 0), + + /* tsc2004 */ + IMX_VD48_CLAA_WVGA(LCD, 1, 2), + IMX_VD48_SHARP_WVGA(LCD, 0, 2), + IMX_VD48_DC050WX(LCD, 0, 2), + IMX_VD48_QVGA(LCD, 0, 2), + IMX_VD48_AT035GT_07ET3(LCD, 0, 2), + + IMX_VD_LSA40AT9001(LCD, 0, 0), +}; + +size_t display_count = ARRAY_SIZE(displays); + +int board_cfb_skip(void) +{ + return NULL != getenv("novideo"); +} +#endif + + +static unsigned short gpios_out_low[] = { + GP_USB_OTG_PWR, /* disable USB otg power */ + GP_USB_HUB_RESET, /* disable hub */ + /* Disable wl1271 */ + GP_WL12XX_WL_ENABLE, /* disable wireless */ + GP_WL12XX_BT_ENABLE, /* disable bluetooth */ + GP_EMMC_RESET, /* hold in reset */ + GP_ENET_PHY_RESET, + GP_OV5642_CSI0_RESET, /* camera reset */ + GP_OV5640_CSI1_RESET, /* camera reset */ + GP_OV5640_MIPI_RESET, /* camera reset */ + GP_PCIE_RESET, + GP_UART5_RX_EN, /* power down uart5 */ + GP_UART5_TX_EN, + GP_UART5_RS485_EN, + GP_UART5_AON, + GP_I2C_EN_OV5642, + GP_I2C_EN_OV5640_MIPI, + GP_I2C_EN_PCIE, +}; + +static unsigned short gpios_out_high[] = { + GP_ECSPI1_SS1, /* SS1 of spi nor */ + GP_OV5642_CSI0_PWRDN, /* camera power down */ + GP_OV5640_CSI1_PWRDN, /* camera power down */ + GP_OV5640_MIPI_PWRDN, /* camera power down */ + GP_SD3_POWER_SEL, /* high=3.3v */ +}; + +static unsigned short gpios_in[] = { + GP_LVDS_BACKLIGHT, + GP_RGB_BACKLIGHT, + GP_WL12XX_WL_IRQ +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned short *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + + SETUP_IOMUX_PADS(nitrogen6_max_pads); +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + int i; + struct i2c_pads_info *p = i2c_pads + !is_cpu_type(MXC_CPU_MX6Q); + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + for (i=0; i < ARRAY_SIZE(i2c_pads); i+= 2) + setup_i2c(i/2, CONFIG_SYS_I2C_SPEED, 0x7f, p+i); + +#ifdef CONFIG_CMD_SATA + setup_sata(); +#endif + + return 0; +} + + +int checkboard(void) +{ + puts("Board: Nitrogen6_max\n"); + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; +}; + +static struct button_key const buttons[] = { + {"back", GP_BUTTON_BACK, 'B'}, + {"home", GP_BUTTON_HOME, 'H'}, + {"menu", GP_BUTTON_MENU, 'M'}, + {"search", GP_BUTTON_SEARCH, 'S'}, + {"volup", GP_BUTTON_VOLUP, 'V'}, + {"voldown", GP_BUTTON_VOLDOWN, 'v'}, +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + if (!gpio_get_value(buttons[i].gpnum)) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +#ifdef CONFIG_PREBOOT +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} +#endif + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x60, 0x58, 0x00, 0x00)}, /* 8-bit eMMC */ + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_PREBOOT + preboot_keys(); +#endif + +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board","nitrogen6_max"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/nitrogen6_max/nitrogen6_max4g.cfg b/board/boundary/nitrogen6_max/nitrogen6_max4g.cfg new file mode 100644 index 0000000..4965e85 --- /dev/null +++ b/board/boundary/nitrogen6_max/nitrogen6_max4g.cfg @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#define CONFIG_MX6Q +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "ddr-setup.cfg" +#include "1066mhz_4x512mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/nitrogen6_max/spl.c b/board/boundary/nitrogen6_max/spl.c new file mode 100644 index 0000000..f68a458 --- /dev/null +++ b/board/boundary/nitrogen6_max/spl.c @@ -0,0 +1,115 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#if 0 +void board_init_f(ulong dummy) +{ +#if 0 + arch_cpu_init(); + board_early_init_f(); + timer_init(); + preloader_console_init(); + + print_cpuinfo(); + board_init_r(NULL, 0); +#endif +} +#endif + +void spl_board_init(void) +{ +#if 0 + int i; + u32 const *regs ; + int num_regs; + unsigned char mac_address[6]; + imx_get_mac_from_fuse(0,mac_address); + printf("ethaddr: %pM\n", mac_address); + + if (is_cpu_type(MXC_CPU_MX6Q)) { +#if 1 + regs = mx6q_1g; + num_regs = ARRAY_SIZE(mx6q_1g); +#else + regs = mx6q_2g; + num_regs = ARRAY_SIZE(mx6q_2g); +#endif + } else { +#if CONFIG_DDR_MB == 512 + regs = mx6dl_512m; + num_regs = ARRAY_SIZE(mx6dl_512m); +printf("Configuring for 512MiB narrow memory bus\n"); +#elif CONFIG_DDR_MB == 1024 + regs = mx6dl_1gn; + num_regs = ARRAY_SIZE(mx6dl_1gn); +printf("Configuring for 1GiB narrow memory bus\n"); +#elif CONFIG_DDR_MB == 2048 + regs = mx6dl_2g; + num_regs = ARRAY_SIZE(mx6dl_2g); +printf("Configuring for 2GiB wide memory bus\n"); +#endif + } + for (i=0; i < num_regs; i+=2) { + writel(regs[i+1],regs[i]); + } + dram_init(); +#endif + printf("%s\n", __func__); +} + +u32 spl_boot_device(void) +{ + printf("%s\n", __func__); +#if 0 + unsigned reg; + struct src *psrc = (struct src *)SRC_BASE_ADDR; + printf("%s: sbmr1 == 0x%08x\n", __func__, psrc->sbmr1); + printf("%s: gpr9 == 0x%08x\n", __func__, psrc->gpr9); + printf("%s: gpr10 == 0x%08x\n", __func__, psrc->gpr10); + return BOOT_DEVICE_USB; +#endif +#if 1 + return BOOT_DEVICE_SPI; +#endif +} + +#if 0 +void spl_usb_load_image(void) +{ + boot_mode_apply(MAKE_CFGVAL(0x01, 0x00, 0x00, 0x00)); + reset_cpu(0); +} + +#endif diff --git a/board/boundary/nitrogen6_vm/6x_bootscript-yocto.txt b/board/boundary/nitrogen6_vm/6x_bootscript-yocto.txt new file mode 100644 index 0000000..f2490f3 --- /dev/null +++ b/board/boundary/nitrogen6_vm/6x_bootscript-yocto.txt @@ -0,0 +1,112 @@ +# Yocto-specifics +setenv bootpart 2 +setenv bootdir / + +setenv bootargs enable_wait_mode=off fec.disable_giga=1; +setenv nextcon 0; +setenv lvds 0; + +if test -n "$tempfuse" ; then + setenv bootargs $bootargs thermal.fusedata=$tempfuse +fi + +i2c dev 1 ; +if i2c probe 0x50 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24 + setenv fbmem "fbmem=28M"; + setexpr nextcon $nextcon + 1 +else + echo "------ no HDMI monitor"; +fi + +i2c dev 2 +if i2c probe 0x04 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LDB-XGA,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no Freescale display"; +fi + +if i2c probe 0x38 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no 1024x600 display"; +fi + +if i2c probe 0x41 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no ILI210x touch controller"; +fi + +if test "0" -eq $lvds; then + echo "Default to wqvga (480x272) display"; + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,okaya_480x272,if=RGB24 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +fi + +while test "4" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +setenv bootargs $bootargs $fbmem +setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait" + +if itest.s x$bootpart == x ; then + bootpart=1 +fi + +if test "usb" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; +elif itest.s "x" == "x$sdphys" ; then + setenv bootargs "$bootargs root=/dev/mmcblk0p$bootpart" ; +elif itest 0 -eq ${disk}; then + setenv bootargs "$bootargs root=/dev/mmcblk2p$bootpart" ; +else + setenv bootargs "$bootargs root=/dev/mmcblk3p$bootpart" ; +fi + +if itest.s x == x${bootdir} ; then + bootdir=/boot/ +fi + +dtbname="imx6dl-nitrogen6_vm.dtb"; +if ${fs}load ${dtype} ${disk}:1 12000000 ${bootdir}$dtbname ; then + havedtb=1; + setenv fdt_addr 0x11000000 + setenv fdt_high 0xffffffff +else + havedtb= +fi + +if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then + if itest.s x$havedtb == x ; then + bootm 10800000 ; + else + bootm 10800000 - 12000000 + fi +fi +echo "Error loading kernel image" diff --git a/board/boundary/nitrogen6_vm/6x_bootscript.txt b/board/boundary/nitrogen6_vm/6x_bootscript.txt new file mode 100644 index 0000000..318d8b9 --- /dev/null +++ b/board/boundary/nitrogen6_vm/6x_bootscript.txt @@ -0,0 +1,108 @@ +setenv bootargs enable_wait_mode=off fec.disable_giga=1; +setenv nextcon 0; +setenv lvds 0; + +if test -n "$tempfuse" ; then + setenv bootargs $bootargs thermal.fusedata=$tempfuse +fi + +i2c dev 1 ; +if i2c probe 0x50 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24 + setenv fbmem "fbmem=28M"; + setexpr nextcon $nextcon + 1 +else + echo "------ no HDMI monitor"; +fi + +i2c dev 2 +if i2c probe 0x04 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LDB-XGA,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no Freescale display"; +fi + +if i2c probe 0x38 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no 1024x600 display"; +fi + +if i2c probe 0x41 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no ILI210x touch controller"; +fi + +if test "0" -eq $lvds; then + echo "Default to wqvga (480x272) display"; + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,okaya_480x272,if=RGB24 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +fi + +while test "4" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +setenv bootargs $bootargs $fbmem +setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait" + +if itest.s x$bootpart == x ; then + bootpart=1 +fi + +if test "usb" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; +elif itest.s "x" == "x$sdphys" ; then + setenv bootargs "$bootargs root=/dev/mmcblk0p$bootpart" ; +elif itest 0 -eq ${disk}; then + setenv bootargs "$bootargs root=/dev/mmcblk2p$bootpart" ; +else + setenv bootargs "$bootargs root=/dev/mmcblk3p$bootpart" ; +fi + +if itest.s x == x${bootdir} ; then + bootdir=/boot/ +fi + +dtbname="imx6dl-nitrogen6_vm.dtb"; +if ${fs}load ${dtype} ${disk}:1 12000000 ${bootdir}$dtbname ; then + havedtb=1; + setenv fdt_addr 0x11000000 + setenv fdt_high 0xffffffff +else + havedtb= +fi + +if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then + if itest.s x$havedtb == x ; then + bootm 10800000 ; + else + bootm 10800000 - 12000000 + fi +fi +echo "Error loading kernel image" diff --git a/board/boundary/nitrogen6_vm/Kconfig b/board/boundary/nitrogen6_vm/Kconfig new file mode 100644 index 0000000..528d86a --- /dev/null +++ b/board/boundary/nitrogen6_vm/Kconfig @@ -0,0 +1,18 @@ +if TARGET_NITROGEN6_VM + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "nitrogen6_vm" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "nitrogen6_vm" + +endif diff --git a/board/boundary/nitrogen6_vm/MAINTAINERS b/board/boundary/nitrogen6_vm/MAINTAINERS new file mode 100644 index 0000000..63f537c --- /dev/null +++ b/board/boundary/nitrogen6_vm/MAINTAINERS @@ -0,0 +1,6 @@ +NITROGEN6_VM BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/nitrogen6_vm/ +F: include/configs/nitrogen6_vm.h +F: configs/nitrogen6_vm_defconfig diff --git a/board/boundary/nitrogen6_vm/Makefile b/board/boundary/nitrogen6_vm/Makefile new file mode 100644 index 0000000..221a9bc --- /dev/null +++ b/board/boundary/nitrogen6_vm/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := nitrogen6_vm.o diff --git a/board/boundary/nitrogen6_vm/nitrogen6_vm.c b/board/boundary/nitrogen6_vm/nitrogen6_vm.c new file mode 100644 index 0000000..cfd88b0 --- /dev/null +++ b/board/boundary/nitrogen6_vm/nitrogen6_vm.c @@ -0,0 +1,621 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* Special MXCFB sync flags are here. */ +#include "../drivers/video/mxcfb.h" + +DECLARE_GLOBAL_DATA_PTR; + +#define AUD_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define CSI_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define RGB_PAD_CTRL PAD_CTL_DSE_120ohm + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define USDHC_CLK_PAD_CTRL (PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (USDHC_CLK_PAD_CTRL | PAD_CTL_PUS_47K_UP) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLUP_OUTPUT (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDN_OUTPUT (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_SLOW) + +#define CEC_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_22K_UP | PAD_CTL_ODE | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +#define HIGH_Z_SLOW (PAD_CTL_HYS|PAD_CTL_SPEED_LOW|PAD_CTL_DSE_DISABLE) + +static const iomux_v3_cfg_t nitrogen6_vm_pads[] = { + /* AUDMUX */ + IOMUX_PAD_CTRL(CSI0_DAT7__AUD3_RXD, AUD_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT4__AUD3_TXC, AUD_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT5__AUD3_TXD, AUD_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT6__AUD3_TXFS, AUD_PAD_CTRL), + + /* ECSPI1 */ + IOMUX_PAD_CTRL(EIM_D17__ECSPI1_MISO, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D18__ECSPI1_MOSI, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D16__ECSPI1_SCLK, SPI_PAD_CTRL), +#define GP_ECSPI1_CS1 IMX_GPIO_NR(3, 19) + IOMUX_PAD_CTRL(EIM_D19__GPIO3_IO19, WEAK_PULLUP), /* SS1 */ + + /* ENET pads that don't change for PHY reset */ + IOMUX_PAD_CTRL(ENET_MDIO__ENET_MDIO, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(ENET_MDC__ENET_MDC, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TXC__RGMII_TXC, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TD0__RGMII_TD0, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TD1__RGMII_TD1, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TD2__RGMII_TD2, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TD3__RGMII_TD3, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TX_CTL__RGMII_TX_CTL, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(ENET_REF_CLK__ENET_TX_CLK, ENET_PAD_CTRL), + /* pin 42 PHY nRST */ +#define GP_ENET_PHY_RESET IMX_GPIO_NR(1, 27) + IOMUX_PAD_CTRL(ENET_RXD0__GPIO1_IO27, OUTPUT_40OHM), +#define GP_ENET_PHY_INT IMX_GPIO_NR(1, 28) + IOMUX_PAD_CTRL(ENET_TX_EN__GPIO1_IO28, WEAK_PULLUP), /* Micrel RGMII Phy Interrupt */ + + /* GPIO_KEYS */ +#define GP_HOME IMX_GPIO_NR(1, 2) + IOMUX_PAD_CTRL(GPIO_2__GPIO1_IO02, WEAK_PULLUP), +#define GP_BACK IMX_GPIO_NR(1, 3) + IOMUX_PAD_CTRL(GPIO_3__GPIO1_IO03, WEAK_PULLUP), + + /* I2C3 */ +#define GP_TOUCH_IRQ IMX_GPIO_NR(1, 9) + IOMUX_PAD_CTRL(GPIO_9__GPIO1_IO09, WEAK_PULLUP), +#define GP_AR1021_5_WIRE_SEL IMX_GPIO_NR(5, 2) + IOMUX_PAD_CTRL(EIM_A25__GPIO5_IO02, HIGH_Z_SLOW), +#define GP_PCAP_NRESET IMX_GPIO_NR(1, 21) + IOMUX_PAD_CTRL(SD1_DAT3__GPIO1_IO21, WEAK_PULLUP_OUTPUT), + + /* LVDS */ +#define GP_LVDS_EN IMX_GPIO_NR(7, 12) + IOMUX_PAD_CTRL(GPIO_17__GPIO7_IO12, WEAK_PULLUP), /* J39 - pin 19, DISP0_CONTRAST */ + + /* LEDS */ +#define GP_VM_GPIO_1 IMX_GPIO_NR(4, 6) + IOMUX_PAD_CTRL(KEY_COL0__GPIO4_IO06, WEAK_PULLUP), +#define GP_VM_GPIO_2 IMX_GPIO_NR(4, 7) + IOMUX_PAD_CTRL(KEY_ROW0__GPIO4_IO07, WEAK_PULLUP), +#define GP_VM_GPIO_3 IMX_GPIO_NR(4, 8) + IOMUX_PAD_CTRL(KEY_COL1__GPIO4_IO08, WEAK_PULLUP), +#define GP_VM_GPIO_4 IMX_GPIO_NR(4, 9) + IOMUX_PAD_CTRL(KEY_ROW1__GPIO4_IO09, WEAK_PULLUP), +#define GP_VM_GPIO_5 IMX_GPIO_NR(4, 10) + IOMUX_PAD_CTRL(KEY_COL2__GPIO4_IO10, WEAK_PULLUP), +#define GP_VM_GPIO_6 IMX_GPIO_NR(4, 11) + IOMUX_PAD_CTRL(KEY_ROW2__GPIO4_IO11, WEAK_PULLUP), +#define GP_VM_GPIO_7 IMX_GPIO_NR(4, 15) + IOMUX_PAD_CTRL(KEY_ROW4__GPIO4_IO15, WEAK_PULLUP), +#define GP_VM_GPIO_8 IMX_GPIO_NR(1, 4) + IOMUX_PAD_CTRL(GPIO_4__GPIO1_IO04, WEAK_PULLUP), + + /* PWM3 */ +#define GP_RGB_BACKLIGHT IMX_GPIO_NR(1, 17) + IOMUX_PAD_CTRL(SD1_DAT1__GPIO1_IO17, WEAK_PULLDN_OUTPUT), + + /* PWM4 */ +#define GP_LVDS_BACKLIGHT IMX_GPIO_NR(1, 18) + IOMUX_PAD_CTRL(SD1_CMD__GPIO1_IO18, WEAK_PULLDN_OUTPUT), + + /* rtc - i2c2 */ +#define GP_RTC_IRQ IMX_GPIO_NR(2, 26) + IOMUX_PAD_CTRL(EIM_RW__GPIO2_IO26, WEAK_PULLUP), + + /* SGTL5000 */ + IOMUX_PAD_CTRL(GPIO_0__CCM_CLKO1, OUTPUT_40OHM), /* SGTL5000 sys_mclk */ +#define GP_SGTL5000_MUTE IMX_GPIO_NR(5, 4) + IOMUX_PAD_CTRL(EIM_A24__GPIO5_IO04, WEAK_PULLDN_OUTPUT), + + /* UART1 */ + IOMUX_PAD_CTRL(SD3_DAT7__UART1_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT6__UART1_RX_DATA, UART_PAD_CTRL), + + /* UART2 for debug */ +#ifndef CONFIG_SILENT_UART + IOMUX_PAD_CTRL(EIM_D26__UART2_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D27__UART2_RX_DATA, UART_PAD_CTRL), +#else + IOMUX_PAD_CTRL(EIM_D26__GPIO3_IO26, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D27__GPIO3_IO27, UART_PAD_CTRL), +#endif + /* UART3 - Broadcom Bluetooth*/ + IOMUX_PAD_CTRL(EIM_D24__UART3_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D25__UART3_RX_DATA, UART_PAD_CTRL), + + + /* USBOTG - J3 */ + IOMUX_PAD_CTRL(GPIO_1__USB_OTG_ID, WEAK_PULLUP), + IOMUX_PAD_CTRL(KEY_COL4__USB_OTG_OC, WEAK_PULLUP), +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) + IOMUX_PAD_CTRL(EIM_D22__GPIO3_IO22, WEAK_PULLDN_OUTPUT), + + /* USDHC3 - FULL sd */ + IOMUX_PAD_CTRL(SD3_CLK__SD3_CLK, USDHC_CLK_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_CMD__SD3_CMD, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT0__SD3_DATA0, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT1__SD3_DATA1, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT2__SD3_DATA2, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT3__SD3_DATA3, USDHC_PAD_CTRL), +#define GP_SD3_CD IMX_GPIO_NR(7, 0) + IOMUX_PAD_CTRL(SD3_DAT5__GPIO7_IO00, WEAK_PULLUP), +#define GP_SD3_WP IMX_GPIO_NR(7, 1) + IOMUX_PAD_CTRL(SD3_DAT4__GPIO7_IO01, WEAK_PULLUP), + + /* USDHC4 - eMMC */ + IOMUX_PAD_CTRL(SD4_CLK__SD4_CLK, USDHC_CLK_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_CMD__SD4_CMD, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT0__SD4_DATA0, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT1__SD4_DATA1, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT2__SD4_DATA2, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT3__SD4_DATA3, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT4__SD4_DATA4, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT5__SD4_DATA5, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT6__SD4_DATA6, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT7__SD4_DATA7, USDHC_PAD_CTRL), +#define GP_EMMC_RESET IMX_GPIO_NR(2, 7) + IOMUX_PAD_CTRL(NANDF_D7__GPIO2_IO07, OUTPUT_40OHM), +}; + +static const iomux_v3_cfg_t enet_pads1[] = { + /* pin 35 - 1 (PHY_AD2) on reset */ + IOMUX_PAD_CTRL(RGMII_RXC__GPIO6_IO30, OUTPUT_40OHM), + /* pin 32 - 1 - (MODE0) all */ + IOMUX_PAD_CTRL(RGMII_RD0__GPIO6_IO25, OUTPUT_40OHM), + /* pin 31 - 1 - (MODE1) all */ + IOMUX_PAD_CTRL(RGMII_RD1__GPIO6_IO27, OUTPUT_40OHM), + /* pin 28 - 1 - (MODE2) all */ + IOMUX_PAD_CTRL(RGMII_RD2__GPIO6_IO28, OUTPUT_40OHM), + /* pin 27 - 1 - (MODE3) all */ + IOMUX_PAD_CTRL(RGMII_RD3__GPIO6_IO29, OUTPUT_40OHM), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + IOMUX_PAD_CTRL(RGMII_RX_CTL__GPIO6_IO24, OUTPUT_40OHM), +}; + +static const iomux_v3_cfg_t enet_pads2[] = { + IOMUX_PAD_CTRL(RGMII_RXC__RGMII_RXC, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RD0__RGMII_RD0, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RD1__RGMII_RD1, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RD2__RGMII_RD2, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RD3__RGMII_RD3, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RX_CTL__RGMII_RX_CTL, ENET_PAD_CTRL), +}; + +#if defined(CONFIG_VIDEO_IPUV3) +static const iomux_v3_cfg_t rgb_pads[] = { + IOMUX_PAD_CTRL(DI0_DISP_CLK__IPU1_DI0_DISP_CLK, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DI0_PIN15__IPU1_DI0_PIN15, RGB_PAD_CTRL), /* DRDY */ + IOMUX_PAD_CTRL(DI0_PIN2__IPU1_DI0_PIN02, RGB_PAD_CTRL), /* HSYNC */ + IOMUX_PAD_CTRL(DI0_PIN3__IPU1_DI0_PIN03, RGB_PAD_CTRL), /* VSYNC */ + IOMUX_PAD_CTRL(DI0_PIN4__GPIO4_IO20, RGB_PAD_CTRL), /* Contrast */ + IOMUX_PAD_CTRL(DISP0_DAT0__IPU1_DISP0_DATA00, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT1__IPU1_DISP0_DATA01, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT2__IPU1_DISP0_DATA02, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT3__IPU1_DISP0_DATA03, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT4__IPU1_DISP0_DATA04, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT5__IPU1_DISP0_DATA05, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT6__IPU1_DISP0_DATA06, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT7__IPU1_DISP0_DATA07, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT8__IPU1_DISP0_DATA08, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT9__IPU1_DISP0_DATA09, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT10__IPU1_DISP0_DATA10, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT11__IPU1_DISP0_DATA11, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT12__IPU1_DISP0_DATA12, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT13__IPU1_DISP0_DATA13, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT14__IPU1_DISP0_DATA14, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT15__IPU1_DISP0_DATA15, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT16__IPU1_DISP0_DATA16, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT17__IPU1_DISP0_DATA17, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT18__IPU1_DISP0_DATA18, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT19__IPU1_DISP0_DATA19, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT20__IPU1_DISP0_DATA20, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT21__IPU1_DISP0_DATA21, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT22__IPU1_DISP0_DATA22, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT23__IPU1_DISP0_DATA23, RGB_PAD_CTRL), +}; +#endif + +/* + * + */ +static struct i2c_pads_info i2c_pads[] = { + /* I2C1, SGTL5000, RTC */ + I2C_PADS_INFO_ENTRY(I2C1, EIM_D21, 3, 21, EIM_D28, 3, 28, I2C_PAD_CTRL), + /* I2C2 - hdmi */ + I2C_PADS_INFO_ENTRY(I2C2, KEY_COL3, 4, 12, KEY_ROW3, 4, 13, I2C_PAD_CTRL), + /* I2C3, Charger, PCIe */ + I2C_PADS_INFO_ENTRY(I2C3, GPIO_5, 1, 05, GPIO_16, 7, 11, I2C_PAD_CTRL), +}; + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); + return 0; +} + +static void setup_iomux_enet(void) +{ + gpio_direction_output(GP_ENET_PHY_RESET, 0); /* PHY rst */ + gpio_direction_output(IMX_GPIO_NR(6, 30), 1); + gpio_direction_output(IMX_GPIO_NR(6, 25), 1); + gpio_direction_output(IMX_GPIO_NR(6, 27), 1); + gpio_direction_output(IMX_GPIO_NR(6, 28), 1); + gpio_direction_output(IMX_GPIO_NR(6, 29), 1); + SETUP_IOMUX_PADS(enet_pads1); + gpio_direction_output(IMX_GPIO_NR(6, 24), 1); + + /* Need delay 10ms according to KSZ9021 spec */ + udelay(1000 * 10); + gpio_set_value(GP_ENET_PHY_RESET, 1); /* PHY reset */ + + SETUP_IOMUX_PADS(enet_pads2); + udelay(100); /* Wait 100 us before using mii interface */ +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + return 0; +} + +int board_ehci_power(int port, int on) +{ + if (port) + return 0; + gpio_set_value(GP_USB_OTG_PWR, on); + return 0; +} + +#endif + +#ifdef CONFIG_FSL_ESDHC + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + + if (cfg->esdhc_base == USDHC4_BASE_ADDR) + return 1; /* eMMC always present */ + gpio_direction_input(GP_SD3_CD); + return !gpio_get_value(GP_SD3_CD); +} + +static struct fsl_esdhc_cfg usdhc_cfg[] = { + {.esdhc_base = USDHC3_BASE_ADDR, .max_bus_width = 4}, + {.esdhc_base = USDHC4_BASE_ADDR, .max_bus_width = 8}, +}; + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + break; + case 1: + gpio_set_value(GP_EMMC_RESET, 1); /* release reset */ + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? GP_ECSPI1_CS1 : -1; +} +#endif + +int board_phy_config(struct phy_device *phydev) +{ + /* ksz9021 */ + /* min rx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0); + /* min tx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0); + /* max rx/tx clock delay, min rx/tx control */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0); + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + +#ifdef CONFIG_FEC_MXC + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + /* scan phy 4,5,6,7 */ + phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } +#endif +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + +#if defined(CONFIG_VIDEO_IPUV3) + +void board_enable_lvds(const struct display_info_t *di) +{ + gpio_direction_output(GP_LVDS_BACKLIGHT, 1); + gpio_direction_output(GP_LVDS_EN, 1); +} + +void board_enable_lcd(const struct display_info_t *di) +{ + SETUP_IOMUX_PADS(rgb_pads); + gpio_direction_output(GP_RGB_BACKLIGHT, 1); +} + +const struct display_info_t displays[] = { + /* tsc2004 */ + IMX_VD48_HITACHI_HVGA(LCD, 1, 2), + + /* hdmi */ + IMX_VD50_1280_720M_60(HDMI, 1, 1), + IMX_VD50_1920_1080M_60(HDMI, 0, 1), + IMX_VD50_1024_768M_60(HDMI, 0, 1), + + /* ili210x */ + IMX_VD41_AMP1024_600(LVDS, 1, 2), + + /* egalax_ts */ + IMX_VD04_HANNSTAR(LVDS, 1, 2), + IMX_VD04_LG9_7(LVDS, 0, 2), + + /* ft5x06 */ + IMX_VD38_LG1280_800(LVDS, 1, 2), + IMX_VD38_HANNSTAR7(LVDS, 0, 2), + IMX_VD38_WSVGA(LVDS, 0, 2), + + IMX_VD_SHARP_LQ101K1LY04(LVDS, 0, 0), + IMX_VD_WXGA(LVDS, 0, 0), + IMX_VD_WVGA(LVDS, 0, 0), +}; + +size_t display_count = ARRAY_SIZE(displays); + +static void setup_display(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + int reg; + + reg = readl(&mxc_ccm->chsccdr); + reg &= ~(MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK + |MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK); + reg |= (CHSCCDR_IPU_PRE_CLK_540M_PFD << MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_OFFSET) | + (CHSCCDR_PODF_DIVIDE_BY_3 << MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET); + writel(reg, &mxc_ccm->chsccdr); +} +#endif + +static unsigned short gpios_out_low[] = { + GP_ENET_PHY_RESET, + GP_LVDS_EN, + GP_RGB_BACKLIGHT, + GP_LVDS_BACKLIGHT, + GP_SGTL5000_MUTE, + GP_USB_OTG_PWR, /* disable USB otg power */ + GP_EMMC_RESET, /* hold in reset */ +}; + +static unsigned short gpios_out_high[] = { + GP_ECSPI1_CS1, /* SS1 of spi nor */ + GP_PCAP_NRESET, /* PCAP reset on J40 */ +}; + +static unsigned short gpios_in[] = { + GP_ENET_PHY_INT, + GP_AR1021_5_WIRE_SEL, + GP_HOME, + GP_BACK, + GP_TOUCH_IRQ, + GP_RTC_IRQ, + GP_SD3_CD, + GP_SD3_WP, + GP_VM_GPIO_1, + GP_VM_GPIO_2, + GP_VM_GPIO_3, + GP_VM_GPIO_4, + GP_VM_GPIO_5, + GP_VM_GPIO_6, + GP_VM_GPIO_7, + GP_VM_GPIO_8, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned short *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + + SETUP_IOMUX_PADS(nitrogen6_vm_pads); + +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); + setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + int i; + struct i2c_pads_info *p = i2c_pads + i2c_get_info_entry_offset(); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + for (i = 0; i < 3; i++) { + setup_i2c(i, CONFIG_SYS_I2C_SPEED, 0x7f, p); + p += I2C_PADS_INFO_ENTRY_SPACING; + } + return 0; +} + +int checkboard(void) +{ + puts("Board: Boundary nitrogen6_vm\n"); + return 0; +} + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "nitrogen6_vm"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/nitrogen6_vm/nitrogen6_vm.cfg b/board/boundary/nitrogen6_vm/nitrogen6_vm.cfg new file mode 100644 index 0000000..8006e59 --- /dev/null +++ b/board/boundary/nitrogen6_vm/nitrogen6_vm.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "../nitrogen6x/ddr-setup.cfg" +#include "../nitrogen6x/800mhz_2x128mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/nitrogen6_vm/nitrogen6_vm1g.cfg b/board/boundary/nitrogen6_vm/nitrogen6_vm1g.cfg new file mode 100644 index 0000000..008902b --- /dev/null +++ b/board/boundary/nitrogen6_vm/nitrogen6_vm1g.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "../nitrogen6x/ddr-setup.cfg" +#include "../nitrogen6x/800mhz_2x256mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg b/board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg index 6c68146..45e938b 100644 --- a/board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg +++ b/board/boundary/nitrogen6x/1066mhz_4x128mx16.cfg @@ -5,6 +5,7 @@ */ DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 DATA 4, MX6_MMDC_P0_MDCFG0, 0x555A7974 DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64 DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB diff --git a/board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg b/board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg index bb5716e..475527f 100644 --- a/board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg +++ b/board/boundary/nitrogen6x/1066mhz_4x256mx16.cfg @@ -5,6 +5,7 @@ */ DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 DATA 4, MX6_MMDC_P0_MDCFG0, 0x898E7974 DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64 DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB @@ -24,18 +25,18 @@ DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 DATA 4, MX6_MMDC_P0_MDREF, 0x00007800 DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 -DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x43040319 -DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x03040279 -DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x43040321 -DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x03030251 -DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4d434248 -DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x42413c4d -DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x34424543 -DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x49324933 -DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001a0017 -DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x001F001F -DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x00170027 -DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x000a001f +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42740304 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x026e0265 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x02750306 +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x02720244 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x463d4041 +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x42413c47 +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x37414441 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x4633473b +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0025001f +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x00290027 +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x001f002b +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x000f0029 DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 diff --git a/board/boundary/nitrogen6x/6x_bootscript-mainline.txt b/board/boundary/nitrogen6x/6x_bootscript-mainline.txt new file mode 100644 index 0000000..e2ecdb8 --- /dev/null +++ b/board/boundary/nitrogen6x/6x_bootscript-mainline.txt @@ -0,0 +1,123 @@ +setenv bootargs '' + +if ${fs}load ${dtype} ${disk}:1 10800000 uEnv.txt ; then + env import -t 10800000 $filesize +fi + +if itest.s "x" == "x$dtbname" ; then + dtbname="imx6"; + if itest.s x6SOLO == "x$cpu" ; then + dtbname=${dtbname}dl-; + elif itest.s x6DL == "x$cpu" ; then + dtbname=${dtbname}dl-; + else + dtbname=${dtbname}q-; + fi + if itest.s x == "x$board" ; then + board=sabrelite + fi + dtbname=${dtbname}${board}.dtb; +fi + +if itest.s x == x${bootdir} ; then + bootdir=/boot/ +fi + +setenv fdt_addr 0x12000000 +if ${fs}load ${dtype} ${disk}:1 $fdt_addr ${bootdir}$dtbname ; then + fdt addr $fdt_addr + setenv fdt_high 0xffffffff +else + echo "!!!! Error loading ${bootdir}$dtbname"; + exit; +fi + +# ------------------- HDMI detection +i2c dev 1 ; +if i2c probe 0x50 ; then + echo "------ have HDMI"; + if itest.s "x" != "x$force_edid" ; then + echo "------ forcing EDID to /lib/firmware/$force_edid" + setenv bootargs $bootargs drm_kms_helper.edid_firmware=$force_edid + fi +fi + +# ------------------- LVDS detection +setenv have_lvds +i2c dev 2 +if i2c probe 0x04 ; then + echo "------ have Hannstar 10"; + fdt set /panel compatible "hannstar,hsd100pxn1" + setenv have_lvds 1 +fi +if i2c probe 0x38 ; then + if itest.s "xLDB-WXGA" == "x$panel"; then + echo "------ have Hannstar 7"; + fdt set /panel compatible "hannstar,hsd070pww1" + screenres=1280,800 + else + echo "------ have Innolux 7"; + fdt set /panel compatible "innolux,zj070na-01p" + screenres=1024,600 + fi + setenv have_lvds 1 + setenv bootargs $bootargs ft5x06_ts.screenres=$screenres + if itest.s "x" -ne "x$calibration" ; then + setenv bootargs $bootargs ft5x06_ts.calibration=$calibration + fi +fi + +# ------------------- LCD detection +setenv have_lcd +if i2c probe 0x48 ; then + setenv have_lcd 1; + echo "------- found TSC2004 touch controller"; +elif i2c probe 0x4d ; then + setenv have_lcd 1; + echo "------- found AR1020 touch controller"; +fi + +setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M cma=256M consoleblank=0 rootwait" + +# ------------------- Disabling displays not connected +if itest.s "x" == "x$have_lvds" ; then + setenv bootargs $bootargs video=LVDS-1:d +fi +if itest.s "x" == "x$have_lcd" ; then + setenv bootargs $bootargs video=VGA-1:d +fi + +if itest.s x$bootpart == x ; then + bootpart=1 +fi + +if test "sata" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; +else + if test "usb" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; + else + setenv bootargs "$bootargs root=/dev/mmcblk0p$bootpart" ; + fi +fi + +if itest.s "x" != "x$disable_giga" ; then + setenv bootargs $bootargs fec.disable_giga=1 +fi + +if itest.s "x" != "x$wlmac" ; then + setenv bootargs $bootargs wlcore.mac=$wlmac +fi + +if itest.s "x" != "x$show_fdt" ; then + fdt print / +fi + +if itest.s "x" != "x$show_env" ; then + printenv +fi + +if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then + bootm 10800000 - $fdt_addr +fi +echo "Error loading kernel image" diff --git a/board/boundary/nitrogen6x/6x_bootscript-ubuntu-3.10.17.txt b/board/boundary/nitrogen6x/6x_bootscript-ubuntu-3.10.17.txt new file mode 100644 index 0000000..d525f75 --- /dev/null +++ b/board/boundary/nitrogen6x/6x_bootscript-ubuntu-3.10.17.txt @@ -0,0 +1,240 @@ +if ${fs}load ${dtype} ${disk}:1 10800000 uEnv.txt ; then + env import -t 10800000 $filesize +else + setenv bootargs enable_wait_mode=off +fi + +setenv nextcon 0; + +if itest.s x == x${hdmires} ; then + setenv hdmires 1280x720M@60,if=RGB24,bpp=32 + setenv only_cea 1 +fi + +# if hdmidet ; then +i2c dev 1 ; +if i2c probe 0x50 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,${hdmires} + setenv fbmem "fbmem=28M"; + setexpr nextcon $nextcon + 1 +else + echo "------ no HDMI monitor"; +fi + +i2c dev 2 +if i2c probe 0x04 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LDB-XGA,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no Freescale display"; +fi + +if i2c probe 0x38 ; then + if itest.s "xLDB-WXGA" == "x$panel"; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1280x800MR@60,if=RGB666 + screenres=1280,800 + else + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + screenres=1024,600 + fi + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 + setenv bootargs $bootargs ft5x06_ts.screenres=$screenres + if itest.s "x" -ne "x$calibration" ; then + setenv bootargs $bootargs ft5x06_ts.calibration=$calibration + fi +else + echo "------ no ft5x06 touch controller"; +fi + +if i2c probe 0x41 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no ILI210x touch controller"; +fi + +if i2c probe 0x48 ; then + if itest.s "xqvga" == "x$panel" ; then + display="320x240MR@60,if=RGB24"; + else + display="CLAA-WVGA,if=RGB666"; + fi + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,$display + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no 800x480 display"; +fi + +if itest.s "x1080P" == "x$panel" ; then + setenv bootargs $bootargs ldb=spl0 video=mxcfb${nextcon}:dev=ldb,1920x1080MR@60,if=RGB24 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=48M"; + else + setenv fbmem ${fbmem},48M + fi + setexpr nextcon $nextcon + 1 +fi + +while test "4" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +setenv bootargs $bootargs $fbmem +setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait fixrtc" + +if itest.s "x" != "x$wlmac" ; then + setenv bootargs $bootargs wlcore.mac=$wlmac +fi + +if itest.s x$bootpart == x ; then + bootpart=1 +fi + +setenv bpart "$bootpart" + +if itest.s "$bpart" == a ; then + setenv bpart 10 +elif itest.s "$bpart" == b ; then + setenv bpart 11 +elif itest.s "$bpart" == c ; then + setenv bpart 12 +elif itest.s "$bpart" == d ; then + setenv bpart 13 +fi + +if test "sata" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bpart" ; +else + if test "usb" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bpart" ; + elif itest 0 -eq ${disk}; then + setenv bootargs "$bootargs root=/dev/disk/by-path/platform-2198000.usdhc-part1" ; + else + setenv bootargs "$bootargs root=/dev/disk/by-path/platform-219c000.usdhc-part1" ; + fi +fi + + + +if itest.s x == "x$dtbname" ; then + dtbname="imx6"; + if itest.s x6SOLO == "x$cpu" ; then + dtbname=${dtbname}dl-; + elif itest.s x6DL == "x$cpu" ; then + dtbname=${dtbname}dl-; + else + dtbname=${dtbname}q-; + fi + + if itest.s x == "x$board" ; then + board=sabrelite + fi + + dtbname=${dtbname}${board}.dtb; +fi + +if itest.s x == x${bootdir} ; then + bootdir=/boot +fi + +if itest.s x == x${only_cea} ; then + if itest.s x == x$allow_noncea ; then + setenv only_cea 1 + echo "only CEA modes allowed on HDMI port"; + else + setenv only_cea 0 + echo "non-CEA modes allowed on HDMI port, audio may be affected"; + fi +fi + +setenv bootargs $bootargs mxc_hdmi.only_cea=${only_cea} + +if itest.s "x" != "x${disable_giga}" ; then + setenv bootargs $bootargs fec.disable_giga=1 +fi + +if itest.s "x" != "x$gpumem" ; then + setenv bootargs $bootargs galcore.contiguousSize=$gpumem +fi + +if itest.s "no" != "$dosplash" ; then + setenv bootargs $bootargs splash quiet plymouth.ignore-serial-consoles +fi + +if itest.s "x" != "x$overlayfs" ; then + setenv bootargs $bootargs overlayfs=${overlayfs} + if itest.s "x" != "x${ofs-size}" ; then + setenv bootargs $bootargs ofs-size=${ofs-size} + fi +fi + +if kbd ; then + if itest.s "xv" == "x$keybd" ; then + ${fs}load ${dtype} ${disk}:${bootpart} 0x10800000 ${bootdir}/uImage-recovery && + ${fs}load ${dtype} ${disk}:${bootpart} 0x12800000 ${bootdir}/uramdisk-recovery.img && + bootm 10800000 12800000; + echo "--- error launching recovery!" + exit; + fi +fi + +setenv fdt_high 0xffffffff +setenv initrd_high 0xffffffff + +setenv initrd_addr 0x12a00000 +setenv fdt_addr 0x13000000 + +echo "----------- trying to load /initrd.img"; +if ${fs}load ${dtype} ${disk}:${bootpart} ${initrd_addr} /initrd.img ; then + haverd=1; + setenv initrd_size ${filesize} +else + haverd= +fi + +echo "----------- trying to load ${bootdir}/$dtbname"; +if ${fs}load ${dtype} ${disk}:${bootpart} ${fdt_addr} ${bootdir}/$dtbname ; then + havedtb=1; +else + havedtb= +fi + +if itest.s x$haverd == x ; then + if ${fs}load ${dtype} ${disk}:${bootpart} 0x10800000 /vmlinuz ; then + if itest.s x$havedtb == x ; then + bootz 0x10800000 ; + else + bootz 0x10800000 - ${fdt_addr} + fi + fi +else + if ${fs}load ${dtype} ${disk}:${bootpart} 0x10800000 /vmlinuz ; then + if itest.s x$havedtb == x ; then + bootz 0x10800000 ${initrd_addr}:${initrd_size} ; + else + bootz 0x10800000 ${initrd_addr}:${initrd_size} ${fdt_addr} ; + fi + fi +fi +echo "Error loading kernel image" diff --git a/board/boundary/nitrogen6x/6x_bootscript-ubuntu-3.10.53.txt b/board/boundary/nitrogen6x/6x_bootscript-ubuntu-3.10.53.txt new file mode 100644 index 0000000..6b9c34f --- /dev/null +++ b/board/boundary/nitrogen6x/6x_bootscript-ubuntu-3.10.53.txt @@ -0,0 +1,235 @@ +setenv bootargs '' + +if ${fs}load ${dtype} ${disk}:1 10800000 uEnv.txt ; then + env import -t 10800000 $filesize +fi + +if itest.s "x" == "x$dtbname" ; then + dtbname="imx6"; + if itest.s x6SOLO == "x$cpu" ; then + dtbname=${dtbname}dl-; + elif itest.s x6DL == "x$cpu" ; then + dtbname=${dtbname}dl-; + else + dtbname=${dtbname}q-; + fi + if itest.s x == "x$board" ; then + board=sabrelite + fi + dtbname=${dtbname}${board}.dtb; +fi + +if itest.s x == x${bootdir} ; then + bootdir=/boot/ +fi + +if itest.s x$bootpart == x ; then + bootpart=1 +fi + +setenv fdt_addr 0x12000000 +if ${fs}load ${dtype} ${disk}:${bootpart} $fdt_addr ${bootdir}$dtbname ; then + fdt addr $fdt_addr + setenv fdt_high 0xffffffff +else + echo "!!!! Error loading ${bootdir}$dtbname"; + exit; +fi + +# ------------------- HDMI detection +i2c dev 1 ; +if i2c probe 0x50 ; then + echo "------ have HDMI monitor"; + if itest.s x == x$allow_noncea ; then + setenv bootargs $bootargs mxc_hdmi.only_cea=1; + echo "only CEA modes allowed on HDMI port"; + else + setenv bootargs $bootargs mxc_hdmi.only_cea=0; + echo "non-CEA modes allowed on HDMI, audio may be affected"; + fi +else + fdt rm hdmi_display + echo "------ no HDMI monitor"; +fi + +# ------------------- LVDS detection +if itest.s "x" != "x$lvds_1080p" ; then + echo "----- 1080P dual channel LVDS"; + fdt rm okaya1024x600 + fdt rm lg1280x800 + fdt rm hannstar; + fdt set ldb split-mode 1 + fdt set lvds_display interface_pix_fmt "RGB24" + fdt set ldb/lvds-channel@0 fsl,data-width <24> +else + fdt rm ldb split-mode + fdt rm lvds1080p + + # -------- LVDS0 (bottom on Nitrogen6_Max) + setenv have_lvds + i2c dev 2 + if i2c probe 0x04 ; then + echo "------ have Freescale display"; + setenv have_lvds 1 + else + echo "------ no Freescale display"; + fdt rm hannstar; + fi + + if i2c probe 0x38 ; then + if itest.s "xLDB-WXGA" == "x$panel"; then + screenres=1280,800 + fdt rm okaya1024x600 + else + screenres=1024,600 + fdt rm lg1280x800 + fi + setenv have_lvds 1 + setenv bootargs $bootargs ft5x06_ts.screenres=$screenres + if itest.s "x" -ne "x$calibration" ; then + setenv bootargs $bootargs ft5x06_ts.calibration=$calibration + fi + else + echo "------ no ft5x06 touch controller"; + fdt rm okaya1024x600 + fdt rm lg1280x800 + fi + + if itest.s "x" == "x$have_lvds"; then + fdt rm lvds_display; + fi + + # -------- LVDS1 (top on Nitrogen6_Max) + if itest.s "xhannstar" == "x$lvds1_panel" ; then + echo "configure LVDS1 for Hannstar panel" + fdt rm okaya1024x600_2; + fdt rm lg1280x800_2; + fdt set lvds_display_2 status okay + elif itest.s "xokaya1024x600" == "x$lvds1_panel" ; then + echo "configure LVDS1 for 1024x600 panel" + fdt rm hannstar_2; + fdt rm lg1280x800_2; + fdt set lvds_display_2 status okay + elif itest.s "xlg1280x800" == "x$lvds1_panel" ; then + echo "configure LVDS1 for 1280x800 panel" + fdt rm hannstar_2; + fdt rm okaya1024x600_2; + fdt set lvds_display_2 status okay + else + fdt rm lvds_display_2 ; # ignore errors on boards != 6_max + fi +fi + +# ------------------- LCD detection +setenv have_lcd ''; +if i2c probe 0x48 ; then + setenv have_lcd 1; + echo "------- found TSC2004 touch controller"; + if itest.s "x" -eq "x$tsc_calibration" ; then + setenv bootargs $bootargs tsc2004.calibration=-67247,-764,272499173,324,69283,-8653010,65536 + else + setenv bootargs $bootargs tsc2004.calibration=$tsc_calibration + fi +elif i2c probe 0x4d ; then + setenv have_lcd 1; + echo "------- found AR1020 touch controller"; +fi + +if itest.s "x" != "x$ignore_lcd" ; then + echo "------ ignoring LCD display"; + setenv have_lcd ''; +fi + +if itest.s "x" != "x$have_lcd" ; then + echo "----- found LCD display"; +else + fdt rm lcd_display; +fi + +setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait fixrtc" + +setenv bpart "$bootpart" + +if itest.s "$bpart" == a ; then + setenv bpart 10 +elif itest.s "$bpart" == b ; then + setenv bpart 11 +elif itest.s "$bpart" == c ; then + setenv bpart 12 +elif itest.s "$bpart" == d ; then + setenv bpart 13 +fi + +if test "sata" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bpart" ; +else + if test "usb" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bpart" ; + elif itest 0 -eq ${disk}; then + setenv bootargs "$bootargs root=/dev/disk/by-path/platform-2198000.usdhc-part1" ; + else + setenv bootargs "$bootargs root=/dev/disk/by-path/platform-219c000.usdhc-part1" ; + fi +fi + +if itest.s "x" != "x${disable_giga}" ; then + setenv bootargs $bootargs fec.disable_giga=1 +fi + +if itest.s "x" != "x$wlmac" ; then + setenv bootargs $bootargs wlcore.mac=$wlmac +fi + +if itest.s "x" != "x$gpumem" ; then + setenv bootargs $bootargs galcore.contiguousSize=$gpumem +fi + +if itest.s "no" != "$dosplash" ; then + setenv bootargs $bootargs splash quiet plymouth.ignore-serial-consoles +fi + +if itest.s "x" != "x$overlayfs" ; then + setenv bootargs $bootargs overlayfs=${overlayfs} + if itest.s "x" != "x${ofs-size}" ; then + setenv bootargs $bootargs ofs-size=${ofs-size} + fi +fi + +if itest.s "x" != "x$show_fdt" ; then + fdt print / +fi + +if itest.s "x" != "x$show_env" ; then + printenv +fi + +if kbd ; then + if itest.s "xv" == "x$keybd" ; then + ${fs}load ${dtype} ${disk}:${bootpart} 0x10800000 ${bootdir}/uImage-recovery && + ${fs}load ${dtype} ${disk}:${bootpart} 0x12800000 ${bootdir}/uramdisk-recovery.img && + bootm 10800000 12800000; + echo "--- error launching recovery!" + exit; + fi +fi + +setenv initrd_high 0xffffffff +setenv initrd_addr 0x12a00000 +echo "----------- trying to load /initrd.img"; +if ${fs}load ${dtype} ${disk}:${bootpart} ${initrd_addr} /initrd.img ; then + haverd=1; + setenv initrd_size ${filesize} +else + haverd= +fi + +if itest.s x$haverd == x ; then + if ${fs}load ${dtype} ${disk}:${bootpart} 0x10800000 /vmlinuz ; then + bootz 0x10800000 - ${fdt_addr} + fi +else + if ${fs}load ${dtype} ${disk}:${bootpart} 0x10800000 /vmlinuz ; then + bootz 0x10800000 ${initrd_addr}:${initrd_size} ${fdt_addr} ; + fi +fi +echo "Error loading kernel image" diff --git a/board/boundary/nitrogen6x/6x_bootscript-ubuntu-3.14.28.txt b/board/boundary/nitrogen6x/6x_bootscript-ubuntu-3.14.28.txt new file mode 100644 index 0000000..1236978 --- /dev/null +++ b/board/boundary/nitrogen6x/6x_bootscript-ubuntu-3.14.28.txt @@ -0,0 +1,164 @@ +setenv bootargs '' + +a_script=0x10800000 +a_zImage=0x10800000 +a_fdt=0x13000000 +a_ramdisk=0x13800000 +a_initrd=0x13a00000 + +setenv initrd_high 0xffffffff +if itest.s "x" == "x${dtbname}" ; then + if itest.s x6SOLO == "x${cpu}" ; then + dtbname=imx6dl-${board}.dtb; + elif itest.s x6DL == "x${cpu}" ; then + dtbname=imx6dl-${board}.dtb; + elif itest.s x6SX == "x${cpu}" ; then + dtbname=imx6sx-${board}.dtb; + a_script=0x80800000 + a_zImage=0x80800000 + a_fdt=0x83000000 + a_ramdisk=0x83800000 + a_initrd=0x83a00000 + else + dtbname=imx6q-${board}.dtb; + fi +fi + +if load ${dtype} ${disk}:1 ${a_script} uEnv.txt ; then + env import -t ${a_script} ${filesize} +fi + +if itest.s x == x${bootdir} ; then + bootdir=/boot/ +fi + +if itest.s x${bootpart} == x ; then + bootpart=1 +fi + +if load ${dtype} ${disk}:${bootpart} ${a_fdt} ${bootdir}${dtbname} ; then + fdt addr ${a_fdt} + setenv fdt_high 0xffffffff +else + echo "!!!! Error loading ${bootdir}${dtbname}"; + exit; +fi + +cmd_xxx_present= +fdt resize +if itest.s "x" != "x${cmd_custom}" ; then + run cmd_custom + cmd_xxx_present=1; +fi + +if itest.s "x" != "x${cmd_hdmi}" ; then + run cmd_hdmi + cmd_xxx_present=1; + if itest.s x == x${allow_noncea} ; then + setenv bootargs ${bootargs} mxc_hdmi.only_cea=1; + echo "only CEA modes allowed on HDMI port"; + else + setenv bootargs ${bootargs} mxc_hdmi.only_cea=0; + echo "non-CEA modes allowed on HDMI, audio may be affected"; + fi +fi + +if itest.s "x" != "x${cmd_lcd}" ; then + run cmd_lcd + cmd_xxx_present=1; +fi +if itest.s "x" != "x${cmd_lvds}" ; then + run cmd_lvds + cmd_xxx_present=1; +fi +if itest.s "x" != "x${cmd_lvds2}" ; then + run cmd_lvds2 + cmd_xxx_present=1; +fi + +if itest.s "x" == "x${cmd_xxx_present}" ; then + echo "!!!!!!!!!!!!!!!!" + echo "warning: your u-boot may be outdated, please upgrade" + echo "!!!!!!!!!!!!!!!!" +fi + +setenv bootargs "${bootargs} console=${console},115200 vmalloc=400M consoleblank=0 rootwait fixrtc" + + +setexpr b0 ${bootpart} % 0x0a; +setexpr b1 ${bootpart} / 0x0a; +#this is to show a decimal number when really hex is output +setexpr bpart ${b1} * 0x10 +setexpr bpart ${bpart} + ${b0}; + +if test "sata" = "${dtype}" ; then + setenv bootargs "${bootargs} root=/dev/sda${bpart}" ; +elif test "usb" = "${dtype}" ; then + setenv bootargs "${bootargs} root=/dev/sda${bpart}" ; +else + setenv bootargs "${bootargs} root=/dev/mmcblk${disk}p${bpart}" +fi + +if itest.s "x" != "x${disable_giga}" ; then + setenv bootargs ${bootargs} fec.disable_giga=1 +fi + +if itest.s "x" != "x${wlmac}" ; then + setenv bootargs ${bootargs} wlcore.mac=${wlmac} +fi + +if itest.s "x" != "x${gpumem}" ; then + setenv bootargs ${bootargs} galcore.contiguousSize=${gpumem} +fi + +if itest.s "no" != "${dosplash}" ; then + setenv bootargs ${bootargs} splash quiet plymouth.ignore-serial-consoles +fi + +if itest.s "x" != "x${overlayfs}" ; then + setenv bootargs ${bootargs} overlayfs=${overlayfs} + if itest.s "x" != "x${ofs-size}" ; then + setenv bootargs ${bootargs} ofs-size=${ofs-size} + fi +fi + +if itest.s "x" != "x${cma}" ; then + setenv bootargs ${bootargs} cma=${cma} +fi + +if itest.s "x" != "x${show_fdt}" ; then + fdt print / +fi + +if itest.s "x" != "x${show_env}" ; then + printenv +fi + +if kbd ; then + if itest.s "xv" == "x${keybd}" ; then + load ${dtype} ${disk}:${bootpart} ${a_zImage} ${bootdir}/uImage-recovery && + load ${dtype} ${disk}:${bootpart} ${a_ramdisk} ${bootdir}/uramdisk-recovery.img && + bootm ${a_zImage} ${a_ramdisk}; + echo "--- error launching recovery!" + exit; + fi +fi + +echo "----------- trying to load /initrd.img"; +if load ${dtype} ${disk}:${bootpart} ${a_initrd} /initrd.img ; then + haverd=1; + setenv initrd_size ${filesize} +else + haverd= +fi + +if itest.s x${haverd} == x ; then + if load ${dtype} ${disk}:${bootpart} ${a_zImage} /vmlinuz ; then + bootz ${a_zImage} - ${a_fdt} + fi +else + if load ${dtype} ${disk}:${bootpart} ${a_zImage} /vmlinuz ; then + bootz ${a_zImage} ${a_initrd}:${initrd_size} ${a_fdt} ; + fi +fi +echo "Error loading kernel image" diff --git a/board/boundary/nitrogen6x/6x_bootscript-yocto-3.10.53.txt b/board/boundary/nitrogen6x/6x_bootscript-yocto-3.10.53.txt new file mode 100644 index 0000000..2df0e11 --- /dev/null +++ b/board/boundary/nitrogen6x/6x_bootscript-yocto-3.10.53.txt @@ -0,0 +1,190 @@ +# Yocto-specifics +setenv bootpart 2 +setenv bootdir / + +setenv bootargs '' + +if ${fs}load ${dtype} ${disk}:1 10800000 uEnv.txt ; then + env import -t 10800000 $filesize +fi + +if itest.s "x" == "x$dtbname" ; then + dtbname="imx6"; + if itest.s x6SOLO == "x$cpu" ; then + dtbname=${dtbname}dl-; + elif itest.s x6DL == "x$cpu" ; then + dtbname=${dtbname}dl-; + else + dtbname=${dtbname}q-; + fi + if itest.s x == "x$board" ; then + board=sabrelite + fi + dtbname=${dtbname}${board}.dtb; +fi + +if itest.s x == x${bootdir} ; then + bootdir=/boot/ +fi + +setenv fdt_addr 0x12000000 +if ${fs}load ${dtype} ${disk}:1 $fdt_addr ${bootdir}$dtbname ; then + fdt addr $fdt_addr + setenv fdt_high 0xffffffff +else + echo "!!!! Error loading ${bootdir}$dtbname"; + exit; +fi + +# ------------------- HDMI detection +i2c dev 1 ; +if i2c probe 0x50 ; then + echo "------ have HDMI monitor"; + if itest.s x == x$allow_noncea ; then + setenv bootargs $bootargs mxc_hdmi.only_cea=1; + echo "only CEA modes allowed on HDMI port"; + else + setenv bootargs $bootargs mxc_hdmi.only_cea=0; + echo "non-CEA modes allowed on HDMI, audio may be affected"; + fi +else + fdt rm hdmi_display + echo "------ no HDMI monitor"; +fi + +# ------------------- LVDS detection +if itest.s "x" != "x$lvds_1080p" ; then + echo "----- 1080P dual channel LVDS"; + fdt rm okaya1024x600 + fdt rm lg1280x800 + fdt rm hannstar; + fdt set ldb split-mode 1 + fdt set lvds_display interface_pix_fmt "RGB24" + fdt set ldb/lvds-channel@0 fsl,data-width <24> +else + fdt rm ldb split-mode + fdt rm lvds1080p + + # -------- LVDS0 (bottom on Nitrogen6_Max) + setenv have_lvds + i2c dev 2 + if i2c probe 0x04 ; then + echo "------ have Freescale display"; + setenv have_lvds 1 + else + echo "------ no Freescale display"; + fdt rm hannstar; + fi + + if i2c probe 0x38 ; then + if itest.s "xLDB-WXGA" == "x$panel"; then + screenres=1280,800 + fdt rm okaya1024x600 + else + screenres=1024,600 + fdt rm lg1280x800 + fi + setenv have_lvds 1 + setenv bootargs $bootargs ft5x06_ts.screenres=$screenres + if itest.s "x" -ne "x$calibration" ; then + setenv bootargs $bootargs ft5x06_ts.calibration=$calibration + fi + else + echo "------ no ft5x06 touch controller"; + fdt rm okaya1024x600 + fdt rm lg1280x800 + fi + + if itest.s "x" == "x$have_lvds"; then + fdt rm lvds_display; + fi + + # -------- LVDS1 (top on Nitrogen6_Max) + if itest.s "xhannstar" == "x$lvds1_panel" ; then + echo "configure LVDS1 for Hannstar panel" + fdt rm okaya1024x600_2; + fdt rm lg1280x800_2; + fdt set lvds_display_2 status okay + elif itest.s "xokaya1024x600" == "x$lvds1_panel" ; then + echo "configure LVDS1 for 1024x600 panel" + fdt rm hannstar_2; + fdt rm lg1280x800_2; + fdt set lvds_display_2 status okay + elif itest.s "xlg1280x800" == "x$lvds1_panel" ; then + echo "configure LVDS1 for 1280x800 panel" + fdt rm hannstar_2; + fdt rm okaya1024x600_2; + fdt set lvds_display_2 status okay + else + fdt rm lvds_display_2 ; # ignore errors on boards != 6_max + fi +fi + +# ------------------- LCD detection +setenv have_lcd ''; +if i2c probe 0x48 ; then + setenv have_lcd 1; + echo "------- found TSC2004 touch controller"; + if itest.s "x" -eq "x$tsc_calibration" ; then + setenv bootargs $bootargs tsc2004.calibration=-67247,-764,272499173,324,69283,-8653010,65536 + else + setenv bootargs $bootargs tsc2004.calibration=$tsc_calibration + fi +elif i2c probe 0x4d ; then + setenv have_lcd 1; + echo "------- found AR1020 touch controller"; +fi + +if itest.s "x" != "x$ignore_lcd" ; then + echo "------ ignoring LCD display"; + setenv have_lcd ''; +fi + +if itest.s "x" != "x$have_lcd" ; then + echo "----- found LCD display"; +else + fdt rm lcd_display; +fi + +setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait" + +if itest.s x$bootpart == x ; then + bootpart=1 +fi + +if test "sata" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; +else + if test "usb" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; + elif itest 0 -eq ${disk}; then + setenv bootargs "$bootargs root=/dev/mmcblk2p$bootpart" ; + else + setenv bootargs "$bootargs root=/dev/mmcblk3p$bootpart" ; + fi +fi + +if itest.s "x" != "x${disable_giga}" ; then + setenv bootargs $bootargs fec.disable_giga=1 +fi + +if itest.s "x" != "x$wlmac" ; then + setenv bootargs $bootargs wlcore.mac=$wlmac +fi + +if itest.s "x" != "x$gpumem" ; then + setenv bootargs $bootargs galcore.contiguousSize=$gpumem +fi + +if itest.s "x" != "x$show_fdt" ; then + fdt print / +fi + +if itest.s "x" != "x$show_env" ; then + printenv +fi + +if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then + bootm 10800000 - $fdt_addr +fi +echo "Error loading kernel image" diff --git a/board/boundary/nitrogen6x/6x_bootscript-yocto-3.14.txt b/board/boundary/nitrogen6x/6x_bootscript-yocto-3.14.txt new file mode 100644 index 0000000..810e483 --- /dev/null +++ b/board/boundary/nitrogen6x/6x_bootscript-yocto-3.14.txt @@ -0,0 +1,131 @@ +setenv bootargs '' + +a_script=0x10800000 +a_zImage=0x10800000 +a_fdt=0x13000000 +a_ramdisk=0x13800000 +a_initrd=0x13a00000 + +setenv initrd_high 0xffffffff +if itest.s "x" == "x${dtbname}" ; then + if itest.s x6SOLO == "x${cpu}" ; then + dtbname=imx6dl-${board}.dtb; + elif itest.s x6DL == "x${cpu}" ; then + dtbname=imx6dl-${board}.dtb; + elif itest.s x6SX == "x${cpu}" ; then + dtbname=imx6sx-${board}.dtb; + a_script=0x80800000 + a_zImage=0x80800000 + a_fdt=0x83000000 + a_ramdisk=0x83800000 + a_initrd=0x83a00000 + else + dtbname=imx6q-${board}.dtb; + fi +fi + +if load ${dtype} ${disk}:1 ${a_script} uEnv.txt ; then + env import -t ${a_script} ${filesize} +fi + +if itest.s x == x${bootdir} ; then + bootdir=/ +fi + +if itest.s x${bootpart} == x ; then + bootpart=1 +fi + +if load ${dtype} ${disk}:${bootpart} ${a_fdt} ${bootdir}${dtbname} ; then + fdt addr ${a_fdt} + setenv fdt_high 0xffffffff +else + echo "!!!! Error loading ${bootdir}${dtbname}"; + exit; +fi + + +# first enable tfp410 +i2c dev 1 +i2c mw 38 8.1 bd + + +cmd_xxx_present= +fdt resize +if itest.s "x" != "x${cmd_custom}" ; then + run cmd_custom + cmd_xxx_present=1; +fi + +if itest.s "x" != "x${cmd_hdmi}" ; then + run cmd_hdmi + cmd_xxx_present=1; + if itest.s x == x${allow_noncea} ; then + setenv bootargs ${bootargs} mxc_hdmi.only_cea=1; + echo "only CEA modes allowed on HDMI port"; + else + setenv bootargs ${bootargs} mxc_hdmi.only_cea=0; + echo "non-CEA modes allowed on HDMI, audio may be affected"; + fi +fi + +if itest.s "x" != "x${cmd_lcd}" ; then + run cmd_lcd + cmd_xxx_present=1; +fi +if itest.s "x" != "x${cmd_lvds}" ; then + run cmd_lvds + cmd_xxx_present=1; +fi +if itest.s "x" != "x${cmd_lvds2}" ; then + run cmd_lvds2 + cmd_xxx_present=1; +fi + +if itest.s "x" == "x${cmd_xxx_present}" ; then + echo "!!!!!!!!!!!!!!!!" + echo "warning: your u-boot may be outdated, please upgrade" + echo "!!!!!!!!!!!!!!!!" +fi + +setenv bootargs "${bootargs} console=${console},115200 vmalloc=400M consoleblank=0 rootwait fixrtc" + + +bpart=2 + +if test "sata" = "${dtype}" ; then + setenv bootargs "${bootargs} root=/dev/sda${bpart}" ; +elif test "usb" = "${dtype}" ; then + setenv bootargs "${bootargs} root=/dev/sda${bpart}" ; +else + setenv bootargs "${bootargs} root=/dev/mmcblk${disk}p${bpart}" +fi + +if itest.s "x" != "x${disable_giga}" ; then + setenv bootargs ${bootargs} fec.disable_giga=1 +fi + +if itest.s "x" != "x${wlmac}" ; then + setenv bootargs ${bootargs} wlcore.mac=${wlmac} +fi + +if itest.s "x" != "x${gpumem}" ; then + setenv bootargs ${bootargs} galcore.contiguousSize=${gpumem} +fi + +if itest.s "x" != "x${cma}" ; then + setenv bootargs ${bootargs} cma=${cma} +fi + +if itest.s "x" != "x${show_fdt}" ; then + fdt print / +fi + +if itest.s "x" != "x${show_env}" ; then + printenv +fi + +if load ${dtype} ${disk}:${bootpart} ${a_zImage} /vmlinuz ; then + bootz ${a_zImage} - ${a_fdt} +fi +echo "Error loading kernel image" diff --git a/board/boundary/nitrogen6x/6x_bootscript-yocto.txt b/board/boundary/nitrogen6x/6x_bootscript-yocto.txt new file mode 100644 index 0000000..30e77a0 --- /dev/null +++ b/board/boundary/nitrogen6x/6x_bootscript-yocto.txt @@ -0,0 +1,162 @@ +# Yocto-specifics +setenv bootpart 2 +setenv bootdir / + +if ${fs}load ${dtype} ${disk}:1 10800000 uEnv.txt ; then + env import -t 10800000 $filesize +else + setenv bootargs enable_wait_mode=off +fi + +setenv nextcon 0; + +i2c dev 1 ; +if i2c probe 0x50 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24 + setenv fbmem "fbmem=28M"; + setexpr nextcon $nextcon + 1 +else + echo "------ no HDMI monitor"; +fi + +i2c dev 2 +if i2c probe 0x04 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LDB-XGA,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no Freescale display"; +fi + +if i2c probe 0x38 ; then + if itest.s "xLDB-WXGA" == "x$panel"; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1280x800MR@60,if=RGB666 + screenres=1280,800 + else + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + screenres=1024,600 + fi + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 + setenv bootargs $bootargs ft5x06_ts.screenres=$screenres + if itest.s "x" -ne "x$calibration" ; then + setenv bootargs $bootargs ft5x06_ts.calibration=$calibration + fi +else + echo "------ no ft5x06 touch controller"; +fi + +if i2c probe 0x41 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no ILI210x touch controller"; +fi + +if i2c probe 0x48 ; then + if itest.s "xqvga" == "x$panel" ; then + display="320x240MR@60,if=RGB24"; + else + display="CLAA-WVGA,if=RGB666"; + fi + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,$display + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no 800x480 display"; +fi + +while test "4" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +setenv bootargs $bootargs $fbmem +setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait" + +if itest.s x$bootpart == x ; then + bootpart=1 +fi + +if test "sata" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; +else + if test "usb" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; + elif itest.s "x" == "x$sdphys" ; then + setenv bootargs "$bootargs root=/dev/mmcblk0p$bootpart" ; + elif itest 0 -eq ${disk}; then + setenv bootargs "$bootargs root=/dev/mmcblk2p$bootpart" ; + else + setenv bootargs "$bootargs root=/dev/mmcblk3p$bootpart" ; + fi +fi + +if itest.s "x" == "x$dtbname" ; then + dtbname="imx6"; + if itest.s x6SOLO == "x$cpu" ; then + dtbname=${dtbname}dl-; + elif itest.s x6DL == "x$cpu" ; then + dtbname=${dtbname}dl-; + else + dtbname=${dtbname}q-; + fi + if itest.s x == "x$board" ; then + board=sabrelite + fi + dtbname=${dtbname}${board}.dtb; +fi + +if itest.s x == x${bootdir} ; then + bootdir=/boot/ +fi + +if ${fs}load ${dtype} ${disk}:1 12000000 ${bootdir}$dtbname ; then + havedtb=1; + setenv fdt_addr 0x11000000 + setenv fdt_high 0xffffffff +else + havedtb= +fi + +if itest.s x == x$allow_noncea ; then + setenv bootargs $bootargs mxc_hdmi.only_cea=1; + echo "only CEA modes allowed on HDMI port"; +else + setenv bootargs $bootargs mxc_hdmi.only_cea=0; + echo "non-CEA modes allowed on HDMI, audio may be affected"; +fi + +if itest.s "x" != "x$disable_giga" ; then + setenv bootargs $bootargs fec.disable_giga=1 +fi + +if itest.s "x" != "x$wlmac" ; then + setenv bootargs $bootargs wlcore.mac=$wlmac +fi + +if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then + if itest.s x$havedtb == x ; then + bootm 10800000 ; + else + bootm 10800000 - 12000000 + fi +fi +echo "Error loading kernel image" diff --git a/board/boundary/nitrogen6x/6x_bootscript.txt b/board/boundary/nitrogen6x/6x_bootscript.txt index 061b3a4..a1fd0da 100644 --- a/board/boundary/nitrogen6x/6x_bootscript.txt +++ b/board/boundary/nitrogen6x/6x_bootscript.txt @@ -1,7 +1,13 @@ -setenv bootargs enable_wait_mode=off +if ${fs}load ${dtype} ${disk}:1 10800000 uEnv.txt ; then + env import -t 10800000 $filesize +else + setenv bootargs enable_wait_mode=off +fi + setenv nextcon 0; -if hdmidet ; then +i2c dev 1 ; +if i2c probe 0x50 ; then setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24 setenv fbmem "fbmem=28M"; setexpr nextcon $nextcon + 1 @@ -23,7 +29,29 @@ else fi if i2c probe 0x38 ; then - setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + if itest.s "xLDB-WXGA" == "x$panel"; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1280x800MR@60,if=RGB666 + screenres=1280,800 + else + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + screenres=1024,600 + fi + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 + setenv bootargs $bootargs ft5x06_ts.screenres=$screenres + if itest.s "x" -ne "x$calibration" ; then + setenv bootargs $bootargs ft5x06_ts.calibration=$calibration + fi +else + echo "------ no ft5x06 touch controller"; +fi + +if i2c probe 0x41 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 if test "0" -eq $nextcon; then setenv fbmem "fbmem=10M"; else @@ -31,11 +59,16 @@ if i2c probe 0x38 ; then fi setexpr nextcon $nextcon + 1 else - echo "------ no 1024x600 display"; + echo "------ no ILI210x touch controller"; fi if i2c probe 0x48 ; then - setenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,CLAA-WVGA,if=RGB666 + if itest.s "xqvga" == "x$panel" ; then + display="320x240MR@60,if=RGB24"; + else + display="CLAA-WVGA,if=RGB666"; + fi + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,$display if test "0" -eq $nextcon; then setenv fbmem "fbmem=10M"; else @@ -46,7 +79,7 @@ else echo "------ no 800x480 display"; fi -while test "3" -ne $nextcon ; do +while test "4" -ne $nextcon ; do setenv bootargs $bootargs video=mxcfb${nextcon}:off ; setexpr nextcon $nextcon + 1 ; done @@ -54,10 +87,71 @@ done setenv bootargs $bootargs $fbmem setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait" +if itest.s x$bootpart == x ; then + bootpart=1 +fi + if test "sata" = "${dtype}" ; then - setenv bootargs "$bootargs root=/dev/sda1" ; + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; +else + if test "usb" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; + elif itest.s "x" == "x$sdphys" ; then + setenv bootargs "$bootargs root=/dev/mmcblk0p$bootpart" ; + elif itest 0 -eq ${disk}; then + setenv bootargs "$bootargs root=/dev/mmcblk2p$bootpart" ; + else + setenv bootargs "$bootargs root=/dev/mmcblk3p$bootpart" ; + fi +fi + +dtbname="imx6"; +if itest.s x6SOLO == "x$cpu" ; then + dtbname=${dtbname}dl-; +elif itest.s x6DL == "x$cpu" ; then + dtbname=${dtbname}dl-; +else + dtbname=${dtbname}q-; +fi + +if itest.s x == "x$board" ; then + board=sabrelite +fi +dtbname=${dtbname}${board}.dtb; + +if itest.s x == x${bootdir} ; then + bootdir=/boot/ +fi + +if ${fs}load ${dtype} ${disk}:1 12000000 ${bootdir}$dtbname ; then + havedtb=1; + setenv fdt_addr 0x11000000 + setenv fdt_high 0xffffffff +else + havedtb= +fi + +if itest.s x == x$allow_noncea ; then + setenv bootargs $bootargs mxc_hdmi.only_cea=1; + echo "only CEA modes allowed on HDMI port"; else - setenv "bootargs $bootargs root=/dev/mmcblk0p1" ; + setenv bootargs $bootargs mxc_hdmi.only_cea=0; + echo "non-CEA modes allowed on HDMI, audio may be affected"; +fi + +if itest.s "x" != "x$disable_giga" ; then + setenv bootargs $bootargs fec.disable_giga=1 +fi + +if itest.s "x" != "x$wlmac" ; then + setenv bootargs $bootargs wlcore.mac=$wlmac +fi + +if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then + if itest.s x$havedtb == x ; then + bootm 10800000 ; + else + bootm 10800000 - 12000000 + fi fi -${fs}load ${dtype} ${disk}:1 10800000 /boot/uImage && bootm 10800000 ; echo "Error loading kernel image" diff --git a/board/boundary/nitrogen6x/6x_bootscript_android.txt b/board/boundary/nitrogen6x/6x_bootscript_android.txt index 0982cf8..088f830 100644 --- a/board/boundary/nitrogen6x/6x_bootscript_android.txt +++ b/board/boundary/nitrogen6x/6x_bootscript_android.txt @@ -9,9 +9,9 @@ i2c dev 2 if i2c probe 0x04 ; then setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LDB-XGA,if=RGB666 if test "0" -eq $nextcon; then - setenv fbcon "fbcon=10M"; + setenv fbmem "fbmem=10M"; else - setenv fbcon ${fbcon},10M + setenv fbmem ${fbmem},10M fi setexpr nextcon $nextcon + 1 else @@ -21,9 +21,9 @@ fi if i2c probe 0x38 ; then setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 if test "0" -eq $nextcon; then - setenv fbcon "fbcon=10M"; + setenv fbmem "fbmem=10M"; else - setenv fbcon ${fbcon},10M + setenv fbmem ${fbmem},10M fi setexpr nextcon $nextcon + 1 else @@ -33,9 +33,9 @@ fi if i2c probe 0x48 ; then setenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,CLAA-WVGA,if=RGB666 tsdev=tsc2004 calibration if test "0" -eq $nextcon; then - setenv fbcon "fbcon=10M"; + setenv fbmem "fbmem=10M"; else - setenv fbcon ${fbcon},10M + setenv fbmem ${fbmem},10M fi setexpr nextcon $nextcon + 1 else @@ -45,9 +45,9 @@ fi if hdmidet ; then setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24 if test "0" -eq $nextcon; then - setenv fbcon "fbcon=28M"; + setenv fbmem "fbmem=28M"; else - setenv fbcon ${fbcon},28M + setenv fbmem ${fbmem},28M fi setexpr nextcon $nextcon + 1 else @@ -59,6 +59,6 @@ while test "3" -ne $nextcon ; do setexpr nextcon $nextcon + 1 ; done -setenv bootargs $bootargs fbcon=$fbcon +setenv bootargs $bootargs $fbmem ${fs}load ${dtype} ${disk}:1 10800000 uImage && ${fs}load ${dtype} ${disk}:1 12800000 uramdisk.img && bootm 10800000 12800000 echo "Error loading kernel image" diff --git a/board/boundary/nitrogen6x/6x_upgrade.txt b/board/boundary/nitrogen6x/6x_upgrade.txt index 1a62bbf..9715f16 100644 --- a/board/boundary/nitrogen6x/6x_upgrade.txt +++ b/board/boundary/nitrogen6x/6x_upgrade.txt @@ -1,45 +1,69 @@ +if itest.s a$uboot_defconfig == a; then + echo "Please set uboot_defconfig to the appropriate value" + exit +fi + +offset=0x400 +a_uImage1=0x12000000 +a_uImage2=0x12400000 + +if itest.s x6SX == "x$cpu" ; then + a_uImage1=0x82000000 + a_uImage2=0x82400000 +fi + setenv stdout serial,vga echo "check U-Boot" ; -setenv offset 0x400 -if ${fs}load ${dtype} ${disk}:1 12000000 u-boot.imx || ${fs}load ${dtype} ${disk}:1 12000000 u-boot.nopadding ; then - echo "read $filesize bytes from SD card" ; - if sf probe || sf probe || \ - sf probe 1 27000000 || sf probe 1 27000000 ; then - echo "probed SPI ROM" ; - if sf read 0x12400000 $offset $filesize ; then - if cmp.b 0x12000000 0x12400000 $filesize ; then - echo "------- U-Boot versions match" ; - else - echo "Need U-Boot upgrade" ; - echo "Program in 5 seconds" ; - for n in 5 4 3 2 1 ; do - echo $n ; - sleep 1 ; - done - echo "erasing" ; - sf erase 0 0xC0000 ; - # two steps to prevent bricking - echo "programming" ; - sf write 0x12000000 $offset $filesize ; - echo "verifying" ; - if sf read 0x12400000 $offset $filesize ; then - if cmp.b 0x12000000 0x12400000 $filesize ; then - while echo "---- U-Boot upgraded. reset" ; do - sleep 120 - done - else - echo "Read verification error" ; - fi - else - echo "Error re-reading EEPROM" ; - fi - fi - else - echo "Error reading boot loader from EEPROM" ; - fi - else - echo "Error initializing EEPROM" ; - fi ; + +if load ${dtype} ${disk}:1 ${a_uImage1} u-boot.$uboot_defconfig ; then +else + echo "No U-Boot image found on SD card" ; + exit +fi +echo "read $filesize bytes from SD card" ; +if sf probe || sf probe || sf probe 1 27000000 || sf probe 1 27000000 ; then + echo "probed SPI ROM" ; +else + echo "Error initializing EEPROM" ; + exit +fi ; +if sf read ${a_uImage2} $offset $filesize ; then +else + echo "Error reading boot loader from EEPROM" ; + exit +fi +if cmp.b ${a_uImage1} ${a_uImage2} $filesize ; then + echo "------- U-Boot versions match" ; + exit +fi +echo "Need U-Boot upgrade" ; +echo "Program in 5 seconds" ; +for n in 5 4 3 2 1 ; do + echo $n ; + sleep 1 ; +done +echo "erasing" ; +sf erase 0 0xC0000 ; + +# two steps to prevent bricking +echo "programming" ; +setexpr a1 ${a_uImage1} + 0x400 +setexpr o1 ${offset} + 0x400 +setexpr s1 ${filesize} - 0x400 +sf write ${a1} ${o1} ${s1} ; +sf write ${a_uImage1} $offset 0x400 ; + +echo "verifying" ; +if sf read ${a_uImage2} $offset $filesize ; then +else + echo "Error re-reading EEPROM" ; + exit +fi +if cmp.b ${a_uImage1} ${a_uImage2} $filesize ; then else - echo "No U-Boot image found on SD card" ; + echo "Read verification error" ; + exit fi +while echo "---- U-Boot upgraded. reset" ; do + sleep 120 +done diff --git a/board/boundary/nitrogen6x/800mhz_2x128mx16.cfg b/board/boundary/nitrogen6x/800mhz_2x128mx16.cfg index e005a64..6e27905 100644 --- a/board/boundary/nitrogen6x/800mhz_2x128mx16.cfg +++ b/board/boundary/nitrogen6x/800mhz_2x128mx16.cfg @@ -5,6 +5,7 @@ */ DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 DATA 4, MX6_MMDC_P0_MDCFG0, 0x40435323 DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8D63 DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB diff --git a/board/boundary/nitrogen6x/800mhz_2x256mx16.cfg b/board/boundary/nitrogen6x/800mhz_2x256mx16.cfg index 581d44c..3e350db 100644 --- a/board/boundary/nitrogen6x/800mhz_2x256mx16.cfg +++ b/board/boundary/nitrogen6x/800mhz_2x256mx16.cfg @@ -5,6 +5,7 @@ */ DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 DATA 4, MX6_MMDC_P0_MDCFG0, 0x696C5323 DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8D63 DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB diff --git a/board/boundary/nitrogen6x/800mhz_4x128mx16.cfg b/board/boundary/nitrogen6x/800mhz_4x128mx16.cfg index 1069342..57bda57 100644 --- a/board/boundary/nitrogen6x/800mhz_4x128mx16.cfg +++ b/board/boundary/nitrogen6x/800mhz_4x128mx16.cfg @@ -5,6 +5,7 @@ */ DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 DATA 4, MX6_MMDC_P0_MDCFG0, 0x40435323 DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8D63 DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB diff --git a/board/boundary/nitrogen6x/800mhz_4x256mx16.cfg b/board/boundary/nitrogen6x/800mhz_4x256mx16.cfg index 7c7a3d1..458ec68 100644 --- a/board/boundary/nitrogen6x/800mhz_4x256mx16.cfg +++ b/board/boundary/nitrogen6x/800mhz_4x256mx16.cfg @@ -5,6 +5,7 @@ */ DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 DATA 4, MX6_MMDC_P0_MDCFG0, 0x696C5323 DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8D63 DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB diff --git a/board/boundary/nitrogen6x/Kconfig b/board/boundary/nitrogen6x/Kconfig index 190809c..298c9fd 100644 --- a/board/boundary/nitrogen6x/Kconfig +++ b/board/boundary/nitrogen6x/Kconfig @@ -1,23 +1,18 @@ if TARGET_NITROGEN6X config SYS_CPU - string default "armv7" config SYS_BOARD - string default "nitrogen6x" config SYS_VENDOR - string default "boundary" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "nitrogen6x" endif diff --git a/board/boundary/nitrogen6x/Makefile b/board/boundary/nitrogen6x/Makefile index f875d68..df12643 100644 --- a/board/boundary/nitrogen6x/Makefile +++ b/board/boundary/nitrogen6x/Makefile @@ -7,3 +7,4 @@ # obj-y := nitrogen6x.o +obj-$(CONFIG_MXC_SPI_DISPLAY) += spi_display.o \ No newline at end of file diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c index 60a09f4..4c46add 100644 --- a/board/boundary/nitrogen6x/nitrogen6x.c +++ b/board/boundary/nitrogen6x/nitrogen6x.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -28,6 +29,11 @@ #include #include #include +#include +#include +#include +#include +#include "spi_display.h" DECLARE_GLOBAL_DATA_PTR; #define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) @@ -63,6 +69,33 @@ DECLARE_GLOBAL_DATA_PTR; #define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) +static iomux_v3_cfg_t const init_pads[] = { + NEW_PAD_CTRL(MX6_PAD_GPIO_0__CCM_CLKO1, OUTPUT_40OHM), /* SGTL5000 sys_mclk */ + NEW_PAD_CTRL(MX6_PAD_GPIO_3__CCM_CLKO2, OUTPUT_40OHM), /* J5 - Camera MCLK */ + + /* wl1271 pads on nitrogen6x */ + /* WL12XX_WL_IRQ_GP */ + NEW_PAD_CTRL(MX6_PAD_NANDF_CS1__GPIO6_IO14, WEAK_PULLDOWN), + /* WL12XX_WL_ENABLE_GP */ + NEW_PAD_CTRL(MX6_PAD_NANDF_CS2__GPIO6_IO15, OUTPUT_40OHM), + /* WL12XX_BT_ENABLE_GP */ + NEW_PAD_CTRL(MX6_PAD_NANDF_CS3__GPIO6_IO16, OUTPUT_40OHM), + /* USB otg power */ + NEW_PAD_CTRL(MX6_PAD_EIM_D22__GPIO3_IO22, OUTPUT_40OHM), + NEW_PAD_CTRL(MX6_PAD_NANDF_D5__GPIO2_IO05, OUTPUT_40OHM), + NEW_PAD_CTRL(MX6_PAD_NANDF_WP_B__GPIO6_IO09, OUTPUT_40OHM), + NEW_PAD_CTRL(MX6_PAD_GPIO_8__GPIO1_IO08, OUTPUT_40OHM), + NEW_PAD_CTRL(MX6_PAD_GPIO_6__GPIO1_IO06, OUTPUT_40OHM), + + /* Backlight on RGB connector: J15 */ +#define RGB_BACKLIGHT_GP IMX_GPIO_NR(1, 21) + MX6_PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL), + + /* Backlight on LVDS connector: J6 */ +#define LVDS_BACKLIGHT_GP IMX_GPIO_NR(1, 18) + MX6_PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + int dram_init(void) { gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); @@ -70,20 +103,26 @@ int dram_init(void) return 0; } -iomux_v3_cfg_t const uart1_pads[] = { +static iomux_v3_cfg_t const uart1_pads[] = { MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), }; -iomux_v3_cfg_t const uart2_pads[] = { +/* #define CONFIG_SILENT_UART */ +static iomux_v3_cfg_t const uart2_pads[] = { +#ifndef CONFIG_SILENT_UART MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +#else + MX6_PAD_EIM_D26__GPIO3_IO26 | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_EIM_D27__GPIO3_IO27 | MUX_PAD_CTRL(UART_PAD_CTRL), +#endif }; #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) /* I2C1, SGTL5000 */ -struct i2c_pads_info i2c_pad_info0 = { +static struct i2c_pads_info i2c_pad_info0 = { .scl = { .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC, .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC, @@ -97,7 +136,7 @@ struct i2c_pads_info i2c_pad_info0 = { }; /* I2C2 Camera, MIPI */ -struct i2c_pads_info i2c_pad_info1 = { +static struct i2c_pads_info i2c_pad_info1 = { .scl = { .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC, .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC, @@ -111,7 +150,7 @@ struct i2c_pads_info i2c_pad_info1 = { }; /* I2C3, J15 - RGB connector */ -struct i2c_pads_info i2c_pad_info2 = { +static struct i2c_pads_info i2c_pad_info2 = { .scl = { .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC, .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | PC, @@ -124,7 +163,16 @@ struct i2c_pads_info i2c_pad_info2 = { } }; -iomux_v3_cfg_t const usdhc3_pads[] = { +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc3_pads[] = { MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -134,7 +182,7 @@ iomux_v3_cfg_t const usdhc3_pads[] = { MX6_PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ }; -iomux_v3_cfg_t const usdhc4_pads[] = { +static iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -144,7 +192,7 @@ iomux_v3_cfg_t const usdhc4_pads[] = { MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ }; -iomux_v3_cfg_t const enet_pads1[] = { +static iomux_v3_cfg_t const enet_pads1[] = { MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), @@ -171,7 +219,7 @@ iomux_v3_cfg_t const enet_pads1[] = { MX6_PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), }; -iomux_v3_cfg_t const enet_pads2[] = { +static iomux_v3_cfg_t const enet_pads2[] = { MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), @@ -189,7 +237,7 @@ static iomux_v3_cfg_t const misc_pads[] = { }; /* wl1271 pads on nitrogen6x */ -iomux_v3_cfg_t const wl12xx_pads[] = { +static iomux_v3_cfg_t const wl12xx_pads[] = { (MX6_PAD_NANDF_CS1__GPIO6_IO14 & ~MUX_PAD_CTRL_MASK) | MUX_PAD_CTRL(WEAK_PULLDOWN), (MX6_PAD_NANDF_CS2__GPIO6_IO15 & ~MUX_PAD_CTRL_MASK) @@ -235,9 +283,10 @@ static void setup_iomux_enet(void) gpio_set_value(IMX_GPIO_NR(1, 27), 1); /* Nitrogen6X PHY reset */ imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2)); + udelay(100); /* Wait 100 us before using mii interface */ } -iomux_v3_cfg_t const usb_pads[] = { +static iomux_v3_cfg_t const usb_pads[] = { MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), }; @@ -271,7 +320,7 @@ int board_ehci_power(int port, int on) #endif #ifdef CONFIG_FSL_ESDHC -struct fsl_esdhc_cfg usdhc_cfg[2] = { +static struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR}, {USDHC4_BASE_ADDR}, }; @@ -279,17 +328,11 @@ struct fsl_esdhc_cfg usdhc_cfg[2] = { int board_mmc_getcd(struct mmc *mmc) { struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; - int ret; - - if (cfg->esdhc_base == USDHC3_BASE_ADDR) { - gpio_direction_input(IMX_GPIO_NR(7, 0)); - ret = !gpio_get_value(IMX_GPIO_NR(7, 0)); - } else { - gpio_direction_input(IMX_GPIO_NR(2, 6)); - ret = !gpio_get_value(IMX_GPIO_NR(2, 6)); - } + int gp_cd = (cfg->esdhc_base == USDHC3_BASE_ADDR) ? IMX_GPIO_NR(7, 0) : + IMX_GPIO_NR(2, 6); - return ret; + gpio_direction_input(gp_cd); + return !gpio_get_value(gp_cd); } int board_mmc_init(bd_t *bis) @@ -328,7 +371,20 @@ int board_mmc_init(bd_t *bis) #endif #ifdef CONFIG_MXC_SPI -iomux_v3_cfg_t const ecspi1_pads[] = { +#define GP_ECSPI2_CS IMX_GPIO_NR(5, 29) + +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + if (bus == 0 && cs == 0) + return IMX_GPIO_NR(3, 19); + if (bus == 1 && cs == 0) + return GP_ECSPI2_CS; + if (cs >> 8) + return (cs >> 8); + return -1; +} + +static iomux_v3_cfg_t const ecspi1_pads[] = { /* SS1 */ MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), @@ -336,7 +392,7 @@ iomux_v3_cfg_t const ecspi1_pads[] = { MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), }; -void setup_spi(void) +static void setup_spi(void) { imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); @@ -395,6 +451,29 @@ int board_eth_init(bd_t *bis) return 0; } + +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) { + return -1; + } + + env_loadsplash = getenv("loadsplash"); + if (env_loadsplash == NULL) { + printf("Environment variable loadsplash not found!\n"); + return -1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("failed to run loadsplash %s\n\n", env_loadsplash); + return -1; + } + + return 0; +} + static void setup_buttons(void) { imx_iomux_v3_setup_multiple_pads(button_pads, @@ -403,16 +482,6 @@ static void setup_buttons(void) #if defined(CONFIG_VIDEO_IPUV3) -static iomux_v3_cfg_t const backlight_pads[] = { - /* Backlight on RGB connector: J15 */ - MX6_PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL), -#define RGB_BACKLIGHT_GP IMX_GPIO_NR(1, 21) - - /* Backlight on LVDS connector: J6 */ - MX6_PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL), -#define LVDS_BACKLIGHT_GP IMX_GPIO_NR(1, 18) -}; - static iomux_v3_cfg_t const rgb_pads[] = { MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15, @@ -445,190 +514,122 @@ static iomux_v3_cfg_t const rgb_pads[] = { MX6_PAD_DISP0_DAT23__IPU1_DISP0_DATA23, }; -static void do_enable_hdmi(struct display_info_t const *dev) +void board_enable_lvds(const struct display_info_t *di) { - imx_enable_hdmi_phy(); + gpio_direction_output(LVDS_BACKLIGHT_GP, 1); } -static int detect_i2c(struct display_info_t const *dev) +void board_enable_lcd(const struct display_info_t *di) { - return ((0 == i2c_set_bus_num(dev->bus)) - && - (0 == i2c_probe(dev->addr))); + imx_iomux_v3_setup_multiple_pads(rgb_pads, ARRAY_SIZE(rgb_pads)); +#ifdef CONFIG_MXC_SPI_DISPLAY + if (di->fbflags & FBF_SPI) + return enable_spi_rgb(di); +#endif + gpio_direction_output(RGB_BACKLIGHT_GP, 1); } -static void enable_lvds(struct display_info_t const *dev) +const struct display_info_t displays[] = { + /* hdmi */ + IMX_VD50_1280_720M_60(HDMI, 1, 1), + IMX_VD50_1920_1080M_60(HDMI, 0, 1), + IMX_VD50_1024_768M_60(HDMI, 0, 1), + + /* ft5x06 */ + IMX_VD38_LG1280_800(LVDS, 1, 2), + IMX_VD38_HANNSTAR7(LVDS, 0, 2), + IMX_VD38_WSVGA(LVDS, 0, 2), + + /* ili210x */ + IMX_VD41_AMP1024_600(LVDS, 1, 2), + + /* egalax_ts */ + IMX_VD04_HANNSTAR(LVDS, 1, 2), + IMX_VD04_LG9_7(LVDS, 0, 2), + + /* fusion7 specific touchscreen */ + IMX_VD10_FUSION7(LCD, 1, 2), + + IMX_VD_SHARP_LQ101K1LY04(LVDS, 0, 0), + IMX_VD_WXGA_J(LVDS, 0, 0), + IMX_VD_WXGA(LVDS, 0, 0), + IMX_VD_WVGA(LVDS, 0, 0), + IMX_VD_AA065VE11(LVDS, 0, 0), + IMX_VD_VGA(LVDS, 0, 0), + + /* tsc2004 */ + IMX_VD48_CLAA_WVGA(LCD, 1, 2), + IMX_VD48_SHARP_WVGA(LCD, 0, 2), + IMX_VD48_DC050WX(LCD, 0, 2), + IMX_VD48_QVGA(LCD, 0, 2), + IMX_VD48_AT035GT_07ET3(LCD, 0, 2), + + IMX_VD_LSA40AT9001(LCD, 0, 0), +#ifdef CONFIG_MXC_SPI_DISPLAY + IMX_VD_AUO_G050(LCD, 0, 1), + IMX_VD_A030JN01_UPS051(LCD, 0, 1), +#endif +}; + +size_t display_count = ARRAY_SIZE(displays); + +int board_cfb_skip(void) { - struct iomuxc *iomux = (struct iomuxc *) - IOMUXC_BASE_ADDR; - u32 reg = readl(&iomux->gpr[2]); - reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT; - writel(reg, &iomux->gpr[2]); - gpio_direction_output(LVDS_BACKLIGHT_GP, 1); + return NULL != getenv("novideo"); } -static void enable_rgb(struct display_info_t const *dev) +#endif + +#define WL12XX_WL_IRQ_GP IMX_GPIO_NR(6, 14) + +static unsigned gpios_out_low[] = { + /* Disable wl1271 */ + IMX_GPIO_NR(6, 15), /* disable wireless */ + IMX_GPIO_NR(6, 16), /* disable bluetooth */ + IMX_GPIO_NR(3, 22), /* disable USB otg power */ + IMX_GPIO_NR(2, 5), /* ov5640 mipi camera reset */ + IMX_GPIO_NR(1, 8), /* ov5642 reset */ +}; + +static unsigned gpios_out_high[] = { + IMX_GPIO_NR(1, 6), /* ov5642 powerdown */ + IMX_GPIO_NR(6, 9), /* ov5640 mipi camera power down */ +}; + +static unsigned short gpios_in[] = { + LVDS_BACKLIGHT_GP, + RGB_BACKLIGHT_GP, + WL12XX_WL_IRQ_GP, +}; + +static void set_gpios_in(unsigned short *p, int cnt) { - imx_iomux_v3_setup_multiple_pads( - rgb_pads, - ARRAY_SIZE(rgb_pads)); - gpio_direction_output(RGB_BACKLIGHT_GP, 1); -} + int i; -struct display_info_t const displays[] = {{ - .bus = -1, - .addr = 0, - .pixfmt = IPU_PIX_FMT_RGB24, - .detect = detect_hdmi, - .enable = do_enable_hdmi, - .mode = { - .name = "HDMI", - .refresh = 60, - .xres = 1024, - .yres = 768, - .pixclock = 15385, - .left_margin = 220, - .right_margin = 40, - .upper_margin = 21, - .lower_margin = 7, - .hsync_len = 60, - .vsync_len = 10, - .sync = FB_SYNC_EXT, - .vmode = FB_VMODE_NONINTERLACED -} }, { - .bus = 2, - .addr = 0x4, - .pixfmt = IPU_PIX_FMT_LVDS666, - .detect = detect_i2c, - .enable = enable_lvds, - .mode = { - .name = "Hannstar-XGA", - .refresh = 60, - .xres = 1024, - .yres = 768, - .pixclock = 15385, - .left_margin = 220, - .right_margin = 40, - .upper_margin = 21, - .lower_margin = 7, - .hsync_len = 60, - .vsync_len = 10, - .sync = FB_SYNC_EXT, - .vmode = FB_VMODE_NONINTERLACED -} }, { - .bus = 2, - .addr = 0x38, - .pixfmt = IPU_PIX_FMT_LVDS666, - .detect = detect_i2c, - .enable = enable_lvds, - .mode = { - .name = "wsvga-lvds", - .refresh = 60, - .xres = 1024, - .yres = 600, - .pixclock = 15385, - .left_margin = 220, - .right_margin = 40, - .upper_margin = 21, - .lower_margin = 7, - .hsync_len = 60, - .vsync_len = 10, - .sync = FB_SYNC_EXT, - .vmode = FB_VMODE_NONINTERLACED -} }, { - .bus = 2, - .addr = 0x48, - .pixfmt = IPU_PIX_FMT_RGB666, - .detect = detect_i2c, - .enable = enable_rgb, - .mode = { - .name = "wvga-rgb", - .refresh = 57, - .xres = 800, - .yres = 480, - .pixclock = 37037, - .left_margin = 40, - .right_margin = 60, - .upper_margin = 10, - .lower_margin = 10, - .hsync_len = 20, - .vsync_len = 10, - .sync = 0, - .vmode = FB_VMODE_NONINTERLACED -} } }; -size_t display_count = ARRAY_SIZE(displays); + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} -static void setup_display(void) +static void set_gpios(unsigned *p, int cnt, int val) { - struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; - struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; - int reg; - - enable_ipu_clock(); - imx_setup_hdmi(); - /* Turn on LDB0,IPU,IPU DI0 clocks */ - reg = __raw_readl(&mxc_ccm->CCGR3); - reg |= MXC_CCM_CCGR3_LDB_DI0_MASK; - writel(reg, &mxc_ccm->CCGR3); - - /* set LDB0, LDB1 clk select to 011/011 */ - reg = readl(&mxc_ccm->cs2cdr); - reg &= ~(MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK - |MXC_CCM_CS2CDR_LDB_DI1_CLK_SEL_MASK); - reg |= (3<cs2cdr); - - reg = readl(&mxc_ccm->cscmr2); - reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV; - writel(reg, &mxc_ccm->cscmr2); - - reg = readl(&mxc_ccm->chsccdr); - reg |= (CHSCCDR_CLK_SEL_LDB_DI0 - <chsccdr); - - reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES - |IOMUXC_GPR2_DI1_VS_POLARITY_ACTIVE_HIGH - |IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW - |IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG - |IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT - |IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG - |IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT - |IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED - |IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; - writel(reg, &iomux->gpr[2]); - - reg = readl(&iomux->gpr[3]); - reg = (reg & ~(IOMUXC_GPR3_LVDS0_MUX_CTL_MASK - |IOMUXC_GPR3_HDMI_MUX_CTL_MASK)) - | (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 - <gpr[3]); - - /* backlights off until needed */ - imx_iomux_v3_setup_multiple_pads(backlight_pads, - ARRAY_SIZE(backlight_pads)); - gpio_direction_input(LVDS_BACKLIGHT_GP); - gpio_direction_input(RGB_BACKLIGHT_GP); + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); } -#endif int board_early_init_f(void) { setup_iomux_uart(); + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); - /* Disable wl1271 For Nitrogen6w */ - gpio_direction_input(WL12XX_WL_IRQ_GP); - gpio_direction_output(WL12XX_WL_ENABLE_GP, 0); - gpio_direction_output(WL12XX_BT_ENABLE_GP, 0); - gpio_direction_output(GP_USB_OTG_PWR, 0); /* OTG power off */ - - imx_iomux_v3_setup_multiple_pads(wl12xx_pads, ARRAY_SIZE(wl12xx_pads)); + imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads)); setup_buttons(); #if defined(CONFIG_VIDEO_IPUV3) - setup_display(); + imx_setup_display(); #endif return 0; } @@ -651,6 +652,7 @@ int board_init(void) IOMUXC_GPR1_OTG_ID_GPIO1); imx_iomux_v3_setup_multiple_pads(misc_pads, ARRAY_SIZE(misc_pads)); + imx_iomux_v3_setup_multiple_pads(wl12xx_pads, ARRAY_SIZE(wl12xx_pads)); /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; @@ -658,6 +660,8 @@ int board_init(void) #ifdef CONFIG_MXC_SPI setup_spi(); #endif + imx_iomux_v3_setup_multiple_pads( + usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); @@ -669,13 +673,26 @@ int board_init(void) return 0; } +static char const *board_type = "uninitialized"; + int checkboard(void) { - if (gpio_get_value(WL12XX_WL_IRQ_GP)) +#if defined(CONFIG_NITROGEN6X_FL) + puts("Board: Nitrogen6X_fl\n"); + board_type = "nitrogen6x_fl"; +#elif defined(CONFIG_BOARD_NAME) && defined(CONFIG_BOARD_TYPE) + puts("Board: " CONFIG_BOARD_NAME "\n"); + board_type = CONFIG_BOARD_TYPE ; +#else + if (gpio_get_value(WL12XX_WL_IRQ_GP)) { puts("Board: Nitrogen6X\n"); - else + board_type = "nitrogen6x"; + } + else { puts("Board: SABRE Lite\n"); - + board_type = "sabrelite"; + } +#endif return 0; } @@ -782,3 +799,15 @@ int misc_init_r(void) #endif return 0; } + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", board_type); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/nitrogen6x/spi_display.c b/board/boundary/nitrogen6x/spi_display.c new file mode 100644 index 0000000..8c4bf7d --- /dev/null +++ b/board/boundary/nitrogen6x/spi_display.c @@ -0,0 +1,515 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "spi_display.h" + +#define DI0_PAD_CTRL PAD_CTL_DSE_120ohm + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define SPI_MOSI_R_PAD_CTRL SPI_PAD_CTRL | PAD_CTL_ODE | PAD_CTL_PUS_22K_UP + + +#if defined(CONFIG_MX6QDL) +#define IOMUX_PAD_CTRL(name, ctrl) NEW_PAD_CTRL(MX6Q_PAD_##name, ctrl), \ + NEW_PAD_CTRL(MX6DL_PAD_##name, ctrl) +#else +#define IOMUX_PAD_CTRL(name, ctrl) NEW_PAD_CTRL(MX6_PAD_##name, ctrl) +#endif + +static iomux_v3_cfg_t const spi_mosi_r_pads[] = { + IOMUX_PAD_CTRL(CSI0_DAT9__ECSPI2_MOSI, SPI_MOSI_R_PAD_CTRL), +}; + +static iomux_v3_cfg_t const spi_mosi_w_pads[] = { + IOMUX_PAD_CTRL(CSI0_DAT9__ECSPI2_MOSI, SPI_PAD_CTRL), +}; + +static iomux_v3_cfg_t const spi_ss0_pad[] = { + IOMUX_PAD_CTRL(CSI0_DAT11__ECSPI2_SS0, SPI_PAD_CTRL), +}; + +static iomux_v3_cfg_t const spi_ss0_gpio_pad[] = { + IOMUX_PAD_CTRL(CSI0_DAT11__GPIO5_IO29, SPI_PAD_CTRL), +}; + +static iomux_v3_cfg_t const spi_display_pads[] = { + /* ECSPI2 */ + IOMUX_PAD_CTRL(CSI0_DAT8__ECSPI2_SCLK, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT9__ECSPI2_MOSI, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT10__ECSPI2_MISO, SPI_PAD_CTRL), +#define GP_ECSPI2_CS IMX_GPIO_NR(5, 29) + IOMUX_PAD_CTRL(CSI0_DAT11__GPIO5_IO29, SPI_PAD_CTRL), +#define GP_SPI_DISPLAY_RESET IMX_GPIO_NR(4, 20) + IOMUX_PAD_CTRL(DI0_PIN4__GPIO4_IO20, SPI_PAD_CTRL), +#define GP_BACKLIGHT IMX_GPIO_NR(1, 21) /* PWM1 */ + IOMUX_PAD_CTRL(SD1_DAT3__GPIO1_IO21, SPI_PAD_CTRL), + + /* DI0 */ + IOMUX_PAD_CTRL(DI0_DISP_CLK__IPU1_DI0_DISP_CLK, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DI0_PIN15__IPU1_DI0_PIN15, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DI0_PIN2__IPU1_DI0_PIN02, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DI0_PIN3__IPU1_DI0_PIN03, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT0__IPU1_DISP0_DATA00, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT1__IPU1_DISP0_DATA01, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT2__IPU1_DISP0_DATA02, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT3__IPU1_DISP0_DATA03, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT4__IPU1_DISP0_DATA04, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT5__IPU1_DISP0_DATA05, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT6__IPU1_DISP0_DATA06, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT7__IPU1_DISP0_DATA07, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT8__IPU1_DISP0_DATA08, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT9__IPU1_DISP0_DATA09, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT10__IPU1_DISP0_DATA10, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT11__IPU1_DISP0_DATA11, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT12__IPU1_DISP0_DATA12, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT13__IPU1_DISP0_DATA13, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT14__IPU1_DISP0_DATA14, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT15__IPU1_DISP0_DATA15, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT16__IPU1_DISP0_DATA16, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT17__IPU1_DISP0_DATA17, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT18__IPU1_DISP0_DATA18, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT19__IPU1_DISP0_DATA19, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT20__IPU1_DISP0_DATA20, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT21__IPU1_DISP0_DATA21, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT22__IPU1_DISP0_DATA22, DI0_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT23__IPU1_DISP0_DATA23, DI0_PAD_CTRL), +}; + +static int AUO_G050_spi_write_rtn(struct spi_slave *spi, u8 *cmds) +{ + u8 buf[4]; + int ret = 0; + + debug("%s\n", __func__); + while (1) { + uint reg = (cmds[0] << 8) | cmds[1]; + uint len = cmds[2]; + + if (!len && !reg) + break; + cmds += 3; + do { + buf[0] = 0x20; + buf[1] = reg >> 8; + ret = spi_xfer(spi, 2 * 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to select reg1 0x%x, %d\n", __func__, reg, ret); + return ret; + } + udelay(2); + buf[0] = 0; + buf[1] = reg; + ret = spi_xfer(spi, 2 * 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to select reg2 0x%x, %d\n", __func__, reg, ret); + return ret; + } + udelay(2); + if (!len) { + debug("spi: reg:%04x\n", reg); + break; + } + buf[0] = 0x40; + buf[1] = *cmds++; + ret = spi_xfer(spi, 2 * 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to select reg3 0x%x, %d\n", __func__, reg, ret); + return ret; + } + debug("spi: reg:%04x %02x\n", reg, buf[1]); + udelay(2); + reg++; + } while (--len); + } + return ret; +} + +static int AUO_G050_spi_read_rtn(struct spi_slave *spi, int reg) +{ + u8 buf[4]; + u8 rbuf[4]; + int ret = 0; + + buf[0] = 0x20; + buf[1] = reg >> 8; + ret = spi_xfer(spi, 2 * 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to select reg1 0x%x, %d\n", __func__, reg, ret); + return ret; + } + udelay(2); + buf[0] = 0; + buf[1] = reg; + ret = spi_xfer(spi, 2 * 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to select reg2 0x%x, %d\n", __func__, reg, ret); + return ret; + } + udelay(2); + buf[0] = 0xC0; + buf[1] = 0xff; + ret = spi_xfer(spi, 2 * 8, buf, rbuf, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed to select reg3 0x%x, %d\n", __func__, reg, ret); + return ret; + } + debug("spi: reg:0x%04x: %02x %02x\n", reg, rbuf[0], rbuf[1]); + udelay(2); + return rbuf[1]; +} + +#define A(reg, cnt) (reg >> 8), (reg & 0xff), cnt + +static u8 AUO_G050_display_init_cmds[] = { +/* Display Mode Setting */ + A(0xf000, 5), 0x55, 0xaa, 0x52, 0x08, 0x00, + A(0xb100, 2), 0x0c, 0x00, + A(0xbc00, 3), 0x05, 0x05, 0x05, + A(0xb700, 2), 0x22, 0x22, + A(0xb800, 4), 0x01, 0x03, 0x03, 0x03, + A(0xc803, 1), 0x96, + A(0xc805, 1), 0x96, + A(0xc807, 1), 0x96, + A(0xc809, 1), 0x96, + A(0xc80b, 1), 0x2a, + A(0xc80c, 1), 0x2a, + A(0xc80f, 1), 0x2a, + A(0xc810, 1), 0x2a, + A(0xf000, 5), 0x55, 0xaa, 0x52, 0x08, 0x01, + A(0xb900, 3), 0x34, 0x34, 0x34, + A(0xba00, 3), 0x14, 0x14, 0x14, + A(0xbe00, 2), 0x00, 0x8c, + A(0xb000, 3), 0x00, 0x00, 0x00, + A(0xb800, 3), 0x24, 0x24, 0x24, + A(0xbc00, 3), 0x00, 0x88, 0x01, + A(0xbd00, 3), 0x00, 0x88, 0x01, + A(0xd100, 52), 0x00, 0x00, 0x00, 0x10, 0x00, 0x31, 0x00, 0x5a, 0x00, 0x78, 0x00, 0x9b, 0x00, 0xbe, 0x00, 0xe6, 0x01, 0x04, + 0x01, 0x36, 0x01, 0x59, 0x01, 0x90, 0x01, 0xbd, 0x01, 0xbe, 0x01, 0xe5, 0x02, 0x0d, 0x02, 0x29, 0x02, 0x44, + 0x02, 0x5d, 0x02, 0xbc, 0x02, 0xe9, 0x03, 0x16, 0x03, 0x48, 0x03, 0xac, 0x03, 0xe8, 0x03, 0xff, + A(0xd200, 52), 0x00, 0x00, 0x00, 0x10, 0x00, 0x31, 0x00, 0x5a, 0x00, 0x78, 0x00, 0x9b, 0x00, 0xbe, 0x00, 0xe6, 0x01, 0x04, + 0x01, 0x36, 0x01, 0x59, 0x01, 0x90, 0x01, 0xbd, 0x01, 0xbe, 0x01, 0xe5, 0x02, 0x0d, 0x02, 0x29, 0x02, 0x44, + 0x02, 0x5d, 0x02, 0xbc, 0x02, 0xe9, 0x03, 0x16, 0x03, 0x48, 0x03, 0xac, 0x03, 0xe8, 0x03, 0xff, + A(0xd300, 52), 0x00, 0x00, 0x00, 0x10, 0x00, 0x31, 0x00, 0x5a, 0x00, 0x78, 0x00, 0x9b, 0x00, 0xbe, 0x00, 0xe6, 0x01, 0x04, + 0x01, 0x36, 0x01, 0x59, 0x01, 0x90, 0x01, 0xbd, 0x01, 0xbe, 0x01, 0xe5, 0x02, 0x0d, 0x02, 0x29, 0x02, 0x44, + 0x02, 0x5d, 0x02, 0xbc, 0x02, 0xe9, 0x03, 0x16, 0x03, 0x48, 0x03, 0xac, 0x03, 0xe8, 0x03, 0xff, + A(0xd400, 52), 0x00, 0x00, 0x00, 0x10, 0x00, 0x31, 0x00, 0x5a, 0x00, 0x78, 0x00, 0x9b, 0x00, 0xbe, 0x00, 0xe6, 0x01, 0x04, + 0x01, 0x36, 0x01, 0x59, 0x01, 0x90, 0x01, 0xbd, 0x01, 0xbe, 0x01, 0xe5, 0x02, 0x0d, 0x02, 0x29, 0x02, 0x44, + 0x02, 0x5d, 0x02, 0xbc, 0x02, 0xe9, 0x03, 0x16, 0x03, 0x48, 0x03, 0xac, 0x03, 0xe8, 0x03, 0xff, + A(0xd500, 52), 0x00, 0x00, 0x00, 0x10, 0x00, 0x31, 0x00, 0x5a, 0x00, 0x78, 0x00, 0x9b, 0x00, 0xbe, 0x00, 0xe6, 0x01, 0x04, + 0x01, 0x36, 0x01, 0x59, 0x01, 0x90, 0x01, 0xbd, 0x01, 0xbe, 0x01, 0xe5, 0x02, 0x0d, 0x02, 0x29, 0x02, 0x44, + 0x02, 0x5d, 0x02, 0xbc, 0x02, 0xe9, 0x03, 0x16, 0x03, 0x48, 0x03, 0xac, 0x03, 0xe8, 0x03, 0xff, + A(0xd600, 52), 0x00, 0x00, 0x00, 0x10, 0x00, 0x31, 0x00, 0x5a, 0x00, 0x78, 0x00, 0x9b, 0x00, 0xbe, 0x00, 0xe6, 0x01, 0x04, + 0x01, 0x36, 0x01, 0x59, 0x01, 0x90, 0x01, 0xbd, 0x01, 0xbe, 0x01, 0xe5, 0x02, 0x0d, 0x02, 0x29, 0x02, 0x44, + 0x02, 0x5d, 0x02, 0xbc, 0x02, 0xe9, 0x03, 0x16, 0x03, 0x48, 0x03, 0xac, 0x03, 0xe8, 0x03, 0xff, + A(0x1100, 0), /* exit sleep mode, wait 120 ms */ + A(0, 0) +}; + +static u8 AUO_G050_display_on_cmds[] = { + A(0x2900, 0), + A(0, 0) +}; + +/* *************************************************** */ + +static int A030JN01_spi_write_rtn(struct spi_slave *spi, u8 *cmds) +{ + u8 buf[4]; + int ret = 0; + + while (1) { + uint reg = (cmds[0] << 8) | cmds[1]; + uint len = cmds[2]; + + if (!len && !reg) + break; + cmds += 3; + do { + buf[0] = reg + (reg & 0x40); + buf[1] = *cmds++; + ret = spi_xfer(spi, 2 * 8, buf, NULL, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed 0x%x, %d\n", __func__, reg, ret); + return ret; + } + debug("spi: reg:%02x %02x\n", reg, buf[1]); + udelay(2); + reg++; + } while (--len); + } + return ret; +} + +static int A030JN01_spi_read_rtn(struct spi_slave *spi, int reg) +{ + u8 buf[4]; + u8 rbuf[4]; + int ret = 0; + + buf[0] = (reg + (reg & 0x40)) | 0x40; + buf[1] = 0xff; + ret = spi_xfer(spi, 2 * 8, buf, rbuf, SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("%s: Failed 0x%x, %d\n", __func__, reg, ret); + return ret; + } + debug("spi: reg:0x%02x: %02x %02x\n", reg, rbuf[0], rbuf[1]); + return rbuf[1]; +} + +static u8 A030JN01_display_YUV720_init_cmds[] = { +/* Display Mode Setting */ + A(4, 2), 0x6b, 0x5f, + A(0, 0) +}; + +static u8 A030JN01_display_UPS051_init_cmds[] = { + A(5, 1), 0x5f, + A(0, 0) +}; + +static u8 A030JN01_display_on_cmds[] = { + A(0, 0) +}; + +struct spi_display_info { + int mode; + int speed_r; + int speed_w; + int reset_active_low; + u8 *init_cmds; + u8 *on_cmds; + int (*spi_write_rtn)(struct spi_slave *spi, u8 *cmds); + int (*spi_read_rtn)(struct spi_slave *spi, int reg); +}; + +struct spi_display_info spi_di[] = { + { .mode = SPI_MODE_0, .speed_r = 10000, .speed_w = 1000000, .reset_active_low = 1, + .init_cmds = AUO_G050_display_init_cmds, .on_cmds = AUO_G050_display_on_cmds, + .spi_write_rtn = AUO_G050_spi_write_rtn, .spi_read_rtn = AUO_G050_spi_read_rtn}, + { .mode = SPI_MODE_3, .speed_r = 10000, .speed_w = 10000, .reset_active_low = 1, + .init_cmds = A030JN01_display_YUV720_init_cmds, .on_cmds = A030JN01_display_on_cmds, + .spi_write_rtn = A030JN01_spi_write_rtn, .spi_read_rtn = A030JN01_spi_read_rtn}, + { .mode = SPI_MODE_3, .speed_r = 10000, .speed_w = 10000, .reset_active_low = 1, + .init_cmds = A030JN01_display_UPS051_init_cmds, .on_cmds = A030JN01_display_on_cmds, + .spi_write_rtn = A030JN01_spi_write_rtn, .spi_read_rtn = A030JN01_spi_read_rtn}, +}; + +const struct display_info_t *g_dev; + +/* + * Return 1 for successful detection of display + */ +int detect_spi(struct display_info_t const *dev) +{ + return 1; +} + +static void init_spi(struct display_info_t const *dev) +{ + unsigned cs_gpio = GP_ECSPI2_CS; + unsigned reset_gpio = GP_SPI_DISPLAY_RESET; + struct spi_display_info *di = &spi_di[dev->addr]; + int reset_val = di->reset_active_low ? 0 : 1; + + debug("%s\n", __func__); + gpio_direction_output(cs_gpio, 1); + gpio_direction_output(reset_gpio, reset_val ^ 1); + SETUP_IOMUX_PADS(spi_display_pads); + gpio_direction_output(reset_gpio, reset_val); + udelay(200); + gpio_direction_output(reset_gpio, reset_val ^ 1); + mdelay(200); +} + +void enable_spi_rgb(struct display_info_t const *dev) +{ + unsigned cs_gpio = GP_ECSPI2_CS; + struct spi_slave *spi; + int ret; + struct spi_display_info *di = &spi_di[dev->addr]; + + g_dev = dev; + init_spi(dev); + gpio_direction_output(GP_BACKLIGHT, 1); + gpio_direction_output(cs_gpio, 1); + + enable_spi_clk(1, dev->bus); + + /* Setup spi_slave */ + spi = spi_setup_slave(dev->bus, 0, di->speed_w, di->mode); + if (!spi) { + printf("%s: Failed to set up slave\n", __func__); + return; + } + + /* Claim spi bus */ + ret = spi_claim_bus(spi); + if (ret) { + debug("%s: Failed to claim SPI bus: %d\n", __func__, ret); + goto free_bus; + } + + /* + * Initialization sequence + * 1. Display Mode Settings + * 2. Power Settings + * 3. Gamma Settings + * 4. Sleep Out + * 5. Wait >= 7 frame + * 6. Display on + */ + SETUP_IOMUX_PADS(spi_ss0_pad); + ret = di->spi_write_rtn(spi, di->init_cmds); + if (ret) { + printf("%s: Failed to display_init_cmds %d\n", __func__, ret); + goto release_bus; + } + mdelay(200); + ret = di->spi_write_rtn(spi, di->on_cmds); + if (ret) { + printf("%s: Failed to display_on_cmds %d\n", __func__, ret); + goto release_bus; + } + ret = 1; + SETUP_IOMUX_PADS(spi_ss0_gpio_pad); + + /* Release spi bus */ +release_bus: + spi_release_bus(spi); +free_bus: + spi_free_slave(spi); + enable_spi_clk(0, dev->bus); + return; +} + +static int do_spid(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unsigned cs_gpio = GP_ECSPI2_CS; + struct spi_slave *spi; + int display_index = g_dev ? g_dev->addr : 0; + int bus = g_dev ? g_dev->bus : 1; + struct spi_display_info *di = &spi_di[display_index]; + int ret = 0; + int arg = 2; + uint reg; + u8 buf[80]; + + if (argc < 2) + return 1; + gpio_direction_output(GP_BACKLIGHT, 1); + gpio_direction_output(cs_gpio, 1); + SETUP_IOMUX_PADS(spi_mosi_w_pads); + + enable_spi_clk(1, bus); + + /* Setup spi_slave */ + spi = spi_setup_slave(bus, 0, di->speed_w, di->mode); + if (!spi) { + printf("%s: Failed to set up slave\n", __func__); + return 1; + } + + /* Claim spi bus */ + ret = spi_claim_bus(spi); + if (ret) { + debug("%s: Failed to claim SPI bus: %d\n", __func__, ret); + goto free_bus; + } + + if (argc > ARRAY_SIZE(buf) - 3) + argc = ARRAY_SIZE(buf) - 3; + + reg = simple_strtoul(argv[1], NULL, 16); + buf[0] = reg >> 8; + buf[1] = reg; + buf[2] = argc - arg; + while (arg < argc) { + buf[arg + 1] = simple_strtoul(argv[arg], NULL, 16); + arg++; + } + arg++; + buf[arg++] = 0; + buf[arg++] = 0; + buf[arg++] = 0; + SETUP_IOMUX_PADS(spi_ss0_pad); + di->spi_write_rtn(spi, buf); + SETUP_IOMUX_PADS(spi_ss0_gpio_pad); + spi_release_bus(spi); +free_bus: + spi_free_slave(spi); + enable_spi_clk(0, bus); + return ret ? 1 : 0; +} + +U_BOOT_CMD( + spid, 70, 0, do_spid, + "write cmd, data to spi display", + "reg16 [byte]" +); + +static int do_spidr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + unsigned cs_gpio = GP_ECSPI2_CS; + struct spi_slave *spi; + int display_index = g_dev ? g_dev->addr : 0; + int bus = g_dev ? g_dev->bus : 1; + struct spi_display_info *di = &spi_di[display_index]; + int ret = 0; + uint reg; + int val; + + if (argc != 2) + return CMD_RET_USAGE; + gpio_direction_output(GP_BACKLIGHT, 1); + gpio_direction_output(cs_gpio, 1); + SETUP_IOMUX_PADS(spi_mosi_r_pads); + + enable_spi_clk(1, bus); + + /* Setup spi_slave */ + spi = spi_setup_slave(bus, 0, di->speed_r, di->mode); + if (!spi) { + printf("%s: Failed to set up slave\n", __func__); + return 1; + } + + /* Claim spi bus */ + ret = spi_claim_bus(spi); + if (ret) { + debug("%s: Failed to claim SPI bus: %d\n", __func__, ret); + goto free_bus; + } + + reg = simple_strtoul(argv[1], NULL, 16); + SETUP_IOMUX_PADS(spi_ss0_pad); + val = di->spi_read_rtn(spi, reg); + SETUP_IOMUX_PADS(spi_ss0_gpio_pad); + printf("spidr: reg:0x%x = 0x%x\n", reg, val); + spi_release_bus(spi); +free_bus: + spi_free_slave(spi); + enable_spi_clk(0, bus); + return ret ? 1 : 0; +} + +U_BOOT_CMD( + spidr, 70, 0, do_spidr, + "read spi display register", + "reg16" +); diff --git a/board/boundary/nitrogen6x/spi_display.h b/board/boundary/nitrogen6x/spi_display.h new file mode 100644 index 0000000..e59275d --- /dev/null +++ b/board/boundary/nitrogen6x/spi_display.h @@ -0,0 +1,2 @@ +int detect_spi(struct display_info_t const *dev); +void enable_spi_rgb(struct display_info_t const *dev); diff --git a/board/boundary/nw/800mhz_2x256mx16.cfg b/board/boundary/nw/800mhz_2x256mx16.cfg new file mode 100644 index 0000000..882600f --- /dev/null +++ b/board/boundary/nw/800mhz_2x256mx16.cfg @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + */ +DATA 4, MX6_MMDC_P0_MDPDC, 0x0002002D +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 +DATA 4, MX6_MMDC_P0_MDCFG0, 0x696C5323 +DATA 4, MX6_MMDC_P0_MDCFG1, 0xB66E8D63 +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB +DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 +DATA 4, MX6_MMDC_P0_MDOR, 0x006C1023 +DATA 4, MX6_MMDC_P0_MDOTC, 0x00333030 +DATA 4, MX6_MMDC_P0_MDPDC, 0x0002556D +DATA 4, MX6_MMDC_P0_MDASP, 0x00000027 +DATA 4, MX6_MMDC_P0_MDCTL, 0x84190000 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00048031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x13208030 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P0_MDREF, 0x00007800 +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x430e0320 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x03040303 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4b46494a +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x383c4843 +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001c0018 +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x001e001d +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/boundary/nw/Kconfig b/board/boundary/nw/Kconfig new file mode 100644 index 0000000..0b73672 --- /dev/null +++ b/board/boundary/nw/Kconfig @@ -0,0 +1,18 @@ +if TARGET_NW + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "nw" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "nw" + +endif diff --git a/board/boundary/nw/MAINTAINERS b/board/boundary/nw/MAINTAINERS new file mode 100644 index 0000000..a6ad879 --- /dev/null +++ b/board/boundary/nw/MAINTAINERS @@ -0,0 +1,8 @@ +NW BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/nw/ +F: include/configs/nw.h +F: configs/nw_defconfig +F: configs/nw2_defconfig + diff --git a/board/boundary/nw/Makefile b/board/boundary/nw/Makefile new file mode 100644 index 0000000..0699e08 --- /dev/null +++ b/board/boundary/nw/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := nw.o diff --git a/board/boundary/nw/nw.c b/board/boundary/nw/nw.c new file mode 100644 index 0000000..244431d --- /dev/null +++ b/board/boundary/nw/nw.c @@ -0,0 +1,426 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDOWN (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); + + return 0; +} + +static iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const uart2_pads[] = { + MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +/* I2C1: RTC */ +static struct i2c_pads_info i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}; + +/* I2C2 Camera, MIPI */ +static struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}; + +/* I2C3, J15 - RGB connector */ +static struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC, + .gp = IMX_GPIO_NR(7, 11) + } +}; + +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +#ifndef CONFIG_REV2 +static iomux_v3_cfg_t const usdhc3_pads[] = { + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; +#else +static iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +#define GP_EMMC_RESET IMX_GPIO_NR(2, 5) + NEW_PAD_CTRL(MX6_PAD_NANDF_D5__GPIO2_IO05, WEAK_PULLUP), /* RESET */ +}; +#endif + +/* WiFi/BT pads */ +static iomux_v3_cfg_t const wifi_pads[] = { + (MX6_PAD_NANDF_CS1__GPIO6_IO14 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(WEAK_PULLDOWN), + (MX6_PAD_NANDF_CS2__GPIO6_IO15 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), + (MX6_PAD_NANDF_CS3__GPIO6_IO16 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), + (MX6_PAD_NANDF_CLE__GPIO6_IO07 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), +}; +#define WIFI_WL_ENABLE_GP IMX_GPIO_NR(6, 7) +#define WIFI_WL_IRQ_GP IMX_GPIO_NR(6, 14) +#define WIFI_BT_REG_ON IMX_GPIO_NR(6, 15) +#define WIFI_BT_ENABLE_GP IMX_GPIO_NR(6, 16) + +static iomux_v3_cfg_t const usb_pads[] = { + MX6_PAD_KEY_ROW4__GPIO4_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_EIM_D22__GPIO3_IO22, WEAK_PULLUP), /* usbotg power */ + NEW_PAD_CTRL(MX6_PAD_GPIO_1__USB_OTG_ID, USDHC_PAD_CTRL), /* USBOTG ID pin */ + MX6_PAD_KEY_COL4__USB_OTG_OC, /* USBOTG OC pin */ +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); + imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + /* Reset USB hub */ + gpio_direction_output(IMX_GPIO_NR(4, 15), 0); + mdelay(2); + gpio_set_value(IMX_GPIO_NR(4, 15), 1); + + return 0; +} + +int board_ehci_power(int port, int on) +{ + if (port) + return 0; + gpio_set_value(GP_USB_OTG_PWR, on); + return 0; +} + +#endif + +#ifdef CONFIG_FSL_ESDHC + +int board_mmc_getcd(struct mmc *mmc) +{ + int ret; + +#if !defined(CONFIG_REV2) + gpio_direction_input(IMX_GPIO_NR(7, 0)); + ret = !gpio_get_value(IMX_GPIO_NR(7, 0)); +#else + ret = 1; +#endif + return ret; +} + +static struct fsl_esdhc_cfg usdhc_cfg = { +#if !defined(CONFIG_REV2) + .esdhc_base = USDHC3_BASE_ADDR, + .max_bus_width = 4 +#else + .esdhc_base = USDHC4_BASE_ADDR, + .max_bus_width = 8 +#endif +}; + +int board_mmc_init(bd_t *bis) +{ + printf("%s:\n", __func__ ); +#if !defined(CONFIG_REV2) + usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); +#else + gpio_direction_output(GP_EMMC_RESET, 1); + usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); +#endif + return fsl_esdhc_initialize(bis, &usdhc_cfg); +} +#endif + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -1; +} + +static iomux_v3_cfg_t const ecspi1_pads[] = { + /* SS1 */ + MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; + +static void setup_spi(void) +{ + gpio_direction_output(CONFIG_SF_DEFAULT_CS, 1); + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, + ARRAY_SIZE(ecspi1_pads)); +} +#endif + +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) { + return -1; + } + + env_loadsplash = getenv("loadsplash"); + if (env_loadsplash == NULL) { + printf("Environment variable loadsplash not found!\n"); + return -1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("failed to run loadsplash %s\n\n", env_loadsplash); + } + + return 0; +} + +#if defined(CONFIG_VIDEO_IPUV3) + +const struct display_info_t displays[] = { + /* hdmi */ + IMX_VD50_1280_720M_60(HDMI, 1, 1), + IMX_VD50_1920_1080M_60(HDMI, 0, 1), + IMX_VD50_1024_768M_60(HDMI, 0, 1), +}; + +size_t display_count = ARRAY_SIZE(displays); + +static void setup_display(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + int reg; + + reg = readl(&mxc_ccm->chsccdr); + reg &= ~(MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK + |MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK); + reg |= (CHSCCDR_IPU_PRE_CLK_540M_PFD << MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_OFFSET) | + (CHSCCDR_PODF_DIVIDE_BY_3 << MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET); + writel(reg, &mxc_ccm->chsccdr); +} +#endif + +int board_early_init_f(void) +{ + setup_iomux_uart(); +#ifdef CONFIG_REV2 + gpio_direction_output(GP_EMMC_RESET, 0); + imx_iomux_v3_setup_multiple_pads( + usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); +#else + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); +#endif + imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); + + /* Disable WiFi/BT */ + gpio_direction_input(WIFI_WL_IRQ_GP); + gpio_direction_output(WIFI_WL_ENABLE_GP, 0); + gpio_direction_output(WIFI_BT_ENABLE_GP, 0); + gpio_direction_output(WIFI_BT_REG_ON, 0); + + imx_iomux_v3_setup_multiple_pads(wifi_pads, ARRAY_SIZE(wifi_pads)); + +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); + setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_eth_init(bd_t *bis) +{ +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + +int board_init(void) +{ + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_MXC_SPI + setup_spi(); +#endif + imx_iomux_v3_setup_multiple_pads( + usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + + return 0; +} + +int checkboard(void) +{ +#ifndef CONFIG_REV2 + puts("Board: Boundary NW board\n"); +#else + puts("Board: Boundary NW board - Rev2\n"); +#endif + return 0; +} + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "nw"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/nw/nw.cfg b/board/boundary/nw/nw.cfg new file mode 100644 index 0000000..c63a006 --- /dev/null +++ b/board/boundary/nw/nw.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "../nitrogen6x/ddr-setup.cfg" +#include "800mhz_2x256mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/oc/6x_bootscript-yocto.txt b/board/boundary/oc/6x_bootscript-yocto.txt new file mode 100644 index 0000000..ac1de6b --- /dev/null +++ b/board/boundary/oc/6x_bootscript-yocto.txt @@ -0,0 +1,126 @@ +# Yocto-specifics +setenv bootpart 2 +setenv bootdir / + +setenv bootargs enable_wait_mode=off +setenv nextcon 0; + +i2c dev 1 ; +if i2c probe 0x50 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24 + setenv fbmem "fbmem=28M"; + setexpr nextcon $nextcon + 1 +else + echo "------ no HDMI monitor"; +fi + +i2c dev 2 +if i2c probe 0x04 ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LDB-XGA,if=RGB666 + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no Freescale display"; +fi + +if i2c probe 0x38 ; then + if itest.s "xLDB-WXGA" == "x$panel"; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1280x800MR@60,if=RGB666 + screenres=1280,800 + else + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1024x600M@60,if=RGB666 + screenres=1024,600 + fi + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 + setenv bootargs $bootargs ft5x06.screenres=$screenres + if itest.s "x" -ne "x$calibration" ; then + setenv bootargs $bootargs ft5x06_ts.calibration=$calibration + fi +else + echo "------ no ft5x06 touch controller"; +fi + +if i2c probe 0x48 ; then + if itest.s "xqvga" == "x$panel" ; then + display="320x240MR@60,if=RGB24"; + else + display="CLAA-WVGA,if=RGB666"; + fi + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=lcd,$display + if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; + else + setenv fbmem ${fbmem},10M + fi + setexpr nextcon $nextcon + 1 +else + echo "------ no 800x480 display"; +fi + +while test "4" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +setenv bootargs $bootargs $fbmem +setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait" + +if itest.s x$bootpart == x ; then + bootpart=1 +fi + +if test "sata" = "${dtype}" ; then + setenv bootargs "$bootargs root=/dev/sda$bootpart" ; +else + setenv bootargs "$bootargs root=/dev/mmcblk0p$bootpart" ; +fi + +dtbname="imx6"; +if itest.s x6S != "x$cpu" ; then + dtbname=${dtbname}q-; +else + dtbname=${dtbname}s-; +fi + +if itest.s x == "x$board" ; then + board=sabrelite +fi +dtbname=${dtbname}${board}.dtb; + +if itest.s x == x${bootdir} ; then + bootdir=/boot/ +fi + +if ${fs}load ${dtype} ${disk}:1 12000000 ${bootdir}$dtbname ; then + havedtb=1; + setenv fdt_addr 0x11000000 + setenv fdt_high 0xffffffff +else + havedtb= +fi + +if itest.s x == x$allow_noncea ; then + setenv bootargs $bootargs mxc_hdmi.only_cea=1; + echo "only CEA modes allowed on HDMI port"; +else + setenv bootargs $bootargs mxc_hdmi.only_cea=0; + echo "non-CEA modes allowed on HDMI, audio may be affected"; +fi + +if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then + if itest.s x$havedtb == x ; then + bootm 10800000 ; + else + bootm 10800000 - 12000000 + fi +fi +echo "Error loading kernel image" diff --git a/board/boundary/oc/6x_bootscript.txt b/board/boundary/oc/6x_bootscript.txt new file mode 100644 index 0000000..1f31718 --- /dev/null +++ b/board/boundary/oc/6x_bootscript.txt @@ -0,0 +1,34 @@ +setenv bootargs enable_wait_mode=off +setenv nextcon 0; + +if test xXGA = "x$panel" ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LDB-XGA,if=RGB24 +else + if test xLDB-WXGA = "x$panel" ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,1280x800MR@60,if=RGB666 + else + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,OC-VGA,if=RGB24 + fi +fi + +setenv nextcon 1 +setenv fbmem "fbmem=10M"; +if hdmidet ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24 + setenv fbmem $fbmem,28M; + setexpr nextcon $nextcon + 1; +else + echo "------ no HDMI monitor"; +fi + +while test "4" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +setenv bootargs $bootargs $fbmem +setenv bootargs $bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 ; +${fs}load ${dtype} ${disk}:1 10800000 /boot/uImage +&& ${fs}load ${dtype} ${disk}:1 12800000 /boot/uramdisk.img +&& bootm 10800000 12800000 ; +echo "Error loading kernel image" diff --git a/board/boundary/oc/Kconfig b/board/boundary/oc/Kconfig new file mode 100644 index 0000000..c63274f --- /dev/null +++ b/board/boundary/oc/Kconfig @@ -0,0 +1,18 @@ +if TARGET_OC + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "oc" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "oc" + +endif diff --git a/board/boundary/oc/MAINTAINERS b/board/boundary/oc/MAINTAINERS new file mode 100644 index 0000000..6766256 --- /dev/null +++ b/board/boundary/oc/MAINTAINERS @@ -0,0 +1,9 @@ +OC BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/oc/ +F: include/configs/oc.h +F: configs/ocquad_defconfig +F: configs/ocsolo_defconfig +F: configs/ocsolo1g_defconfig + diff --git a/board/boundary/oc/Makefile b/board/boundary/oc/Makefile new file mode 100644 index 0000000..ba2deba --- /dev/null +++ b/board/boundary/oc/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := oc.o diff --git a/board/boundary/oc/oc.c b/board/boundary/oc/oc.c new file mode 100644 index 0000000..33350a3 --- /dev/null +++ b/board/boundary/oc/oc.c @@ -0,0 +1,568 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDOWN (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +static iomux_v3_cfg_t const init_pads[] = { + /* WiFi/BT pads */ +#define WIFI_WL_IRQ_GP IMX_GPIO_NR(6, 14) + (MX6_PAD_NANDF_CS1__GPIO6_IO14 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(WEAK_PULLDOWN), +#define WIFI_BT_REG_ON IMX_GPIO_NR(6, 15) + (MX6_PAD_NANDF_CS2__GPIO6_IO15 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), +#define WIFI_BT_ENABLE_GP IMX_GPIO_NR(6, 16) + (MX6_PAD_NANDF_CS3__GPIO6_IO16 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), +#define WIFI_WL_ENABLE_GP IMX_GPIO_NR(6, 7) + (MX6_PAD_NANDF_CLE__GPIO6_IO07 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), + + /* PWM on LVDS connector: J6 */ +#define LVDS_BACKLIGHT_PWM IMX_GPIO_NR(1, 18) + MX6_PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* Backlight on LVDS connector: J6 */ +#define LVDS_BACKLIGHT_EN IMX_GPIO_NR(1, 17) + MX6_PAD_SD1_DAT1__GPIO1_IO17 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); + + return 0; +} + +static iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const uart2_pads[] = { + MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +/* I2C1, SGTL5000 */ +static struct i2c_pads_info i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}; + +/* I2C2 Camera, MIPI */ +static struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}; + +/* I2C3, J15 - RGB connector */ +static struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC, + .gp = IMX_GPIO_NR(7, 11) + } +}; + +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc3_pads[] = { + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +static iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D5__GPIO2_IO05 | MUX_PAD_CTRL(NO_PAD_CTRL), /* RESET */ +}; + +static iomux_v3_cfg_t const enet_pads1[] = { + MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), + /* pin 35 - 1 (PHY_AD2) on reset */ + MX6_PAD_RGMII_RXC__GPIO6_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 32 - 1 - (MODE0) all */ + MX6_PAD_RGMII_RD0__GPIO6_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 31 - 1 - (MODE1) all */ + MX6_PAD_RGMII_RD1__GPIO6_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 28 - 1 - (MODE2) all */ + MX6_PAD_RGMII_RD2__GPIO6_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 27 - 1 - (MODE3) all */ + MX6_PAD_RGMII_RD3__GPIO6_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + MX6_PAD_RGMII_RX_CTL__GPIO6_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 42 PHY nRST */ + MX6_PAD_EIM_D23__GPIO3_IO23 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static iomux_v3_cfg_t const enet_pads2[] = { + MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), +}; + +static void setup_iomux_enet(void) +{ + gpio_direction_output(IMX_GPIO_NR(1, 27), 0); /* PHY rst */ + gpio_direction_output(IMX_GPIO_NR(6, 30), 1); + gpio_direction_output(IMX_GPIO_NR(6, 25), 1); + gpio_direction_output(IMX_GPIO_NR(6, 27), 1); + gpio_direction_output(IMX_GPIO_NR(6, 28), 1); + gpio_direction_output(IMX_GPIO_NR(6, 29), 1); + imx_iomux_v3_setup_multiple_pads(enet_pads1, ARRAY_SIZE(enet_pads1)); + gpio_direction_output(IMX_GPIO_NR(6, 24), 1); + + /* Need delay 10ms according to KSZ9021 spec */ + udelay(1000 * 10); + gpio_set_value(IMX_GPIO_NR(1, 27), 1); /* PHY reset */ + + imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2)); +} + +static iomux_v3_cfg_t const usb_pads[] = { + MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_EIM_D22__GPIO3_IO22, WEAK_PULLUP), /* usbotg power */ +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); + imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); +} + +int board_ehci_power(int port, int on) +{ + if (port) + return 0; + gpio_set_value(GP_USB_OTG_PWR, on); + return 0; +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); + + /* Reset USB hub */ + gpio_direction_output(IMX_GPIO_NR(7, 12), 0); + mdelay(2); + gpio_set_value(IMX_GPIO_NR(7, 12), 1); + + return 0; +} +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC3_BASE_ADDR}, + {USDHC4_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret; + + if (cfg->esdhc_base == USDHC3_BASE_ADDR) { + gpio_direction_input(IMX_GPIO_NR(7, 0)); + ret = !gpio_get_value(IMX_GPIO_NR(7, 0)); + } else + ret = 1; /* eMMC is always present */ + + return ret; +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].max_bus_width = 8; + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + break; + case 1: + imx_iomux_v3_setup_multiple_pads( + usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + gpio_direction_output(IMX_GPIO_NR(2, 5), 1); /* de-assert nRESET */ + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -1; +} + +static iomux_v3_cfg_t const ecspi1_pads[] = { + /* SS1 */ + MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; + +static void setup_spi(void) +{ + gpio_direction_output(CONFIG_SF_DEFAULT_CS, 1); + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, + ARRAY_SIZE(ecspi1_pads)); +} +#endif + +int board_phy_config(struct phy_device *phydev) +{ + /* min rx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0); + /* min tx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0); + /* max rx/tx clock delay, min rx/tx control */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0); + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + +#ifdef CONFIG_FEC_MXC + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + /* scan phy 4,5,6,7 */ + phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } +#endif + +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + +#if defined(CONFIG_VIDEO_IPUV3) + +void board_enable_lvds(const struct display_info_t *di) +{ + gpio_direction_output(LVDS_BACKLIGHT_PWM, 1); + gpio_direction_output(LVDS_BACKLIGHT_EN, 1); +} + +const struct display_info_t displays[] = { + /* hdmi */ + IMX_VD50_1280_720M_60(HDMI, 1, 1), + IMX_VD50_1920_1080M_60(HDMI, 0, 1), + IMX_VD50_1024_768M_60(HDMI, 0, 1), + + /* egalax_ts */ + IMX_VD04_HANNSTAR(LVDS, 1, 2), + + IMX_VD_VGA(LVDS, 0, 0), + IMX_VD_WXGA_J(LVDS, 0, 0), +}; + +size_t display_count = ARRAY_SIZE(displays); + +static void setup_display(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + int reg; + + reg = readl(&mxc_ccm->chsccdr); + reg &= ~(MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK + |MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK); + reg |= (CHSCCDR_IPU_PRE_CLK_540M_PFD << MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_OFFSET) | + (CHSCCDR_PODF_DIVIDE_BY_3 << MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET); + writel(reg, &mxc_ccm->chsccdr); +} +#endif + +static unsigned gpios_out_low[] = { + /* Disable wifi */ + WIFI_WL_ENABLE_GP, + WIFI_BT_ENABLE_GP, + WIFI_BT_REG_ON, +}; + +static unsigned short gpios_in[] = { + LVDS_BACKLIGHT_PWM, + LVDS_BACKLIGHT_EN, + WIFI_WL_IRQ_GP, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads)); + +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); + setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +static iomux_v3_cfg_t const i2c0_mux_pads[] = { + MX6_PAD_EIM_D20__GPIO3_IO20 | MUX_PAD_CTRL(I2C_PAD_CTRL), /* CAM */ + MX6_PAD_EIM_CS0__GPIO2_IO23 |MUX_PAD_CTRL(I2C_PAD_CTRL) /* RTC */ +}; + +int board_init(void) +{ + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_MXC_SPI + setup_spi(); +#endif + imx_iomux_v3_setup_multiple_pads(usdhc2_pads, + ARRAY_SIZE(usdhc2_pads)); + imx_iomux_v3_setup_multiple_pads(i2c0_mux_pads, + ARRAY_SIZE(i2c0_mux_pads)); + gpio_direction_output(IMX_GPIO_NR(3,20),0); + gpio_direction_output(IMX_GPIO_NR(2,23),1); /* enable RTC */ + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + +#ifdef CONFIG_CMD_SATA + setup_sata(); +#endif + + return 0; +} + +int checkboard(void) +{ + puts("Board: Boundary OC\n"); + + return 0; +} + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "oc"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/oc/ocquad.cfg b/board/boundary/oc/ocquad.cfg new file mode 100644 index 0000000..963929a --- /dev/null +++ b/board/boundary/oc/ocquad.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "../nitrogen6x/ddr-setup.cfg" +#include "../nitrogen6x/1066mhz_4x128mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/oc/ocsolo.cfg b/board/boundary/oc/ocsolo.cfg new file mode 100644 index 0000000..008902b --- /dev/null +++ b/board/boundary/oc/ocsolo.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "../nitrogen6x/ddr-setup.cfg" +#include "../nitrogen6x/800mhz_2x256mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/oc/ocsolo1g.cfg b/board/boundary/oc/ocsolo1g.cfg new file mode 100644 index 0000000..008902b --- /dev/null +++ b/board/boundary/oc/ocsolo1g.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "../nitrogen6x/ddr-setup.cfg" +#include "../nitrogen6x/800mhz_2x256mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/per/1066mhz_2x512mx16.cfg b/board/boundary/per/1066mhz_2x512mx16.cfg new file mode 100644 index 0000000..df915e9 --- /dev/null +++ b/board/boundary/per/1066mhz_2x512mx16.cfg @@ -0,0 +1,100 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ +/* + * MT41K512M16TNA-125:E + * 15 row + 3 bank + 10 col + 1 rank + 2 width = 31 = 2 GB + * tRCD 13125 ps + * tRP 13125 ps + * tCL 13125 ps + * 528M DDR clock = .528G = 1893.9ps/clocks + * 13125ps / 1893.9ps/clocks = 6.93 clocks + */ + +DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036 /* them 25576 */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 +/* + * tRFC:0x89:138 clocks (260000/1893.9) + * tXS:0x8e:143 clocks (270000/1893.9) + * tXP:b'011': 4 clocks (6000/1893.9) + * tXPDLL:b'1100': 13 clocks (24000/1893.9) + * tFAW:b'11010': 27 clocks (50000/1893.9) + * tCL:b'0100': 7 clocks (13125/1893.9) + */ +DATA 4, MX6_MMDC_P0_MDCFG0, 0x898E79a4 /* them 555A7975 */ +/* + * tRCD:b'110': 7 clocks (13125/1893.9) + * tRP:b'110': 7 clocks (13125/1893.9) + * tRC:b'11010': 27 clocks (50625/1893.9) + * tRAS:b'10011': 20 clocks (37500/1893.9) + * tRPA:b'1': 8 clocks (tRP[+1]) 7 + * tWR:b'111': 8 clocks (15000/1893.9) + * tMRD:b'1011': 12 clocks (min 4 clocks)4 + * tCWL:b'100': 6 clocks (tCL-1) + */ +DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64 /* them FF538E64 */ +/* + * tDLLK:0x1ff, 512 clocks (Jedec for DDR3) + * tRTP:b'011': 4 clocks (7500/1893.9) + * tWTR:same bank b'011': 4 clocks (7500/1893.9) + * tRRD:b'101': 6 clocks (10000/1893.9) + */ +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DD +/* + * RTW_SAME: 2 cycles, + * WTR_DIFF: 3 cycles, + * WTW_DIFF: 3 cycles, + * RTW_DIFF: 2 cycles, + * RTR_DIFF: 2 cycles + */ +DATA 4, MX6_MMDC_P0_MDRWD, 0x0f9f26d2 +/* + * tXPR:0x8e: 143 cycles, (270000/1893.9) + * SDE_to_RST:0x10: 14 cycles, (Jedec) + * RST_to_CKE:0x23: 33 cycles (Jedec) + */ +DATA 4, MX6_MMDC_P0_MDOR, 0x008E1023 /* them 005B0E21 */ +DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040 +DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576 +/* end of CS0 is 0x50000000-1 */ +DATA 4, MX6_MMDC_P0_MDASP, 0x00000027 +/* row:15 bits DSIZ=32 bits*/ +DATA 4, MX6_MMDC_P0_MDCTL, 0xC4190000 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x0408803a +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 +DATA 4, MX6_MMDC_P0_MDSCR, 0x0000803b +DATA 4, MX6_MMDC_P0_MDSCR, 0x00428031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00428039 +/* A12 - 1 dll on(fast exit), CAS 7 */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x19308030 /* them 09408030, A12 - 0 dll powrdown, CAS 8 */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x19308038 /* them 09408038 */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008048 +/* force a calibration */ +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 /* them A1380003, no calibration */ +DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 /* them A1380003, no calibration */ +/* 8 refreshes at a time */ +DATA 4, MX6_MMDC_P0_MDREF, 0x00007800 /* them 00005800, 6 refreshes at a time */ +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 + +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x43160328 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x03110303 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x43160328 +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x03110303 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x4a43454b +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x4a43454b +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x36404135 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x36404135 +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x001f0023 +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x0023001f +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x001f0023 +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x0023001f + +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/boundary/per/Kconfig b/board/boundary/per/Kconfig new file mode 100644 index 0000000..7e38b8c --- /dev/null +++ b/board/boundary/per/Kconfig @@ -0,0 +1,18 @@ +if TARGET_PER + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "per" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "per" + +endif diff --git a/board/boundary/per/MAINTAINERS b/board/boundary/per/MAINTAINERS new file mode 100644 index 0000000..c3dcc8e --- /dev/null +++ b/board/boundary/per/MAINTAINERS @@ -0,0 +1,7 @@ +PER BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/per/ +F: include/configs/per.h +F: configs/per_defconfig + diff --git a/board/boundary/per/Makefile b/board/boundary/per/Makefile new file mode 100644 index 0000000..b7eb86f --- /dev/null +++ b/board/boundary/per/Makefile @@ -0,0 +1,10 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := per.o +obj-$(CONFIG_SPL_BUILD) += spl.o diff --git a/board/boundary/per/clocks.cfg b/board/boundary/per/clocks.cfg new file mode 100644 index 0000000..8bddb91 --- /dev/null +++ b/board/boundary/per/clocks.cfg @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* set the default clock gate to save power */ +DATA 4, CCM_CCGR0, 0x00C03F3F +DATA 4, CCM_CCGR1, 0x0030FC03 +DATA 4, CCM_CCGR2, 0x0FFFC000 +DATA 4, CCM_CCGR3, 0x3FF00000 +DATA 4, CCM_CCGR4, 0x00FFF300 +DATA 4, CCM_CCGR5, 0x0F0000C3 +DATA 4, CCM_CCGR6, 0x000003FF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4, MX6_IOMUXC_GPR6, 0x007F007F +DATA 4, MX6_IOMUXC_GPR7, 0x007F007F + +/* + * Setup CCM_CCOSR register as follows: + * + * cko1_en = 1 --> CKO1 enabled + * cko1_div = 111 --> divide by 8 + * cko1_sel = 1011 --> ahb_clk_root + * + * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz + */ +DATA 4, CCM_CCOSR, 0x000000fb diff --git a/board/boundary/per/ddr-setup.cfg b/board/boundary/per/ddr-setup.cfg new file mode 100644 index 0000000..04dffa7 --- /dev/null +++ b/board/boundary/per/ddr-setup.cfg @@ -0,0 +1,96 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* + * DDR3 settings + * MX6Q ddr is limited to 1066 Mhz currently 1056 MHz(528 MHz clock), + * memory bus width: 64 bits x16/x32/x64 + * MX6DL ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 64 bits x16/x32/x64 + * MX6SOLO ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 32 bits x16/x32 + */ +DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030 + +DATA 4, MX6_IOM_GRP_B0DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B1DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B2DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B3DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B4DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B5DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B6DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B7DS, 0x00000030 +DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030 +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ +DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030 + +DATA 4, MX6_IOM_DRAM_DQM0, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM1, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM2, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM3, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM4, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM5, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM6, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM7, 0x00020030 + +DATA 4, MX6_IOM_DRAM_CAS, 0x00020030 +DATA 4, MX6_IOM_DRAM_RAS, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00020030 + +DATA 4, MX6_IOM_DRAM_RESET, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 +DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00003000 + +DATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030 +DATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030 + +/* (differential input) */ +DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000 +/* (differential input) */ +DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000 +/* disable ddr pullups */ +DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000 +DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000 +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ +DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000 + +/* Read data DQ Byte0-3 delay */ +DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333 + +/* + * MDMISC mirroring-off interleaved (row/bank/col) + */ +DATA 4, MX6_MMDC_P0_MDMISC, 0x00001740 + +/* + * MDSCR con_req + */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 diff --git a/board/boundary/per/linux_pads.sh b/board/boundary/per/linux_pads.sh new file mode 100755 index 0000000..43cd92e --- /dev/null +++ b/board/boundary/per/linux_pads.sh @@ -0,0 +1,13 @@ +#!/bin/sh +echo $1 +echo 's/GPIO([1-7])_IO0([0-9])/GPIO_\\1_\\2/' >t.sed +echo 's/GPIO([1-7])_IO([1-3][0-9])/GPIO_\\1_\\2/' >>t.sed +echo 's/GPIO_1__USB_OTG_ID/GPIO_1__USBOTG_ID/' >>t.sed +echo 's/KEY_COL4__USB_OTG_OC/KEY_COL4__USBOH3_USBOTG_OC/' >>t.sed +echo 's/EIM_D30__USB_H1_OC/EIM_D30__USBOH3_USBH1_OC/' >>t.sed +echo 's/UART([1-6]_[RT]X)_DATA/UART\\1D/' >>t.sed +echo 's/__RGMII_/__ENET_RGMII_/' >>t.sed +echo 's/(IPU[12]_CSI[01]_D)ATA0/\\1_/' >>t.sed +echo 's/(IPU[12]_CSI[01]_D)ATA([1-9])/\\1_\\2/' >>t.sed +echo 's/__AUD/__AUDMUX_AUD/' >>t.sed +sed -r -f t.sed $1 >$1.linux_pads diff --git a/board/boundary/per/pads.h b/board/boundary/per/pads.h new file mode 100644 index 0000000..dfee6e1 --- /dev/null +++ b/board/boundary/per/pads.h @@ -0,0 +1,413 @@ +/* + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#undef MX6PAD +#undef MX6NAME + +#ifdef FOR_DL_SOLO +#define MX6PAD(a) MX6DL_PAD_##a +#define MX6NAME(a) mx6dl_solo_##a +#else +#define MX6PAD(a) MX6Q_PAD_##a +#define MX6NAME(a) mx6q_##a +#endif + +#define PADCFG_INPUT (PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) +#define PADCFG_INPUT_L (PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) +#define PADCFG_INPUT_DN (PADCFG_INPUT | PAD_CTL_PUS_100K_DOWN) +#define PADCFG_INPUT_UP (PADCFG_INPUT | PAD_CTL_PUS_100K_UP) +#define PADCFG_INPUT_L_UP (PADCFG_INPUT_L | PAD_CTL_PUS_100K_UP) + +#define AUD_PAD_CTRL (PADCFG_INPUT_L_UP | PAD_CTL_SRE_FAST) +#define CSI_PAD_CTRL (PADCFG_INPUT_UP | PAD_CTL_SRE_FAST) +#define UART_PAD_CTRL (PADCFG_INPUT_UP | PAD_CTL_SRE_FAST) + +#define PADCFG_FLOAT_IRQ (PADCFG_INPUT) + +#define USDHC_PAD_CTRL_50MHZ (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define OTGID_PAD_CTRL USDHC_PAD_CTRL_50MHZ +#define HDMICEC_PAD_CTRL (PADCFG_INPUT_UP | PAD_CTL_ODE | PAD_CTL_SRE_SLOW) +#define ENET_PAD_CTRL PADCFG_INPUT_UP + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST) + +#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) +#define OUTPUT_40OHM_UP (OUTPUT_40OHM | PAD_CTL_PUS_100K_UP) +#define SPDIF_PAD_CTRL WEAK_PULLUP + +#define NP(id, pina, pinb, pad_ctl) \ + NEW_PAD_CTRL(MX6PAD(SD##id##_##pina##__SD##id##_##pinb), pad_ctl) + +#define SD_PINS(id, pad_ctl) \ + NP(id, CLK, CLK, pad_ctl), \ + NP(id, CMD, CMD, pad_ctl), \ + NP(id, DAT0, DATA0, pad_ctl), \ + NP(id, DAT1, DATA1, pad_ctl), \ + NP(id, DAT2, DATA2, pad_ctl), \ + NP(id, DAT3, DATA3, pad_ctl) + +#define SD_PINS8(id, pad_ctl) \ + SD_PINS(id, pad_ctl), \ + NP(id, DAT4, DATA4, pad_ctl), \ + NP(id, DAT5, DATA5, pad_ctl), \ + NP(id, DAT6, DATA6, pad_ctl), \ + NP(id, DAT7, DATA7, pad_ctl) + +static const iomux_v3_cfg_t MX6NAME(board_pads)[] = { + /* Audio - GS2971, WM5102 */ + NEW_PAD_CTRL(MX6PAD(DISP0_DAT23__AUD4_RXD), AUD_PAD_CTRL), /* pin J3 - AOUT1/2 */ + NEW_PAD_CTRL(MX6PAD(SD2_CMD__AUD4_RXC), AUD_PAD_CTRL), /* pin J4 - ACLK*/ + NEW_PAD_CTRL(MX6PAD(DISP0_DAT18__AUD4_RXFS), AUD_PAD_CTRL), /* pin H4 - WCLK*/ + + /* Audio - TC3587 mipi hdmi input */ + NEW_PAD_CTRL(MX6PAD(DISP0_DAT13__AUD5_RXFS), AUD_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(DISP0_DAT14__AUD5_RXC), AUD_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(DISP0_DAT19__AUD5_RXD), AUD_PAD_CTRL), + + /* Audio - WM5102 */ + NEW_PAD_CTRL(MX6PAD(DI0_PIN2__AUD6_TXD), AUD_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(DI0_PIN3__AUD6_TXFS), AUD_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(DI0_PIN4__AUD6_RXD), AUD_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(DI0_PIN15__AUD6_TXC), AUD_PAD_CTRL), + + /* WM5102 */ +// NEW_PAD_CTRL(MX6PAD(SD1_CLK__OSC32K_32K_OUT), OUTPUT_40OHM), /* MCLK2 */ + NEW_PAD_CTRL(MX6PAD(NANDF_CS2__CCM_CLKO2), OUTPUT_40OHM), /* MCLK1 */ +#define GP_WM5102_RESET IMX_GPIO_NR(5, 9) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT15__GPIO5_IO09), OUTPUT_40OHM), +#define GP_WM5102_IRQ IMX_GPIO_NR(5, 10) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT16__GPIO5_IO10), WEAK_PULLUP), +#define GP_WM5102_LDO_EN IMX_GPIO_NR(5, 11) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT17__GPIO5_IO11), OUTPUT_40OHM), + + /* camera - video0 - ADV7180 - I2C3, crystal 28.636 MHz */ + NEW_PAD_CTRL(MX6PAD(CSI0_DAT12__IPU1_CSI0_DATA12), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT13__IPU1_CSI0_DATA13), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT14__IPU1_CSI0_DATA14), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT15__IPU1_CSI0_DATA15), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT16__IPU1_CSI0_DATA16), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT17__IPU1_CSI0_DATA17), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT18__IPU1_CSI0_DATA18), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_DAT19__IPU1_CSI0_DATA19), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_PIXCLK__IPU1_CSI0_PIXCLK), CSI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(CSI0_MCLK__GPIO5_IO19), WEAK_PULLUP), /* Hsync */ + NEW_PAD_CTRL(MX6PAD(CSI0_VSYNC__GPIO5_IO21), WEAK_PULLUP), /* Vsync */ +#define GP_ADV7180_RESET IMX_GPIO_NR(4, 15) + NEW_PAD_CTRL(MX6PAD(KEY_ROW4__GPIO4_IO15), OUTPUT_40OHM), +#define GP_ADV7180_IRQ IMX_GPIO_NR(1, 9) + NEW_PAD_CTRL(MX6PAD(GPIO_9__GPIO1_IO09), WEAK_PULLUP), + + /* camera - video1 - TC3587 mipi hdmi input */ +#define GP_TC3587_VIDEO_DETECT IMX_GPIO_NR(3, 23) + NEW_PAD_CTRL(MX6PAD(EIM_D23__GPIO3_IO23), WEAK_PULLUP), /* J13 Pin 1 - Video detect */ +#define GP_TC3587_HPD_IN IMX_GPIO_NR(3, 29) + NEW_PAD_CTRL(MX6PAD(EIM_D29__GPIO3_IO29), WEAK_PULLUP), /* J13, pin 20 */ +#define GP_TC3587_RESET IMX_GPIO_NR(6, 11) + NEW_PAD_CTRL(MX6PAD(NANDF_CS0__GPIO6_IO11), OUTPUT_40OHM), +#define GP_TC3587_IRQ IMX_GPIO_NR(6, 14) + NEW_PAD_CTRL(MX6PAD(NANDF_CS1__GPIO6_IO14), PADCFG_FLOAT_IRQ), +#define GP_TC3587_I2C_EN IMX_GPIO_NR(6, 16) + NEW_PAD_CTRL(MX6PAD(NANDF_CS3__GPIO6_IO16), OUTPUT_40OHM), + + /* camera - video2 - GS2971(SDI) on CSI1 */ +#ifdef FOR_DL_SOLO + /* Dualite/Solo doesn't have IPU2 */ + NEW_PAD_CTRL(MX6PAD(EIM_A24__IPU1_CSI1_DATA19), CSI_PAD_CTRL), /* GPIO2[30] */ + NEW_PAD_CTRL(MX6PAD(EIM_A23__IPU1_CSI1_DATA18), CSI_PAD_CTRL), /* GPIO6[6] */ + NEW_PAD_CTRL(MX6PAD(EIM_A22__IPU1_CSI1_DATA17), CSI_PAD_CTRL), /* GPIO2[16] */ + NEW_PAD_CTRL(MX6PAD(EIM_A21__IPU1_CSI1_DATA16), CSI_PAD_CTRL), /* GPIO2[17] */ + NEW_PAD_CTRL(MX6PAD(EIM_A20__IPU1_CSI1_DATA15), CSI_PAD_CTRL), /* GPIO2[18] */ + NEW_PAD_CTRL(MX6PAD(EIM_A19__IPU1_CSI1_DATA14), CSI_PAD_CTRL), /* GPIO2[19] */ + NEW_PAD_CTRL(MX6PAD(EIM_A18__IPU1_CSI1_DATA13), CSI_PAD_CTRL), /* GPIO2[20] */ + NEW_PAD_CTRL(MX6PAD(EIM_A17__IPU1_CSI1_DATA12), CSI_PAD_CTRL), /* GPIO2[21] */ + NEW_PAD_CTRL(MX6PAD(EIM_EB0__IPU1_CSI1_DATA11), CSI_PAD_CTRL), /* GPIO2[28] */ + NEW_PAD_CTRL(MX6PAD(EIM_EB1__IPU1_CSI1_DATA10), CSI_PAD_CTRL), /* GPIO2[29] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA0__IPU1_CSI1_DATA09), CSI_PAD_CTRL), /* GPIO3[0] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA1__IPU1_CSI1_DATA08), CSI_PAD_CTRL), /* GPIO3[1] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA2__IPU1_CSI1_DATA07), CSI_PAD_CTRL), /* GPIO3[2] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA3__IPU1_CSI1_DATA06), CSI_PAD_CTRL), /* GPIO3[3] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA4__IPU1_CSI1_DATA05), CSI_PAD_CTRL), /* GPIO3[4] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA5__IPU1_CSI1_DATA04), CSI_PAD_CTRL), /* GPIO3[5] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA6__IPU1_CSI1_DATA03), CSI_PAD_CTRL), /* GPIO3[6] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA7__IPU1_CSI1_DATA02), CSI_PAD_CTRL), /* GPIO3[7] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA8__IPU1_CSI1_DATA01), CSI_PAD_CTRL), /* GPIO3[8] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA9__IPU1_CSI1_DATA00), CSI_PAD_CTRL), /* GPIO3[9] */ + NEW_PAD_CTRL(MX6PAD(EIM_A16__IPU1_CSI1_PIXCLK), CSI_PAD_CTRL), /* GPIO2[22] */ +#else + NEW_PAD_CTRL(MX6PAD(EIM_A24__IPU2_CSI1_DATA19), CSI_PAD_CTRL), /* GPIO2[30] */ + NEW_PAD_CTRL(MX6PAD(EIM_A23__IPU2_CSI1_DATA18), CSI_PAD_CTRL), /* GPIO6[6] */ + NEW_PAD_CTRL(MX6PAD(EIM_A22__IPU2_CSI1_DATA17), CSI_PAD_CTRL), /* GPIO2[16] */ + NEW_PAD_CTRL(MX6PAD(EIM_A21__IPU2_CSI1_DATA16), CSI_PAD_CTRL), /* GPIO2[17] */ + NEW_PAD_CTRL(MX6PAD(EIM_A20__IPU2_CSI1_DATA15), CSI_PAD_CTRL), /* GPIO2[18] */ + NEW_PAD_CTRL(MX6PAD(EIM_A19__IPU2_CSI1_DATA14), CSI_PAD_CTRL), /* GPIO2[19] */ + NEW_PAD_CTRL(MX6PAD(EIM_A18__IPU2_CSI1_DATA13), CSI_PAD_CTRL), /* GPIO2[20] */ + NEW_PAD_CTRL(MX6PAD(EIM_A17__IPU2_CSI1_DATA12), CSI_PAD_CTRL), /* GPIO2[21] */ + NEW_PAD_CTRL(MX6PAD(EIM_EB0__IPU2_CSI1_DATA11), CSI_PAD_CTRL), /* GPIO2[28] */ + NEW_PAD_CTRL(MX6PAD(EIM_EB1__IPU2_CSI1_DATA10), CSI_PAD_CTRL), /* GPIO2[29] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA0__IPU2_CSI1_DATA09), CSI_PAD_CTRL), /* GPIO3[0] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA1__IPU2_CSI1_DATA08), CSI_PAD_CTRL), /* GPIO3[1] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA2__IPU2_CSI1_DATA07), CSI_PAD_CTRL), /* GPIO3[2] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA3__IPU2_CSI1_DATA06), CSI_PAD_CTRL), /* GPIO3[3] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA4__IPU2_CSI1_DATA05), CSI_PAD_CTRL), /* GPIO3[4] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA5__IPU2_CSI1_DATA04), CSI_PAD_CTRL), /* GPIO3[5] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA6__IPU2_CSI1_DATA03), CSI_PAD_CTRL), /* GPIO3[6] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA7__IPU2_CSI1_DATA02), CSI_PAD_CTRL), /* GPIO3[7] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA8__IPU2_CSI1_DATA01), CSI_PAD_CTRL), /* GPIO3[8] */ + NEW_PAD_CTRL(MX6PAD(EIM_DA9__IPU2_CSI1_DATA00), CSI_PAD_CTRL), /* GPIO3[9] */ + NEW_PAD_CTRL(MX6PAD(EIM_A16__IPU2_CSI1_PIXCLK), CSI_PAD_CTRL), /* GPIO2[22] - pin A8 */ +#endif + /* Not used, but MUST be in GPIO mode */ + NEW_PAD_CTRL(MX6PAD(EIM_DA10__GPIO3_IO10), WEAK_PULLUP), /* CSI1_DATA_EN not used (pin B5 stat2) */ + NEW_PAD_CTRL(MX6PAD(EIM_DA11__GPIO3_IO11), WEAK_PULLUP), /* pin A5 stat0, hsync */ + NEW_PAD_CTRL(MX6PAD(EIM_DA12__GPIO3_IO12), WEAK_PULLUP), /* pin A6 stat1, vsync */ + +#define GP_GS2971_SMPTE_BYPASS IMX_GPIO_NR(2, 27) + NEW_PAD_CTRL(MX6PAD(EIM_LBA__GPIO2_IO27), WEAK_PULLUP), /* pin G7 - i/o SMPTE bypass */ +#define GP_GS2971_RESET IMX_GPIO_NR(3, 13) + NEW_PAD_CTRL(MX6PAD(EIM_DA13__GPIO3_IO13), OUTPUT_40OHM), /* 0 - pin C7 - reset */ +#define GP_GS2971_DVI_LOCK IMX_GPIO_NR(3, 14) + NEW_PAD_CTRL(MX6PAD(EIM_DA14__GPIO3_IO14), WEAK_PULLUP), /* pin B6 - stat3 - DVI_LOCK */ +#define GP_GS2971_DATA_ERR IMX_GPIO_NR(3, 15) + NEW_PAD_CTRL(MX6PAD(EIM_DA15__GPIO3_IO15), WEAK_PULLUP), /* pin C6 - stat5 - DATA error */ +#define GP_GS2971_LB_CONT IMX_GPIO_NR(3, 20) + NEW_PAD_CTRL(MX6PAD(EIM_D20__GPIO3_IO20), WEAK_PULLUP), /* pin A3 - LB control - float, analog input */ +#define GP_GS2971_Y_1ANC IMX_GPIO_NR(4, 26) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT5__GPIO4_IO26), WEAK_PULLUP), /* pin C5 - stat4 - 1ANC - Y signal detect */ +#define GP_GS2971_RC_BYPASS IMX_GPIO_NR(4, 27) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT6__GPIO4_IO27), OUTPUT_40OHM), /* 0 - pin G3 - RC bypass - output is buffered(low) */ +#define GP_GS2971_IOPROC_EN IMX_GPIO_NR(4, 28) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT7__GPIO4_IO28), OUTPUT_40OHM), /* 0 - pin H8 - io(A/V) processor enable */ +#define GP_GS2971_AUDIO_EN IMX_GPIO_NR(4, 29) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT8__GPIO4_IO29), OUTPUT_40OHM), /* 0 - pin H3 - Audio Enable */ +#define GP_GS2971_TIM_861 IMX_GPIO_NR(4, 30) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT9__GPIO4_IO30), OUTPUT_40OHM), /* 0 - pin H5 - TIM861 timing format, 1-use HSYNC/VSYNC */ +#define GP_GS2971_SW_EN IMX_GPIO_NR(4, 31) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT10__GPIO4_IO31), OUTPUT_40OHM), /* 0 - pin D7 - SW_EN - line lock enable */ +#define GP_GS2971_STANDBY IMX_GPIO_NR(5, 0) + NEW_PAD_CTRL(MX6PAD(EIM_WAIT__GPIO5_IO00), OUTPUT_40OHM), /* 1 - pin K2 - Standby */ +#define GP_GS2971_DVB_ASI IMX_GPIO_NR(5, 5) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT11__GPIO5_IO05), WEAK_PULLUP), /* pin G8 i/o DVB_ASI */ + + /* ECSPI1 */ + NEW_PAD_CTRL(MX6PAD(EIM_D17__ECSPI1_MISO), SPI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D18__ECSPI1_MOSI), SPI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D16__ECSPI1_SCLK), SPI_PAD_CTRL), +#define GP_ECSPI1_CS1 IMX_GPIO_NR(3, 19) + NEW_PAD_CTRL(MX6PAD(EIM_D19__GPIO3_IO19), OUTPUT_40OHM_UP), /* SS1 */ + + /* ECSPI2 - GS2971 */ + NEW_PAD_CTRL(MX6PAD(EIM_OE__ECSPI2_MISO), SPI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_CS1__ECSPI2_MOSI), SPI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_CS0__ECSPI2_SCLK), SPI_PAD_CTRL), +#define GP_ECSPI2_GS2971_CS IMX_GPIO_NR(2, 26) + NEW_PAD_CTRL(MX6PAD(EIM_RW__GPIO2_IO26), OUTPUT_40OHM_UP), + + /* ECSPI3 - WM5102 */ + NEW_PAD_CTRL(MX6PAD(DISP0_DAT2__ECSPI3_MISO), SPI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(DISP0_DAT1__ECSPI3_MOSI), SPI_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(DISP0_DAT0__ECSPI3_SCLK), SPI_PAD_CTRL), +#define GP_ECSPI3_WM5102_CS IMX_GPIO_NR(4, 25) + NEW_PAD_CTRL(MX6PAD(DISP0_DAT4__GPIO4_IO25), OUTPUT_40OHM_UP), + + /* ENET pads that don't change for PHY reset */ + NEW_PAD_CTRL(MX6PAD(ENET_MDIO__ENET_MDIO), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(ENET_MDC__ENET_MDC), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_TXC__RGMII_TXC), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_TD0__RGMII_TD0), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_TD1__RGMII_TD1), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_TD2__RGMII_TD2), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_TD3__RGMII_TD3), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_TX_CTL__RGMII_TX_CTL), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(ENET_REF_CLK__ENET_TX_CLK), ENET_PAD_CTRL), + /* pin 42 PHY nRST */ +#define GP_ENET_PHY_RESET IMX_GPIO_NR(1, 27) + NEW_PAD_CTRL(MX6PAD(ENET_RXD0__GPIO1_IO27), OUTPUT_40OHM), /* Micrel RGMII Phy Reset */ +#define GP_ENET_PHY_INT IMX_GPIO_NR(1, 28) + NEW_PAD_CTRL(MX6PAD(ENET_TX_EN__GPIO1_IO28), WEAK_PULLUP), /* Micrel RGMII Phy Interrupt */ + + /* HDMI */ + NEW_PAD_CTRL(MX6PAD(KEY_ROW2__HDMI_TX_CEC_LINE), HDMICEC_PAD_CTRL), + +#define GP_TP101_ALERT IMX_GPIO_NR(4, 5) + NEW_PAD_CTRL(MX6PAD(GPIO_19__GPIO4_IO05), WEAK_PULLUP), + + + /* PCIe */ +#define GP_PCIE_RESET IMX_GPIO_NR(5, 2) + NEW_PAD_CTRL(MX6PAD(EIM_A25__GPIO5_IO02), OUTPUT_40OHM), +#define GP_PCIE_RADIO_ON IMX_GPIO_NR(6, 10) + NEW_PAD_CTRL(MX6PAD(NANDF_RB0__GPIO6_IO10), OUTPUT_40OHM), + + /* UART1 - J2 - PTT connector */ + NEW_PAD_CTRL(MX6PAD(SD3_DAT7__UART1_TX_DATA), UART_PAD_CTRL), /* J2, pin 9 */ + NEW_PAD_CTRL(MX6PAD(SD3_DAT6__UART1_RX_DATA), UART_PAD_CTRL), /* J2, pin 10 */ + NEW_PAD_CTRL(MX6PAD(EIM_EB2__GPIO2_IO30), WEAK_PULLUP), /* J2, pin 7: PTT_R */ + NEW_PAD_CTRL(MX6PAD(EIM_EB3__GPIO2_IO31), WEAK_PULLUP), /* J2, pin 6: PTT_L */ + + /* UART2 - debug */ + NEW_PAD_CTRL(MX6PAD(EIM_D26__UART2_TX_DATA), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(EIM_D27__UART2_RX_DATA), UART_PAD_CTRL), + + /* UART3 - relay J3 */ + NEW_PAD_CTRL(MX6PAD(EIM_D24__UART3_TX_DATA), UART_PAD_CTRL), /* J3, pin 5 */ + NEW_PAD_CTRL(MX6PAD(EIM_D25__UART3_RX_DATA), UART_PAD_CTRL), /* J3, pin 6 */ +#define GP_RELAY_DETECT IMX_GPIO_NR(7, 2) + NEW_PAD_CTRL(MX6PAD(SD3_CMD__GPIO7_IO02), PADCFG_FLOAT_IRQ), /* J3 pin 7 */ +#define GP_J3_CARRIER_SENSE IMX_GPIO_NR(7, 4) + NEW_PAD_CTRL(MX6PAD(SD3_DAT0__GPIO7_IO04), PADCFG_FLOAT_IRQ), + + +#define GP_PTT_ON IMX_GPIO_NR(7, 5) + NEW_PAD_CTRL(MX6PAD(SD3_DAT1__GPIO7_IO05), PADCFG_FLOAT_IRQ), + +#define GP_J11_HDMI_POWER_EN IMX_GPIO_NR(7, 3) + NEW_PAD_CTRL(MX6PAD(SD3_CLK__GPIO7_IO03), PADCFG_INPUT_L_UP), /* power on J11 pin 3 */ + + /* UART4 - GPS */ + NEW_PAD_CTRL(MX6PAD(KEY_COL0__UART4_TX_DATA), UART_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(KEY_ROW0__UART4_RX_DATA), UART_PAD_CTRL), +#define GP_GPS_RESET IMX_GPIO_NR(7, 1) + NEW_PAD_CTRL(MX6PAD(SD3_DAT4__GPIO7_IO01), PADCFG_FLOAT_IRQ), +#define GP_GPS_IRQ IMX_GPIO_NR(7, 0) + NEW_PAD_CTRL(MX6PAD(SD3_DAT5__GPIO7_IO00), WEAK_PULLUP), +#define GP_GPS_HEARTBEAT IMX_GPIO_NR(4, 10) + NEW_PAD_CTRL(MX6PAD(KEY_COL2__GPIO4_IO10), WEAK_PULLUP), + + /* UART5 - J6 data connector */ + NEW_PAD_CTRL(MX6PAD(KEY_COL1__UART5_TX_DATA), UART_PAD_CTRL), /* J6, pin 5 */ + NEW_PAD_CTRL(MX6PAD(KEY_ROW1__UART5_RX_DATA), UART_PAD_CTRL), /* J6, pin 6 */ + NEW_PAD_CTRL(MX6PAD(SD1_CMD__GPIO1_IO18), WEAK_PULLUP), /* J6, pin 8 - Data detect */ +#define GP_J6_POWER_EN IMX_GPIO_NR(1, 16) + NEW_PAD_CTRL(MX6PAD(SD1_DAT0__GPIO1_IO16), WEAK_PULLUP), /* J6, Power enable */ + NEW_PAD_CTRL(MX6PAD(GPIO_4__GPIO1_IO04), WEAK_PULLUP), /* J6, pin 16 */ + + /* USBH1 */ + NEW_PAD_CTRL(MX6PAD(EIM_D30__USB_H1_OC), WEAK_PULLUP), /* low indicates over current */ +#define GP_USB_HUB_RESET IMX_GPIO_NR(7, 12) + NEW_PAD_CTRL(MX6PAD(GPIO_17__GPIO7_IO12), OUTPUT_40OHM), /* USB Hub Reset for USB2512 4 port hub */ + + /* USBOTG */ + NEW_PAD_CTRL(MX6PAD(GPIO_1__USB_OTG_ID), OTGID_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(KEY_COL4__USB_OTG_OC), WEAK_PULLUP), /* low indicates over current */ +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) + NEW_PAD_CTRL(MX6PAD(EIM_D22__GPIO3_IO22), OUTPUT_40OHM), + + /* USDHC4 - eMMC */ + SD_PINS8(4, USDHC_PAD_CTRL_50MHZ), +#define GP_EMMC_RESET IMX_GPIO_NR(6, 7) + NEW_PAD_CTRL(MX6PAD(NANDF_CLE__GPIO6_IO07), OUTPUT_40OHM), /* eMMC reset */ + + /* 1-wire J11 pin 22, J3 pin 8, J6 pin 9*/ +#define GP_1WIRE_EN IMX_GPIO_NR(1, 21) + NEW_PAD_CTRL(MX6PAD(SD1_DAT3__GPIO1_IO21), WEAK_PULLUP), + + /* Microcontroller KL04Z32TFK4 on I2C1 */ +#define GP_KL04_SWD_CLK IMX_GPIO_NR(1, 0) + NEW_PAD_CTRL(MX6PAD(GPIO_0__GPIO1_IO00), WEAK_PULLDN), /* SWD_CLK */ +#define GP_KL04_SWD_IO IMX_GPIO_NR(1, 2) + NEW_PAD_CTRL(MX6PAD(GPIO_2__GPIO1_IO02), WEAK_PULLUP), /* SWD_IO */ +#define GP_KL04_RESET IMX_GPIO_NR(5, 20) + NEW_PAD_CTRL(MX6PAD(CSI0_DATA_EN__GPIO5_IO20), WEAK_PULLDN), +#define GP_KL04_PROGRAM IMX_GPIO_NR(5, 22) + NEW_PAD_CTRL(MX6PAD(CSI0_DAT4__GPIO5_IO22), WEAK_PULLDN), +#define GP_KL04_IRQ IMX_GPIO_NR(5, 29) + NEW_PAD_CTRL(MX6PAD(CSI0_DAT11__GPIO5_IO29), WEAK_PULLUP), + + /* Make sure these no-connects don't wiggle */ + NEW_PAD_CTRL(MX6PAD(DI0_DISP_CLK__GPIO4_IO16), WEAK_PULLUP), + NEW_PAD_CTRL(MX6PAD(DISP0_DAT12__GPIO5_IO06), WEAK_PULLUP), + NEW_PAD_CTRL(MX6PAD(DISP0_DAT20__GPIO5_IO14), WEAK_PULLUP), + NEW_PAD_CTRL(MX6PAD(DISP0_DAT21__GPIO5_IO15), WEAK_PULLUP), + NEW_PAD_CTRL(MX6PAD(DISP0_DAT22__GPIO5_IO16), WEAK_PULLUP), +}; + +static const iomux_v3_cfg_t MX6NAME(enet_pads1)[] = { + /* pin 35 - 1 (PHY_AD2) on reset */ + NEW_PAD_CTRL(MX6PAD(RGMII_RXC__GPIO6_IO30), OUTPUT_40OHM), + /* pin 32 - 1 - (MODE0) all */ + NEW_PAD_CTRL(MX6PAD(RGMII_RD0__GPIO6_IO25), OUTPUT_40OHM), + /* pin 31 - 1 - (MODE1) all */ + NEW_PAD_CTRL(MX6PAD(RGMII_RD1__GPIO6_IO27), OUTPUT_40OHM), + /* pin 28 - 1 - (MODE2) all */ + NEW_PAD_CTRL(MX6PAD(RGMII_RD2__GPIO6_IO28), OUTPUT_40OHM), + /* pin 27 - 1 - (MODE3) all */ + NEW_PAD_CTRL(MX6PAD(RGMII_RD3__GPIO6_IO29), OUTPUT_40OHM), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + NEW_PAD_CTRL(MX6PAD(RGMII_RX_CTL__GPIO6_IO24), OUTPUT_40OHM), +}; + +static const iomux_v3_cfg_t MX6NAME(enet_pads2)[] = { + NEW_PAD_CTRL(MX6PAD(RGMII_RXC__RGMII_RXC), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_RD0__RGMII_RD0), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_RD1__RGMII_RD1), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_RD2__RGMII_RD2), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_RD3__RGMII_RD3), ENET_PAD_CTRL), + NEW_PAD_CTRL(MX6PAD(RGMII_RX_CTL__RGMII_RX_CTL), ENET_PAD_CTRL), +}; + +/* + * + */ +#define PC I2C_PAD_CTRL + +static struct i2c_pads_info MX6NAME(i2c_pad_info)[] = { +{ + /* I2C1, SGTL5000 */ + .scl = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(EIM_D21__I2C1_SCL), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(EIM_D21__GPIO3_IO21), PC), + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(EIM_D28__I2C1_SDA), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(EIM_D28__GPIO3_IO28), PC), + .gp = IMX_GPIO_NR(3, 28) + } +}, { + /* I2C2 Camera, MIPI */ + .scl = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(KEY_COL3__I2C2_SCL), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(KEY_COL3__GPIO4_IO12), PC), + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(KEY_ROW3__I2C2_SDA), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(KEY_ROW3__GPIO4_IO13), PC), + .gp = IMX_GPIO_NR(4, 13) + } +}, { + /* I2C3, J15 - RGB connector */ + .scl = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(GPIO_5__I2C3_SCL), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(GPIO_5__GPIO1_IO05), PC), + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = NEW_PAD_CTRL(MX6PAD(GPIO_16__I2C3_SDA), PC), + .gpio_mode = NEW_PAD_CTRL(MX6PAD(GPIO_16__GPIO7_IO11), PC), + .gp = IMX_GPIO_NR(7, 11) + } +} +}; diff --git a/board/boundary/per/per.c b/board/boundary/per/per.c new file mode 100644 index 0000000..6d3117d --- /dev/null +++ b/board/boundary/per/per.c @@ -0,0 +1,393 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#define CONFIG_MX6QDL +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifdef CONFIG_MX6Q +#include "pads.h" +#endif +#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +#define FOR_DL_SOLO +#include "pads.h" +#endif + + +DECLARE_GLOBAL_DATA_PTR; + +#if defined(CONFIG_MX6DL) || defined(CONFIG_MX6S) +#ifdef CONFIG_MX6Q +#define GET_MX6_REF(ref) (is_cpu_type(MXC_CPU_MX6Q) ? mx6q_##ref : mx6dl_solo_##ref) +#define IOMUX_SETUP(list) iomux_setup(mx6q_##list, ARRAY_SIZE(mx6q_##list), \ + mx6dl_solo_##list, ARRAY_SIZE(mx6dl_solo_##list)) + +int iomux_setup(iomux_v3_cfg_t *mx6q_pad_list, int mx6q_pad_cnt, + iomux_v3_cfg_t *mx6dl_solo_pad_list, int mx6dl_solo_pad_cnt) +{ + int mx6q = is_cpu_type(MXC_CPU_MX6Q); + iomux_v3_cfg_t *p = mx6q ? mx6q_pad_list : mx6dl_solo_pad_list; + int cnt = mx6q ? mx6q_pad_cnt : mx6dl_solo_pad_cnt; + + return imx_iomux_v3_setup_multiple_pads(p, cnt); +} +#else +#define GET_MX6_REF(ref) (mx6dl_solo_##ref) +#define IOMUX_SETUP(list) imx_iomux_v3_setup_multiple_pads( \ + mx6dl_solo_##list, ARRAY_SIZE(mx6dl_solo_##list)) +#endif +#else +#define GET_MX6_REF(ref) (mx6q_##ref) +#define IOMUX_SETUP(list) imx_iomux_v3_setup_multiple_pads( \ + mx6q_##list, ARRAY_SIZE(mx6q_##list)) +#endif + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); +// printf("%s:%p *%p=0x%lx\n", __func__, gd, &gd->ram_size, gd->ram_size); + return 0; +} + +static void setup_iomux_enet(void) +{ + gpio_direction_output(GP_ENET_PHY_RESET, 0); /* PHY rst */ + gpio_direction_output(IMX_GPIO_NR(6, 30), 1); + gpio_direction_output(IMX_GPIO_NR(6, 25), 1); + gpio_direction_output(IMX_GPIO_NR(6, 27), 1); + gpio_direction_output(IMX_GPIO_NR(6, 28), 1); + gpio_direction_output(IMX_GPIO_NR(6, 29), 1); + IOMUX_SETUP(enet_pads1); + gpio_direction_output(IMX_GPIO_NR(6, 24), 1); + + /* Need delay 10ms according to KSZ9021 spec */ + udelay(1000 * 10); + gpio_set_value(GP_ENET_PHY_RESET, 1); /* PHY reset */ + + IOMUX_SETUP(enet_pads2); + udelay(100); /* Wait 100 us before using mii interface */ +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + /* Reset USB hub */ + if (port) { + gpio_set_value(GP_USB_HUB_RESET, 0); + mdelay(2); + gpio_set_value(GP_USB_HUB_RESET, 1); + } + return 0; +} + +int board_ehci_power(int port, int on) +{ + if (port) + return 0; + gpio_set_value(GP_USB_OTG_PWR, on); + return 0; +} + +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[] = { + {USDHC4_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + return 1; /* eMMC always present */ +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + usdhc_cfg[0].max_bus_width = 8; + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + gpio_set_value(GP_EMMC_RESET, 1); /* release reset */ + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -1; +} + +int board_phy_config(struct phy_device *phydev) +{ + /* min rx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0); + /* min tx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0); + /* max rx/tx clock delay, min rx/tx control */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0); + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + +#ifdef CONFIG_FEC_MXC + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + /* scan phy 4,5,6,7 */ + phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } +#endif + +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + + +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) { + return -1; + } + + env_loadsplash = getenv("loadsplash"); + if (env_loadsplash == NULL) { + printf("Environment variable loadsplash not found!\n"); + return -1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("failed to run loadsplash %s\n\n", env_loadsplash); + return -1; + } + + return 0; +} + +#if defined(CONFIG_VIDEO_IPUV3) + +const struct display_info_t displays[] = { + /* hdmi */ + IMX_VD50_1280_720M_60(HDMI, 1, 1), + IMX_VD50_1920_1080M_60(HDMI, 0, 1), + IMX_VD50_1024_768M_60(HDMI, 0, 1), +}; + +size_t display_count = ARRAY_SIZE(displays); + +int board_cfb_skip(void) +{ + return NULL != getenv("novideo"); +} +#endif + +static unsigned short gpios_out_low[] = { + GP_KL04_RESET, /* inverted before kl04, not in reset */ + GP_KL04_PROGRAM, /* inverted before kl04 */ + GP_EMMC_RESET, /* hold in reset */ + GP_WM5102_RESET, + GP_WM5102_LDO_EN, + GP_USB_OTG_PWR, /* disable USB otg power */ + GP_USB_HUB_RESET, /* disable hub */ + GP_J6_POWER_EN, + GP_ENET_PHY_RESET, + GP_PCIE_RADIO_ON, + GP_PCIE_RESET, + GP_GS2971_RESET, + GP_GS2971_RC_BYPASS, + GP_GS2971_IOPROC_EN, + GP_GS2971_AUDIO_EN, + GP_GS2971_TIM_861, + GP_GS2971_SW_EN, + GP_GS2971_DVB_ASI, +}; + +static unsigned short gpios_out_high[] = { + GP_ECSPI1_CS1, /* SS1 of spi nor */ + GP_ECSPI2_GS2971_CS, + GP_ECSPI3_WM5102_CS, + GP_GS2971_STANDBY, +}; + +static unsigned short gpios_in[] = { + GP_KL04_SWD_CLK, + GP_KL04_SWD_IO, + GP_TP101_ALERT, + GP_GS2971_SMPTE_BYPASS, + GP_GS2971_DVI_LOCK, + GP_GS2971_DATA_ERR, + GP_GS2971_LB_CONT, + GP_GS2971_Y_1ANC, + GP_KL04_IRQ, + GP_WM5102_IRQ, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned short *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + + IOMUX_SETUP(board_pads); +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + struct i2c_pads_info *p = GET_MX6_REF(i2c_pad_info); + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &p[0]); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &p[1]); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &p[2]); + +#ifdef CONFIG_CMD_SATA + setup_sata(); +#endif + + return 0; +} + + +int checkboard(void) +{ + puts("Board: PER\n"); + return 0; +} + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "per"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/per/per.cfg b/board/boundary/per/per.cfg new file mode 100644 index 0000000..8eb31ea --- /dev/null +++ b/board/boundary/per/per.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "ddr-setup.cfg" +#include "1066mhz_2x512mx16.cfg" +#include "clocks.cfg" diff --git a/board/boundary/per/spl.c b/board/boundary/per/spl.c new file mode 100644 index 0000000..f68a458 --- /dev/null +++ b/board/boundary/per/spl.c @@ -0,0 +1,115 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#if 0 +void board_init_f(ulong dummy) +{ +#if 0 + arch_cpu_init(); + board_early_init_f(); + timer_init(); + preloader_console_init(); + + print_cpuinfo(); + board_init_r(NULL, 0); +#endif +} +#endif + +void spl_board_init(void) +{ +#if 0 + int i; + u32 const *regs ; + int num_regs; + unsigned char mac_address[6]; + imx_get_mac_from_fuse(0,mac_address); + printf("ethaddr: %pM\n", mac_address); + + if (is_cpu_type(MXC_CPU_MX6Q)) { +#if 1 + regs = mx6q_1g; + num_regs = ARRAY_SIZE(mx6q_1g); +#else + regs = mx6q_2g; + num_regs = ARRAY_SIZE(mx6q_2g); +#endif + } else { +#if CONFIG_DDR_MB == 512 + regs = mx6dl_512m; + num_regs = ARRAY_SIZE(mx6dl_512m); +printf("Configuring for 512MiB narrow memory bus\n"); +#elif CONFIG_DDR_MB == 1024 + regs = mx6dl_1gn; + num_regs = ARRAY_SIZE(mx6dl_1gn); +printf("Configuring for 1GiB narrow memory bus\n"); +#elif CONFIG_DDR_MB == 2048 + regs = mx6dl_2g; + num_regs = ARRAY_SIZE(mx6dl_2g); +printf("Configuring for 2GiB wide memory bus\n"); +#endif + } + for (i=0; i < num_regs; i+=2) { + writel(regs[i+1],regs[i]); + } + dram_init(); +#endif + printf("%s\n", __func__); +} + +u32 spl_boot_device(void) +{ + printf("%s\n", __func__); +#if 0 + unsigned reg; + struct src *psrc = (struct src *)SRC_BASE_ADDR; + printf("%s: sbmr1 == 0x%08x\n", __func__, psrc->sbmr1); + printf("%s: gpr9 == 0x%08x\n", __func__, psrc->gpr9); + printf("%s: gpr10 == 0x%08x\n", __func__, psrc->gpr10); + return BOOT_DEVICE_USB; +#endif +#if 1 + return BOOT_DEVICE_SPI; +#endif +} + +#if 0 +void spl_usb_load_image(void) +{ + boot_mode_apply(MAKE_CFGVAL(0x01, 0x00, 0x00, 0x00)); + reset_cpu(0); +} + +#endif diff --git a/board/boundary/s/Kconfig b/board/boundary/s/Kconfig new file mode 100644 index 0000000..a95e249 --- /dev/null +++ b/board/boundary/s/Kconfig @@ -0,0 +1,18 @@ +if TARGET_S + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "s" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "s" + +endif diff --git a/board/boundary/s/MAINTAINERS b/board/boundary/s/MAINTAINERS new file mode 100644 index 0000000..cef7c8e --- /dev/null +++ b/board/boundary/s/MAINTAINERS @@ -0,0 +1,7 @@ +S BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/nitrogen6x/ +F: include/configs/s.h +F: configs/s_defconfig + diff --git a/board/boundary/s/Makefile b/board/boundary/s/Makefile new file mode 100644 index 0000000..725d80a --- /dev/null +++ b/board/boundary/s/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := s.o diff --git a/board/boundary/s/s.c b/board/boundary/s/s.c new file mode 100644 index 0000000..6574651 --- /dev/null +++ b/board/boundary/s/s.c @@ -0,0 +1,693 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +static iomux_v3_cfg_t const init_pads[] = { + NEW_PAD_CTRL(MX6_PAD_GPIO_0__CCM_CLKO1, OUTPUT_40OHM), /* SGTL5000 sys_mclk */ + NEW_PAD_CTRL(MX6_PAD_GPIO_3__CCM_CLKO2, OUTPUT_40OHM), /* J5 - Camera MCLK */ + + /* wl1271 pads on nitrogen6x */ +#define WL12XX_WL_IRQ_GP IMX_GPIO_NR(6, 14) + NEW_PAD_CTRL(MX6_PAD_NANDF_CS1__GPIO6_IO14, WEAK_PULLDOWN), + /* WL12XX_WL_ENABLE_GP */ + NEW_PAD_CTRL(MX6_PAD_NANDF_CS2__GPIO6_IO15, OUTPUT_40OHM), + /* WL12XX_BT_ENABLE_GP */ + NEW_PAD_CTRL(MX6_PAD_NANDF_CS3__GPIO6_IO16, OUTPUT_40OHM), + /* USB otg power */ + NEW_PAD_CTRL(MX6_PAD_EIM_D22__GPIO3_IO22, OUTPUT_40OHM), + NEW_PAD_CTRL(MX6_PAD_NANDF_D5__GPIO2_IO05, OUTPUT_40OHM), + NEW_PAD_CTRL(MX6_PAD_NANDF_WP_B__GPIO6_IO09, OUTPUT_40OHM), + NEW_PAD_CTRL(MX6_PAD_GPIO_8__GPIO1_IO08, OUTPUT_40OHM), + NEW_PAD_CTRL(MX6_PAD_GPIO_6__GPIO1_IO06, OUTPUT_40OHM), + + /* Backlight on RGB connector: J15 */ +#define RGB_BACKLIGHT_GP IMX_GPIO_NR(1, 21) + MX6_PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL), + + /* Backlight on LVDS connector: J6 */ +#define LVDS_BACKLIGHT_GP IMX_GPIO_NR(1, 18) + MX6_PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); + + return 0; +} + +static iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const uart4_pads[] = { + MX6_PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +/* I2C1, SGTL5000 */ +static struct i2c_pads_info i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}; + +/* I2C2 Camera, MIPI */ +static struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}; + +/* I2C3, J15 - RGB connector */ +static struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC, + .gp = IMX_GPIO_NR(7, 11) + } +}; + +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc3_pads[] = { + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +static iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +static iomux_v3_cfg_t const enet_pads1[] = { + MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), + /* pin 35 - 1 (PHY_AD2) on reset */ + MX6_PAD_RGMII_RXC__GPIO6_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 32 - 1 - (MODE0) all */ + MX6_PAD_RGMII_RD0__GPIO6_IO25 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 31 - 1 - (MODE1) all */ + MX6_PAD_RGMII_RD1__GPIO6_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 28 - 1 - (MODE2) all */ + MX6_PAD_RGMII_RD2__GPIO6_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 27 - 1 - (MODE3) all */ + MX6_PAD_RGMII_RD3__GPIO6_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + MX6_PAD_RGMII_RX_CTL__GPIO6_IO24 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* pin 42 PHY nRST */ + MX6_PAD_EIM_D23__GPIO3_IO23 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static iomux_v3_cfg_t const enet_pads2[] = { + MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), +}; + +static iomux_v3_cfg_t const misc_pads[] = { + MX6_PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_KEY_COL4__USB_OTG_OC | MUX_PAD_CTRL(WEAK_PULLUP), + MX6_PAD_EIM_D30__USB_H1_OC | MUX_PAD_CTRL(WEAK_PULLUP), + /* OTG Power enable */ + MX6_PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(OUTPUT_40OHM), +}; + +/* wl1271 pads on nitrogen6x */ +static iomux_v3_cfg_t const wl12xx_pads[] = { + (MX6_PAD_NANDF_CS1__GPIO6_IO14 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(WEAK_PULLDOWN), + (MX6_PAD_NANDF_CS2__GPIO6_IO15 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), + (MX6_PAD_NANDF_CS3__GPIO6_IO16 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), +}; +#define WL12XX_WL_IRQ_GP IMX_GPIO_NR(6, 14) +#define WL12XX_WL_ENABLE_GP IMX_GPIO_NR(6, 15) +#define WL12XX_BT_ENABLE_GP IMX_GPIO_NR(6, 16) + +/* Button assignments for J14 */ +static iomux_v3_cfg_t const button_pads[] = { + /* Menu */ + MX6_PAD_NANDF_D1__GPIO2_IO01 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Back */ + MX6_PAD_NANDF_D2__GPIO2_IO02 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Labelled Search (mapped to Power under Android) */ + MX6_PAD_NANDF_D3__GPIO2_IO03 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Home */ + MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Volume Down */ + MX6_PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), + /* Volume Up */ + MX6_PAD_GPIO_18__GPIO7_IO13 | MUX_PAD_CTRL(BUTTON_PAD_CTRL), +}; + +static void setup_iomux_enet(void) +{ + gpio_direction_output(IMX_GPIO_NR(3, 23), 0); /* SABRE Lite PHY rst */ + gpio_direction_output(IMX_GPIO_NR(1, 27), 0); /* Nitrogen6X PHY rst */ + gpio_direction_output(IMX_GPIO_NR(6, 30), 1); + gpio_direction_output(IMX_GPIO_NR(6, 25), 1); + gpio_direction_output(IMX_GPIO_NR(6, 27), 1); + gpio_direction_output(IMX_GPIO_NR(6, 28), 1); + gpio_direction_output(IMX_GPIO_NR(6, 29), 1); + imx_iomux_v3_setup_multiple_pads(enet_pads1, ARRAY_SIZE(enet_pads1)); + gpio_direction_output(IMX_GPIO_NR(6, 24), 1); + + /* Need delay 10ms according to KSZ9021 spec */ + udelay(1000 * 10); + gpio_set_value(IMX_GPIO_NR(3, 23), 1); /* SABRE Lite PHY reset */ + gpio_set_value(IMX_GPIO_NR(1, 27), 1); /* Nitrogen6X PHY reset */ + + imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2)); + udelay(100); /* Wait 100 us before using mii interface */ +} + +static iomux_v3_cfg_t const usb_pads[] = { + MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); + imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads)); +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); + + /* Reset USB hub */ + gpio_direction_output(IMX_GPIO_NR(7, 12), 0); + mdelay(2); + gpio_set_value(IMX_GPIO_NR(7, 12), 1); + + return 0; +} + +int board_ehci_power(int port, int on) +{ + if (port) + return 0; + gpio_set_value(GP_USB_OTG_PWR, on); + return 0; +} + +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC3_BASE_ADDR}, + {USDHC4_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int gp_cd = (cfg->esdhc_base == USDHC3_BASE_ADDR) ? IMX_GPIO_NR(7, 0) : + IMX_GPIO_NR(2, 6); + + gpio_direction_input(gp_cd); + return !gpio_get_value(gp_cd); +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].max_bus_width = 4; + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + break; + case 1: + imx_iomux_v3_setup_multiple_pads( + usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : (cs >> 8) ? (cs >> 8) : -1; +} + +static iomux_v3_cfg_t const ecspi1_pads[] = { + /* SS1 */ + MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; + +static void setup_spi(void) +{ + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, + ARRAY_SIZE(ecspi1_pads)); +} + +int board_phy_config(struct phy_device *phydev) +{ + /* min rx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_RX_DATA_SKEW, 0x0); + /* min tx data delay */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_TX_DATA_SKEW, 0x0); + /* max rx/tx clock delay, min rx/tx control */ + ksz9021_phy_extended_write(phydev, + MII_KSZ9021_EXT_RGMII_CLOCK_SKEW, 0xf0f0); + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + +#ifdef CONFIG_FEC_MXC + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + /* scan phy 4,5,6,7 */ + phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } +#endif + +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + + +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) { + return -1; + } + + env_loadsplash = getenv("loadsplash"); + if (env_loadsplash == NULL) { + printf("Environment variable loadsplash not found!\n"); + return -1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("failed to run loadsplash %s\n\n", env_loadsplash); + return -1; + } + + return 0; +} + +static void setup_buttons(void) +{ + imx_iomux_v3_setup_multiple_pads(button_pads, + ARRAY_SIZE(button_pads)); +} + +#if defined(CONFIG_VIDEO_IPUV3) + +void board_enable_lvds(const struct display_info_t *di) +{ + gpio_direction_output(LVDS_BACKLIGHT_GP, 1); +} + +const struct display_info_t displays[] = { + /* hdmi */ + IMX_VD50_1280_720M_60(HDMI, 1, 1), + IMX_VD50_1920_1080M_60(HDMI, 0, 1), + IMX_VD50_1024_768M_60(HDMI, 0, 1), + IMX_VD_WXGA_J(LVDS, 0, 0), +}; + +size_t display_count = ARRAY_SIZE(displays); + +int board_cfb_skip(void) +{ + return NULL != getenv("novideo"); +} +#endif + +static unsigned gpios_out_low[] = { + /* Disable wl1271 */ + IMX_GPIO_NR(6, 15), /* disable wireless */ + IMX_GPIO_NR(6, 16), /* disable bluetooth */ + IMX_GPIO_NR(3, 22), /* disable USB otg power */ + IMX_GPIO_NR(2, 5), /* ov5640 mipi camera reset */ + IMX_GPIO_NR(1, 8), /* ov5642 reset */ +}; + +static unsigned gpios_out_high[] = { + IMX_GPIO_NR(1, 6), /* ov5642 powerdown */ + IMX_GPIO_NR(6, 9), /* ov5640 mipi camera power down */ +}; + +static unsigned short gpios_in[] = { + LVDS_BACKLIGHT_GP, + RGB_BACKLIGHT_GP, + WL12XX_WL_IRQ_GP, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads)); + setup_buttons(); + +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + imx_iomux_v3_setup_multiple_pads(misc_pads, ARRAY_SIZE(misc_pads)); + imx_iomux_v3_setup_multiple_pads(wl12xx_pads, ARRAY_SIZE(wl12xx_pads)); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + setup_spi(); + + imx_iomux_v3_setup_multiple_pads( + usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + + return 0; +} + +int checkboard(void) +{ + puts("Board: S\n"); + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; +}; + +static struct button_key const buttons[] = { + {"back", IMX_GPIO_NR(2, 2), 'B'}, + {"home", IMX_GPIO_NR(2, 4), 'H'}, + {"menu", IMX_GPIO_NR(2, 1), 'M'}, + {"search", IMX_GPIO_NR(2, 3), 'S'}, + {"volup", IMX_GPIO_NR(7, 13), 'V'}, + {"voldown", IMX_GPIO_NR(4, 5), 'v'}, +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + if (!gpio_get_value(buttons[i].gpnum)) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +#ifdef CONFIG_PREBOOT +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} +#endif + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_PREBOOT + preboot_keys(); +#endif + +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "s"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/snap/Kconfig b/board/boundary/snap/Kconfig new file mode 100644 index 0000000..f8082a1 --- /dev/null +++ b/board/boundary/snap/Kconfig @@ -0,0 +1,18 @@ +if TARGET_SNAP + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "snap" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "snap" + +endif diff --git a/board/boundary/snap/MAINTAINERS b/board/boundary/snap/MAINTAINERS new file mode 100644 index 0000000..67ad735 --- /dev/null +++ b/board/boundary/snap/MAINTAINERS @@ -0,0 +1,6 @@ +TA BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/snap/ +F: include/configs/snap.h +F: configs/snap_defconfig diff --git a/board/boundary/snap/Makefile b/board/boundary/snap/Makefile new file mode 100644 index 0000000..1436c40 --- /dev/null +++ b/board/boundary/snap/Makefile @@ -0,0 +1,6 @@ +# +# Copyright (C) 2014, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# +obj-y := snap.o diff --git a/board/boundary/snap/snap.c b/board/boundary/snap/snap.c new file mode 100644 index 0000000..38315aa --- /dev/null +++ b/board/boundary/snap/snap.c @@ -0,0 +1,600 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2014, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define USDHC_CLK_PAD_CTRL (PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (USDHC_CLK_PAD_CTRL | PAD_CTL_PUS_47K_UP) + +#define WEAK_PULLDN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDN_OUTPUT (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_SLOW) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLUP_OUTPUT (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_SLOW) + + +static const iomux_v3_cfg_t snap_pads[] = { + /* ECSPI1 pads (serial nor eeprom) */ + IOMUX_PAD_CTRL(EIM_D17__ECSPI1_MISO, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D18__ECSPI1_MOSI, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D16__ECSPI1_SCLK, SPI_PAD_CTRL), +#define GP_ECSPI1_NOR_CS IMX_GPIO_NR(3, 19) + IOMUX_PAD_CTRL(EIM_D19__GPIO3_IO19, WEAK_PULLUP), + + /* ENET pads that don't change for PHY reset */ + IOMUX_PAD_CTRL(ENET_MDIO__ENET_MDIO, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(ENET_MDC__ENET_MDC, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TXC__RGMII_TXC, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TD0__RGMII_TD0, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TD1__RGMII_TD1, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TD2__RGMII_TD2, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TD3__RGMII_TD3, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TX_CTL__RGMII_TX_CTL, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(ENET_REF_CLK__ENET_TX_CLK, ENET_PAD_CTRL), + /* pin 42 PHY nRST */ +#define GP_ENET_PHY_RESET IMX_GPIO_NR(1, 27) + IOMUX_PAD_CTRL(ENET_RXD0__GPIO1_IO27, OUTPUT_40OHM), +#define GP_ENET_PHY_INT IMX_GPIO_NR(1, 28) + IOMUX_PAD_CTRL(ENET_TX_EN__GPIO1_IO28, WEAK_PULLUP), + + + /* I2C1 - rtc */ + /* I2C2 - mipi camera, pcie */ + /* I2C3 - sata */ +#define GP_I2C3_EN_SATA IMX_GPIO_NR(3, 0) + IOMUX_PAD_CTRL(EIM_DA0__GPIO3_IO00, WEAK_PULLDN), + +#define GP_PCIE_RESET IMX_GPIO_NR(6, 31) + IOMUX_PAD_CTRL(EIM_BCLK__GPIO6_IO31, OUTPUT_40OHM), + +/* PWM3 goes to mipi camera */ +#define GP_PWM3 IMX_GPIO_NR(1, 17) + IOMUX_PAD_CTRL(SD1_DAT1__GPIO1_IO17, OUTPUT_40OHM), + + /* rtc */ +#define GP_RTC_RV4162_IRQ IMX_GPIO_NR(4, 6) + IOMUX_PAD_CTRL(KEY_COL0__GPIO4_IO06, WEAK_PULLUP), + + /* Sata hard drive detect, high if present */ +#define GP_HD_DETECT IMX_GPIO_NR(2, 30) + IOMUX_PAD_CTRL(EIM_EB2__GPIO2_IO30, WEAK_PULLUP), + + /* Test points */ +#define GP_TP71 IMX_GPIO_NR(1, 30) + IOMUX_PAD_CTRL(ENET_TXD0__GPIO1_IO30, WEAK_PULLUP), +#define GP_TP75 IMX_GPIO_NR(3, 8) + IOMUX_PAD_CTRL(GPIO_18__GPIO7_IO13, WEAK_PULLUP), + + + /* UART1 */ + IOMUX_PAD_CTRL(SD3_DAT7__UART1_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT6__UART1_RX_DATA, UART_PAD_CTRL), + + /* UART2 - console */ + IOMUX_PAD_CTRL(EIM_D26__UART2_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D27__UART2_RX_DATA, UART_PAD_CTRL), + + /* UART3 */ + IOMUX_PAD_CTRL(EIM_D24__UART3_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D25__UART3_RX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D23__UART3_CTS_B, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D31__UART3_RTS_B, UART_PAD_CTRL), + + /* USBH1 */ + IOMUX_PAD_CTRL(EIM_D30__USB_H1_OC, WEAK_PULLUP), +#define GP_USBH1_HUB_RESET IMX_GPIO_NR(2, 28) + IOMUX_PAD_CTRL(EIM_EB0__GPIO2_IO28, WEAK_PULLDN_OUTPUT), + + /* USB OTG */ + IOMUX_PAD_CTRL(GPIO_1__USB_OTG_ID, WEAK_PULLUP), + IOMUX_PAD_CTRL(KEY_COL4__USB_OTG_OC, WEAK_PULLUP), +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) + IOMUX_PAD_CTRL(EIM_D22__GPIO3_IO22, WEAK_PULLDN_OUTPUT), + + /* USDHC3 - micro SD card */ + IOMUX_PAD_CTRL(SD3_CLK__SD3_CLK, USDHC_CLK_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_CMD__SD3_CMD, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT0__SD3_DATA0, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT1__SD3_DATA1, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT2__SD3_DATA2, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT3__SD3_DATA3, USDHC_PAD_CTRL), +#define GP_SD3_CD IMX_GPIO_NR(7, 0) + IOMUX_PAD_CTRL(SD3_DAT5__GPIO7_IO00, WEAK_PULLUP), + + /* USDHC4 - eMMC */ + IOMUX_PAD_CTRL(SD4_CLK__SD4_CLK, USDHC_CLK_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_CMD__SD4_CMD, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT0__SD4_DATA0, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT1__SD4_DATA1, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT2__SD4_DATA2, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT3__SD4_DATA3, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT4__SD4_DATA4, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT5__SD4_DATA5, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT6__SD4_DATA6, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT7__SD4_DATA7, USDHC_PAD_CTRL), +#define GP_EMMC_RESET IMX_GPIO_NR(2, 6) + IOMUX_PAD_CTRL(NANDF_D6__GPIO2_IO06, WEAK_PULLUP), + + +#define GP_OV5640_MIPI_PWRDN IMX_GPIO_NR(6, 4) + IOMUX_PAD_CTRL(CSI0_DAT18__GPIO6_IO04, WEAK_PULLUP), +#define GP_OV5640_MIPI_RESET IMX_GPIO_NR(6, 5) + IOMUX_PAD_CTRL(CSI0_DAT19__GPIO6_IO05, WEAK_PULLDN), + + /* J8 on DB */ +#define GP_GIO1 IMX_GPIO_NR(1, 15) + IOMUX_PAD_CTRL(SD2_DAT0__GPIO1_IO15, WEAK_PULLUP), +#define GP_GIO2 IMX_GPIO_NR(1, 14) + IOMUX_PAD_CTRL(SD2_DAT1__GPIO1_IO14, WEAK_PULLUP), +#define GP_GIO3 IMX_GPIO_NR(1, 13) + IOMUX_PAD_CTRL(SD2_DAT2__GPIO1_IO13, WEAK_PULLUP), +#define GP_GIO4 IMX_GPIO_NR(1, 12) + IOMUX_PAD_CTRL(SD2_DAT3__GPIO1_IO12, WEAK_PULLUP), +#define GP_GIO5 IMX_GPIO_NR(1, 11) + IOMUX_PAD_CTRL(SD2_CMD__GPIO1_IO11, WEAK_PULLUP), +#define GP_GIO6 IMX_GPIO_NR(1, 18) + IOMUX_PAD_CTRL(SD1_CMD__GPIO1_IO18, WEAK_PULLUP), + + /* spares on DB */ +#define GP_IO00 IMX_GPIO_NR(4, 21) + IOMUX_PAD_CTRL(DISP0_DAT0__GPIO4_IO21, WEAK_PULLUP), +#define GP_IO01 IMX_GPIO_NR(4, 22) + IOMUX_PAD_CTRL(DISP0_DAT1__GPIO4_IO22, WEAK_PULLUP), +#define GP_IO02 IMX_GPIO_NR(4, 23) + IOMUX_PAD_CTRL(DISP0_DAT2__GPIO4_IO23, WEAK_PULLUP), +#define GP_IO03 IMX_GPIO_NR(4, 24) + IOMUX_PAD_CTRL(DISP0_DAT3__GPIO4_IO24, WEAK_PULLUP), +#define GP_IO04 IMX_GPIO_NR(4, 25) + IOMUX_PAD_CTRL(DISP0_DAT4__GPIO4_IO25, WEAK_PULLUP), +#define GP_IO05 IMX_GPIO_NR(4, 26) + IOMUX_PAD_CTRL(DISP0_DAT5__GPIO4_IO26, WEAK_PULLUP), +#define GP_IO06 IMX_GPIO_NR(4, 5) + IOMUX_PAD_CTRL(GPIO_19__GPIO4_IO05, WEAK_PULLUP), +#define GP_IO07 IMX_GPIO_NR(1, 0) + IOMUX_PAD_CTRL(GPIO_0__GPIO1_IO00, WEAK_PULLUP), +#define GP_IO08 IMX_GPIO_NR(1, 0) + IOMUX_PAD_CTRL(SD1_CLK__GPIO1_IO20, WEAK_PULLUP), +#define GP_IO09 IMX_GPIO_NR(1, 10) + IOMUX_PAD_CTRL(SD2_CLK__GPIO1_IO10, WEAK_PULLUP), +#define GP_IO10 IMX_GPIO_NR(1, 21) + IOMUX_PAD_CTRL(SD1_DAT3__GPIO1_IO21, WEAK_PULLUP), +}; + +static const iomux_v3_cfg_t enet_pads1[] = { + /* pin 35 - 1 (PHY_AD2) on reset */ + IOMUX_PAD_CTRL(RGMII_RXC__GPIO6_IO30, OUTPUT_40OHM), + /* pin 32 - 1 - (MODE0) all */ + IOMUX_PAD_CTRL(RGMII_RD0__GPIO6_IO25, OUTPUT_40OHM), + /* pin 31 - 1 - (MODE1) all */ + IOMUX_PAD_CTRL(RGMII_RD1__GPIO6_IO27, OUTPUT_40OHM), + /* pin 28 - 1 - (MODE2) all */ + IOMUX_PAD_CTRL(RGMII_RD2__GPIO6_IO28, OUTPUT_40OHM), + /* pin 27 - 1 - (MODE3) all */ + IOMUX_PAD_CTRL(RGMII_RD3__GPIO6_IO29, OUTPUT_40OHM), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + IOMUX_PAD_CTRL(RGMII_RX_CTL__GPIO6_IO24, OUTPUT_40OHM), +}; + +static const iomux_v3_cfg_t enet_pads2[] = { + IOMUX_PAD_CTRL(RGMII_RXC__RGMII_RXC, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RD0__RGMII_RD0, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RD1__RGMII_RD1, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RD2__RGMII_RD2, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RD3__RGMII_RD3, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RX_CTL__RGMII_RX_CTL, ENET_PAD_CTRL), +}; + +/* + * + */ +static struct i2c_pads_info i2c_pads[] = { + /* I2C1, rv4162 */ + I2C_PADS_INFO_ENTRY(I2C1, EIM_D21, 3, 21, EIM_D28, 3, 28, I2C_PAD_CTRL), + I2C_PADS_INFO_ENTRY(I2C2, KEY_COL3, 4, 12, KEY_ROW3, 4, 13, I2C_PAD_CTRL), + I2C_PADS_INFO_ENTRY(I2C3, GPIO_5, 1, 05, GPIO_16, 7, 11, I2C_PAD_CTRL), +}; + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); +// printf("%s:%p *%p=0x%lx\n", __func__, gd, &gd->ram_size, gd->ram_size); + return 0; +} + +static void setup_iomux_enet(void) +{ + gpio_direction_output(GP_ENET_PHY_RESET, 0); /* PHY rst */ + gpio_direction_output(IMX_GPIO_NR(6, 30), 1); + gpio_direction_output(IMX_GPIO_NR(6, 25), 1); + gpio_direction_output(IMX_GPIO_NR(6, 27), 1); + gpio_direction_output(IMX_GPIO_NR(6, 28), 1); + gpio_direction_output(IMX_GPIO_NR(6, 29), 1); + SETUP_IOMUX_PADS(enet_pads1); + gpio_direction_output(IMX_GPIO_NR(6, 24), 1); + + /* Need delay 10ms according to KSZ9021 spec */ + udelay(1000 * 10); + gpio_set_value(GP_ENET_PHY_RESET, 1); /* PHY reset */ + + SETUP_IOMUX_PADS(enet_pads2); + udelay(100); /* Wait 100 us before using mii interface */ +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + return 0; +} + +int board_ehci_power(int port, int on) +{ + int gp = port ? GP_USBH1_HUB_RESET : GP_USB_OTG_PWR; + gpio_set_value(gp, on); + return 0; +} + +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {.esdhc_base = USDHC3_BASE_ADDR, .max_bus_width = 4}, + {.esdhc_base = USDHC4_BASE_ADDR, .max_bus_width = 8}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int gp_cd = GP_SD3_CD; + + if (cfg->esdhc_base != USDHC3_BASE_ADDR) + return 1; /* eMMC always present */ + return !gpio_get_value(gp_cd); +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + break; + case 1: + gpio_set_value(GP_EMMC_RESET, 1); /* release reset */ + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + int gp = (bus == 0 && cs == 0) ? GP_ECSPI1_NOR_CS : -1; + return gp; +} +#endif + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + +#ifdef CONFIG_FEC_MXC + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + /* scan phy 4,5,6,7 */ + phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } +#endif + +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + +static unsigned short gpios_out_low[] = { + GP_ENET_PHY_RESET, + GP_I2C3_EN_SATA, + GP_PCIE_RESET, + GP_USBH1_HUB_RESET, + GP_USB_OTG_PWR, + GP_EMMC_RESET, + GP_OV5640_MIPI_RESET, +}; + +static unsigned short gpios_out_high[] = { + GP_ECSPI1_NOR_CS, + GP_PWM3, + GP_OV5640_MIPI_PWRDN, +}; + +static unsigned short gpios_in[] = { + GP_ENET_PHY_INT, + GP_RTC_RV4162_IRQ, + GP_HD_DETECT, + GP_TP71, + GP_TP75, + GP_SD3_CD, + GP_GIO1, + GP_GIO2, + GP_GIO3, + GP_GIO4, + GP_GIO5, + GP_GIO6, + GP_IO00, + GP_IO01, + GP_IO02, + GP_IO03, + GP_IO04, + GP_IO05, + GP_IO06, + GP_IO07, + GP_IO08, + GP_IO09, + GP_IO10, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned short *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + + SETUP_IOMUX_PADS(snap_pads); + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + int i; + struct i2c_pads_info *p = i2c_pads + i2c_get_info_entry_offset(); + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + for (i = 0; i < 3; i++) { + setup_i2c(i, CONFIG_SYS_I2C_SPEED, 0x7f, p); + p += I2C_PADS_INFO_ENTRY_SPACING; + } + + if (gpio_get_value(GP_HD_DETECT)) + setup_sata(); + return 0; +} + +int checkboard(void) +{ + puts("Board: snap\n"); + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; +}; + +static struct button_key const buttons[] = { + {"b1", GP_TP71, '1'}, +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + if (!gpio_get_value(buttons[i].gpnum)) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +#ifdef CONFIG_PREBOOT +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} +#endif + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x60, 0x58, 0x00, 0x00)}, /* 8-bit eMMC */ + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_PREBOOT + preboot_keys(); +#endif + +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "snap"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/snap/snap2g.cfg b/board/boundary/snap/snap2g.cfg new file mode 100644 index 0000000..ea50978 --- /dev/null +++ b/board/boundary/snap/snap2g.cfg @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2014 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +#include "../nitrogen6_max/ddr-setup.cfg" +#include "../nitrogen6x/1066mhz_4x256mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/sp/6x_bootscript.txt b/board/boundary/sp/6x_bootscript.txt new file mode 100644 index 0000000..f890787 --- /dev/null +++ b/board/boundary/sp/6x_bootscript.txt @@ -0,0 +1,90 @@ +# Yocto-specifics +setenv bootpart 2 +setenv bootdir / + +setenv bootargs enable_wait_mode=off +setenv bootargs $bootargs ar1020_i2c.calibration=-17810,0,60214224,0,-22625,78839808,65536,768,1024 +setenv nextcon 0; + +if hdmidet ; then + setenv bootargs $bootargs video=mxcfb${nextcon}:dev=hdmi,1280x720M@60,if=RGB24,bpp=32 + setenv fbmem "fbmem=28M"; + setexpr nextcon $nextcon + 1 +else + echo "------ no HDMI monitor"; +fi + +setenv bootargs $bootargs video=mxcfb${nextcon}:dev=ldb,LG-9.7,if=RGB666,bpp=32 +if test "0" -eq $nextcon; then + setenv fbmem "fbmem=10M"; +else + setenv fbmem ${fbmem},10M +fi +setexpr nextcon $nextcon + 1 + +while test "4" -ne $nextcon ; do + setenv bootargs $bootargs video=mxcfb${nextcon}:off ; + setexpr nextcon $nextcon + 1 ; +done + +setenv bootargs $bootargs $fbmem +setenv bootargs "$bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait" + +if itest.s x$bootpart == x ; then + bootpart=1 +fi + +setenv bootargs "$bootargs root=/dev/mmcblk0p$bootpart" ; + +dtbname="imx6"; +if itest.s x6S != "x$cpu" ; then + dtbname=${dtbname}q-; +else + dtbname=${dtbname}s-; +fi + +if itest.s x == "x$board" ; then + board=sabrelite +fi +dtbname=${dtbname}${board}.dtb; + +if itest.s x == x${bootdir} ; then + bootdir=/boot/ +fi + +if ${fs}load ${dtype} ${disk}:1 12000000 ${bootdir}$dtbname ; then + havedtb=1; +else + havedtb= +fi + +if itest.s x == x$allow_noncea ; then + setenv bootargs $bootargs mxc_hdmi.only_cea=1; + echo "only CEA modes allowed on HDMI port"; +else + setenv bootargs $bootargs mxc_hdmi.only_cea=0; + echo "non-CEA modes allowed on HDMI, audio may be affected"; +fi + +if kbd ; then + if itest.s xB == x$keybd ; then + if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage-usbwrite ; then + if ${fs}load ${dtype} ${disk}:1 12800000 ${bootdir}uramdisk-usbwrite.img ; then + if itest.s x$havedtb == x ; then + bootm 10800000 12800000 ; + else + bootm 10800000 12800000 12000000 ; + fi + fi + fi + fi +fi + +if ${fs}load ${dtype} ${disk}:1 10800000 ${bootdir}uImage ; then + if itest.s x$havedtb == x ; then + bootm 10800000 ; + else + bootm 10800000 - 12000000 + fi +fi +echo "Error loading kernel image" diff --git a/board/boundary/sp/Kconfig b/board/boundary/sp/Kconfig new file mode 100644 index 0000000..577ba77 --- /dev/null +++ b/board/boundary/sp/Kconfig @@ -0,0 +1,18 @@ +if TARGET_SP + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "sp" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "sp" + +endif diff --git a/board/boundary/sp/MAINTAINERS b/board/boundary/sp/MAINTAINERS new file mode 100644 index 0000000..98c4496 --- /dev/null +++ b/board/boundary/sp/MAINTAINERS @@ -0,0 +1,7 @@ +SP BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/sp/ +F: include/configs/sp.h +F: configs/sp_defconfig + diff --git a/board/boundary/sp/Makefile b/board/boundary/sp/Makefile new file mode 100644 index 0000000..74b8685 --- /dev/null +++ b/board/boundary/sp/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := sp.o diff --git a/board/boundary/sp/sp.c b/board/boundary/sp/sp.c new file mode 100644 index 0000000..96b2a34 --- /dev/null +++ b/board/boundary/sp/sp.c @@ -0,0 +1,554 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | \ + PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDOWN (PAD_CTL_PKE | PAD_CTL_PUE | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +static iomux_v3_cfg_t const init_pads[] = { + /* WiFi/BT pads */ +#define WIFI_WL_IRQ_GP IMX_GPIO_NR(6, 14) + (MX6_PAD_NANDF_CS1__GPIO6_IO14 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(WEAK_PULLDOWN), +#define WIFI_BT_REG_ON IMX_GPIO_NR(6, 15) + (MX6_PAD_NANDF_CS2__GPIO6_IO15 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), +#define WIFI_BT_ENABLE_GP IMX_GPIO_NR(6, 16) + (MX6_PAD_NANDF_CS3__GPIO6_IO16 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), +#define WIFI_WL_ENABLE_GP IMX_GPIO_NR(6, 7) + (MX6_PAD_NANDF_CLE__GPIO6_IO07 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), + + /* Backlight on RGB connector: J15 */ +#define RGB_BACKLIGHT_GP IMX_GPIO_NR(1, 21) + MX6_PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* PWM on LVDS connector: J6 */ +#define LVDS_BACKLIGHT_PWM IMX_GPIO_NR(1, 18) + MX6_PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL), + /* Backlight on LVDS connector: J6 */ +#define LVDS_BACKLIGHT_EN IMX_GPIO_NR(1, 17) + MX6_PAD_SD1_DAT1__GPIO1_IO17 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); + + return 0; +} + +static iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const uart2_pads[] = { + MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +/* I2C1: ADS1000, AR1020-I/SO*/ +static struct i2c_pads_info i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}; + +static struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}; + +/* I2C3, J8 - external touch, ISL1208 */ +static struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC, + .gp = IMX_GPIO_NR(7, 11) + } +}; + +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc3_pads[] = { + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +static iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_NANDF_D6__GPIO2_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +static iomux_v3_cfg_t const usb_pads[] = { + MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), + NEW_PAD_CTRL(MX6_PAD_GPIO_1__USB_OTG_ID, USDHC_PAD_CTRL), /* USBOTG ID pin */ +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); + imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); + + /* Reset USB hub */ + gpio_direction_output(IMX_GPIO_NR(7, 12), 0); + mdelay(2); + gpio_set_value(IMX_GPIO_NR(7, 12), 1); + + return 0; +} +#endif + +#ifdef CONFIG_FSL_ESDHC + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int gp_cd = (cfg->esdhc_base == USDHC3_BASE_ADDR) ? CONFIG_SDHC3_CD : + CONFIG_SDHC4_CD; + + if (gp_cd >= 0) { + gpio_direction_input(gp_cd); + return !gpio_get_value(gp_cd); + } + return 1; /* eMMC is always present */ +} + + +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC3_BASE_ADDR}, + {USDHC4_BASE_ADDR}, +}; + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].max_bus_width = 8; + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + break; + case 1: + imx_iomux_v3_setup_multiple_pads( + usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -1; +} + +static iomux_v3_cfg_t const ecspi1_pads[] = { + /* SS1 */ + MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; + +static void setup_spi(void) +{ + gpio_direction_output(CONFIG_SF_DEFAULT_CS, 1); + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, + ARRAY_SIZE(ecspi1_pads)); +} +#endif + +#if defined(CONFIG_VIDEO_IPUV3) + +void board_enable_lvds(const struct display_info_t *di) +{ + gpio_direction_output(LVDS_BACKLIGHT_PWM, 1); + gpio_direction_output(LVDS_BACKLIGHT_EN, 1); +} + +const struct display_info_t displays[] = { + /* egalax_ts */ + IMX_VD04_LG9_7(LVDS, 1, 2), +}; + +size_t display_count = ARRAY_SIZE(displays); + +static void setup_display(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + int reg; + + reg = readl(&mxc_ccm->chsccdr); + reg &= ~(MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_MASK + |MXC_CCM_CHSCCDR_IPU1_DI0_PODF_MASK); + reg |= (CHSCCDR_IPU_PRE_CLK_540M_PFD << MXC_CCM_CHSCCDR_IPU1_DI0_PRE_CLK_SEL_OFFSET | + (CHSCCDR_PODF_DIVIDE_BY_3 << MXC_CCM_CHSCCDR_IPU1_DI0_PODF_OFFSET)); + writel(reg, &mxc_ccm->chsccdr); +} +#endif + +static unsigned gpios_out_low[] = { + /* Disable wifi/bt */ + WIFI_WL_ENABLE_GP, + WIFI_BT_ENABLE_GP, + WIFI_BT_REG_ON, +}; + +static unsigned short gpios_in[] = { + WIFI_WL_IRQ_GP, + LVDS_BACKLIGHT_PWM, + LVDS_BACKLIGHT_EN, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads)); + +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); + setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +static iomux_v3_cfg_t const i2c0_mux_pads[] = { + MX6_PAD_EIM_D20__GPIO3_IO20 | MUX_PAD_CTRL(I2C_PAD_CTRL), /* CAM */ + MX6_PAD_EIM_CS0__GPIO2_IO23 |MUX_PAD_CTRL(I2C_PAD_CTRL) /* RTC */ +}; + +static iomux_v3_cfg_t const gpio_pads[] = { + MX6_PAD_GPIO_7__GPIO1_IO07 | MUX_PAD_CTRL(PAD_CTL_DSE_240ohm), + MX6_PAD_GPIO_8__GPIO1_IO08 | MUX_PAD_CTRL(PAD_CTL_DSE_240ohm), + MX6_PAD_GPIO_18__GPIO7_IO13 | MUX_PAD_CTRL(PAD_CTL_DSE_240ohm), + MX6_PAD_GPIO_19__GPIO4_IO05 | MUX_PAD_CTRL(PAD_CTL_DSE_240ohm), + MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(PAD_CTL_DSE_240ohm), +}; + +int board_eth_init(bd_t *bis) +{ +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_MXC_SPI + setup_spi(); +#endif + imx_iomux_v3_setup_multiple_pads( + usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + imx_iomux_v3_setup_multiple_pads(i2c0_mux_pads, + ARRAY_SIZE(i2c0_mux_pads)); + imx_iomux_v3_setup_multiple_pads( + gpio_pads, ARRAY_SIZE(gpio_pads)); + gpio_direction_output(IMX_GPIO_NR(1, 7),0); /* GPIO7 */ + gpio_direction_output(IMX_GPIO_NR(1, 8),0); /* GPIO8 */ + gpio_direction_input(IMX_GPIO_NR(7, 13)); /* GPIO18 */ + gpio_direction_input(IMX_GPIO_NR(4, 5)); /* GPIO19 */ + gpio_direction_output(IMX_GPIO_NR(3, 29), 1); /* EIM_D29: ONOFF */ + + gpio_direction_output(IMX_GPIO_NR(3,20),0); + gpio_direction_output(IMX_GPIO_NR(2,23),1); /* enable RTC */ + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + + return 0; +} + +int checkboard(void) +{ + puts("Board: Boundary SP\n"); + + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; +}; + +static struct button_key const buttons[] = { + {"back", IMX_GPIO_NR(7, 13), 'B'}, + {"home", IMX_GPIO_NR(4, 5), 'H'}, +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + if (!gpio_get_value(buttons[i].gpnum)) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +#ifdef CONFIG_PREBOOT +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} +#endif + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif +#ifdef CONFIG_PREBOOT + preboot_keys(); +#endif + return 0; +} + +void board_poweroff(void) +{ + /* Turn off main power */ + gpio_direction_output(IMX_GPIO_NR(3, 29), 0); + while (1) { + udelay(1000000); + } +} + +static int do_poweroff(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[]) +{ + board_poweroff(); + return 0; +} + +U_BOOT_CMD(poweroff, 1, 1, do_poweroff, "Turn off power", ""); + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "sp"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/ta/6x_bootscript.txt b/board/boundary/ta/6x_bootscript.txt new file mode 100644 index 0000000..08a2379 --- /dev/null +++ b/board/boundary/ta/6x_bootscript.txt @@ -0,0 +1,53 @@ +if ${fs}load ${dtype} ${disk}:1 10800000 uEnv.txt ; then + env import -t 10800000 $filesize +else + setenv bootargs +fi + +setenv bootargs $bootargs video=mxcfb0:dev=ldb,1280x800MR@60,if=RGB666 +setenv bootargs $bootargs fbmem=10M ft5x06_ts.screenres=1280,800 +setenv bootargs $bootargs video=mxcfb1:off video=mxcfb2:off video=mxcfb3:off +setenv bootargs $bootargs console=ttymxc1,115200 vmalloc=400M consoleblank=0 rootwait + +if itest.s "x" != "x${disable_giga}" ; then + setenv bootargs $bootargs fec.disable_giga=1 +fi + +if itest.s "x" != "x$gpumem" ; then + setenv bootargs $bootargs galcore.contiguousSize=$gpumem +fi + +setenv initrd_high 0xffffffff +setenv initrd_addr 0x12a00000 + +echo "----------- trying to load /initrd.img"; +if ${fs}load ${dtype} ${disk}:${bootpart} ${initrd_addr} /initrd.img ; then + haverd=1; + setenv initrd_size ${filesize} + if itest 0 -eq ${disk}; then + setenv bootargs "$bootargs root=/dev/disk/by-path/platform-2198000.usdhc-part1" ; + else + setenv bootargs "$bootargs root=/dev/disk/by-path/platform-219c000.usdhc-part1" ; + fi +else + haverd= + setenv bootargs "$bootargs root=/dev/mmcblk0p1" ; +fi + +dtbname=imx6q-ta.dtb +bootdir=/boot + +setenv fdt_high 0xffffffff +setenv fdt_addr 0x13000000 +echo "----------- trying to load ${bootdir}/$dtbname"; +if ${fs}load ${dtype} ${disk}:${bootpart} ${fdt_addr} ${bootdir}/$dtbname ; then + if ${fs}load ${dtype} ${disk}:${bootpart} 0x10800000 /vmlinuz ; then + if itest.s x$haverd == x ; then + bootz 0x10800000 - ${fdt_addr} + else + bootz 0x10800000 ${initrd_addr}:${initrd_size} ${fdt_addr} ; + fi + fi +fi + +echo "Error loading kernel or device tree" diff --git a/board/boundary/ta/Kconfig b/board/boundary/ta/Kconfig new file mode 100644 index 0000000..a0077ee --- /dev/null +++ b/board/boundary/ta/Kconfig @@ -0,0 +1,18 @@ +if TARGET_TA + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "ta" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "ta" + +endif diff --git a/board/boundary/ta/MAINTAINERS b/board/boundary/ta/MAINTAINERS new file mode 100644 index 0000000..4c237ba --- /dev/null +++ b/board/boundary/ta/MAINTAINERS @@ -0,0 +1,6 @@ +TA BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/ta/ +F: include/configs/ta.h +F: configs/ta_defconfig diff --git a/board/boundary/ta/Makefile b/board/boundary/ta/Makefile new file mode 100644 index 0000000..9e64c07 --- /dev/null +++ b/board/boundary/ta/Makefile @@ -0,0 +1,6 @@ +# +# Copyright (C) 2014, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# +obj-y := ta.o diff --git a/board/boundary/ta/ta.c b/board/boundary/ta/ta.c new file mode 100644 index 0000000..732764a --- /dev/null +++ b/board/boundary/ta/ta.c @@ -0,0 +1,655 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2014, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define AUD_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define CEC_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_22K_UP | PAD_CTL_ODE | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define USDHC_CLK_PAD_CTRL (PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (USDHC_CLK_PAD_CTRL | PAD_CTL_PUS_47K_UP) + +#define WEAK_PULLDN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDN_OUTPUT (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_SLOW) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLUP_OUTPUT (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_SLOW) + + +static const iomux_v3_cfg_t ta_pads[] = { + /* AUDMUX - SGTL5000 */ + IOMUX_PAD_CTRL(CSI0_DAT7__AUD3_RXD, AUD_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT4__AUD3_TXC, AUD_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT5__AUD3_TXD, AUD_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT6__AUD3_TXFS, AUD_PAD_CTRL), + + /* ECSPI1 pads (serial nor eeprom) */ + IOMUX_PAD_CTRL(EIM_D17__ECSPI1_MISO, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D18__ECSPI1_MOSI, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D16__ECSPI1_SCLK, SPI_PAD_CTRL), +#define GP_ECSPI1_NOR_CS IMX_GPIO_NR(3, 19) + IOMUX_PAD_CTRL(EIM_D19__GPIO3_IO19, WEAK_PULLUP), + + /* ENET pads that don't change for PHY reset */ + IOMUX_PAD_CTRL(ENET_MDIO__ENET_MDIO, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(ENET_MDC__ENET_MDC, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TXC__RGMII_TXC, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TD0__RGMII_TD0, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TD1__RGMII_TD1, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TD2__RGMII_TD2, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TD3__RGMII_TD3, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_TX_CTL__RGMII_TX_CTL, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(ENET_REF_CLK__ENET_TX_CLK, ENET_PAD_CTRL), + /* pin 42 PHY nRST */ +#define GP_ENET_PHY_RESET IMX_GPIO_NR(1, 27) + IOMUX_PAD_CTRL(ENET_RXD0__GPIO1_IO27, OUTPUT_40OHM), +#define GP_ENET_PHY_INT IMX_GPIO_NR(1, 28) + IOMUX_PAD_CTRL(ENET_TX_EN__GPIO1_IO28, WEAK_PULLUP), + + /* FLEXCAN */ + IOMUX_PAD_CTRL(KEY_COL2__FLEXCAN1_TX, WEAK_PULLUP), + IOMUX_PAD_CTRL(KEY_ROW2__FLEXCAN1_RX, WEAK_PULLUP), + + /* GPIO Keys */ + /* J23: Furnace, J24: Spare, J25: Gas delivery, J26:Auto sampler, J27: Front end power */ +#define GP_INTERLOCK_IRQ IMX_GPIO_NR(2, 20) + IOMUX_PAD_CTRL(EIM_A18__GPIO2_IO20, WEAK_PULLUP), +#define GP_ZERO_CROSSING_IRQ IMX_GPIO_NR(2, 19) + IOMUX_PAD_CTRL(EIM_A19__GPIO2_IO19, WEAK_PULLUP), +#define GP_SYNC_IRQ IMX_GPIO_NR(3, 12) + IOMUX_PAD_CTRL(EIM_DA12__GPIO3_IO12, WEAK_PULLUP), +#define GP_HEATER_FAULT_IRQ IMX_GPIO_NR(3, 3) + IOMUX_PAD_CTRL(EIM_DA3__GPIO3_IO03, WEAK_PULLUP), +#define GP_EXCH_FAULT1 IMX_GPIO_NR(3, 6) + IOMUX_PAD_CTRL(EIM_DA6__GPIO3_IO06, WEAK_PULLUP), +#define GP_EXCH_FAULT2 IMX_GPIO_NR(3, 5) + IOMUX_PAD_CTRL(EIM_DA5__GPIO3_IO05, WEAK_PULLUP), +#define GP_EXCH_FAULT_IRQ IMX_GPIO_NR(3, 10) + IOMUX_PAD_CTRL(EIM_DA10__GPIO3_IO10, WEAK_PULLUP), + + /* GPIO Outputs */ + /* Exchange */ +#define GP_EXCH_OFF IMX_GPIO_NR(3, 11) + IOMUX_PAD_CTRL(EIM_DA11__GPIO3_IO11, WEAK_PULLDN), + /* Heater */ +#define GP_HEATER_OFF IMX_GPIO_NR(3, 4) + IOMUX_PAD_CTRL(EIM_DA4__GPIO3_IO04, WEAK_PULLDN), + /* LEDS */ +#define GP_CAN_CONNECT IMX_GPIO_NR(3, 13) + IOMUX_PAD_CTRL(EIM_DA13__GPIO3_IO13, WEAK_PULLDN), +#define GP_LED_RED IMX_GPIO_NR(3, 0) + IOMUX_PAD_CTRL(EIM_DA0__GPIO3_IO00, WEAK_PULLDN_OUTPUT), + /* dry contact relays */ +#define GP_RELAY_EVENT IMX_GPIO_NR(3, 7) + IOMUX_PAD_CTRL(EIM_DA7__GPIO3_IO07, WEAK_PULLDN_OUTPUT), +#define GP_RELAY_GAS IMX_GPIO_NR(3, 9) + IOMUX_PAD_CTRL(EIM_DA9__GPIO3_IO09, WEAK_PULLDN_OUTPUT), + + /* I2C1 - SGT5000 */ + /* I2C2 - Nothing */ + /* I2C3 - touch connector */ +#define GP_I2C3_IRQ IMX_GPIO_NR(1, 9) + IOMUX_PAD_CTRL(GPIO_9__GPIO1_IO09, WEAK_PULLUP), + + /* LVDS */ +#define GP_LVDS_CONTRAST IMX_GPIO_NR(4, 20) + IOMUX_PAD_CTRL(DI0_PIN4__GPIO4_IO20, WEAK_PULLUP), +#define GP_LVDS_BACKLIGHT IMX_GPIO_NR(1, 18) + IOMUX_PAD_CTRL(SD1_CMD__GPIO1_IO18, OUTPUT_40OHM), + + /* Test points */ +#define GP_TP71 IMX_GPIO_NR(1, 30) + IOMUX_PAD_CTRL(ENET_TXD0__GPIO1_IO30, WEAK_PULLUP), +#define GP_TP74 IMX_GPIO_NR(3, 8) + IOMUX_PAD_CTRL(EIM_DA8__GPIO3_IO08, WEAK_PULLUP), +#define GP_TP77 IMX_GPIO_NR(4, 24) + IOMUX_PAD_CTRL(DISP0_DAT3__GPIO4_IO24, WEAK_PULLUP), +#define GP_TP78 IMX_GPIO_NR(4, 26) + IOMUX_PAD_CTRL(DISP0_DAT5__GPIO4_IO26, WEAK_PULLUP), +#define GP_TP79 IMX_GPIO_NR(3, 2) + IOMUX_PAD_CTRL(EIM_DA2__GPIO3_IO02, WEAK_PULLUP), +#define GP_TP80 IMX_GPIO_NR(3, 1) + IOMUX_PAD_CTRL(EIM_DA1__GPIO3_IO01, WEAK_PULLUP), + + /* SGTL5000 */ + IOMUX_PAD_CTRL(GPIO_0__CCM_CLKO1, OUTPUT_40OHM), + + /* UART1 */ + IOMUX_PAD_CTRL(SD3_DAT7__UART1_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT6__UART1_RX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D24__UART1_DTR_B, UART_PAD_CTRL), + + /* UART2 - console */ + IOMUX_PAD_CTRL(EIM_D26__UART2_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D27__UART2_RX_DATA, UART_PAD_CTRL), + + /* UART5 */ + IOMUX_PAD_CTRL(KEY_COL1__UART5_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(KEY_ROW1__UART5_RX_DATA, UART_PAD_CTRL), + + /* USBH1 */ + IOMUX_PAD_CTRL(EIM_D30__USB_H1_OC, WEAK_PULLUP), +#define GP_USBH1_PWR IMX_GPIO_NR(2, 28) + IOMUX_PAD_CTRL(EIM_EB0__GPIO2_IO28, WEAK_PULLDN_OUTPUT), + + /* USB OTG */ + IOMUX_PAD_CTRL(GPIO_1__USB_OTG_ID, WEAK_PULLUP), + IOMUX_PAD_CTRL(KEY_COL4__USB_OTG_OC, WEAK_PULLUP), +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) + IOMUX_PAD_CTRL(EIM_D22__GPIO3_IO22, WEAK_PULLDN_OUTPUT), + + /* USDHC3 - micro SD card */ + IOMUX_PAD_CTRL(SD3_CLK__SD3_CLK, USDHC_CLK_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_CMD__SD3_CMD, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT0__SD3_DATA0, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT1__SD3_DATA1, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT2__SD3_DATA2, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT3__SD3_DATA3, USDHC_PAD_CTRL), +#define GP_SD3_CD IMX_GPIO_NR(7, 0) + IOMUX_PAD_CTRL(SD3_DAT5__GPIO7_IO00, WEAK_PULLUP), + + /* USDHC4 - eMMC */ + IOMUX_PAD_CTRL(SD4_CLK__SD4_CLK, USDHC_CLK_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_CMD__SD4_CMD, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT0__SD4_DATA0, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT1__SD4_DATA1, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT2__SD4_DATA2, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT3__SD4_DATA3, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT4__SD4_DATA4, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT5__SD4_DATA5, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT6__SD4_DATA6, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT7__SD4_DATA7, USDHC_PAD_CTRL), +#define GP_EMMC_RESET IMX_GPIO_NR(2, 6) + IOMUX_PAD_CTRL(NANDF_D6__GPIO2_IO06, WEAK_PULLUP), +}; + +static const iomux_v3_cfg_t enet_pads1[] = { + /* pin 35 - 1 (PHY_AD2) on reset */ + IOMUX_PAD_CTRL(RGMII_RXC__GPIO6_IO30, OUTPUT_40OHM), + /* pin 32 - 1 - (MODE0) all */ + IOMUX_PAD_CTRL(RGMII_RD0__GPIO6_IO25, OUTPUT_40OHM), + /* pin 31 - 1 - (MODE1) all */ + IOMUX_PAD_CTRL(RGMII_RD1__GPIO6_IO27, OUTPUT_40OHM), + /* pin 28 - 1 - (MODE2) all */ + IOMUX_PAD_CTRL(RGMII_RD2__GPIO6_IO28, OUTPUT_40OHM), + /* pin 27 - 1 - (MODE3) all */ + IOMUX_PAD_CTRL(RGMII_RD3__GPIO6_IO29, OUTPUT_40OHM), + /* pin 33 - 1 - (CLK125_EN) 125Mhz clockout enabled */ + IOMUX_PAD_CTRL(RGMII_RX_CTL__GPIO6_IO24, OUTPUT_40OHM), +}; + +static const iomux_v3_cfg_t enet_pads2[] = { + IOMUX_PAD_CTRL(RGMII_RXC__RGMII_RXC, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RD0__RGMII_RD0, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RD1__RGMII_RD1, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RD2__RGMII_RD2, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RD3__RGMII_RD3, ENET_PAD_CTRL), + IOMUX_PAD_CTRL(RGMII_RX_CTL__RGMII_RX_CTL, ENET_PAD_CTRL), +}; + +/* + * + */ +static struct i2c_pads_info i2c_pads[] = { + /* I2C1, rv4162 */ + I2C_PADS_INFO_ENTRY(I2C1, EIM_D21, 3, 21, EIM_D28, 3, 28, I2C_PAD_CTRL), + I2C_PADS_INFO_ENTRY(I2C2, KEY_COL3, 4, 12, KEY_ROW3, 4, 13, I2C_PAD_CTRL), + I2C_PADS_INFO_ENTRY(I2C3, GPIO_5, 1, 05, GPIO_16, 7, 11, I2C_PAD_CTRL), +}; + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); +// printf("%s:%p *%p=0x%lx\n", __func__, gd, &gd->ram_size, gd->ram_size); + return 0; +} + +static void setup_iomux_enet(void) +{ + gpio_direction_output(GP_ENET_PHY_RESET, 0); /* PHY rst */ + gpio_direction_output(IMX_GPIO_NR(6, 30), 1); + gpio_direction_output(IMX_GPIO_NR(6, 25), 1); + gpio_direction_output(IMX_GPIO_NR(6, 27), 1); + gpio_direction_output(IMX_GPIO_NR(6, 28), 1); + gpio_direction_output(IMX_GPIO_NR(6, 29), 1); + SETUP_IOMUX_PADS(enet_pads1); + gpio_direction_output(IMX_GPIO_NR(6, 24), 1); + + /* Need delay 10ms according to KSZ9021 spec */ + udelay(1000 * 10); + gpio_set_value(GP_ENET_PHY_RESET, 1); /* PHY reset */ + + SETUP_IOMUX_PADS(enet_pads2); + udelay(100); /* Wait 100 us before using mii interface */ +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + return 0; +} + +int board_ehci_power(int port, int on) +{ + int gp = port ? GP_USBH1_PWR : GP_USB_OTG_PWR; + gpio_set_value(gp, on); + return 0; +} + +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {.esdhc_base = USDHC3_BASE_ADDR, .max_bus_width = 4}, + {.esdhc_base = USDHC4_BASE_ADDR, .max_bus_width = 8}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int gp_cd = GP_SD3_CD; + + if (cfg->esdhc_base != USDHC3_BASE_ADDR) + return 1; /* eMMC always present */ + gpio_direction_input(gp_cd); + return !gpio_get_value(gp_cd); +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + break; + case 1: + gpio_set_value(GP_EMMC_RESET, 1); /* release reset */ + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + int gp = (bus == 0 && cs == 0) ? GP_ECSPI1_NOR_CS : -1; + return gp; +} +#endif + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + +#ifdef CONFIG_FEC_MXC + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + /* scan phy 4,5,6,7 */ + phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } +#endif + +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) { + return -1; + } + + env_loadsplash = getenv("loadsplash"); + if (env_loadsplash == NULL) { + printf("Environment variable loadsplash not found!\n"); + return -1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("failed to run loadsplash %s\n\n", env_loadsplash); + return -1; + } + + return 0; +} + +#if defined(CONFIG_VIDEO_IPUV3) + +void board_enable_lvds(const struct display_info_t *di) +{ + gpio_direction_output(GP_LVDS_BACKLIGHT, 1); +} + +const struct display_info_t displays[] = { + IMX_VD_WXGA_J(LVDS, 0, 0), + IMX_VD_WXGA(LVDS, 0, 0), + + /* egalax_ts */ + IMX_VD04_HANNSTAR(LVDS, 1, 2), + IMX_VD04_LG9_7(LVDS, 0, 2), + + IMX_VD38_WSVGA(LVDS, 1, 2), +}; + +size_t display_count = ARRAY_SIZE(displays); + +int board_cfb_skip(void) +{ + return NULL != getenv("novideo"); +} +#endif + +static unsigned short gpios_out_low[] = { + GP_ENET_PHY_RESET, + GP_RELAY_EVENT, + GP_RELAY_GAS, + GP_LVDS_CONTRAST, + GP_LVDS_BACKLIGHT, + GP_USBH1_PWR, + GP_USB_OTG_PWR, + GP_EMMC_RESET, + GP_EXCH_OFF, + GP_HEATER_OFF, +}; + +static unsigned short gpios_out_high[] = { + GP_LED_RED, + GP_ECSPI1_NOR_CS, +}; + +static unsigned short gpios_in[] = { + GP_ENET_PHY_INT, + GP_CAN_CONNECT, + GP_INTERLOCK_IRQ, + GP_ZERO_CROSSING_IRQ, + GP_SYNC_IRQ, + GP_HEATER_FAULT_IRQ, + GP_EXCH_FAULT1, + GP_EXCH_FAULT2, + GP_EXCH_FAULT_IRQ, + GP_I2C3_IRQ, + GP_TP71, + GP_TP74, + GP_TP77, + GP_TP78, + GP_TP79, + GP_TP80, + GP_SD3_CD, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned short *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + + SETUP_IOMUX_PADS(ta_pads); + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + int i; + struct i2c_pads_info *p = i2c_pads + i2c_get_info_entry_offset(); + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + for (i = 0; i < 3; i++) { + setup_i2c(i, CONFIG_SYS_I2C_SPEED, 0x7f, p); + p += I2C_PADS_INFO_ENTRY_SPACING; + } + +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); +#endif + return 0; +} + +int checkboard(void) +{ + puts("Board: TA\n"); + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; +}; + +static struct button_key const buttons[] = { + {"b1", GP_TP71, '1'}, +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + if (!gpio_get_value(buttons[i].gpnum)) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +#ifdef CONFIG_PREBOOT +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} +#endif + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x60, 0x58, 0x00, 0x00)}, /* 8-bit eMMC */ + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_PREBOOT + preboot_keys(); +#endif + +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "ta"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/ta/ta1g.cfg b/board/boundary/ta/ta1g.cfg new file mode 100644 index 0000000..ade17a1 --- /dev/null +++ b/board/boundary/ta/ta1g.cfg @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2014 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +/* turn on main power */ +DATA 4, 0x020e03b4, 0xf0b0 +DATA 4, 0x020e00a0, 5 + +#include "../nitrogen6_max/ddr-setup.cfg" +#include "../nitrogen6x/1066mhz_4x128mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/ta/ta2g.cfg b/board/boundary/ta/ta2g.cfg new file mode 100644 index 0000000..1f8bad6 --- /dev/null +++ b/board/boundary/ta/ta2g.cfg @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2014 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +/* turn on main power */ +DATA 4, 0x020e03b4, 0xf0b0 +DATA 4, 0x020e00a0, 5 + +#include "../nitrogen6_max/ddr-setup.cfg" +#include "../nitrogen6x/1066mhz_4x256mx16.cfg" +#include "../nitrogen6x/clocks.cfg" diff --git a/board/boundary/utc/Kconfig b/board/boundary/utc/Kconfig new file mode 100644 index 0000000..d1e4fb7 --- /dev/null +++ b/board/boundary/utc/Kconfig @@ -0,0 +1,18 @@ +if TARGET_UTC + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "utc" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "utc" + +endif diff --git a/board/boundary/utc/MAINTAINERS b/board/boundary/utc/MAINTAINERS new file mode 100644 index 0000000..57f4947 --- /dev/null +++ b/board/boundary/utc/MAINTAINERS @@ -0,0 +1,7 @@ +UTC BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/utc/ +F: include/configs/utc.h +F: configs/utc_defconfig + diff --git a/board/boundary/utc/Makefile b/board/boundary/utc/Makefile new file mode 100644 index 0000000..e8821f9 --- /dev/null +++ b/board/boundary/utc/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2012-2013, Guennadi Liakhovetski +# (C) Copyright 2012-2013 Freescale Semiconductor, Inc. +# Copyright (C) 2013, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := utc.o diff --git a/board/boundary/utc/utc.c b/board/boundary/utc/utc.c new file mode 100644 index 0000000..a992b9a --- /dev/null +++ b/board/boundary/utc/utc.c @@ -0,0 +1,689 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define ENET_PAD_CTRL (PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define ENET_MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +static iomux_v3_cfg_t const init_pads[] = { + /* wl1271 pads */ +#define WL12XX_WL_IRQ_GP IMX_GPIO_NR(6, 14) + (MX6_PAD_NANDF_CS1__GPIO6_IO14 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(WEAK_PULLDOWN), +#define WL12XX_WL_ENABLE_GP IMX_GPIO_NR(6, 15) + (MX6_PAD_NANDF_CS2__GPIO6_IO15 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), +#define WL12XX_BT_ENABLE_GP IMX_GPIO_NR(6, 16) + (MX6_PAD_NANDF_CS3__GPIO6_IO16 & ~MUX_PAD_CTRL_MASK) + | MUX_PAD_CTRL(OUTPUT_40OHM), + + /* Backlight on RGB connector: J15 */ + MX6_PAD_SD1_DAT3__GPIO1_IO21 | MUX_PAD_CTRL(NO_PAD_CTRL), +#define RGB_BACKLIGHT_GP IMX_GPIO_NR(1, 21) + + /* Backlight on LVDS connector: J6 */ + MX6_PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL), +#define LVDS_BACKLIGHT_GP IMX_GPIO_NR(1, 18) +}; + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); + + return 0; +} + +static iomux_v3_cfg_t const uart1_pads[] = { + MX6_PAD_SD3_DAT6__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_SD3_DAT7__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +static iomux_v3_cfg_t const uart2_pads[] = { + MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), + MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + +#define PC MUX_PAD_CTRL(I2C_PAD_CTRL) + +/* I2C1, SGTL5000 */ +static struct i2c_pads_info i2c_pad_info0 = { + .scl = { + .i2c_mode = MX6_PAD_EIM_D21__I2C1_SCL | PC, + .gpio_mode = MX6_PAD_EIM_D21__GPIO3_IO21 | PC, + .gp = IMX_GPIO_NR(3, 21) + }, + .sda = { + .i2c_mode = MX6_PAD_EIM_D28__I2C1_SDA | PC, + .gpio_mode = MX6_PAD_EIM_D28__GPIO3_IO28 | PC, + .gp = IMX_GPIO_NR(3, 28) + } +}; + +/* I2C2 Camera, MIPI */ +static struct i2c_pads_info i2c_pad_info1 = { + .scl = { + .i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC, + .gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC, + .gp = IMX_GPIO_NR(4, 12) + }, + .sda = { + .i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC, + .gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC, + .gp = IMX_GPIO_NR(4, 13) + } +}; + +/* I2C3, J15 - RGB connector */ +static struct i2c_pads_info i2c_pad_info2 = { + .scl = { + .i2c_mode = MX6_PAD_GPIO_5__I2C3_SCL | PC, + .gpio_mode = MX6_PAD_GPIO_5__GPIO1_IO05 | PC, + .gp = IMX_GPIO_NR(1, 5) + }, + .sda = { + .i2c_mode = MX6_PAD_GPIO_16__I2C3_SDA | PC, + .gpio_mode = MX6_PAD_GPIO_16__GPIO7_IO11 | PC, + .gp = IMX_GPIO_NR(7, 11) + } +}; + +static iomux_v3_cfg_t const usdhc2_pads[] = { + MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +static iomux_v3_cfg_t const usdhc3_pads[] = { + MX6_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */ +}; + +static iomux_v3_cfg_t const usdhc4_pads[] = { + MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL), + MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL), +}; + +static iomux_v3_cfg_t const enet_pads1[] = { + MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_MDIO_PAD_CTRL), + MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_MDIO_PAD_CTRL), + MX6_PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_TX_CTL__RGMII_TX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_REF_CLK__ENET_TX_CLK | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RXC__GPIO6_IO30 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD0__GPIO6_IO25 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD1__GPIO6_IO27 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD2__GPIO6_IO28 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD3__GPIO6_IO29 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RX_CTL__GPIO6_IO24 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_ENET_RXD0__GPIO1_IO27 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static iomux_v3_cfg_t const enet_pads2[] = { + MX6_PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL), + MX6_PAD_RGMII_RX_CTL__RGMII_RX_CTL | MUX_PAD_CTRL(ENET_PAD_CTRL), +}; + +static unsigned char strap_gpios[] = { + IMX_GPIO_NR(6, 25), /* RXD0 */ + IMX_GPIO_NR(6, 27), /* RXD1 */ + IMX_GPIO_NR(6, 28), /* RXD2 */ + IMX_GPIO_NR(6, 29), /* RXD3 */ + IMX_GPIO_NR(6, 24), /* RX_CTL */ + IMX_GPIO_NR(6, 30), /* RXC */ +}; + +#define ATHEROS_STRAP 0x02 /* Get phy addr of 4 + 2 = 6 */ + +static void set_strap_pins(unsigned strap) +{ + int i = 0; + + for (i = 0; i < 6; i++) { + gpio_direction_output(strap_gpios[i], strap & 1); + strap >>= 1; + } +} + +static void setup_iomux_enet(void) +{ + gpio_direction_output(IMX_GPIO_NR(1, 27), 0); /* PHY rst */ + set_strap_pins(ATHEROS_STRAP); + imx_iomux_v3_setup_multiple_pads(enet_pads1, ARRAY_SIZE(enet_pads1)); + + udelay(1000 * 10); + gpio_set_value(IMX_GPIO_NR(1, 27), 1); /* PHY reset */ + udelay(100); /* Atheros needs a hold time */ + imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2)); +} + +static iomux_v3_cfg_t const usb_pads[] = { + MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), +}; + +static void setup_iomux_uart(void) +{ + imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); + imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); +} + +#ifdef CONFIG_USB_EHCI_MX6 +int board_ehci_hcd_init(int port) +{ + imx_iomux_v3_setup_multiple_pads(usb_pads, ARRAY_SIZE(usb_pads)); + + /* Reset USB hub */ + gpio_direction_output(IMX_GPIO_NR(7, 12), 0); + mdelay(2); + gpio_set_value(IMX_GPIO_NR(7, 12), 1); + + return 0; +} +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC3_BASE_ADDR}, + {USDHC4_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int ret; + + if (cfg->esdhc_base == USDHC3_BASE_ADDR) { + gpio_direction_input(IMX_GPIO_NR(7, 0)); + ret = !gpio_get_value(IMX_GPIO_NR(7, 0)); + } else { + ret = 1; + } + return ret; +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].max_bus_width = 8; + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + break; + case 1: + imx_iomux_v3_setup_multiple_pads( + usdhc4_pads, ARRAY_SIZE(usdhc4_pads)); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -1; +} + +static iomux_v3_cfg_t const ecspi1_pads[] = { + /* SS1 */ + MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), + MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), + MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), +}; + +static void setup_spi(void) +{ + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, + ARRAY_SIZE(ecspi1_pads)); +} +#endif + +int board_phy_config(struct phy_device *phydev) +{ + if (phydev->drv->uid == 0x4dd074) { + int regval; + + /* Select 125MHz clk from local PLL on CLK_25M */ + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x0007); + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); + regval = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); + regval &= ~0x1c; + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, (regval|0x0018)); + + /* introduce tx clock delay */ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x05); + regval = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, (regval|0x0100)); + printf("phy: AR8031\n"); + } + if (phydev->drv->config) + phydev->drv->config(phydev); + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + uint32_t base = IMX_FEC_BASE; + struct mii_dev *bus = NULL; + struct phy_device *phydev = NULL; + int ret; + + setup_iomux_enet(); + +#ifdef CONFIG_FEC_MXC + bus = fec_get_miibus(base, -1); + if (!bus) + return 0; + /* scan phy 4,5,6,7 */ + phydev = phy_find_by_mask(bus, (0xf << 4), PHY_INTERFACE_MODE_RGMII); + if (!phydev) { + free(bus); + return 0; + } + printf("using phy at %d\n", phydev->addr); + ret = fec_probe(bis, -1, base, bus, phydev); + if (ret) { + printf("FEC MXC: %s:failed\n", __func__); + free(phydev); + free(bus); + } +#endif +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + + +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) { + return -1; + } + + env_loadsplash = getenv("loadsplash"); + if (env_loadsplash == NULL) { + printf("Environment variable loadsplash not found!\n"); + return -1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("failed to run loadsplash %s\n\n", env_loadsplash); + return -1; + } + + return 0; +} + +#if defined(CONFIG_VIDEO_IPUV3) + +static iomux_v3_cfg_t const rgb_pads[] = { + MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, + MX6_PAD_DI0_PIN15__IPU1_DI0_PIN15, + MX6_PAD_DI0_PIN2__IPU1_DI0_PIN02, + MX6_PAD_DI0_PIN3__IPU1_DI0_PIN03, + MX6_PAD_DI0_PIN4__GPIO4_IO20, + MX6_PAD_DISP0_DAT0__IPU1_DISP0_DATA00, + MX6_PAD_DISP0_DAT1__IPU1_DISP0_DATA01, + MX6_PAD_DISP0_DAT2__IPU1_DISP0_DATA02, + MX6_PAD_DISP0_DAT3__IPU1_DISP0_DATA03, + MX6_PAD_DISP0_DAT4__IPU1_DISP0_DATA04, + MX6_PAD_DISP0_DAT5__IPU1_DISP0_DATA05, + MX6_PAD_DISP0_DAT6__IPU1_DISP0_DATA06, + MX6_PAD_DISP0_DAT7__IPU1_DISP0_DATA07, + MX6_PAD_DISP0_DAT8__IPU1_DISP0_DATA08, + MX6_PAD_DISP0_DAT9__IPU1_DISP0_DATA09, + MX6_PAD_DISP0_DAT10__IPU1_DISP0_DATA10, + MX6_PAD_DISP0_DAT11__IPU1_DISP0_DATA11, + MX6_PAD_DISP0_DAT12__IPU1_DISP0_DATA12, + MX6_PAD_DISP0_DAT13__IPU1_DISP0_DATA13, + MX6_PAD_DISP0_DAT14__IPU1_DISP0_DATA14, + MX6_PAD_DISP0_DAT15__IPU1_DISP0_DATA15, + MX6_PAD_DISP0_DAT16__IPU1_DISP0_DATA16, + MX6_PAD_DISP0_DAT17__IPU1_DISP0_DATA17, + MX6_PAD_DISP0_DAT18__IPU1_DISP0_DATA18, + MX6_PAD_DISP0_DAT19__IPU1_DISP0_DATA19, + MX6_PAD_DISP0_DAT20__IPU1_DISP0_DATA20, + MX6_PAD_DISP0_DAT21__IPU1_DISP0_DATA21, + MX6_PAD_DISP0_DAT22__IPU1_DISP0_DATA22, + MX6_PAD_DISP0_DAT23__IPU1_DISP0_DATA23, +}; + +void board_enable_lvds(const struct display_info_t *di) +{ + gpio_direction_output(LVDS_BACKLIGHT_GP, 1); +} + +void board_enable_lcd(const struct display_info_t *di) +{ + imx_iomux_v3_setup_multiple_pads(rgb_pads, ARRAY_SIZE(rgb_pads)); + gpio_direction_output(RGB_BACKLIGHT_GP, 1); +} + +const struct display_info_t displays[] = { + /* hdmi */ + IMX_VD50_1280_720M_60(HDMI, 1, 1), + IMX_VD50_1920_1080M_60(HDMI, 0, 1), + IMX_VD50_1024_768M_60(HDMI, 0, 1), + + /* egalax_ts */ + IMX_VD04_HANNSTAR(LVDS, 1, 2), + + /* ft5x06 */ + IMX_VD38_WSVGA(LVDS, 1, 2), + + /* tsc2004 */ + IMX_VD48_CLAA_WVGA(LCD, 1, 2), + IMX_VD48_QVGA(LCD, 0, 2), + + IMX_VD_WXGA_J(LVDS, 0, 0), +}; + +size_t display_count = ARRAY_SIZE(displays); +#endif + +static unsigned gpios_out_low[] = { + /* Disable wifi */ + WL12XX_WL_ENABLE_GP, + WL12XX_BT_ENABLE_GP, +}; + +static unsigned short gpios_in[] = { + LVDS_BACKLIGHT_GP, + RGB_BACKLIGHT_GP, + WL12XX_WL_IRQ_GP, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + setup_iomux_uart(); + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + + imx_iomux_v3_setup_multiple_pads(init_pads, ARRAY_SIZE(init_pads)); + +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); +#endif + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +int board_init(void) +{ + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + +#ifdef CONFIG_MXC_SPI + setup_spi(); +#endif + imx_iomux_v3_setup_multiple_pads( + usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info0); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info2); + +#ifdef CONFIG_CMD_SATA + setup_sata(); +#endif + + return 0; +} + +int checkboard(void) +{ + puts("Board: UTC\n"); + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; +}; + +static struct button_key const buttons[] = { + {"back", IMX_GPIO_NR(2, 2), 'B'}, + {"home", IMX_GPIO_NR(2, 4), 'H'}, + {"menu", IMX_GPIO_NR(2, 1), 'M'}, + {"search", IMX_GPIO_NR(2, 3), 'S'}, + {"volup", IMX_GPIO_NR(7, 13), 'V'}, + {"voldown", IMX_GPIO_NR(4, 5), 'v'}, +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + if (!gpio_get_value(buttons[i].gpnum)) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +#ifdef CONFIG_PREBOOT +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} +#endif + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_PREBOOT + preboot_keys(); +#endif + +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +int board_late_init(void) +{ + int cpurev = get_cpu_rev(); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "utc"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + return 0; +} diff --git a/board/boundary/vp/1066mhz_4x256mx16.cfg b/board/boundary/vp/1066mhz_4x256mx16.cfg new file mode 100644 index 0000000..475527f --- /dev/null +++ b/board/boundary/vp/1066mhz_4x256mx16.cfg @@ -0,0 +1,43 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +DATA 4, MX6_MMDC_P0_MDPDC, 0x00020036 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 +DATA 4, MX6_MMDC_P0_MDCFG0, 0x898E7974 +DATA 4, MX6_MMDC_P0_MDCFG1, 0xDB538F64 +DATA 4, MX6_MMDC_P0_MDCFG2, 0x01FF00DB +DATA 4, MX6_MMDC_P0_MDRWD, 0x000026D2 +DATA 4, MX6_MMDC_P0_MDOR, 0x008E1023 +DATA 4, MX6_MMDC_P0_MDOTC, 0x09444040 +DATA 4, MX6_MMDC_P0_MDPDC, 0x00025576 +DATA 4, MX6_MMDC_P0_MDASP, 0x00000047 +DATA 4, MX6_MMDC_P0_MDCTL, 0x841A0000 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04088032 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008033 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00428031 +DATA 4, MX6_MMDC_P0_MDSCR, 0x19308030 +DATA 4, MX6_MMDC_P0_MDSCR, 0x04008040 +DATA 4, MX6_MMDC_P0_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P1_MPZQHWCTRL, 0xA1390003 +DATA 4, MX6_MMDC_P0_MDREF, 0x00007800 +DATA 4, MX6_MMDC_P0_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P1_MPODTCTRL, 0x00022227 +DATA 4, MX6_MMDC_P0_MPDGCTRL0, 0x42740304 +DATA 4, MX6_MMDC_P0_MPDGCTRL1, 0x026e0265 +DATA 4, MX6_MMDC_P1_MPDGCTRL0, 0x02750306 +DATA 4, MX6_MMDC_P1_MPDGCTRL1, 0x02720244 +DATA 4, MX6_MMDC_P0_MPRDDLCTL, 0x463d4041 +DATA 4, MX6_MMDC_P1_MPRDDLCTL, 0x42413c47 +DATA 4, MX6_MMDC_P0_MPWRDLCTL, 0x37414441 +DATA 4, MX6_MMDC_P1_MPWRDLCTL, 0x4633473b +DATA 4, MX6_MMDC_P0_MPWLDECTRL0, 0x0025001f +DATA 4, MX6_MMDC_P0_MPWLDECTRL1, 0x00290027 +DATA 4, MX6_MMDC_P1_MPWLDECTRL0, 0x001f002b +DATA 4, MX6_MMDC_P1_MPWLDECTRL1, 0x000f0029 +DATA 4, MX6_MMDC_P0_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P1_MPMUR0, 0x00000800 +DATA 4, MX6_MMDC_P0_MDSCR, 0x00000000 +DATA 4, MX6_MMDC_P0_MAPSR, 0x00011006 diff --git a/board/boundary/vp/Kconfig b/board/boundary/vp/Kconfig new file mode 100644 index 0000000..86b322f --- /dev/null +++ b/board/boundary/vp/Kconfig @@ -0,0 +1,18 @@ +if TARGET_VP + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "vp" + +config SYS_VENDOR + default "boundary" + +config SYS_SOC + default "mx6" + +config SYS_CONFIG_NAME + default "vp" + +endif diff --git a/board/boundary/vp/MAINTAINERS b/board/boundary/vp/MAINTAINERS new file mode 100644 index 0000000..9b4bab0 --- /dev/null +++ b/board/boundary/vp/MAINTAINERS @@ -0,0 +1,7 @@ +NITROGEN6_MAX BOARD +M: Eric Nelson +S: Maintained +F: board/boundary/nitrogen6_max/ +F: include/configs/nitrogen6_max.h +F: configs/nitrogen6_max_defconfig + diff --git a/board/boundary/vp/Makefile b/board/boundary/vp/Makefile new file mode 100644 index 0000000..6992c16 --- /dev/null +++ b/board/boundary/vp/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2014, Boundary Devices +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := vp.o diff --git a/board/boundary/vp/clocks.cfg b/board/boundary/vp/clocks.cfg new file mode 100644 index 0000000..8bddb91 --- /dev/null +++ b/board/boundary/vp/clocks.cfg @@ -0,0 +1,41 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* set the default clock gate to save power */ +DATA 4, CCM_CCGR0, 0x00C03F3F +DATA 4, CCM_CCGR1, 0x0030FC03 +DATA 4, CCM_CCGR2, 0x0FFFC000 +DATA 4, CCM_CCGR3, 0x3FF00000 +DATA 4, CCM_CCGR4, 0x00FFF300 +DATA 4, CCM_CCGR5, 0x0F0000C3 +DATA 4, CCM_CCGR6, 0x000003FF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4, MX6_IOMUXC_GPR4, 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4, MX6_IOMUXC_GPR6, 0x007F007F +DATA 4, MX6_IOMUXC_GPR7, 0x007F007F + +/* + * Setup CCM_CCOSR register as follows: + * + * cko1_en = 1 --> CKO1 enabled + * cko1_div = 111 --> divide by 8 + * cko1_sel = 1011 --> ahb_clk_root + * + * This sets CKO1 at ahb_clk_root/8 = 132/8 = 16.5 MHz + */ +DATA 4, CCM_CCOSR, 0x000000fb diff --git a/board/boundary/vp/ddr-setup.cfg b/board/boundary/vp/ddr-setup.cfg new file mode 100644 index 0000000..2748d40 --- /dev/null +++ b/board/boundary/vp/ddr-setup.cfg @@ -0,0 +1,96 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ + +/* + * DDR3 settings + * MX6Q ddr is limited to 1066 Mhz currently 1056 MHz(528 MHz clock), + * memory bus width: 64 bits x16/x32/x64 + * MX6DL ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 64 bits x16/x32/x64 + * MX6SOLO ddr is limited to 800 MHz(400 MHz clock) + * memory bus width: 32 bits x16/x32 + */ +DATA 4, MX6_IOM_DRAM_SDQS0, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS1, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS2, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS3, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS4, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS5, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS6, 0x00000030 +DATA 4, MX6_IOM_DRAM_SDQS7, 0x00000030 + +DATA 4, MX6_IOM_GRP_B0DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B1DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B2DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B3DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B4DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B5DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B6DS, 0x00000030 +DATA 4, MX6_IOM_GRP_B7DS, 0x00000030 +DATA 4, MX6_IOM_GRP_ADDDS, 0x00000030 +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ +DATA 4, MX6_IOM_GRP_CTLDS, 0x00000030 + +DATA 4, MX6_IOM_DRAM_DQM0, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM1, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM2, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM3, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM4, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM5, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM6, 0x00020030 +DATA 4, MX6_IOM_DRAM_DQM7, 0x00020030 + +DATA 4, MX6_IOM_DRAM_CAS, 0x00020030 +DATA 4, MX6_IOM_DRAM_RAS, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCLK_0, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCLK_1, 0x00020030 + +DATA 4, MX6_IOM_DRAM_RESET, 0x00020030 +DATA 4, MX6_IOM_DRAM_SDCKE0, 0x00003000 +DATA 4, MX6_IOM_DRAM_SDCKE1, 0x00003000 + +DATA 4, MX6_IOM_DRAM_SDODT0, 0x00003030 +DATA 4, MX6_IOM_DRAM_SDODT1, 0x00003030 + +/* (differential input) */ +DATA 4, MX6_IOM_DDRMODE_CTL, 0x00020000 +/* (differential input) */ +DATA 4, MX6_IOM_GRP_DDRMODE, 0x00020000 +/* disable ddr pullups */ +DATA 4, MX6_IOM_GRP_DDRPKE, 0x00000000 +DATA 4, MX6_IOM_DRAM_SDBA2, 0x00000000 +/* 40 Ohm drive strength for cs0/1,sdba2,cke0/1,sdwe */ +DATA 4, MX6_IOM_GRP_DDR_TYPE, 0x000C0000 + +/* Read data DQ Byte0-3 delay */ +DATA 4, MX6_MMDC_P0_MPRDDQBY0DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY1DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY2DL, 0x33333333 +DATA 4, MX6_MMDC_P0_MPRDDQBY3DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY0DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY1DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY2DL, 0x33333333 +DATA 4, MX6_MMDC_P1_MPRDDQBY3DL, 0x33333333 + +/* + * MDMISC mirroring interleaved (row/bank/col) + */ +DATA 4, MX6_MMDC_P0_MDMISC, 0x00081740 + +/* + * MDSCR con_req + */ +DATA 4, MX6_MMDC_P0_MDSCR, 0x00008000 diff --git a/board/boundary/vp/vp.c b/board/boundary/vp/vp.c new file mode 100644 index 0000000..8df007a --- /dev/null +++ b/board/boundary/vp/vp.c @@ -0,0 +1,783 @@ +/* + * Copyright (C) 2010-2013 Freescale Semiconductor, Inc. + * Copyright (C) 2013, Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define AUD_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define CSI_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define RGB_PAD_CTRL PAD_CTL_DSE_120ohm + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_FAST) + +#define USDHC_CLK_PAD_CTRL (PAD_CTL_SPEED_LOW | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define USDHC_PAD_CTRL (USDHC_CLK_PAD_CTRL | PAD_CTL_PUS_47K_UP) + +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +#define WEAK_PULLUP (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_SRE_SLOW) + +#define WEAK_PULLUP_OUTPUT (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +#define WEAK_PULLDN_OUTPUT (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_SLOW) + +#define CEC_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_22K_UP | PAD_CTL_ODE | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) + +#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm) + +static const iomux_v3_cfg_t vp_pads[] = { + /* Main power on, High shuts down system */ +#define GP_MAIN_POWER_EN IMX_GPIO_NR(1, 19) + IOMUX_PAD_CTRL(SD1_DAT2__GPIO1_IO19, WEAK_PULLDN), +#define GP_LED_BLUE IMX_GPIO_NR(2, 24) + IOMUX_PAD_CTRL(EIM_CS1__GPIO2_IO24, WEAK_PULLDN), + + /* AUDMUX */ + IOMUX_PAD_CTRL(CSI0_DAT7__AUD3_RXD, AUD_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT4__AUD3_TXC, AUD_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT5__AUD3_TXD, AUD_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT6__AUD3_TXFS, AUD_PAD_CTRL), + + /* ECSPI1 */ + IOMUX_PAD_CTRL(EIM_D17__ECSPI1_MISO, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D18__ECSPI1_MOSI, SPI_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D16__ECSPI1_SCLK, SPI_PAD_CTRL), +#define GP_ECSPI1_CS1 IMX_GPIO_NR(3, 19) + IOMUX_PAD_CTRL(EIM_D19__GPIO3_IO19, WEAK_PULLUP), /* SS1 */ + + /* GPIO_KEYS */ +#define GP_MAIN_POWER_BUTTON IMX_GPIO_NR(1, 2) + IOMUX_PAD_CTRL(GPIO_2__GPIO1_IO02, WEAK_PULLUP), +#define GP_MENU IMX_GPIO_NR(2, 1) + IOMUX_PAD_CTRL(NANDF_D1__GPIO2_IO01, BUTTON_PAD_CTRL), +#define GP_BACK IMX_GPIO_NR(4, 5) + IOMUX_PAD_CTRL(GPIO_19__GPIO4_IO05, BUTTON_PAD_CTRL), + /* Labeled Search (mapped to Power under Android) */ +#define GP_SEARCH IMX_GPIO_NR(2, 3) + IOMUX_PAD_CTRL(NANDF_D3__GPIO2_IO03, BUTTON_PAD_CTRL), +#define GP_VOLUME_UP IMX_GPIO_NR(7, 13) + IOMUX_PAD_CTRL(GPIO_18__GPIO7_IO13, BUTTON_PAD_CTRL), + + /* 2 momentary switches */ +#define GP_INPUT1 IMX_GPIO_NR(4, 8) + IOMUX_PAD_CTRL(KEY_COL1__GPIO4_IO08, WEAK_PULLUP), /* SW3 gpio */ +#define GP_INPUT2 IMX_GPIO_NR(4, 9) + IOMUX_PAD_CTRL(KEY_ROW1__GPIO4_IO09, WEAK_PULLUP), /* SW2 gpio */ + + /* HDMI */ + IOMUX_PAD_CTRL(EIM_A25__HDMI_TX_CEC_LINE, CEC_PAD_CTRL), + + /* I2C3MUX */ +#define GP_I2C3_PCIE_EN IMX_GPIO_NR(2, 25) + IOMUX_PAD_CTRL(EIM_OE__GPIO2_IO25, WEAK_PULLDN_OUTPUT), +#define GP_I2C3_MAX77818_EN IMX_GPIO_NR(3, 2) + IOMUX_PAD_CTRL(EIM_DA2__GPIO3_IO02, WEAK_PULLDN_OUTPUT), + + /* I2C3 MAX77818 */ +#define GP_MAX77818_INOKB IMX_GPIO_NR(3, 4) /* INOKB, WCHG_VALID_INT */ + IOMUX_PAD_CTRL(EIM_DA4__GPIO3_IO04, WEAK_PULLUP), +#define GP_MAX77818_WCINOKB IMX_GPIO_NR(3, 5) /* WCINOKB, WCHG_INT */ + IOMUX_PAD_CTRL(EIM_DA5__GPIO3_IO05, WEAK_PULLUP), +#define GP_MAX77818_INTB IMX_GPIO_NR(3, 6) /* INTB, CHG_INT */ + IOMUX_PAD_CTRL(EIM_DA6__GPIO3_IO06, WEAK_PULLUP), + + /* I2C3 touchscreen connector(J55) */ +#define GP_TOUCH_RESET IMX_GPIO_NR(2, 22) + IOMUX_PAD_CTRL(EIM_A16__GPIO2_IO22, WEAK_PULLDN_OUTPUT), +#define GP_TOUCH_IRQ IMX_GPIO_NR(2, 27) + IOMUX_PAD_CTRL(EIM_LBA__GPIO2_IO27, WEAK_PULLUP), + + /* PCIe */ +#define GP_PCIE_RESET IMX_GPIO_NR(6, 31) + IOMUX_PAD_CTRL(EIM_BCLK__GPIO6_IO31, WEAK_PULLDN_OUTPUT), + + /* PWM1: Backlight on RGB connector */ +#define GP_RGB_BACKLIGHT IMX_GPIO_NR(1, 21) + IOMUX_PAD_CTRL(SD1_DAT3__GPIO1_IO21, WEAK_PULLDN_OUTPUT), + + /* rtc - i2c1 */ +#define GP_RTC_RV4162_IRQ IMX_GPIO_NR(4, 6) + IOMUX_PAD_CTRL(KEY_COL0__GPIO4_IO06, WEAK_PULLUP), + + + /* SGTL5000 */ + IOMUX_PAD_CTRL(GPIO_0__CCM_CLKO1, OUTPUT_40OHM), /* SGTL5000 sys_mclk */ +#define GP_SGTL5000_MUTE IMX_GPIO_NR(1, 29) /* Low is muted */ + IOMUX_PAD_CTRL(ENET_TXD1__GPIO1_IO29, WEAK_PULLDN_OUTPUT), +#define GP_HEADPHONE_DET IMX_GPIO_NR(4, 7) + IOMUX_PAD_CTRL(KEY_ROW0__GPIO4_IO07, WEAK_PULLUP), +#define GP_LINE_IN_JACK_DETECT IMX_GPIO_NR(1, 17) + IOMUX_PAD_CTRL(SD1_DAT1__GPIO1_IO17, WEAK_PULLUP), +#define GP_MIC_DETECT IMX_GPIO_NR(7, 8) + IOMUX_PAD_CTRL(SD3_RST__GPIO7_IO08, WEAK_PULLUP), + + /* UART1 */ + IOMUX_PAD_CTRL(SD3_DAT7__UART1_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT6__UART1_RX_DATA, UART_PAD_CTRL), + + /* UART2 for debug */ +#ifndef CONFIG_SILENT_UART + IOMUX_PAD_CTRL(EIM_D26__UART2_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D27__UART2_RX_DATA, UART_PAD_CTRL), +#else + IOMUX_PAD_CTRL(EIM_D26__GPIO3_IO26, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D27__GPIO3_IO27, UART_PAD_CTRL), +#endif + /* UART3 - Broadcom Bluetooth*/ + IOMUX_PAD_CTRL(EIM_D24__UART3_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D25__UART3_RX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D23__UART3_CTS_B, UART_PAD_CTRL), + IOMUX_PAD_CTRL(EIM_D31__UART3_RTS_B, UART_PAD_CTRL), + + /* UART4 - GPS */ + IOMUX_PAD_CTRL(CSI0_DAT12__UART4_TX_DATA, UART_PAD_CTRL), + IOMUX_PAD_CTRL(CSI0_DAT13__UART4_RX_DATA, UART_PAD_CTRL), +#define GP_GPS_RESET IMX_GPIO_NR(6, 0) + IOMUX_PAD_CTRL(CSI0_DAT14__GPIO6_IO00, WEAK_PULLDN_OUTPUT), +#define GP_GPS_IRQ IMX_GPIO_NR(6, 1) + IOMUX_PAD_CTRL(CSI0_DAT15__GPIO6_IO01, WEAK_PULLUP), +#define GP_GPS_HEARTBEAT IMX_GPIO_NR(6, 2) + IOMUX_PAD_CTRL(CSI0_DAT16__GPIO6_IO02, WEAK_PULLUP), + + /* USBH1 */ +#define GP_USB_HUB_RESET IMX_GPIO_NR(7, 12) + IOMUX_PAD_CTRL(GPIO_17__GPIO7_IO12, WEAK_PULLDN_OUTPUT), /* USB Hub Reset for USB2512 4 port hub */ +#define GP_USB_DN1_PWR_EN IMX_GPIO_NR(1, 4) /* low is off */ + IOMUX_PAD_CTRL(GPIO_4__GPIO1_IO04, WEAK_PULLDN_OUTPUT), +#define GP_5V_EN IMX_GPIO_NR(1, 7) /* usb and hdmi 5v*/ + IOMUX_PAD_CTRL(GPIO_7__GPIO1_IO07, WEAK_PULLDN_OUTPUT), + /* + * port1 - DN1 power controlled by GPIO_4 on J6 + * port2 - usb power controlled by hub on J7 + * port3 - usb power always on, on J1 and PCIe + */ + + /* USBOTG - J3 */ + IOMUX_PAD_CTRL(GPIO_1__USB_OTG_ID, WEAK_PULLUP), + IOMUX_PAD_CTRL(KEY_COL4__USB_OTG_OC, WEAK_PULLUP), +#define GP_USB_OTG_PWR IMX_GPIO_NR(3, 22) + IOMUX_PAD_CTRL(EIM_D22__GPIO3_IO22, WEAK_PULLDN_OUTPUT), + + /* USDHC2: Broadcom Wifi */ + IOMUX_PAD_CTRL(SD2_CLK__SD2_CLK, USDHC_CLK_PAD_CTRL), + IOMUX_PAD_CTRL(SD2_CMD__SD2_CMD, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD2_DAT0__SD2_DATA0, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD2_DAT1__SD2_DATA1, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD2_DAT2__SD2_DATA2, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD2_DAT3__SD2_DATA3, USDHC_PAD_CTRL), + +#define GP_BRM_BT_RESET IMX_GPIO_NR(6, 8) + IOMUX_PAD_CTRL(NANDF_ALE__GPIO6_IO08, WEAK_PULLDN_OUTPUT), +#define GP_BRM_BT_EN IMX_GPIO_NR(6, 15) + IOMUX_PAD_CTRL(NANDF_CS2__GPIO6_IO15, WEAK_PULLDN_OUTPUT), +#define GP_BRM_BT_WAKE_IRQ IMX_GPIO_NR(2, 7) + IOMUX_PAD_CTRL(NANDF_D7__GPIO2_IO07, WEAK_PULLUP), +#define GP_BRM_BT_WAKEUP IMX_GPIO_NR(6, 16) + IOMUX_PAD_CTRL(NANDF_CS3__GPIO6_IO16, WEAK_PULLDN), + +#define GP_BRM_WL_WAKE_IRQ IMX_GPIO_NR(6, 11) + IOMUX_PAD_CTRL(NANDF_CS0__GPIO6_IO11, WEAK_PULLDN), +#define GP_BRM_CLOCK_REQUEST IMX_GPIO_NR(6, 9) + IOMUX_PAD_CTRL(NANDF_WP_B__GPIO6_IO09, WEAK_PULLUP), +#define GP_BRM_WL_EN IMX_GPIO_NR(6, 7) + IOMUX_PAD_CTRL(NANDF_CLE__GPIO6_IO07, WEAK_PULLDN_OUTPUT), +// IOMUX_PAD_CTRL(SD1_CLK__OSC32K_32K_OUT, OUTPUT_40OHM), /* slow clock */ + + /* USDHC3 - micro sd */ + IOMUX_PAD_CTRL(SD3_CLK__SD3_CLK, USDHC_CLK_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_CMD__SD3_CMD, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT0__SD3_DATA0, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT1__SD3_DATA1, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT2__SD3_DATA2, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD3_DAT3__SD3_DATA3, USDHC_PAD_CTRL), +#define GP_SD3_CD IMX_GPIO_NR(7, 0) + IOMUX_PAD_CTRL(SD3_DAT5__GPIO7_IO00, WEAK_PULLUP), /* CD */ + + /* USDHC4 - eMMC */ + IOMUX_PAD_CTRL(SD4_CLK__SD4_CLK, USDHC_CLK_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_CMD__SD4_CMD, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT0__SD4_DATA0, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT1__SD4_DATA1, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT2__SD4_DATA2, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT3__SD4_DATA3, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT4__SD4_DATA4, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT5__SD4_DATA5, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT6__SD4_DATA6, USDHC_PAD_CTRL), + IOMUX_PAD_CTRL(SD4_DAT7__SD4_DATA7, USDHC_PAD_CTRL), +#define GP_EMMC_RESET IMX_GPIO_NR(2, 6) + IOMUX_PAD_CTRL(NANDF_D6__GPIO2_IO06, WEAK_PULLDN_OUTPUT), +}; + +#if defined(CONFIG_VIDEO_IPUV3) +static const iomux_v3_cfg_t rgb_pads[] = { + IOMUX_PAD_CTRL(DI0_DISP_CLK__IPU1_DI0_DISP_CLK, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DI0_PIN15__IPU1_DI0_PIN15, RGB_PAD_CTRL), /* DRDY */ + IOMUX_PAD_CTRL(DI0_PIN2__IPU1_DI0_PIN02, RGB_PAD_CTRL), /* HSYNC */ + IOMUX_PAD_CTRL(DI0_PIN3__IPU1_DI0_PIN03, RGB_PAD_CTRL), /* VSYNC */ + IOMUX_PAD_CTRL(DI0_PIN4__GPIO4_IO20, RGB_PAD_CTRL), /* Contrast */ + IOMUX_PAD_CTRL(DISP0_DAT0__IPU1_DISP0_DATA00, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT1__IPU1_DISP0_DATA01, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT2__IPU1_DISP0_DATA02, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT3__IPU1_DISP0_DATA03, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT4__IPU1_DISP0_DATA04, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT5__IPU1_DISP0_DATA05, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT6__IPU1_DISP0_DATA06, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT7__IPU1_DISP0_DATA07, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT8__IPU1_DISP0_DATA08, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT9__IPU1_DISP0_DATA09, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT10__IPU1_DISP0_DATA10, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT11__IPU1_DISP0_DATA11, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT12__IPU1_DISP0_DATA12, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT13__IPU1_DISP0_DATA13, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT14__IPU1_DISP0_DATA14, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT15__IPU1_DISP0_DATA15, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT16__IPU1_DISP0_DATA16, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT17__IPU1_DISP0_DATA17, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT18__IPU1_DISP0_DATA18, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT19__IPU1_DISP0_DATA19, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT20__IPU1_DISP0_DATA20, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT21__IPU1_DISP0_DATA21, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT22__IPU1_DISP0_DATA22, RGB_PAD_CTRL), + IOMUX_PAD_CTRL(DISP0_DAT23__IPU1_DISP0_DATA23, RGB_PAD_CTRL), +}; +#endif + +/* + * + */ +static struct i2c_pads_info i2c_pads[] = { + /* I2C1, SGTL5000, RTC(rv4162) */ + I2C_PADS_INFO_ENTRY(I2C1, EIM_D21, 3, 21, EIM_D28, 3, 28, I2C_PAD_CTRL), + /* I2C2 - hdmi */ + I2C_PADS_INFO_ENTRY(I2C2, KEY_COL3, 4, 12, KEY_ROW3, 4, 13, I2C_PAD_CTRL), + /* I2C3, Charger, PCIe */ + I2C_PADS_INFO_ENTRY(I2C3, GPIO_5, 1, 05, GPIO_16, 7, 11, I2C_PAD_CTRL), +}; + +int dram_init(void) +{ + gd->ram_size = ((ulong)CONFIG_DDR_MB * 1024 * 1024); + + return 0; +} + +#ifdef CONFIG_USB_EHCI_MX6 +static void charge_from_usb(int enable) +{ + u8 val8 = enable ? 0x27 : 7; + u8 orig_i2c_bus = i2c_get_bus_num(); + + i2c_set_bus_num(2); + i2c_write(0x69, 0xc3, 1, &val8, 1); + i2c_set_bus_num(orig_i2c_bus); +} + +int board_ehci_hcd_init(int port) +{ + /* Reset USB hub */ + gpio_direction_output(GP_USB_HUB_RESET, 0); + mdelay(2); + gpio_set_value(GP_USB_HUB_RESET, 1); + + return 0; +} + +int board_ehci_power(int port, int on) +{ + int gp = port ? GP_USB_DN1_PWR_EN : GP_USB_OTG_PWR; + + if (!port && on) + charge_from_usb(0); + gpio_set_value(gp, on); + if (!port && !on) + charge_from_usb(1); + return 0; +} + +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[2] = { + {USDHC3_BASE_ADDR}, + {USDHC4_BASE_ADDR}, +}; + +int board_mmc_getcd(struct mmc *mmc) +{ + struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; + int gp_cd = (cfg->esdhc_base == USDHC3_BASE_ADDR) ? GP_SD3_CD : -1; + if (gp_cd < 0) + return 1; + gpio_direction_input(gp_cd); + return !gpio_get_value(gp_cd); +} + +int board_mmc_init(bd_t *bis) +{ + s32 status = 0; + u32 index = 0; + + usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + + usdhc_cfg[0].max_bus_width = 4; + usdhc_cfg[1].max_bus_width = 8; + + for (index = 0; index < CONFIG_SYS_FSL_USDHC_NUM; ++index) { + switch (index) { + case 0: + break; + case 1: + gpio_set_value(GP_EMMC_RESET, 1); + break; + default: + printf("Warning: you configured more USDHC controllers" + "(%d) then supported by the board (%d)\n", + index + 1, CONFIG_SYS_FSL_USDHC_NUM); + return status; + } + + status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]); + } + + return status; +} +#endif + +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? GP_ECSPI1_CS1 : -1; +} + +#endif + +int board_eth_init(bd_t *bis) +{ +#ifdef CONFIG_CI_UDC + /* For otg ethernet*/ + usb_eth_initialize(bis); +#endif + return 0; +} + + +int splash_screen_prepare(void) +{ + char *env_loadsplash; + + if (!getenv("splashimage") || !getenv("splashsize")) { + return -1; + } + + env_loadsplash = getenv("loadsplash"); + if (env_loadsplash == NULL) { + printf("Environment variable loadsplash not found!\n"); + return -1; + } + + if (run_command_list(env_loadsplash, -1, 0)) { + printf("failed to run loadsplash %s\n\n", env_loadsplash); + return -1; + } + + return 0; +} + +#if defined(CONFIG_VIDEO_IPUV3) + +void board_enable_lcd(const struct display_info_t *di) +{ + SETUP_IOMUX_PADS(rgb_pads); + gpio_direction_output(GP_RGB_BACKLIGHT, 1); +} + +const struct display_info_t displays[] = { + /* hdmi */ + IMX_VD50_1280_720M_60(HDMI, 1, 1), + IMX_VD50_1920_1080M_60(HDMI, 0, 1), + IMX_VD50_1024_768M_60(HDMI, 0, 1), + + /* tsc2004 */ + IMX_VD48_OKAYA_480_272(LCD, 1, 2), +}; + +size_t display_count = ARRAY_SIZE(displays); + +int board_cfb_skip(void) +{ + return NULL != getenv("novideo"); +} +#endif + +static unsigned short gpios_out_low[] = { + GP_MAIN_POWER_EN, + GP_RGB_BACKLIGHT, + GP_BRM_WL_EN, /* disable wireless */ + GP_BRM_BT_EN, /* disable bluetooth */ + GP_SGTL5000_MUTE, /* MUTE */ + GP_LED_BLUE, + GP_TOUCH_RESET, + GP_PCIE_RESET, + GP_I2C3_PCIE_EN, + GP_GPS_RESET, + GP_USB_HUB_RESET, + GP_USB_DN1_PWR_EN, + GP_USB_OTG_PWR, /* disable USB otg power */ + GP_BRM_BT_RESET, + GP_BRM_BT_EN, + GP_BRM_WL_EN, + GP_EMMC_RESET, +}; + +static unsigned short gpios_out_high[] = { + GP_ECSPI1_CS1, + GP_I2C3_MAX77818_EN, +}; + +static unsigned short gpios_out_high2[] = { + GP_5V_EN, +}; + +static unsigned short gpios_in[] = { + GP_HEADPHONE_DET, + GP_LINE_IN_JACK_DETECT, + GP_MIC_DETECT, + GP_MENU, + GP_BACK, + GP_SEARCH, + GP_VOLUME_UP, + GP_INPUT1, + GP_INPUT2, + GP_BRM_WL_WAKE_IRQ, + GP_TOUCH_IRQ, + GP_RTC_RV4162_IRQ, + GP_MAIN_POWER_BUTTON, + GP_MAX77818_INOKB, + GP_MAX77818_WCINOKB, + GP_MAX77818_INTB, + GP_GPS_IRQ, + GP_GPS_HEARTBEAT, + GP_BRM_BT_WAKE_IRQ, + GP_BRM_BT_WAKEUP, + GP_BRM_WL_WAKE_IRQ, + GP_BRM_CLOCK_REQUEST, + GP_SD3_CD, +}; + +static void set_gpios_in(unsigned short *p, int cnt) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_input(*p++); +} + +static void set_gpios(unsigned short *p, int cnt, int val) +{ + int i; + + for (i = 0; i < cnt; i++) + gpio_direction_output(*p++, val); +} + +int board_early_init_f(void) +{ + set_gpios_in(gpios_in, ARRAY_SIZE(gpios_in)); + set_gpios(gpios_out_high, ARRAY_SIZE(gpios_out_high), 1); + set_gpios(gpios_out_low, ARRAY_SIZE(gpios_out_low), 0); + SETUP_IOMUX_PADS(vp_pads); + return 0; +} + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + +void board_poweroff(void) +{ + struct snvs_regs *snvs = (struct snvs_regs *)(SNVS_BASE_ADDR); + + /* Doing both gpio1:19 and pmic_req makes the board not turn on again */ +// gpio_set_value(GP_MAIN_POWER_EN, 1); + writel(0x60, &snvs->lpcr); + mdelay(500); +} + +int board_init(void) +{ + int i; + int ret; + struct i2c_pads_info *p = i2c_pads + i2c_get_info_entry_offset(); + struct iomuxc *const iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; + u8 orig_i2c_bus; + u8 val8; + u8 buf[2]; + + clrsetbits_le32(&iomuxc_regs->gpr[1], + IOMUXC_GPR1_OTG_ID_MASK, + IOMUXC_GPR1_OTG_ID_GPIO1); + + /* address of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + for (i = 0; i < 3; i++) { + setup_i2c(i, CONFIG_SYS_I2C_SPEED, 0x7f, p); + p += I2C_PADS_INFO_ENTRY_SPACING; + } + + orig_i2c_bus = i2c_get_bus_num(); + i2c_set_bus_num(2); +#define I2C_ADDR_CHARGER 0x69 + val8 = 0x7f; /* 4.0A source */ + i2c_write(I2C_ADDR_CHARGER, 0xc0, 1, &val8, 1); + val8 = 0x0c; /* Protection allow 0xb9 write */ + i2c_write(I2C_ADDR_CHARGER, 0xbd, 1, &val8, 1); + val8 = 0x14; /* 1A charge */ + i2c_write(I2C_ADDR_CHARGER, 0xb9, 1, &val8, 1); + val8 = 0x27; /* enable charging from otg */ + i2c_write(I2C_ADDR_CHARGER, 0xc3, 1, &val8, 1); + val8 = 0x5; /* enable charging mode */ + i2c_write(I2C_ADDR_CHARGER, 0xb7, 1, &val8, 1); + +#define I2C_ADDR_FUELGAUGE 0x36 +#define MAX77823_REG_VCELL 0x09 + ret = i2c_read(I2C_ADDR_FUELGAUGE, MAX77823_REG_VCELL, 1, buf, 2); + if (!ret) { + u32 v = (buf[1] << 8) | buf[0]; + + v = (v >> 3) * 625; + if (v < 3000000) { + printf("voltage = %d uV too low, powering off\n", v); + board_poweroff(); + } + } else { + printf("error reading battery voltage\n"); + } + i2c_set_bus_num(orig_i2c_bus); + + set_gpios(gpios_out_high2, ARRAY_SIZE(gpios_out_high2), 1); +#if defined(CONFIG_VIDEO_IPUV3) + imx_setup_display(); +#endif + return 0; +} + +int checkboard(void) +{ + puts("Board: vp\n"); + return 0; +} + +struct button_key { + char const *name; + unsigned gpnum; + char ident; +}; + +static struct button_key const buttons[] = { + {"input1", GP_INPUT1, '1'}, + {"input2", GP_INPUT2, '2'}, + {"power", GP_MAIN_POWER_BUTTON, 'P'}, +}; + +/* + * generate a null-terminated string containing the buttons pressed + * returns number of keys pressed + */ +static int read_keys(char *buf) +{ + int i, numpressed = 0; + for (i = 0; i < ARRAY_SIZE(buttons); i++) { + if (!gpio_get_value(buttons[i].gpnum)) + buf[numpressed++] = buttons[i].ident; + } + buf[numpressed] = '\0'; + return numpressed; +} + +static int do_kbd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + char envvalue[ARRAY_SIZE(buttons)+1]; + int numpressed = read_keys(envvalue); + setenv("keybd", envvalue); + return numpressed == 0; +} + +U_BOOT_CMD( + kbd, 1, 1, do_kbd, + "Tests for keypresses, sets 'keybd' environment variable", + "Returns 0 (true) to shell if key is pressed." +); + +#ifdef CONFIG_PREBOOT +static char const kbd_magic_prefix[] = "key_magic"; +static char const kbd_command_prefix[] = "key_cmd"; + +static void preboot_keys(void) +{ + int numpressed; + char keypress[ARRAY_SIZE(buttons)+1]; + numpressed = read_keys(keypress); + if (numpressed) { + char *kbd_magic_keys = getenv("magic_keys"); + char *suffix; + /* + * loop over all magic keys + */ + for (suffix = kbd_magic_keys; *suffix; ++suffix) { + char *keys; + char magic[sizeof(kbd_magic_prefix) + 1]; + sprintf(magic, "%s%c", kbd_magic_prefix, *suffix); + keys = getenv(magic); + if (keys) { + if (!strcmp(keys, keypress)) + break; + } + } + if (*suffix) { + char cmd_name[sizeof(kbd_command_prefix) + 1]; + char *cmd; + sprintf(cmd_name, "%s%c", kbd_command_prefix, *suffix); + cmd = getenv(cmd_name); + if (cmd) { + setenv("preboot", cmd); + return; + } + } + } +} +#endif + +#ifdef CONFIG_CMD_BMODE +static const struct boot_mode board_boot_modes[] = { + /* 4 bit bus width */ + {"mmc0", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, + {"mmc1", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, + {NULL, 0}, +}; +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_PREBOOT + preboot_keys(); +#endif + +#ifdef CONFIG_CMD_BMODE + add_board_boot_modes(board_boot_modes); +#endif + return 0; +} + +static unsigned long long us_to_tick(unsigned long long usec) +{ + usec = usec * get_tbclk() + 999999; + do_div(usec, 1000000); + + return usec; +} + +int board_late_init(void) +{ + unsigned long long stop = get_ticks() + us_to_tick(800000); + int cpurev = get_cpu_rev(); + int reason = *(int *)(CONFIG_RESET_CAUSE_ADDR + 4); + + setenv("cpu", get_imx_type((cpurev & 0xFF000) >> 12)); + if (!getenv("board")) + setenv("board", "vp"); + if (!getenv("uboot_defconfig")) + setenv("uboot_defconfig", CONFIG_DEFCONFIG); + + /* return if not power-on reset */ + if ((reason != 0x01) && (reason != 0x11)) + return 0; + while (get_ticks() < stop) { + int ret = gpio_get_value(GP_MAIN_POWER_BUTTON); + if (ret) { + printf("On button not held\n"); + board_poweroff(); + } + mdelay(10); + } + return 0; +} + +static int do_poweroff(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +{ + board_poweroff(); + return 0; +} + +U_BOOT_CMD( + poweroff, 70, 0, do_poweroff, + "power down board", + "" +); diff --git a/board/boundary/vp/vp2g.cfg b/board/boundary/vp/vp2g.cfg new file mode 100644 index 0000000..1344c31 --- /dev/null +++ b/board/boundary/vp/vp2g.cfg @@ -0,0 +1,36 @@ +/* + * Copyright (C) 2013 Boundary Devices + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer doc/README.imximage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ +BOOT_FROM spi + +#define __ASSEMBLY__ +#include +#include "asm/arch/mx6-ddr.h" +#include "asm/arch/iomux.h" +#include "asm/arch/crm_regs.h" + +/* turn on power */ +DATA 4, 0x020e0734, 0x30b0 + +/* turn off backlight */ +DATA 4, 0x020e0344, 5 +DATA 4, 0x020e072c, 0x30b0 + +#include "ddr-setup.cfg" +#include "1066mhz_4x256mx16.cfg" +#include "clocks.cfg" diff --git a/board/br4/Kconfig b/board/br4/Kconfig index 03d9783..a10a060 100644 --- a/board/br4/Kconfig +++ b/board/br4/Kconfig @@ -1,11 +1,9 @@ if TARGET_BR4 config SYS_BOARD - string default "br4" config SYS_CONFIG_NAME - string default "br4" endif diff --git a/board/broadcom/bcm28155_ap/Kconfig b/board/broadcom/bcm28155_ap/Kconfig index 20c83d3..2e779f0 100644 --- a/board/broadcom/bcm28155_ap/Kconfig +++ b/board/broadcom/bcm28155_ap/Kconfig @@ -1,23 +1,18 @@ if TARGET_BCM28155_AP config SYS_CPU - string default "armv7" config SYS_BOARD - string default "bcm28155_ap" config SYS_VENDOR - string default "broadcom" config SYS_SOC - string default "bcm281xx" config SYS_CONFIG_NAME - string default "bcm28155_ap" endif diff --git a/board/broadcom/bcm958300k/Kconfig b/board/broadcom/bcm958300k/Kconfig index 165cee7..d627a38 100644 --- a/board/broadcom/bcm958300k/Kconfig +++ b/board/broadcom/bcm958300k/Kconfig @@ -1,23 +1,18 @@ if TARGET_BCM958300K config SYS_CPU - string default "armv7" config SYS_BOARD - string default "bcm_ep" config SYS_VENDOR - string default "broadcom" config SYS_SOC - string default "bcmcygnus" config SYS_CONFIG_NAME - string default "bcm_ep_board" endif diff --git a/board/broadcom/bcm958622hr/Kconfig b/board/broadcom/bcm958622hr/Kconfig index 6d09592..9038f5b 100644 --- a/board/broadcom/bcm958622hr/Kconfig +++ b/board/broadcom/bcm958622hr/Kconfig @@ -1,23 +1,18 @@ if TARGET_BCM958622HR config SYS_CPU - string default "armv7" config SYS_BOARD - string default "bcm_ep" config SYS_VENDOR - string default "broadcom" config SYS_SOC - string default "bcmnsp" config SYS_CONFIG_NAME - string default "bcm_ep_board" endif diff --git a/board/buffalo/lsxl/Kconfig b/board/buffalo/lsxl/Kconfig index 50a620e..ef78896 100644 --- a/board/buffalo/lsxl/Kconfig +++ b/board/buffalo/lsxl/Kconfig @@ -1,15 +1,12 @@ if TARGET_LSXL config SYS_BOARD - string default "lsxl" config SYS_VENDOR - string default "buffalo" config SYS_CONFIG_NAME - string default "lsxl" endif diff --git a/board/calao/sbc35_a9g20/Kconfig b/board/calao/sbc35_a9g20/Kconfig index 192d228..b2528dc 100644 --- a/board/calao/sbc35_a9g20/Kconfig +++ b/board/calao/sbc35_a9g20/Kconfig @@ -1,23 +1,18 @@ if TARGET_SBC35_A9G20 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "sbc35_a9g20" config SYS_VENDOR - string default "calao" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "sbc35_a9g20" endif diff --git a/board/calao/sbc35_a9g20/MAINTAINERS b/board/calao/sbc35_a9g20/MAINTAINERS index d275230..0ac8225 100644 --- a/board/calao/sbc35_a9g20/MAINTAINERS +++ b/board/calao/sbc35_a9g20/MAINTAINERS @@ -1,5 +1,5 @@ SBC35_A9G20 BOARD -M: Albin Tonnerre +#M: Albin Tonnerre S: Orphan (since 2014-06) F: board/calao/sbc35_a9g20/ F: include/configs/sbc35_a9g20.h diff --git a/board/calao/tny_a9260/Kconfig b/board/calao/tny_a9260/Kconfig index 3d33d5c..7fad578 100644 --- a/board/calao/tny_a9260/Kconfig +++ b/board/calao/tny_a9260/Kconfig @@ -1,23 +1,18 @@ if TARGET_TNY_A9260 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "tny_a9260" config SYS_VENDOR - string default "calao" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "tny_a9260" endif diff --git a/board/calao/tny_a9260/MAINTAINERS b/board/calao/tny_a9260/MAINTAINERS index 5a71b8e..1f24e39 100644 --- a/board/calao/tny_a9260/MAINTAINERS +++ b/board/calao/tny_a9260/MAINTAINERS @@ -1,5 +1,5 @@ TNY_A9260 BOARD -M: Albin Tonnerre +#M: Albin Tonnerre S: Orphan (since 2014-06) F: board/calao/tny_a9260/ F: include/configs/tny_a9260.h diff --git a/board/calao/usb_a9263/Kconfig b/board/calao/usb_a9263/Kconfig index 8141c7d..4209b36 100644 --- a/board/calao/usb_a9263/Kconfig +++ b/board/calao/usb_a9263/Kconfig @@ -1,23 +1,18 @@ if TARGET_USB_A9263 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "usb_a9263" config SYS_VENDOR - string default "calao" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "usb_a9263" endif diff --git a/board/canmb/Kconfig b/board/canmb/Kconfig index 042cc35..b5cf205 100644 --- a/board/canmb/Kconfig +++ b/board/canmb/Kconfig @@ -1,11 +1,9 @@ if TARGET_CANMB config SYS_BOARD - string default "canmb" config SYS_CONFIG_NAME - string default "canmb" endif diff --git a/board/canmb/MAINTAINERS b/board/canmb/MAINTAINERS index aa4eb30..71750ea 100644 --- a/board/canmb/MAINTAINERS +++ b/board/canmb/MAINTAINERS @@ -1,5 +1,5 @@ CANMB BOARD -M: - +#M: - S: Maintained F: board/canmb/ F: include/configs/canmb.h diff --git a/board/chromebook-x86/coreboot/Kconfig b/board/chromebook-x86/coreboot/Kconfig index 64cd347..83385c7 100644 --- a/board/chromebook-x86/coreboot/Kconfig +++ b/board/chromebook-x86/coreboot/Kconfig @@ -1,19 +1,15 @@ if TARGET_COREBOOT config SYS_BOARD - string default "coreboot" config SYS_VENDOR - string default "chromebook-x86" config SYS_SOC - string default "coreboot" config SYS_CONFIG_NAME - string default "coreboot" endif diff --git a/board/cirrus/edb93xx/Kconfig b/board/cirrus/edb93xx/Kconfig index 0a9bdb2..f063d55 100644 --- a/board/cirrus/edb93xx/Kconfig +++ b/board/cirrus/edb93xx/Kconfig @@ -1,23 +1,18 @@ if TARGET_EDB93XX config SYS_CPU - string default "arm920t" config SYS_BOARD - string default "edb93xx" config SYS_VENDOR - string default "cirrus" config SYS_SOC - string default "ep93xx" config SYS_CONFIG_NAME - string default "edb93xx" endif diff --git a/board/cloudengines/pogo_e02/Kconfig b/board/cloudengines/pogo_e02/Kconfig index fe36314..eaa68d9 100644 --- a/board/cloudengines/pogo_e02/Kconfig +++ b/board/cloudengines/pogo_e02/Kconfig @@ -1,15 +1,12 @@ if TARGET_POGO_E02 config SYS_BOARD - string default "pogo_e02" config SYS_VENDOR - string default "cloudengines" config SYS_CONFIG_NAME - string default "pogo_e02" endif diff --git a/board/cm-bf527/Kconfig b/board/cm-bf527/Kconfig index d43d306..8d14179 100644 --- a/board/cm-bf527/Kconfig +++ b/board/cm-bf527/Kconfig @@ -1,11 +1,9 @@ if TARGET_CM_BF527 config SYS_BOARD - string default "cm-bf527" config SYS_CONFIG_NAME - string default "cm-bf527" endif diff --git a/board/cm-bf527/MAINTAINERS b/board/cm-bf527/MAINTAINERS index 789f5c4..fefcfcf 100644 --- a/board/cm-bf527/MAINTAINERS +++ b/board/cm-bf527/MAINTAINERS @@ -1,5 +1,5 @@ CM-BF527 BOARD -M: Bluetechnix Tinyboards +#M: Bluetechnix Tinyboards S: Orphan (since 2014-03) F: board/cm-bf527/ F: include/configs/cm-bf527.h diff --git a/board/cm-bf533/Kconfig b/board/cm-bf533/Kconfig index af5bbb2..cedd752 100644 --- a/board/cm-bf533/Kconfig +++ b/board/cm-bf533/Kconfig @@ -1,11 +1,9 @@ if TARGET_CM_BF533 config SYS_BOARD - string default "cm-bf533" config SYS_CONFIG_NAME - string default "cm-bf533" endif diff --git a/board/cm-bf533/MAINTAINERS b/board/cm-bf533/MAINTAINERS index f643043..0bf51fb 100644 --- a/board/cm-bf533/MAINTAINERS +++ b/board/cm-bf533/MAINTAINERS @@ -1,5 +1,5 @@ CM-BF533 BOARD -M: Bluetechnix Tinyboards +#M: Bluetechnix Tinyboards S: Orphan (since 2014-03) F: board/cm-bf533/ F: include/configs/cm-bf533.h diff --git a/board/cm-bf537e/Kconfig b/board/cm-bf537e/Kconfig index 83c160d..af2e548 100644 --- a/board/cm-bf537e/Kconfig +++ b/board/cm-bf537e/Kconfig @@ -1,11 +1,9 @@ if TARGET_CM_BF537E config SYS_BOARD - string default "cm-bf537e" config SYS_CONFIG_NAME - string default "cm-bf537e" endif diff --git a/board/cm-bf537e/MAINTAINERS b/board/cm-bf537e/MAINTAINERS index 44735fa..63d2428 100644 --- a/board/cm-bf537e/MAINTAINERS +++ b/board/cm-bf537e/MAINTAINERS @@ -1,5 +1,5 @@ CM-BF537E BOARD -M: Bluetechnix Tinyboards +#M: Bluetechnix Tinyboards S: Orphan (since 2014-03) F: board/cm-bf537e/ F: include/configs/cm-bf537e.h diff --git a/board/cm-bf537u/Kconfig b/board/cm-bf537u/Kconfig index de384b7..baf9e8c 100644 --- a/board/cm-bf537u/Kconfig +++ b/board/cm-bf537u/Kconfig @@ -1,11 +1,9 @@ if TARGET_CM_BF537U config SYS_BOARD - string default "cm-bf537u" config SYS_CONFIG_NAME - string default "cm-bf537u" endif diff --git a/board/cm-bf537u/MAINTAINERS b/board/cm-bf537u/MAINTAINERS index da925f8..a89cfca 100644 --- a/board/cm-bf537u/MAINTAINERS +++ b/board/cm-bf537u/MAINTAINERS @@ -1,5 +1,5 @@ CM-BF537U BOARD -M: Bluetechnix Tinyboards +#M: Bluetechnix Tinyboards S: Orphan (since 2014-03) F: board/cm-bf537u/ F: include/configs/cm-bf537u.h diff --git a/board/cm-bf548/Kconfig b/board/cm-bf548/Kconfig index 29b027d..b96cb5f 100644 --- a/board/cm-bf548/Kconfig +++ b/board/cm-bf548/Kconfig @@ -1,11 +1,9 @@ if TARGET_CM_BF548 config SYS_BOARD - string default "cm-bf548" config SYS_CONFIG_NAME - string default "cm-bf548" endif diff --git a/board/cm-bf548/MAINTAINERS b/board/cm-bf548/MAINTAINERS index 4cd83df..b7f5779 100644 --- a/board/cm-bf548/MAINTAINERS +++ b/board/cm-bf548/MAINTAINERS @@ -1,5 +1,5 @@ CM-BF548 BOARD -M: Bluetechnix Tinyboards +#M: Bluetechnix Tinyboards S: Orphan (since 2014-03) F: board/cm-bf548/ F: include/configs/cm-bf548.h diff --git a/board/cm-bf561/Kconfig b/board/cm-bf561/Kconfig index 94d110c..8b302a5 100644 --- a/board/cm-bf561/Kconfig +++ b/board/cm-bf561/Kconfig @@ -1,11 +1,9 @@ if TARGET_CM_BF561 config SYS_BOARD - string default "cm-bf561" config SYS_CONFIG_NAME - string default "cm-bf561" endif diff --git a/board/cm-bf561/MAINTAINERS b/board/cm-bf561/MAINTAINERS index a4606ff..9c86c8d 100644 --- a/board/cm-bf561/MAINTAINERS +++ b/board/cm-bf561/MAINTAINERS @@ -1,5 +1,5 @@ CM-BF561 BOARD -M: Bluetechnix Tinyboards +#M: Bluetechnix Tinyboards S: Orphan (since 2014-03) F: board/cm-bf561/ F: include/configs/cm-bf561.h diff --git a/board/cm4008/Kconfig b/board/cm4008/Kconfig index 397794d..a7f3b2f 100644 --- a/board/cm4008/Kconfig +++ b/board/cm4008/Kconfig @@ -1,19 +1,15 @@ if TARGET_CM4008 config SYS_CPU - string default "arm920t" config SYS_BOARD - string default "cm4008" config SYS_SOC - string default "ks8695" config SYS_CONFIG_NAME - string default "cm4008" endif diff --git a/board/cm41xx/Kconfig b/board/cm41xx/Kconfig index ae2831e..b537e26 100644 --- a/board/cm41xx/Kconfig +++ b/board/cm41xx/Kconfig @@ -1,19 +1,15 @@ if TARGET_CM41XX config SYS_CPU - string default "arm920t" config SYS_BOARD - string default "cm41xx" config SYS_SOC - string default "ks8695" config SYS_CONFIG_NAME - string default "cm41xx" endif diff --git a/board/cm41xx/MAINTAINERS b/board/cm41xx/MAINTAINERS index f308b0f..f10eeb5 100644 --- a/board/cm41xx/MAINTAINERS +++ b/board/cm41xx/MAINTAINERS @@ -1,5 +1,5 @@ CM41XX BOARD -M: - +#M: - S: Maintained F: board/cm41xx/ F: include/configs/cm41xx.h diff --git a/board/cm5200/Kconfig b/board/cm5200/Kconfig index b4c8f22..ccea5c9 100644 --- a/board/cm5200/Kconfig +++ b/board/cm5200/Kconfig @@ -1,11 +1,9 @@ if TARGET_CM5200 config SYS_BOARD - string default "cm5200" config SYS_CONFIG_NAME - string default "cm5200" endif diff --git a/board/cm5200/MAINTAINERS b/board/cm5200/MAINTAINERS index 9fc5365..1e1df3f 100644 --- a/board/cm5200/MAINTAINERS +++ b/board/cm5200/MAINTAINERS @@ -1,5 +1,5 @@ CM5200 BOARD -M: - +#M: - S: Maintained F: board/cm5200/ F: include/configs/cm5200.h diff --git a/board/cmi/Kconfig b/board/cmi/Kconfig index 8040e59..6efe6b1 100644 --- a/board/cmi/Kconfig +++ b/board/cmi/Kconfig @@ -1,11 +1,9 @@ if TARGET_CMI_MPC5XX config SYS_BOARD - string default "cmi" config SYS_CONFIG_NAME - string default "cmi_mpc5xx" endif diff --git a/board/cmi/MAINTAINERS b/board/cmi/MAINTAINERS index ab33d5d..60701bf 100644 --- a/board/cmi/MAINTAINERS +++ b/board/cmi/MAINTAINERS @@ -1,5 +1,5 @@ CMI BOARD -M: - +#M: - S: Maintained F: board/cmi/ F: include/configs/cmi_mpc5xx.h diff --git a/board/cobra5272/Kconfig b/board/cobra5272/Kconfig index 6e55d43..ba04622 100644 --- a/board/cobra5272/Kconfig +++ b/board/cobra5272/Kconfig @@ -1,15 +1,12 @@ if TARGET_COBRA5272 config SYS_CPU - string default "mcf52x2" config SYS_BOARD - string default "cobra5272" config SYS_CONFIG_NAME - string default "cobra5272" endif diff --git a/board/cobra5272/MAINTAINERS b/board/cobra5272/MAINTAINERS index 00942fc..a064da2 100644 --- a/board/cobra5272/MAINTAINERS +++ b/board/cobra5272/MAINTAINERS @@ -1,5 +1,5 @@ COBRA5272 BOARD -M: - +#M: - S: Maintained F: board/cobra5272/ F: include/configs/cobra5272.h diff --git a/board/cogent/Kconfig b/board/cogent/Kconfig index 113034d..7f34a14 100644 --- a/board/cogent/Kconfig +++ b/board/cogent/Kconfig @@ -1,11 +1,9 @@ if TARGET_COGENT_MPC8260 config SYS_BOARD - string default "cogent" config SYS_CONFIG_NAME - string default "cogent_mpc8260" endif @@ -13,11 +11,9 @@ endif if TARGET_COGENT_MPC8XX config SYS_BOARD - string default "cogent" config SYS_CONFIG_NAME - string default "cogent_mpc8xx" endif diff --git a/board/comelit/dig297/Kconfig b/board/comelit/dig297/Kconfig index 4c5ea09..6dccaff 100644 --- a/board/comelit/dig297/Kconfig +++ b/board/comelit/dig297/Kconfig @@ -1,15 +1,12 @@ if TARGET_DIG297 config SYS_BOARD - string default "dig297" config SYS_VENDOR - string default "comelit" config SYS_CONFIG_NAME - string default "dig297" endif diff --git a/board/compal/paz00/Kconfig b/board/compal/paz00/Kconfig index 690d7a7..30ba11d 100644 --- a/board/compal/paz00/Kconfig +++ b/board/compal/paz00/Kconfig @@ -1,15 +1,12 @@ if TARGET_PAZ00 config SYS_BOARD - string default "paz00" config SYS_VENDOR - string default "compal" config SYS_CONFIG_NAME - string default "paz00" endif diff --git a/board/compulab/cm_fx6/Kconfig b/board/compulab/cm_fx6/Kconfig new file mode 100644 index 0000000..42a8438 --- /dev/null +++ b/board/compulab/cm_fx6/Kconfig @@ -0,0 +1,23 @@ +if TARGET_CM_FX6 + +config SYS_CPU + string + default "armv7" + +config SYS_BOARD + string + default "cm_fx6" + +config SYS_VENDOR + string + default "compulab" + +config SYS_SOC + string + default "mx6" + +config SYS_CONFIG_NAME + string + default "cm_fx6" + +endif diff --git a/board/compulab/cm_fx6/MAINTAINERS b/board/compulab/cm_fx6/MAINTAINERS new file mode 100644 index 0000000..5b2623a --- /dev/null +++ b/board/compulab/cm_fx6/MAINTAINERS @@ -0,0 +1,6 @@ +CM_FX6 BOARD +M: Nikita Kiryanov +S: Maintained +F: board/compulab/cm_fx6/ +F: include/configs/cm_fx6.h +F: configs/cm_fx6_defconfig diff --git a/board/compulab/cm_fx6/Makefile b/board/compulab/cm_fx6/Makefile new file mode 100644 index 0000000..3e5c903 --- /dev/null +++ b/board/compulab/cm_fx6/Makefile @@ -0,0 +1,12 @@ +# +# (C) Copyright 2014 CompuLab, Ltd. +# +# Authors: Nikita Kiryanov +# +# SPDX-License-Identifier: GPL-2.0+ +# +ifdef CONFIG_SPL_BUILD +obj-y = common.o spl.o +else +obj-y = common.o cm_fx6.o +endif diff --git a/board/compulab/cm_fx6/cm_fx6.c b/board/compulab/cm_fx6/cm_fx6.c new file mode 100644 index 0000000..fdb8ebf --- /dev/null +++ b/board/compulab/cm_fx6/cm_fx6.c @@ -0,0 +1,483 @@ +/* + * Board functions for Compulab CM-FX6 board + * + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ + * + * Author: Nikita Kiryanov + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "common.h" +#include "../common/eeprom.h" + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_DWC_AHSATA +static int cm_fx6_issd_gpios[] = { + /* The order of the GPIOs in the array is important! */ + CM_FX6_SATA_PHY_SLP, + CM_FX6_SATA_NRSTDLY, + CM_FX6_SATA_PWREN, + CM_FX6_SATA_NSTANDBY1, + CM_FX6_SATA_NSTANDBY2, + CM_FX6_SATA_LDO_EN, +}; + +static void cm_fx6_sata_power(int on) +{ + int i; + + if (!on) { /* tell the iSSD that the power will be removed */ + gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 1); + mdelay(10); + } + + for (i = 0; i < ARRAY_SIZE(cm_fx6_issd_gpios); i++) { + gpio_direction_output(cm_fx6_issd_gpios[i], on); + udelay(100); + } + + if (!on) /* for compatibility lower the power loss interrupt */ + gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 0); +} + +static iomux_v3_cfg_t const sata_pads[] = { + /* SATA PWR */ + IOMUX_PADS(PAD_ENET_TX_EN__GPIO1_IO28 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A22__GPIO2_IO16 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D20__GPIO3_IO20 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A25__GPIO5_IO02 | MUX_PAD_CTRL(NO_PAD_CTRL)), + /* SATA CTRL */ + IOMUX_PADS(PAD_ENET_TXD0__GPIO1_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D23__GPIO3_IO23 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_A23__GPIO6_IO06 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_BCLK__GPIO6_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + +static void cm_fx6_setup_issd(void) +{ + SETUP_IOMUX_PADS(sata_pads); + /* Make sure this gpio has logical 0 value */ + gpio_direction_output(CM_FX6_SATA_PWLOSS_INT, 0); + udelay(100); + + cm_fx6_sata_power(0); + mdelay(250); + cm_fx6_sata_power(1); +} + +#define CM_FX6_SATA_INIT_RETRIES 10 +int sata_initialize(void) +{ + int err, i; + + cm_fx6_setup_issd(); + for (i = 0; i < CM_FX6_SATA_INIT_RETRIES; i++) { + err = setup_sata(); + if (err) { + printf("SATA setup failed: %d\n", err); + return err; + } + + udelay(100); + + err = __sata_initialize(); + if (!err) + break; + + /* There is no device on the SATA port */ + if (sata_port_status(0, 0) == 0) + break; + + /* There's a device, but link not established. Retry */ + } + + return err; +} +#endif + +#ifdef CONFIG_SYS_I2C_MXC +#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \ + PAD_CTL_ODE | PAD_CTL_SRE_FAST) + +I2C_PADS(i2c0_pads, + PAD_EIM_D21__I2C1_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL), + PAD_EIM_D21__GPIO3_IO21 | MUX_PAD_CTRL(I2C_PAD_CTRL), + IMX_GPIO_NR(3, 21), + PAD_EIM_D28__I2C1_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL), + PAD_EIM_D28__GPIO3_IO28 | MUX_PAD_CTRL(I2C_PAD_CTRL), + IMX_GPIO_NR(3, 28)); + +I2C_PADS(i2c1_pads, + PAD_KEY_COL3__I2C2_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL), + PAD_KEY_COL3__GPIO4_IO12 | MUX_PAD_CTRL(I2C_PAD_CTRL), + IMX_GPIO_NR(4, 12), + PAD_KEY_ROW3__I2C2_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL), + PAD_KEY_ROW3__GPIO4_IO13 | MUX_PAD_CTRL(I2C_PAD_CTRL), + IMX_GPIO_NR(4, 13)); + +I2C_PADS(i2c2_pads, + PAD_GPIO_3__I2C3_SCL | MUX_PAD_CTRL(I2C_PAD_CTRL), + PAD_GPIO_3__GPIO1_IO03 | MUX_PAD_CTRL(I2C_PAD_CTRL), + IMX_GPIO_NR(1, 3), + PAD_GPIO_6__I2C3_SDA | MUX_PAD_CTRL(I2C_PAD_CTRL), + PAD_GPIO_6__GPIO1_IO06 | MUX_PAD_CTRL(I2C_PAD_CTRL), + IMX_GPIO_NR(1, 6)); + + +static void cm_fx6_setup_i2c(void) +{ + setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, I2C_PADS_INFO(i2c0_pads)); + setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, I2C_PADS_INFO(i2c1_pads)); + setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, I2C_PADS_INFO(i2c2_pads)); +} +#else +static void cm_fx6_setup_i2c(void) { } +#endif + +#ifdef CONFIG_USB_EHCI_MX6 +#define WEAK_PULLDOWN (PAD_CTL_PUS_100K_DOWN | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_HYS | PAD_CTL_SRE_SLOW) + +static int cm_fx6_usb_hub_reset(void) +{ + int err; + + err = gpio_request(CM_FX6_USB_HUB_RST, "usb hub rst"); + if (err) { + printf("USB hub rst gpio request failed: %d\n", err); + return -1; + } + + SETUP_IOMUX_PAD(PAD_SD3_RST__GPIO7_IO08 | MUX_PAD_CTRL(NO_PAD_CTRL)); + gpio_direction_output(CM_FX6_USB_HUB_RST, 0); + udelay(10); + gpio_direction_output(CM_FX6_USB_HUB_RST, 1); + mdelay(1); + + return 0; +} + +static int cm_fx6_init_usb_otg(void) +{ + int ret; + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + + ret = gpio_request(SB_FX6_USB_OTG_PWR, "usb-pwr"); + if (ret) { + printf("USB OTG pwr gpio request failed: %d\n", ret); + return ret; + } + + SETUP_IOMUX_PAD(PAD_EIM_D22__GPIO3_IO22 | MUX_PAD_CTRL(NO_PAD_CTRL)); + SETUP_IOMUX_PAD(PAD_ENET_RX_ER__USB_OTG_ID | + MUX_PAD_CTRL(WEAK_PULLDOWN)); + clrbits_le32(&iomux->gpr[1], IOMUXC_GPR1_OTG_ID_MASK); + /* disable ext. charger detect, or it'll affect signal quality at dp. */ + return gpio_direction_output(SB_FX6_USB_OTG_PWR, 0); +} + +#define MX6_USBNC_BASEADDR 0x2184800 +#define USBNC_USB_H1_PWR_POL (1 << 9) +int board_ehci_hcd_init(int port) +{ + u32 *usbnc_usb_uh1_ctrl = (u32 *)(MX6_USBNC_BASEADDR + 4); + + switch (port) { + case 0: + return cm_fx6_init_usb_otg(); + case 1: + SETUP_IOMUX_PAD(PAD_GPIO_0__USB_H1_PWR | + MUX_PAD_CTRL(NO_PAD_CTRL)); + + /* Set PWR polarity to match power switch's enable polarity */ + setbits_le32(usbnc_usb_uh1_ctrl, USBNC_USB_H1_PWR_POL); + return cm_fx6_usb_hub_reset(); + default: + break; + } + + return 0; +} + +int board_ehci_power(int port, int on) +{ + if (port == 0) + return gpio_direction_output(SB_FX6_USB_OTG_PWR, on); + + return 0; +} +#endif + +#ifdef CONFIG_FEC_MXC +#define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ + PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +static int mx6_rgmii_rework(struct phy_device *phydev) +{ + unsigned short val; + + /* Ar8031 phy SmartEEE feature cause link status generates glitch, + * which cause ethernet link down/up issue, so disable SmartEEE + */ + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x3); + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x805d); + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4003); + val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); + val &= ~(0x1 << 8); + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); + + /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x8016); + phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4007); + + val = phy_read(phydev, MDIO_DEVAD_NONE, 0xe); + val &= 0xffe3; + val |= 0x18; + phy_write(phydev, MDIO_DEVAD_NONE, 0xe, val); + + /* introduce tx clock delay */ + phy_write(phydev, MDIO_DEVAD_NONE, 0x1d, 0x5); + val = phy_read(phydev, MDIO_DEVAD_NONE, 0x1e); + val |= 0x0100; + phy_write(phydev, MDIO_DEVAD_NONE, 0x1e, val); + + return 0; +} + +int board_phy_config(struct phy_device *phydev) +{ + mx6_rgmii_rework(phydev); + + if (phydev->drv->config) + return phydev->drv->config(phydev); + + return 0; +} + +static iomux_v3_cfg_t const enet_pads[] = { + IOMUX_PADS(PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TXC__RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD0__RGMII_TD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD1__RGMII_TD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD2__RGMII_TD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TD3__RGMII_TD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RXC__RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD0__RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD1__RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD2__RGMII_RD2 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RD3__RGMII_RD3 | MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_0__CCM_CLKO1 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_GPIO_3__CCM_CLKO2 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT0__GPIO2_IO08 | MUX_PAD_CTRL(0x84)), + IOMUX_PADS(PAD_ENET_REF_CLK__ENET_TX_CLK | + MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_TX_CTL__RGMII_TX_CTL | + MUX_PAD_CTRL(ENET_PAD_CTRL)), + IOMUX_PADS(PAD_RGMII_RX_CTL__RGMII_RX_CTL | + MUX_PAD_CTRL(ENET_PAD_CTRL)), +}; + +static int handle_mac_address(void) +{ + unsigned char enetaddr[6]; + int rc; + + rc = eth_getenv_enetaddr("ethaddr", enetaddr); + if (rc) + return 0; + + rc = cl_eeprom_read_mac_addr(enetaddr); + if (rc) + return rc; + + if (!is_valid_ether_addr(enetaddr)) + return -1; + + return eth_setenv_enetaddr("ethaddr", enetaddr); +} + +int board_eth_init(bd_t *bis) +{ + int res = handle_mac_address(); + if (res) + puts("No MAC address found\n"); + + SETUP_IOMUX_PADS(enet_pads); + /* phy reset */ + gpio_direction_output(CM_FX6_ENET_NRST, 0); + udelay(500); + gpio_set_value(CM_FX6_ENET_NRST, 1); + enable_enet_clk(1); + return cpu_eth_init(bis); +} +#endif + +#ifdef CONFIG_NAND_MXS +static iomux_v3_cfg_t const nand_pads[] = { + IOMUX_PADS(PAD_NANDF_CLE__NAND_CLE | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_ALE__NAND_ALE | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_CS0__NAND_CE0_B | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_RB0__NAND_READY_B | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D0__NAND_DATA00 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D1__NAND_DATA01 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D2__NAND_DATA02 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D3__NAND_DATA03 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D4__NAND_DATA04 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D5__NAND_DATA05 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D6__NAND_DATA06 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_NANDF_D7__NAND_DATA07 | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_CMD__NAND_RE_B | MUX_PAD_CTRL(NO_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_CLK__NAND_WE_B | MUX_PAD_CTRL(NO_PAD_CTRL)), +}; + +static void cm_fx6_setup_gpmi_nand(void) +{ + SETUP_IOMUX_PADS(nand_pads); + /* Enable clock roots */ + enable_usdhc_clk(1, 3); + enable_usdhc_clk(1, 4); + + setup_gpmi_io_clk(MXC_CCM_CS2CDR_ENFC_CLK_PODF(0xf) | + MXC_CCM_CS2CDR_ENFC_CLK_PRED(1) | + MXC_CCM_CS2CDR_ENFC_CLK_SEL(0)); +} +#else +static void cm_fx6_setup_gpmi_nand(void) {} +#endif + +#ifdef CONFIG_FSL_ESDHC +static struct fsl_esdhc_cfg usdhc_cfg[3] = { + {USDHC1_BASE_ADDR}, + {USDHC2_BASE_ADDR}, + {USDHC3_BASE_ADDR}, +}; + +static enum mxc_clock usdhc_clk[3] = { + MXC_ESDHC_CLK, + MXC_ESDHC2_CLK, + MXC_ESDHC3_CLK, +}; + +int board_mmc_init(bd_t *bis) +{ + int i; + + cm_fx6_set_usdhc_iomux(); + for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { + usdhc_cfg[i].sdhc_clk = mxc_get_clock(usdhc_clk[i]); + usdhc_cfg[i].max_bus_width = 4; + fsl_esdhc_initialize(bis, &usdhc_cfg[i]); + enable_usdhc_clk(1, i); + } + + return 0; +} +#endif + +#ifdef CONFIG_OF_BOARD_SETUP +void ft_board_setup(void *blob, bd_t *bd) +{ + uint8_t enetaddr[6]; + + /* MAC addr */ + if (eth_getenv_enetaddr("ethaddr", enetaddr)) { + fdt_find_and_setprop(blob, "/fec", "local-mac-address", + enetaddr, 6, 1); + } +} +#endif + +int board_init(void) +{ + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; + cm_fx6_setup_gpmi_nand(); + cm_fx6_setup_i2c(); + + return 0; +} + +int checkboard(void) +{ + puts("Board: CM-FX6\n"); + return 0; +} + +void dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[1].start = PHYS_SDRAM_2; + + switch (gd->ram_size) { + case 0x10000000: /* DDR_16BIT_256MB */ + gd->bd->bi_dram[0].size = 0x10000000; + gd->bd->bi_dram[1].size = 0; + break; + case 0x20000000: /* DDR_32BIT_512MB */ + gd->bd->bi_dram[0].size = 0x20000000; + gd->bd->bi_dram[1].size = 0; + break; + case 0x40000000: + if (is_cpu_type(MXC_CPU_MX6SOLO)) { /* DDR_32BIT_1GB */ + gd->bd->bi_dram[0].size = 0x20000000; + gd->bd->bi_dram[1].size = 0x20000000; + } else { /* DDR_64BIT_1GB */ + gd->bd->bi_dram[0].size = 0x40000000; + gd->bd->bi_dram[1].size = 0; + } + break; + case 0x80000000: /* DDR_64BIT_2GB */ + gd->bd->bi_dram[0].size = 0x40000000; + gd->bd->bi_dram[1].size = 0x40000000; + break; + case 0xEFF00000: /* DDR_64BIT_4GB */ + gd->bd->bi_dram[0].size = 0x70000000; + gd->bd->bi_dram[1].size = 0x7FF00000; + break; + } +} + +int dram_init(void) +{ + gd->ram_size = imx_ddr_size(); + switch (gd->ram_size) { + case 0x10000000: + case 0x20000000: + case 0x40000000: + case 0x80000000: + break; + case 0xF0000000: + gd->ram_size -= 0x100000; + break; + default: + printf("ERROR: Unsupported DRAM size 0x%lx\n", gd->ram_size); + return -1; + } + + return 0; +} + +u32 get_board_rev(void) +{ + return cl_eeprom_get_board_rev(); +} + diff --git a/board/compulab/cm_fx6/common.c b/board/compulab/cm_fx6/common.c new file mode 100644 index 0000000..59c9d1a --- /dev/null +++ b/board/compulab/cm_fx6/common.c @@ -0,0 +1,85 @@ +/* + * Code used by both U-Boot and SPL for Compulab CM-FX6 + * + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ + * + * Author: Nikita Kiryanov + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include "common.h" + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_FSL_ESDHC +#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ + PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +static iomux_v3_cfg_t const usdhc_pads[] = { + IOMUX_PADS(PAD_SD1_CLK__SD1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_CMD__SD1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT0__SD1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT1__SD1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT2__SD1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD1_DAT3__SD1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + + IOMUX_PADS(PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_CMD__SD2_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT0__SD2_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT1__SD2_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT2__SD2_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD2_DAT3__SD2_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + + IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT4__SD3_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT5__SD3_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT6__SD3_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD3_DAT7__SD3_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), +}; + +void cm_fx6_set_usdhc_iomux(void) +{ + SETUP_IOMUX_PADS(usdhc_pads); +} + +/* CINS bit doesn't work, so always try to access the MMC card */ +int board_mmc_getcd(struct mmc *mmc) +{ + return 1; +} +#endif + +#ifdef CONFIG_MXC_SPI +#define ECSPI_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_SPEED_MED | \ + PAD_CTL_PUS_100K_DOWN | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) + +static iomux_v3_cfg_t const ecspi_pads[] = { + IOMUX_PADS(PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(ECSPI_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(ECSPI_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(ECSPI_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(ECSPI_PAD_CTRL)), + IOMUX_PADS(PAD_EIM_D19__ECSPI1_SS1 | MUX_PAD_CTRL(ECSPI_PAD_CTRL)), +}; + +void cm_fx6_set_ecspi_iomux(void) +{ + SETUP_IOMUX_PADS(ecspi_pads); +} + +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (CM_FX6_ECSPI_BUS0_CS0) : -1; +} +#endif diff --git a/board/compulab/cm_fx6/common.h b/board/compulab/cm_fx6/common.h new file mode 100644 index 0000000..76097f8 --- /dev/null +++ b/board/compulab/cm_fx6/common.h @@ -0,0 +1,37 @@ +/* + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ + * + * Author: Nikita Kiryanov + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ + PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ + PAD_CTL_SRE_FAST | PAD_CTL_HYS) + +#define CM_FX6_ECSPI_BUS0_CS0 IMX_GPIO_NR(2, 30) +#define CM_FX6_GREEN_LED IMX_GPIO_NR(2, 31) +#define CM_FX6_ENET_NRST IMX_GPIO_NR(2, 8) +#define CM_FX6_ENET_NRST IMX_GPIO_NR(2, 8) +#define CM_FX6_USB_HUB_RST IMX_GPIO_NR(7, 8) +#define SB_FX6_USB_OTG_PWR IMX_GPIO_NR(3, 22) +#define CM_FX6_ENET_NRST IMX_GPIO_NR(2, 8) +#define CM_FX6_USB_HUB_RST IMX_GPIO_NR(7, 8) +#define SB_FX6_USB_OTG_PWR IMX_GPIO_NR(3, 22) +#define CM_FX6_SATA_PWREN IMX_GPIO_NR(1, 28) +#define CM_FX6_SATA_VDDC_CTRL IMX_GPIO_NR(1, 30) +#define CM_FX6_SATA_LDO_EN IMX_GPIO_NR(2, 16) +#define CM_FX6_SATA_NSTANDBY1 IMX_GPIO_NR(3, 20) +#define CM_FX6_SATA_PHY_SLP IMX_GPIO_NR(3, 23) +#define CM_FX6_SATA_STBY_REQ IMX_GPIO_NR(3, 29) +#define CM_FX6_SATA_NSTANDBY2 IMX_GPIO_NR(5, 2) +#define CM_FX6_SATA_NRSTDLY IMX_GPIO_NR(6, 6) +#define CM_FX6_SATA_PWLOSS_INT IMX_GPIO_NR(6, 31) + + +void cm_fx6_set_usdhc_iomux(void); +void cm_fx6_set_ecspi_iomux(void); diff --git a/board/compulab/cm_fx6/imximage.cfg b/board/compulab/cm_fx6/imximage.cfg new file mode 100644 index 0000000..420947e --- /dev/null +++ b/board/compulab/cm_fx6/imximage.cfg @@ -0,0 +1,8 @@ +/* + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +IMAGE_VERSION 2 +BOOT_FROM sd diff --git a/board/compulab/cm_fx6/spl.c b/board/compulab/cm_fx6/spl.c new file mode 100644 index 0000000..3948ba2 --- /dev/null +++ b/board/compulab/cm_fx6/spl.c @@ -0,0 +1,366 @@ +/* + * SPL specific code for Compulab CM-FX6 board + * + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ + * + * Author: Nikita Kiryanov + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "common.h" + +DECLARE_GLOBAL_DATA_PTR; + +enum ddr_config { + DDR_16BIT_256MB, + DDR_32BIT_512MB, + DDR_32BIT_1GB, + DDR_64BIT_1GB, + DDR_64BIT_2GB, + DDR_64BIT_4GB, + DDR_UNKNOWN, +}; + +/* + * Below DRAM_RESET[DDR_SEL] = 0 which is incorrect according to + * Freescale QRM, but this is exactly the value used by the automatic + * calibration script and it works also in all our tests, so we leave + * it as is at this point. + */ +#define CM_FX6_DDR_IOMUX_CFG \ + .dram_sdqs0 = 0x00000038, \ + .dram_sdqs1 = 0x00000038, \ + .dram_sdqs2 = 0x00000038, \ + .dram_sdqs3 = 0x00000038, \ + .dram_sdqs4 = 0x00000038, \ + .dram_sdqs5 = 0x00000038, \ + .dram_sdqs6 = 0x00000038, \ + .dram_sdqs7 = 0x00000038, \ + .dram_dqm0 = 0x00000038, \ + .dram_dqm1 = 0x00000038, \ + .dram_dqm2 = 0x00000038, \ + .dram_dqm3 = 0x00000038, \ + .dram_dqm4 = 0x00000038, \ + .dram_dqm5 = 0x00000038, \ + .dram_dqm6 = 0x00000038, \ + .dram_dqm7 = 0x00000038, \ + .dram_cas = 0x00000038, \ + .dram_ras = 0x00000038, \ + .dram_sdclk_0 = 0x00000038, \ + .dram_sdclk_1 = 0x00000038, \ + .dram_sdcke0 = 0x00003000, \ + .dram_sdcke1 = 0x00003000, \ + .dram_reset = 0x00000038, \ + .dram_sdba2 = 0x00000000, \ + .dram_sdodt0 = 0x00000038, \ + .dram_sdodt1 = 0x00000038, + +#define CM_FX6_GPR_IOMUX_CFG \ + .grp_b0ds = 0x00000038, \ + .grp_b1ds = 0x00000038, \ + .grp_b2ds = 0x00000038, \ + .grp_b3ds = 0x00000038, \ + .grp_b4ds = 0x00000038, \ + .grp_b5ds = 0x00000038, \ + .grp_b6ds = 0x00000038, \ + .grp_b7ds = 0x00000038, \ + .grp_addds = 0x00000038, \ + .grp_ddrmode_ctl = 0x00020000, \ + .grp_ddrpke = 0x00000000, \ + .grp_ddrmode = 0x00020000, \ + .grp_ctlds = 0x00000038, \ + .grp_ddr_type = 0x000C0000, + +static struct mx6sdl_iomux_ddr_regs ddr_iomux_s = { CM_FX6_DDR_IOMUX_CFG }; +static struct mx6sdl_iomux_grp_regs grp_iomux_s = { CM_FX6_GPR_IOMUX_CFG }; +static struct mx6dq_iomux_ddr_regs ddr_iomux_q = { CM_FX6_DDR_IOMUX_CFG }; +static struct mx6dq_iomux_grp_regs grp_iomux_q = { CM_FX6_GPR_IOMUX_CFG }; + +static struct mx6_mmdc_calibration cm_fx6_calib_s = { + .p0_mpwldectrl0 = 0x005B0061, + .p0_mpwldectrl1 = 0x004F0055, + .p0_mpdgctrl0 = 0x0314030C, + .p0_mpdgctrl1 = 0x025C0268, + .p0_mprddlctl = 0x42464646, + .p0_mpwrdlctl = 0x36322C34, +}; + +static struct mx6_ddr_sysinfo cm_fx6_sysinfo_s = { + .cs1_mirror = 1, + .cs_density = 16, + .bi_on = 1, + .rtt_nom = 1, + .rtt_wr = 0, + .ralat = 5, + .walat = 1, + .mif3_mode = 3, + .rst_to_cke = 0x23, + .sde_to_rst = 0x10, +}; + +static struct mx6_ddr3_cfg cm_fx6_ddr3_cfg_s = { + .mem_speed = 800, + .density = 4, + .rowaddr = 14, + .coladdr = 10, + .pagesz = 2, + .trcd = 1800, + .trcmin = 5200, + .trasmin = 3600, + .SRT = 0, +}; + +static void spl_mx6s_dram_init(enum ddr_config dram_config, bool reset) +{ + if (reset) + ((struct mmdc_p_regs *)MX6_MMDC_P0_MDCTL)->mdmisc = 2; + + switch (dram_config) { + case DDR_16BIT_256MB: + cm_fx6_sysinfo_s.dsize = 0; + cm_fx6_sysinfo_s.ncs = 1; + break; + case DDR_32BIT_512MB: + cm_fx6_sysinfo_s.dsize = 1; + cm_fx6_sysinfo_s.ncs = 1; + break; + case DDR_32BIT_1GB: + cm_fx6_sysinfo_s.dsize = 1; + cm_fx6_sysinfo_s.ncs = 2; + break; + default: + puts("Tried to setup invalid DDR configuration\n"); + hang(); + } + + mx6_dram_cfg(&cm_fx6_sysinfo_s, &cm_fx6_calib_s, &cm_fx6_ddr3_cfg_s); + udelay(100); +} + +static struct mx6_mmdc_calibration cm_fx6_calib_q = { + .p0_mpwldectrl0 = 0x00630068, + .p0_mpwldectrl1 = 0x0068005D, + .p0_mpdgctrl0 = 0x04140428, + .p0_mpdgctrl1 = 0x037C037C, + .p0_mprddlctl = 0x3C30303A, + .p0_mpwrdlctl = 0x3A344038, + .p1_mpwldectrl0 = 0x0035004C, + .p1_mpwldectrl1 = 0x00170026, + .p1_mpdgctrl0 = 0x0374037C, + .p1_mpdgctrl1 = 0x0350032C, + .p1_mprddlctl = 0x30322A3C, + .p1_mpwrdlctl = 0x48304A3E, +}; + +static struct mx6_ddr_sysinfo cm_fx6_sysinfo_q = { + .cs_density = 16, + .cs1_mirror = 1, + .bi_on = 1, + .rtt_nom = 1, + .rtt_wr = 0, + .ralat = 5, + .walat = 1, + .mif3_mode = 3, + .rst_to_cke = 0x23, + .sde_to_rst = 0x10, +}; + +static struct mx6_ddr3_cfg cm_fx6_ddr3_cfg_q = { + .mem_speed = 1066, + .density = 4, + .rowaddr = 14, + .coladdr = 10, + .pagesz = 2, + .trcd = 1324, + .trcmin = 59500, + .trasmin = 9750, + .SRT = 0, +}; + +static void spl_mx6q_dram_init(enum ddr_config dram_config, bool reset) +{ + if (reset) + ((struct mmdc_p_regs *)MX6_MMDC_P0_MDCTL)->mdmisc = 2; + + cm_fx6_ddr3_cfg_q.rowaddr = 14; + switch (dram_config) { + case DDR_16BIT_256MB: + cm_fx6_sysinfo_q.dsize = 0; + cm_fx6_sysinfo_q.ncs = 1; + break; + case DDR_32BIT_512MB: + cm_fx6_sysinfo_q.dsize = 1; + cm_fx6_sysinfo_q.ncs = 1; + break; + case DDR_64BIT_1GB: + cm_fx6_sysinfo_q.dsize = 2; + cm_fx6_sysinfo_q.ncs = 1; + break; + case DDR_64BIT_2GB: + cm_fx6_sysinfo_q.dsize = 2; + cm_fx6_sysinfo_q.ncs = 2; + break; + case DDR_64BIT_4GB: + cm_fx6_sysinfo_q.dsize = 2; + cm_fx6_sysinfo_q.ncs = 2; + cm_fx6_ddr3_cfg_q.rowaddr = 15; + break; + default: + puts("Tried to setup invalid DDR configuration\n"); + hang(); + } + + mx6_dram_cfg(&cm_fx6_sysinfo_q, &cm_fx6_calib_q, &cm_fx6_ddr3_cfg_q); + udelay(100); +} + +static int cm_fx6_spl_dram_init(void) +{ + unsigned long bank1_size, bank2_size; + + switch (get_cpu_type()) { + case MXC_CPU_MX6SOLO: + mx6sdl_dram_iocfg(64, &ddr_iomux_s, &grp_iomux_s); + + spl_mx6s_dram_init(DDR_32BIT_1GB, false); + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000); + if (bank1_size == 0x40000000) + return 0; + + if (bank1_size == 0x20000000) { + spl_mx6s_dram_init(DDR_32BIT_512MB, true); + return 0; + } + + spl_mx6s_dram_init(DDR_16BIT_256MB, true); + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000); + if (bank1_size == 0x10000000) + return 0; + + break; + case MXC_CPU_MX6D: + case MXC_CPU_MX6Q: + mx6dq_dram_iocfg(64, &ddr_iomux_q, &grp_iomux_q); + + spl_mx6q_dram_init(DDR_64BIT_4GB, false); + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000); + if (bank1_size == 0x80000000) + return 0; + + if (bank1_size == 0x40000000) { + bank2_size = get_ram_size((long int *)PHYS_SDRAM_2, + 0x80000000); + if (bank2_size == 0x40000000) { + /* Don't do a full reset here */ + spl_mx6q_dram_init(DDR_64BIT_2GB, false); + } else { + spl_mx6q_dram_init(DDR_64BIT_1GB, true); + } + + return 0; + } + + spl_mx6q_dram_init(DDR_32BIT_512MB, true); + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000); + if (bank1_size == 0x20000000) + return 0; + + spl_mx6q_dram_init(DDR_16BIT_256MB, true); + bank1_size = get_ram_size((long int *)PHYS_SDRAM_1, 0x80000000); + if (bank1_size == 0x10000000) + return 0; + + break; + } + + return -1; +} + +static iomux_v3_cfg_t const uart4_pads[] = { + IOMUX_PADS(PAD_KEY_COL0__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), + IOMUX_PADS(PAD_KEY_ROW0__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL)), +}; + +static void cm_fx6_setup_uart(void) +{ + SETUP_IOMUX_PADS(uart4_pads); + enable_uart_clk(1); +} + +#ifdef CONFIG_SPL_SPI_SUPPORT +static void cm_fx6_setup_ecspi(void) +{ + cm_fx6_set_ecspi_iomux(); + enable_cspi_clock(1, 0); +} +#else +static void cm_fx6_setup_ecspi(void) { } +#endif + +void board_init_f(ulong dummy) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + + gd = &gdata; + /* + * We don't use DMA in SPL, but we do need it in U-Boot. U-Boot + * initializes DMA very early (before all board code), so the only + * opportunity we have to initialize APBHDMA clocks is in SPL. + */ + setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); + enable_usdhc_clk(1, 2); + + arch_cpu_init(); + timer_init(); + cm_fx6_setup_ecspi(); + cm_fx6_setup_uart(); + get_clocks(); + preloader_console_init(); + gpio_direction_output(CM_FX6_GREEN_LED, 1); + if (cm_fx6_spl_dram_init()) { + puts("!!!ERROR!!! DRAM detection failed!!!\n"); + hang(); + } + + memset(__bss_start, 0, __bss_end - __bss_start); + board_init_r(NULL, 0); +} + +void spl_board_init(void) +{ + u32 boot_device = spl_boot_device(); + + if (boot_device == BOOT_DEVICE_SPI) + puts("Booting from SPI flash\n"); + else if (boot_device == BOOT_DEVICE_MMC1) + puts("Booting from MMC\n"); + else + puts("Unknown boot device\n"); +} + +#ifdef CONFIG_SPL_MMC_SUPPORT +static struct fsl_esdhc_cfg usdhc_cfg = { + .esdhc_base = USDHC3_BASE_ADDR, + .max_bus_width = 4, +}; + +int board_mmc_init(bd_t *bis) +{ + cm_fx6_set_usdhc_iomux(); + + usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + + return fsl_esdhc_initialize(bis, &usdhc_cfg); +} +#endif diff --git a/board/compulab/cm_t335/Kconfig b/board/compulab/cm_t335/Kconfig index 4a1adf3..6115976 100644 --- a/board/compulab/cm_t335/Kconfig +++ b/board/compulab/cm_t335/Kconfig @@ -1,23 +1,18 @@ if TARGET_CM_T335 config SYS_CPU - string default "armv7" config SYS_BOARD - string default "cm_t335" config SYS_VENDOR - string default "compulab" config SYS_SOC - string default "am33xx" config SYS_CONFIG_NAME - string default "cm_t335" endif diff --git a/board/compulab/cm_t35/Kconfig b/board/compulab/cm_t35/Kconfig index 06de692..d87741f 100644 --- a/board/compulab/cm_t35/Kconfig +++ b/board/compulab/cm_t35/Kconfig @@ -1,15 +1,12 @@ if TARGET_CM_T35 config SYS_BOARD - string default "cm_t35" config SYS_VENDOR - string default "compulab" config SYS_CONFIG_NAME - string default "cm_t35" endif diff --git a/board/compulab/cm_t54/Kconfig b/board/compulab/cm_t54/Kconfig index 0edab5c..52d3880 100644 --- a/board/compulab/cm_t54/Kconfig +++ b/board/compulab/cm_t54/Kconfig @@ -1,15 +1,12 @@ if TARGET_CM_T54 config SYS_BOARD - string default "cm_t54" config SYS_VENDOR - string default "compulab" config SYS_CONFIG_NAME - string default "cm_t54" endif diff --git a/board/compulab/common/eeprom.c b/board/compulab/common/eeprom.c index 20fe3e1..85442cd 100644 --- a/board/compulab/common/eeprom.c +++ b/board/compulab/common/eeprom.c @@ -31,8 +31,19 @@ static int cl_eeprom_layout; /* Implicitly LAYOUT_INVALID */ static int cl_eeprom_read(uint offset, uchar *buf, int len) { - return i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, offset, + int res; + unsigned int current_i2c_bus = i2c_get_bus_num(); + + res = i2c_set_bus_num(CONFIG_SYS_I2C_EEPROM_BUS); + if (res < 0) + return res; + + res = i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, offset, CONFIG_SYS_I2C_EEPROM_ADDR_LEN, buf, len); + + i2c_set_bus_num(current_i2c_bus); + + return res; } static int cl_eeprom_setup_layout(void) diff --git a/board/compulab/trimslice/Kconfig b/board/compulab/trimslice/Kconfig index 6ae030c..3576914 100644 --- a/board/compulab/trimslice/Kconfig +++ b/board/compulab/trimslice/Kconfig @@ -1,15 +1,12 @@ if TARGET_TRIMSLICE config SYS_BOARD - string default "trimslice" config SYS_VENDOR - string default "compulab" config SYS_CONFIG_NAME - string default "trimslice" endif diff --git a/board/congatec/cgtqmx6eval/Kconfig b/board/congatec/cgtqmx6eval/Kconfig index 155fa2c..0774784 100644 --- a/board/congatec/cgtqmx6eval/Kconfig +++ b/board/congatec/cgtqmx6eval/Kconfig @@ -1,23 +1,18 @@ if TARGET_CGTQMX6EVAL config SYS_CPU - string default "armv7" config SYS_BOARD - string default "cgtqmx6eval" config SYS_VENDOR - string default "congatec" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "cgtqmx6eval" endif diff --git a/board/congatec/cgtqmx6eval/MAINTAINERS b/board/congatec/cgtqmx6eval/MAINTAINERS index 53ad759..35f4a2a 100644 --- a/board/congatec/cgtqmx6eval/MAINTAINERS +++ b/board/congatec/cgtqmx6eval/MAINTAINERS @@ -1,5 +1,5 @@ CGTQMX6EVAL BOARD -M: Leo Sartre +#M: Leo Sartre S: Orphan (since 2014-06) F: board/congatec/cgtqmx6eval/ F: include/configs/cgtqmx6eval.h diff --git a/board/corscience/tricorder/Kconfig b/board/corscience/tricorder/Kconfig index 5147fd7..345ac83 100644 --- a/board/corscience/tricorder/Kconfig +++ b/board/corscience/tricorder/Kconfig @@ -1,15 +1,12 @@ if TARGET_TRICORDER config SYS_BOARD - string default "tricorder" config SYS_VENDOR - string default "corscience" config SYS_CONFIG_NAME - string default "tricorder" endif diff --git a/board/cpc45/Kconfig b/board/cpc45/Kconfig index fd1a536..c564caf 100644 --- a/board/cpc45/Kconfig +++ b/board/cpc45/Kconfig @@ -1,11 +1,9 @@ if TARGET_CPC45 config SYS_BOARD - string default "cpc45" config SYS_CONFIG_NAME - string default "CPC45" endif diff --git a/board/cpu86/Kconfig b/board/cpu86/Kconfig index 27f1e4e..ac3ae98 100644 --- a/board/cpu86/Kconfig +++ b/board/cpu86/Kconfig @@ -1,11 +1,9 @@ if TARGET_CPU86 config SYS_BOARD - string default "cpu86" config SYS_CONFIG_NAME - string default "CPU86" endif diff --git a/board/cpu87/Kconfig b/board/cpu87/Kconfig index b45225d..a4f2768 100644 --- a/board/cpu87/Kconfig +++ b/board/cpu87/Kconfig @@ -1,11 +1,9 @@ if TARGET_CPU87 config SYS_BOARD - string default "cpu87" config SYS_CONFIG_NAME - string default "CPU87" endif diff --git a/board/cpu87/MAINTAINERS b/board/cpu87/MAINTAINERS index 6e84f60..32804ea 100644 --- a/board/cpu87/MAINTAINERS +++ b/board/cpu87/MAINTAINERS @@ -1,5 +1,5 @@ CPU87 BOARD -M: - +#M: - S: Maintained F: board/cpu87/ F: include/configs/CPU87.h diff --git a/board/cray/L1/Kconfig b/board/cray/L1/Kconfig index fa9a702..35a290a 100644 --- a/board/cray/L1/Kconfig +++ b/board/cray/L1/Kconfig @@ -1,15 +1,12 @@ if TARGET_CRAYL1 config SYS_BOARD - string default "L1" config SYS_VENDOR - string default "cray" config SYS_CONFIG_NAME - string default "CRAYL1" endif diff --git a/board/cray/L1/MAINTAINERS b/board/cray/L1/MAINTAINERS index e93819e..e43e91f 100644 --- a/board/cray/L1/MAINTAINERS +++ b/board/cray/L1/MAINTAINERS @@ -1,5 +1,5 @@ L1 BOARD -M: David Updegraff +#M: David Updegraff S: Orphan (since 2014-03) F: board/cray/L1/ F: include/configs/CRAYL1.h diff --git a/board/creative/xfi3/Kconfig b/board/creative/xfi3/Kconfig index 9baf515..2255cc9 100644 --- a/board/creative/xfi3/Kconfig +++ b/board/creative/xfi3/Kconfig @@ -1,23 +1,18 @@ if TARGET_XFI3 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "xfi3" config SYS_VENDOR - string default "creative" config SYS_SOC - string default "mxs" config SYS_CONFIG_NAME - string default "xfi3" endif diff --git a/board/csb272/Kconfig b/board/csb272/Kconfig index 90f94a3..eed04f0 100644 --- a/board/csb272/Kconfig +++ b/board/csb272/Kconfig @@ -1,11 +1,9 @@ if TARGET_CSB272 config SYS_BOARD - string default "csb272" config SYS_CONFIG_NAME - string default "csb272" endif diff --git a/board/csb472/Kconfig b/board/csb472/Kconfig index 05230a0..53b1e7a 100644 --- a/board/csb472/Kconfig +++ b/board/csb472/Kconfig @@ -1,11 +1,9 @@ if TARGET_CSB472 config SYS_BOARD - string default "csb472" config SYS_CONFIG_NAME - string default "csb472" endif diff --git a/board/cu824/Kconfig b/board/cu824/Kconfig index d866688..7927b05 100644 --- a/board/cu824/Kconfig +++ b/board/cu824/Kconfig @@ -1,11 +1,9 @@ if TARGET_CU824 config SYS_BOARD - string default "cu824" config SYS_CONFIG_NAME - string default "CU824" endif diff --git a/board/d-link/dns325/Kconfig b/board/d-link/dns325/Kconfig index 763f93c..f6341ad 100644 --- a/board/d-link/dns325/Kconfig +++ b/board/d-link/dns325/Kconfig @@ -1,15 +1,12 @@ if TARGET_DNS325 config SYS_BOARD - string default "dns325" config SYS_VENDOR - string default "d-link" config SYS_CONFIG_NAME - string default "dns325" endif diff --git a/board/dave/PPChameleonEVB/Kconfig b/board/dave/PPChameleonEVB/Kconfig index 3e95654..bfe0011 100644 --- a/board/dave/PPChameleonEVB/Kconfig +++ b/board/dave/PPChameleonEVB/Kconfig @@ -1,15 +1,12 @@ if TARGET_CATCENTER config SYS_BOARD - string default "PPChameleonEVB" config SYS_VENDOR - string default "dave" config SYS_CONFIG_NAME - string default "CATcenter" endif @@ -17,15 +14,12 @@ endif if TARGET_PPCHAMELEONEVB config SYS_BOARD - string default "PPChameleonEVB" config SYS_VENDOR - string default "dave" config SYS_CONFIG_NAME - string default "PPChameleonEVB" endif diff --git a/board/dave/PPChameleonEVB/MAINTAINERS b/board/dave/PPChameleonEVB/MAINTAINERS index 3af5b57..d43c6d0 100644 --- a/board/dave/PPChameleonEVB/MAINTAINERS +++ b/board/dave/PPChameleonEVB/MAINTAINERS @@ -1,5 +1,5 @@ PPCHAMELEONEVB BOARD -M: - +#M: - S: Maintained F: board/dave/PPChameleonEVB/ F: include/configs/CATcenter.h diff --git a/board/davedenx/aria/Kconfig b/board/davedenx/aria/Kconfig index f5d2aef..54a86b9 100644 --- a/board/davedenx/aria/Kconfig +++ b/board/davedenx/aria/Kconfig @@ -1,15 +1,12 @@ if TARGET_ARIA config SYS_BOARD - string default "aria" config SYS_VENDOR - string default "davedenx" config SYS_CONFIG_NAME - string default "aria" endif diff --git a/board/davedenx/qong/Kconfig b/board/davedenx/qong/Kconfig index 51b9428..54cb450 100644 --- a/board/davedenx/qong/Kconfig +++ b/board/davedenx/qong/Kconfig @@ -1,23 +1,18 @@ if TARGET_QONG config SYS_CPU - string default "arm1136" config SYS_BOARD - string default "qong" config SYS_VENDOR - string default "davedenx" config SYS_SOC - string default "mx31" config SYS_CONFIG_NAME - string default "qong" endif diff --git a/board/davinci/da8xxevm/Kconfig b/board/davinci/da8xxevm/Kconfig index b123703..1a841ce 100644 --- a/board/davinci/da8xxevm/Kconfig +++ b/board/davinci/da8xxevm/Kconfig @@ -1,15 +1,12 @@ if TARGET_DA830EVM config SYS_BOARD - string default "da8xxevm" config SYS_VENDOR - string default "davinci" config SYS_CONFIG_NAME - string default "da830evm" endif @@ -17,15 +14,12 @@ endif if TARGET_DA850EVM config SYS_BOARD - string default "da8xxevm" config SYS_VENDOR - string default "davinci" config SYS_CONFIG_NAME - string default "da850evm" endif @@ -33,15 +27,12 @@ endif if TARGET_HAWKBOARD config SYS_BOARD - string default "da8xxevm" config SYS_VENDOR - string default "davinci" config SYS_CONFIG_NAME - string default "hawkboard" endif diff --git a/board/davinci/dm355evm/Kconfig b/board/davinci/dm355evm/Kconfig index 7490bc0..ec2c276 100644 --- a/board/davinci/dm355evm/Kconfig +++ b/board/davinci/dm355evm/Kconfig @@ -1,15 +1,12 @@ if TARGET_DAVINCI_DM355EVM config SYS_BOARD - string default "dm355evm" config SYS_VENDOR - string default "davinci" config SYS_CONFIG_NAME - string default "davinci_dm355evm" endif diff --git a/board/davinci/dm355evm/MAINTAINERS b/board/davinci/dm355evm/MAINTAINERS index ef586b3..c017e09 100644 --- a/board/davinci/dm355evm/MAINTAINERS +++ b/board/davinci/dm355evm/MAINTAINERS @@ -1,5 +1,5 @@ DM355EVM BOARD -M: Sandeep Paulraj +#M: Sandeep Paulraj S: Orphan (since 2014-08) F: board/davinci/dm355evm/ F: include/configs/davinci_dm355evm.h diff --git a/board/davinci/dm355leopard/Kconfig b/board/davinci/dm355leopard/Kconfig index 73a53ff..ab4230a 100644 --- a/board/davinci/dm355leopard/Kconfig +++ b/board/davinci/dm355leopard/Kconfig @@ -1,15 +1,12 @@ if TARGET_DAVINCI_DM355LEOPARD config SYS_BOARD - string default "dm355leopard" config SYS_VENDOR - string default "davinci" config SYS_CONFIG_NAME - string default "davinci_dm355leopard" endif diff --git a/board/davinci/dm355leopard/MAINTAINERS b/board/davinci/dm355leopard/MAINTAINERS index 2fc1e00..ed04d43 100644 --- a/board/davinci/dm355leopard/MAINTAINERS +++ b/board/davinci/dm355leopard/MAINTAINERS @@ -1,5 +1,5 @@ DM355LEOPARD BOARD -M: Sandeep Paulraj +#M: Sandeep Paulraj S: Orphan (since 2014-08) F: board/davinci/dm355leopard/ F: include/configs/davinci_dm355leopard.h diff --git a/board/davinci/dm365evm/Kconfig b/board/davinci/dm365evm/Kconfig index 266c6ee..724c7b6 100644 --- a/board/davinci/dm365evm/Kconfig +++ b/board/davinci/dm365evm/Kconfig @@ -1,15 +1,12 @@ if TARGET_DAVINCI_DM365EVM config SYS_BOARD - string default "dm365evm" config SYS_VENDOR - string default "davinci" config SYS_CONFIG_NAME - string default "davinci_dm365evm" endif diff --git a/board/davinci/dm365evm/MAINTAINERS b/board/davinci/dm365evm/MAINTAINERS index 0bfe02d..97c3ed3 100644 --- a/board/davinci/dm365evm/MAINTAINERS +++ b/board/davinci/dm365evm/MAINTAINERS @@ -1,5 +1,5 @@ DM365EVM BOARD -M: Sandeep Paulraj +#M: Sandeep Paulraj S: Orphan (since 2014-08) F: board/davinci/dm365evm/ F: include/configs/davinci_dm365evm.h diff --git a/board/davinci/dm6467evm/Kconfig b/board/davinci/dm6467evm/Kconfig index 1c4d0f0..56d2ab4 100644 --- a/board/davinci/dm6467evm/Kconfig +++ b/board/davinci/dm6467evm/Kconfig @@ -1,15 +1,12 @@ if TARGET_DAVINCI_DM6467EVM config SYS_BOARD - string default "dm6467evm" config SYS_VENDOR - string default "davinci" config SYS_CONFIG_NAME - string default "davinci_dm6467evm" endif diff --git a/board/davinci/dm6467evm/MAINTAINERS b/board/davinci/dm6467evm/MAINTAINERS index bb40536..8ca53c4 100644 --- a/board/davinci/dm6467evm/MAINTAINERS +++ b/board/davinci/dm6467evm/MAINTAINERS @@ -1,5 +1,5 @@ DM6467EVM BOARD -M: Sandeep Paulraj +#M: Sandeep Paulraj S: Orphan (since 2014-08) F: board/davinci/dm6467evm/ F: include/configs/davinci_dm6467evm.h diff --git a/board/davinci/dvevm/Kconfig b/board/davinci/dvevm/Kconfig index e020f8d..3f0ef82 100644 --- a/board/davinci/dvevm/Kconfig +++ b/board/davinci/dvevm/Kconfig @@ -1,15 +1,12 @@ if TARGET_DAVINCI_DVEVM config SYS_BOARD - string default "dvevm" config SYS_VENDOR - string default "davinci" config SYS_CONFIG_NAME - string default "davinci_dvevm" endif diff --git a/board/davinci/dvevm/MAINTAINERS b/board/davinci/dvevm/MAINTAINERS index 4b3ce45..a718b90 100644 --- a/board/davinci/dvevm/MAINTAINERS +++ b/board/davinci/dvevm/MAINTAINERS @@ -1,5 +1,5 @@ DVEVM BOARD -M: - +#M: - S: Maintained F: board/davinci/dvevm/ F: include/configs/davinci_dvevm.h diff --git a/board/davinci/ea20/Kconfig b/board/davinci/ea20/Kconfig index 93950fd..ae5b16e 100644 --- a/board/davinci/ea20/Kconfig +++ b/board/davinci/ea20/Kconfig @@ -1,15 +1,12 @@ if TARGET_EA20 config SYS_BOARD - string default "ea20" config SYS_VENDOR - string default "davinci" config SYS_CONFIG_NAME - string default "ea20" endif diff --git a/board/davinci/schmoogie/Kconfig b/board/davinci/schmoogie/Kconfig index 7aa459d..3581075 100644 --- a/board/davinci/schmoogie/Kconfig +++ b/board/davinci/schmoogie/Kconfig @@ -1,15 +1,12 @@ if TARGET_DAVINCI_SCHMOOGIE config SYS_BOARD - string default "schmoogie" config SYS_VENDOR - string default "davinci" config SYS_CONFIG_NAME - string default "davinci_schmoogie" endif diff --git a/board/davinci/schmoogie/MAINTAINERS b/board/davinci/schmoogie/MAINTAINERS index b1fc29c..808e7fc 100644 --- a/board/davinci/schmoogie/MAINTAINERS +++ b/board/davinci/schmoogie/MAINTAINERS @@ -1,5 +1,5 @@ SCHMOOGIE BOARD -M: - +#M: - S: Maintained F: board/davinci/schmoogie/ F: include/configs/davinci_schmoogie.h diff --git a/board/davinci/sffsdr/Kconfig b/board/davinci/sffsdr/Kconfig index 95461fc..dc48f31 100644 --- a/board/davinci/sffsdr/Kconfig +++ b/board/davinci/sffsdr/Kconfig @@ -1,15 +1,12 @@ if TARGET_DAVINCI_SFFSDR config SYS_BOARD - string default "sffsdr" config SYS_VENDOR - string default "davinci" config SYS_CONFIG_NAME - string default "davinci_sffsdr" endif diff --git a/board/davinci/sffsdr/MAINTAINERS b/board/davinci/sffsdr/MAINTAINERS index 428d003..5c7e132 100644 --- a/board/davinci/sffsdr/MAINTAINERS +++ b/board/davinci/sffsdr/MAINTAINERS @@ -1,5 +1,5 @@ SFFSDR BOARD -M: - +#M: - S: Maintained F: board/davinci/sffsdr/ F: include/configs/davinci_sffsdr.h diff --git a/board/davinci/sonata/Kconfig b/board/davinci/sonata/Kconfig index a21fb8e..4440d95 100644 --- a/board/davinci/sonata/Kconfig +++ b/board/davinci/sonata/Kconfig @@ -1,15 +1,12 @@ if TARGET_DAVINCI_SONATA config SYS_BOARD - string default "sonata" config SYS_VENDOR - string default "davinci" config SYS_CONFIG_NAME - string default "davinci_sonata" endif diff --git a/board/davinci/sonata/MAINTAINERS b/board/davinci/sonata/MAINTAINERS index 625978c..40659e5 100644 --- a/board/davinci/sonata/MAINTAINERS +++ b/board/davinci/sonata/MAINTAINERS @@ -1,5 +1,5 @@ SONATA BOARD -M: - +#M: - S: Maintained F: board/davinci/sonata/ F: include/configs/davinci_sonata.h diff --git a/board/dbau1x00/Kconfig b/board/dbau1x00/Kconfig index 5fca62d..1a8946d 100644 --- a/board/dbau1x00/Kconfig +++ b/board/dbau1x00/Kconfig @@ -1,19 +1,15 @@ if TARGET_DBAU1X00 config SYS_CPU - string default "mips32" config SYS_BOARD - string default "dbau1x00" config SYS_SOC - string default "au1x00" config SYS_CONFIG_NAME - string default "dbau1x00" endif diff --git a/board/denx/m28evk/Kconfig b/board/denx/m28evk/Kconfig index 05f79ad..b1c16c7 100644 --- a/board/denx/m28evk/Kconfig +++ b/board/denx/m28evk/Kconfig @@ -1,23 +1,18 @@ if TARGET_M28EVK config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "m28evk" config SYS_VENDOR - string default "denx" config SYS_SOC - string default "mxs" config SYS_CONFIG_NAME - string default "m28evk" endif diff --git a/board/denx/m53evk/Kconfig b/board/denx/m53evk/Kconfig index 5e3298c..5dbb7f8 100644 --- a/board/denx/m53evk/Kconfig +++ b/board/denx/m53evk/Kconfig @@ -1,23 +1,18 @@ if TARGET_M53EVK config SYS_CPU - string default "armv7" config SYS_BOARD - string default "m53evk" config SYS_VENDOR - string default "denx" config SYS_SOC - string default "mx5" config SYS_CONFIG_NAME - string default "m53evk" endif diff --git a/board/dnp5370/Kconfig b/board/dnp5370/Kconfig index f03a1e7..797081d 100644 --- a/board/dnp5370/Kconfig +++ b/board/dnp5370/Kconfig @@ -1,11 +1,9 @@ if TARGET_DNP5370 config SYS_BOARD - string default "dnp5370" config SYS_CONFIG_NAME - string default "dnp5370" endif diff --git a/board/eXalion/Kconfig b/board/eXalion/Kconfig index 42ba092..a22f58a 100644 --- a/board/eXalion/Kconfig +++ b/board/eXalion/Kconfig @@ -1,11 +1,9 @@ if TARGET_EXALION config SYS_BOARD - string default "eXalion" config SYS_CONFIG_NAME - string default "eXalion" endif diff --git a/board/earthlcd/favr-32-ezkit/Kconfig b/board/earthlcd/favr-32-ezkit/Kconfig index c0cd1b7..50e29ec 100644 --- a/board/earthlcd/favr-32-ezkit/Kconfig +++ b/board/earthlcd/favr-32-ezkit/Kconfig @@ -1,19 +1,15 @@ if TARGET_FAVR_32_EZKIT config SYS_BOARD - string default "favr-32-ezkit" config SYS_VENDOR - string default "earthlcd" config SYS_SOC - string default "at32ap700x" config SYS_CONFIG_NAME - string default "favr-32-ezkit" endif diff --git a/board/earthlcd/favr-32-ezkit/MAINTAINERS b/board/earthlcd/favr-32-ezkit/MAINTAINERS index 30453c6..89ba862 100644 --- a/board/earthlcd/favr-32-ezkit/MAINTAINERS +++ b/board/earthlcd/favr-32-ezkit/MAINTAINERS @@ -1,5 +1,5 @@ FAVR-32-EZKIT BOARD -M: Hans-Christian Egtvedt +#M: Hans-Christian Egtvedt S: Orphan (since 2014-06) F: board/earthlcd/favr-32-ezkit/ F: include/configs/favr-32-ezkit.h diff --git a/board/egnite/ethernut5/Kconfig b/board/egnite/ethernut5/Kconfig index cd2e53c..281e43a 100644 --- a/board/egnite/ethernut5/Kconfig +++ b/board/egnite/ethernut5/Kconfig @@ -1,23 +1,18 @@ if TARGET_ETHERNUT5 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "ethernut5" config SYS_VENDOR - string default "egnite" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "ethernut5" endif diff --git a/board/eltec/elppc/Kconfig b/board/eltec/elppc/Kconfig index 55564dc..d4003e5 100644 --- a/board/eltec/elppc/Kconfig +++ b/board/eltec/elppc/Kconfig @@ -1,15 +1,12 @@ if TARGET_ELPPC config SYS_BOARD - string default "elppc" config SYS_VENDOR - string default "eltec" config SYS_CONFIG_NAME - string default "ELPPC" endif diff --git a/board/eltec/elppc/MAINTAINERS b/board/eltec/elppc/MAINTAINERS index 5258b3a..e3b35f1 100644 --- a/board/eltec/elppc/MAINTAINERS +++ b/board/eltec/elppc/MAINTAINERS @@ -1,5 +1,5 @@ ELPPC BOARD -M: - +#M: - S: Maintained F: board/eltec/elppc/ F: include/configs/ELPPC.h diff --git a/board/eltec/mhpc/Kconfig b/board/eltec/mhpc/Kconfig index 69c8358..5a4c884 100644 --- a/board/eltec/mhpc/Kconfig +++ b/board/eltec/mhpc/Kconfig @@ -1,15 +1,12 @@ if TARGET_MHPC config SYS_BOARD - string default "mhpc" config SYS_VENDOR - string default "eltec" config SYS_CONFIG_NAME - string default "MHPC" endif diff --git a/board/eltec/mhpc/u-boot.lds b/board/eltec/mhpc/u-boot.lds deleted file mode 100644 index 7ae91ff..0000000 --- a/board/eltec/mhpc/u-boot.lds +++ /dev/null @@ -1,82 +0,0 @@ -/* - * (C) Copyright 2001-2010 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(powerpc) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .text : - { - arch/powerpc/cpu/mpc8xx/start.o (.text*) - arch/powerpc/cpu/mpc8xx/traps.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/embest/mx6boards/Kconfig b/board/embest/mx6boards/Kconfig index b0c823e..8e39fce 100644 --- a/board/embest/mx6boards/Kconfig +++ b/board/embest/mx6boards/Kconfig @@ -1,23 +1,18 @@ if TARGET_EMBESTMX6BOARDS config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx6boards" config SYS_VENDOR - string default "embest" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "embestmx6boards" endif diff --git a/board/embest/mx6boards/mx6boards.c b/board/embest/mx6boards/mx6boards.c index 530ea4f..02fb3fa 100644 --- a/board/embest/mx6boards/mx6boards.c +++ b/board/embest/mx6boards/mx6boards.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -285,6 +286,11 @@ iomux_v3_cfg_t const ecspi1_pads[] = { MX6_PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL), }; +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(2, 30)) : -1; +} + static void setup_spi(void) { imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); diff --git a/board/emk/top5200/Kconfig b/board/emk/top5200/Kconfig index 1d4e326..bba1fd4 100644 --- a/board/emk/top5200/Kconfig +++ b/board/emk/top5200/Kconfig @@ -1,15 +1,12 @@ if TARGET_TOP5200 config SYS_BOARD - string default "top5200" config SYS_VENDOR - string default "emk" config SYS_CONFIG_NAME - string default "TOP5200" endif diff --git a/board/emk/top860/Kconfig b/board/emk/top860/Kconfig index 4da934e..7b5afda 100644 --- a/board/emk/top860/Kconfig +++ b/board/emk/top860/Kconfig @@ -1,15 +1,12 @@ if TARGET_TOP860 config SYS_BOARD - string default "top860" config SYS_VENDOR - string default "emk" config SYS_CONFIG_NAME - string default "TOP860" endif diff --git a/board/emk/top860/u-boot.lds b/board/emk/top860/u-boot.lds deleted file mode 100644 index 79fcbf4..0000000 --- a/board/emk/top860/u-boot.lds +++ /dev/null @@ -1,83 +0,0 @@ -/* - * (C) Copyright 2000-2010 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(powerpc) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .text : - { - arch/powerpc/cpu/mpc8xx/start.o (.text*) - arch/powerpc/cpu/mpc8xx/traps.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/emk/top9000/Kconfig b/board/emk/top9000/Kconfig index 421f7b2..2dbe060 100644 --- a/board/emk/top9000/Kconfig +++ b/board/emk/top9000/Kconfig @@ -1,23 +1,18 @@ if TARGET_TOP9000 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "top9000" config SYS_VENDOR - string default "emk" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "top9000" endif diff --git a/board/enbw/enbw_cmc/Kconfig b/board/enbw/enbw_cmc/Kconfig index 183334b..796736d 100644 --- a/board/enbw/enbw_cmc/Kconfig +++ b/board/enbw/enbw_cmc/Kconfig @@ -1,15 +1,12 @@ if TARGET_ENBW_CMC config SYS_BOARD - string default "enbw_cmc" config SYS_VENDOR - string default "enbw" config SYS_CONFIG_NAME - string default "enbw_cmc" endif diff --git a/board/ep8260/Kconfig b/board/ep8260/Kconfig index 15ca962..5d876f4 100644 --- a/board/ep8260/Kconfig +++ b/board/ep8260/Kconfig @@ -1,11 +1,9 @@ if TARGET_EP8260 config SYS_BOARD - string default "ep8260" config SYS_CONFIG_NAME - string default "ep8260" endif diff --git a/board/ep8260/MAINTAINERS b/board/ep8260/MAINTAINERS index bb273df..bfa923c 100644 --- a/board/ep8260/MAINTAINERS +++ b/board/ep8260/MAINTAINERS @@ -1,5 +1,5 @@ EP8260 BOARD -M: Frank Panno +#M: Frank Panno S: Orphan (since 2014-06) F: board/ep8260/ F: include/configs/ep8260.h diff --git a/board/ep82xxm/Kconfig b/board/ep82xxm/Kconfig index b4121a6..d842091 100644 --- a/board/ep82xxm/Kconfig +++ b/board/ep82xxm/Kconfig @@ -1,11 +1,9 @@ if TARGET_EP82XXM config SYS_BOARD - string default "ep82xxm" config SYS_CONFIG_NAME - string default "ep82xxm" endif diff --git a/board/ep82xxm/MAINTAINERS b/board/ep82xxm/MAINTAINERS index 822261b..c053df9 100644 --- a/board/ep82xxm/MAINTAINERS +++ b/board/ep82xxm/MAINTAINERS @@ -1,5 +1,5 @@ EP82XXM BOARD -M: - +#M: - S: Maintained F: board/ep82xxm/ F: include/configs/ep82xxm.h diff --git a/board/esd/apc405/Kconfig b/board/esd/apc405/Kconfig index 83cd8bd..6b03460 100644 --- a/board/esd/apc405/Kconfig +++ b/board/esd/apc405/Kconfig @@ -1,15 +1,12 @@ if TARGET_APC405 config SYS_BOARD - string default "apc405" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "APC405" endif diff --git a/board/esd/ar405/Kconfig b/board/esd/ar405/Kconfig index e35fc5e..4ad9d51 100644 --- a/board/esd/ar405/Kconfig +++ b/board/esd/ar405/Kconfig @@ -1,15 +1,12 @@ if TARGET_AR405 config SYS_BOARD - string default "ar405" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "AR405" endif diff --git a/board/esd/ash405/Kconfig b/board/esd/ash405/Kconfig index e9558a4..02c7c14 100644 --- a/board/esd/ash405/Kconfig +++ b/board/esd/ash405/Kconfig @@ -1,15 +1,12 @@ if TARGET_ASH405 config SYS_BOARD - string default "ash405" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "ASH405" endif diff --git a/board/esd/cms700/Kconfig b/board/esd/cms700/Kconfig index 398d22a..da11bc0 100644 --- a/board/esd/cms700/Kconfig +++ b/board/esd/cms700/Kconfig @@ -1,15 +1,12 @@ if TARGET_CMS700 config SYS_BOARD - string default "cms700" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "CMS700" endif diff --git a/board/esd/cpci2dp/Kconfig b/board/esd/cpci2dp/Kconfig index c99404c..646e8ff 100644 --- a/board/esd/cpci2dp/Kconfig +++ b/board/esd/cpci2dp/Kconfig @@ -1,15 +1,12 @@ if TARGET_CPCI2DP config SYS_BOARD - string default "cpci2dp" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "CPCI2DP" endif diff --git a/board/esd/cpci405/Kconfig b/board/esd/cpci405/Kconfig index 0b9f9f4..bc56907 100644 --- a/board/esd/cpci405/Kconfig +++ b/board/esd/cpci405/Kconfig @@ -1,15 +1,12 @@ if TARGET_CPCI405 config SYS_BOARD - string default "cpci405" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "CPCI405" endif @@ -17,15 +14,12 @@ endif if TARGET_CPCI4052 config SYS_BOARD - string default "cpci405" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "CPCI4052" endif @@ -33,15 +27,12 @@ endif if TARGET_CPCI405AB config SYS_BOARD - string default "cpci405" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "CPCI405AB" endif @@ -49,15 +40,12 @@ endif if TARGET_CPCI405DT config SYS_BOARD - string default "cpci405" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "CPCI405DT" endif diff --git a/board/esd/cpci5200/Kconfig b/board/esd/cpci5200/Kconfig index 29fa9e6..ddd9418 100644 --- a/board/esd/cpci5200/Kconfig +++ b/board/esd/cpci5200/Kconfig @@ -1,15 +1,12 @@ if TARGET_CPCI5200 config SYS_BOARD - string default "cpci5200" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "cpci5200" endif diff --git a/board/esd/cpci750/Kconfig b/board/esd/cpci750/Kconfig index 99f8c2d..32d4ee6 100644 --- a/board/esd/cpci750/Kconfig +++ b/board/esd/cpci750/Kconfig @@ -1,15 +1,12 @@ if TARGET_CPCI750 config SYS_BOARD - string default "cpci750" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "CPCI750" endif diff --git a/board/esd/cpciiser4/Kconfig b/board/esd/cpciiser4/Kconfig index 1357a51..4079b2f 100644 --- a/board/esd/cpciiser4/Kconfig +++ b/board/esd/cpciiser4/Kconfig @@ -1,15 +1,12 @@ if TARGET_CPCIISER4 config SYS_BOARD - string default "cpciiser4" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "CPCIISER4" endif diff --git a/board/esd/dp405/Kconfig b/board/esd/dp405/Kconfig index 0fd7014..c0163ae 100644 --- a/board/esd/dp405/Kconfig +++ b/board/esd/dp405/Kconfig @@ -1,15 +1,12 @@ if TARGET_DP405 config SYS_BOARD - string default "dp405" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "DP405" endif diff --git a/board/esd/du405/Kconfig b/board/esd/du405/Kconfig index f2857f6..2913fb9 100644 --- a/board/esd/du405/Kconfig +++ b/board/esd/du405/Kconfig @@ -1,15 +1,12 @@ if TARGET_DU405 config SYS_BOARD - string default "du405" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "DU405" endif diff --git a/board/esd/du440/Kconfig b/board/esd/du440/Kconfig index f80e181..b4b3e6b 100644 --- a/board/esd/du440/Kconfig +++ b/board/esd/du440/Kconfig @@ -1,15 +1,12 @@ if TARGET_DU440 config SYS_BOARD - string default "du440" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "DU440" endif diff --git a/board/esd/hh405/Kconfig b/board/esd/hh405/Kconfig index 0dc4b06..8a8623a 100644 --- a/board/esd/hh405/Kconfig +++ b/board/esd/hh405/Kconfig @@ -1,15 +1,12 @@ if TARGET_HH405 config SYS_BOARD - string default "hh405" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "HH405" endif diff --git a/board/esd/hub405/Kconfig b/board/esd/hub405/Kconfig index e355dd2..2b9556a 100644 --- a/board/esd/hub405/Kconfig +++ b/board/esd/hub405/Kconfig @@ -1,15 +1,12 @@ if TARGET_HUB405 config SYS_BOARD - string default "hub405" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "HUB405" endif diff --git a/board/esd/mecp5123/Kconfig b/board/esd/mecp5123/Kconfig index 74237e3..3f2a411 100644 --- a/board/esd/mecp5123/Kconfig +++ b/board/esd/mecp5123/Kconfig @@ -1,15 +1,12 @@ if TARGET_MECP5123 config SYS_BOARD - string default "mecp5123" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "mecp5123" endif diff --git a/board/esd/mecp5200/Kconfig b/board/esd/mecp5200/Kconfig index dfcaefd..cfd5307 100644 --- a/board/esd/mecp5200/Kconfig +++ b/board/esd/mecp5200/Kconfig @@ -1,15 +1,12 @@ if TARGET_MECP5200 config SYS_BOARD - string default "mecp5200" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "mecp5200" endif diff --git a/board/esd/meesc/Kconfig b/board/esd/meesc/Kconfig index 86a2835..7d5c3ca 100644 --- a/board/esd/meesc/Kconfig +++ b/board/esd/meesc/Kconfig @@ -1,23 +1,18 @@ if TARGET_MEESC config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "meesc" config SYS_VENDOR - string default "esd" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "meesc" endif diff --git a/board/esd/ocrtc/Kconfig b/board/esd/ocrtc/Kconfig index 83fa495..44b402d 100644 --- a/board/esd/ocrtc/Kconfig +++ b/board/esd/ocrtc/Kconfig @@ -1,15 +1,12 @@ if TARGET_OCRTC config SYS_BOARD - string default "ocrtc" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "OCRTC" endif diff --git a/board/esd/otc570/Kconfig b/board/esd/otc570/Kconfig index ec6e4d9..7c5ce90 100644 --- a/board/esd/otc570/Kconfig +++ b/board/esd/otc570/Kconfig @@ -1,23 +1,18 @@ if TARGET_OTC570 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "otc570" config SYS_VENDOR - string default "esd" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "otc570" endif diff --git a/board/esd/pci405/Kconfig b/board/esd/pci405/Kconfig index a1a3971..0a6524d 100644 --- a/board/esd/pci405/Kconfig +++ b/board/esd/pci405/Kconfig @@ -1,15 +1,12 @@ if TARGET_PCI405 config SYS_BOARD - string default "pci405" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "PCI405" endif diff --git a/board/esd/pf5200/Kconfig b/board/esd/pf5200/Kconfig index 82f30af..c596e7a 100644 --- a/board/esd/pf5200/Kconfig +++ b/board/esd/pf5200/Kconfig @@ -1,15 +1,12 @@ if TARGET_PF5200 config SYS_BOARD - string default "pf5200" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "pf5200" endif diff --git a/board/esd/plu405/Kconfig b/board/esd/plu405/Kconfig index b9783d7..b3082cb 100644 --- a/board/esd/plu405/Kconfig +++ b/board/esd/plu405/Kconfig @@ -1,15 +1,12 @@ if TARGET_PLU405 config SYS_BOARD - string default "plu405" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "PLU405" endif diff --git a/board/esd/pmc405/Kconfig b/board/esd/pmc405/Kconfig index e3c3c82..3738c68 100644 --- a/board/esd/pmc405/Kconfig +++ b/board/esd/pmc405/Kconfig @@ -1,15 +1,12 @@ if TARGET_PMC405 config SYS_BOARD - string default "pmc405" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "PMC405" endif diff --git a/board/esd/pmc405de/Kconfig b/board/esd/pmc405de/Kconfig index f06b26b..4b05787 100644 --- a/board/esd/pmc405de/Kconfig +++ b/board/esd/pmc405de/Kconfig @@ -1,15 +1,12 @@ if TARGET_PMC405DE config SYS_BOARD - string default "pmc405de" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "PMC405DE" endif diff --git a/board/esd/pmc440/Kconfig b/board/esd/pmc440/Kconfig index 28db4ab..df8bd65 100644 --- a/board/esd/pmc440/Kconfig +++ b/board/esd/pmc440/Kconfig @@ -1,15 +1,12 @@ if TARGET_PMC440 config SYS_BOARD - string default "pmc440" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "PMC440" endif diff --git a/board/esd/tasreg/Kconfig b/board/esd/tasreg/Kconfig index 8fb80dc..85417d4 100644 --- a/board/esd/tasreg/Kconfig +++ b/board/esd/tasreg/Kconfig @@ -1,19 +1,15 @@ if TARGET_TASREG config SYS_CPU - string default "mcf52x2" config SYS_BOARD - string default "tasreg" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "TASREG" endif diff --git a/board/esd/vme8349/Kconfig b/board/esd/vme8349/Kconfig index 4fd507c..b8d9432 100644 --- a/board/esd/vme8349/Kconfig +++ b/board/esd/vme8349/Kconfig @@ -1,15 +1,12 @@ if TARGET_VME8349 config SYS_BOARD - string default "vme8349" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "vme8349" endif diff --git a/board/esd/voh405/Kconfig b/board/esd/voh405/Kconfig index ef3d073..d9fe9d2 100644 --- a/board/esd/voh405/Kconfig +++ b/board/esd/voh405/Kconfig @@ -1,15 +1,12 @@ if TARGET_VOH405 config SYS_BOARD - string default "voh405" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "VOH405" endif diff --git a/board/esd/vom405/Kconfig b/board/esd/vom405/Kconfig index 90ba34a..ecdf8c9 100644 --- a/board/esd/vom405/Kconfig +++ b/board/esd/vom405/Kconfig @@ -1,15 +1,12 @@ if TARGET_VOM405 config SYS_BOARD - string default "vom405" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "VOM405" endif diff --git a/board/esd/wuh405/Kconfig b/board/esd/wuh405/Kconfig index 214af9f..8a7df4d 100644 --- a/board/esd/wuh405/Kconfig +++ b/board/esd/wuh405/Kconfig @@ -1,15 +1,12 @@ if TARGET_WUH405 config SYS_BOARD - string default "wuh405" config SYS_VENDOR - string default "esd" config SYS_CONFIG_NAME - string default "WUH405" endif diff --git a/board/esg/ima3-mx53/Kconfig b/board/esg/ima3-mx53/Kconfig index fc27625..5593689 100644 --- a/board/esg/ima3-mx53/Kconfig +++ b/board/esg/ima3-mx53/Kconfig @@ -1,23 +1,18 @@ if TARGET_IMA3_MX53 config SYS_CPU - string default "armv7" config SYS_BOARD - string default "ima3-mx53" config SYS_VENDOR - string default "esg" config SYS_SOC - string default "mx5" config SYS_CONFIG_NAME - string default "ima3-mx53" endif diff --git a/board/esg/ima3-mx53/MAINTAINERS b/board/esg/ima3-mx53/MAINTAINERS index c434eb9..96de081 100644 --- a/board/esg/ima3-mx53/MAINTAINERS +++ b/board/esg/ima3-mx53/MAINTAINERS @@ -1,5 +1,5 @@ IMA3-MX53 BOARD -M: - +#M: - S: Maintained F: board/esg/ima3-mx53/ F: include/configs/ima3-mx53.h diff --git a/board/espt/Kconfig b/board/espt/Kconfig index 7527e34..6c7cd24 100644 --- a/board/espt/Kconfig +++ b/board/espt/Kconfig @@ -1,15 +1,12 @@ if TARGET_ESPT config SYS_CPU - string default "sh4" config SYS_BOARD - string default "espt" config SYS_CONFIG_NAME - string default "espt" endif diff --git a/board/espt/MAINTAINERS b/board/espt/MAINTAINERS index ff6e20c..fdbbc3e 100644 --- a/board/espt/MAINTAINERS +++ b/board/espt/MAINTAINERS @@ -1,5 +1,5 @@ ESPT BOARD -M: - +#M: - S: Maintained F: board/espt/ F: include/configs/espt.h diff --git a/board/esteem192e/Kconfig b/board/esteem192e/Kconfig index 848fef8..f895bc4 100644 --- a/board/esteem192e/Kconfig +++ b/board/esteem192e/Kconfig @@ -1,11 +1,9 @@ if TARGET_ESTEEM192E config SYS_BOARD - string default "esteem192e" config SYS_CONFIG_NAME - string default "ESTEEM192E" endif diff --git a/board/eukrea/cpu9260/Kconfig b/board/eukrea/cpu9260/Kconfig index d86044e..53ae917 100644 --- a/board/eukrea/cpu9260/Kconfig +++ b/board/eukrea/cpu9260/Kconfig @@ -1,23 +1,18 @@ if TARGET_CPU9260 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "cpu9260" config SYS_VENDOR - string default "eukrea" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "cpu9260" endif diff --git a/board/eukrea/cpuat91/Kconfig b/board/eukrea/cpuat91/Kconfig index ced3748..f2b02dc 100644 --- a/board/eukrea/cpuat91/Kconfig +++ b/board/eukrea/cpuat91/Kconfig @@ -1,23 +1,18 @@ if TARGET_CPUAT91 config SYS_CPU - string default "arm920t" config SYS_BOARD - string default "cpuat91" config SYS_VENDOR - string default "eukrea" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "cpuat91" endif diff --git a/board/evb64260/Kconfig b/board/evb64260/Kconfig index f7f86c9..933e6d6 100644 --- a/board/evb64260/Kconfig +++ b/board/evb64260/Kconfig @@ -1,11 +1,9 @@ if TARGET_P3G4 config SYS_BOARD - string default "evb64260" config SYS_CONFIG_NAME - string default "P3G4" endif @@ -13,11 +11,9 @@ endif if TARGET_ZUMA config SYS_BOARD - string default "evb64260" config SYS_CONFIG_NAME - string default "ZUMA" endif diff --git a/board/evb64260/MAINTAINERS b/board/evb64260/MAINTAINERS index f8307cc..d50dda5 100644 --- a/board/evb64260/MAINTAINERS +++ b/board/evb64260/MAINTAINERS @@ -6,7 +6,7 @@ F: include/configs/P3G4.h F: configs/P3G4_defconfig ZUMA BOARD -M: Nye Liu +#M: Nye Liu S: Orphan (since 2014-04) F: include/configs/ZUMA.h F: configs/ZUMA_defconfig diff --git a/board/exmeritus/hww1u1a/Kconfig b/board/exmeritus/hww1u1a/Kconfig index 126ce2f..7a76b43 100644 --- a/board/exmeritus/hww1u1a/Kconfig +++ b/board/exmeritus/hww1u1a/Kconfig @@ -1,15 +1,12 @@ if TARGET_HWW1U1A config SYS_BOARD - string default "hww1u1a" config SYS_VENDOR - string default "exmeritus" config SYS_CONFIG_NAME - string default "HWW1U1A" endif diff --git a/board/exmeritus/hww1u1a/MAINTAINERS b/board/exmeritus/hww1u1a/MAINTAINERS index e2fe2a6..b37f10b 100644 --- a/board/exmeritus/hww1u1a/MAINTAINERS +++ b/board/exmeritus/hww1u1a/MAINTAINERS @@ -1,5 +1,5 @@ HWW1U1A BOARD -M: Kyle Moffett +#M: Kyle Moffett S: Orphan (since 2014-06) F: board/exmeritus/hww1u1a/ F: include/configs/HWW1U1A.h diff --git a/board/faraday/a320evb/Kconfig b/board/faraday/a320evb/Kconfig index 353c873..bfa6207 100644 --- a/board/faraday/a320evb/Kconfig +++ b/board/faraday/a320evb/Kconfig @@ -1,23 +1,18 @@ if TARGET_A320EVB config SYS_CPU - string default "arm920t" config SYS_BOARD - string default "a320evb" config SYS_VENDOR - string default "faraday" config SYS_SOC - string default "a320" config SYS_CONFIG_NAME - string default "a320evb" endif diff --git a/board/freescale/b4860qds/Kconfig b/board/freescale/b4860qds/Kconfig index c5321d6..c7aab75 100644 --- a/board/freescale/b4860qds/Kconfig +++ b/board/freescale/b4860qds/Kconfig @@ -1,15 +1,12 @@ if TARGET_B4860QDS config SYS_BOARD - string default "b4860qds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "B4860QDS" endif diff --git a/board/freescale/b4860qds/MAINTAINERS b/board/freescale/b4860qds/MAINTAINERS index 9f9a612..ac02bb7 100644 --- a/board/freescale/b4860qds/MAINTAINERS +++ b/board/freescale/b4860qds/MAINTAINERS @@ -1,5 +1,5 @@ B4860QDS BOARD -M: - +#M: - S: Maintained F: board/freescale/b4860qds/ F: include/configs/B4860QDS.h diff --git a/board/freescale/bsc9131rdb/Kconfig b/board/freescale/bsc9131rdb/Kconfig index 6099d4d..dd9f765 100644 --- a/board/freescale/bsc9131rdb/Kconfig +++ b/board/freescale/bsc9131rdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_BSC9131RDB config SYS_BOARD - string default "bsc9131rdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "BSC9131RDB" endif diff --git a/board/freescale/bsc9132qds/Kconfig b/board/freescale/bsc9132qds/Kconfig index 955069b..db3a1f1 100644 --- a/board/freescale/bsc9132qds/Kconfig +++ b/board/freescale/bsc9132qds/Kconfig @@ -1,15 +1,12 @@ if TARGET_BSC9132QDS config SYS_BOARD - string default "bsc9132qds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "BSC9132QDS" endif diff --git a/board/freescale/c29xpcie/Kconfig b/board/freescale/c29xpcie/Kconfig index be9c237..17369b8 100644 --- a/board/freescale/c29xpcie/Kconfig +++ b/board/freescale/c29xpcie/Kconfig @@ -1,15 +1,12 @@ if TARGET_C29XPCIE config SYS_BOARD - string default "c29xpcie" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "C29XPCIE" endif diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 50d7731..32b5a3b 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -36,6 +36,8 @@ endif obj-$(CONFIG_FSL_DIU_CH7301) += diu_ch7301.o +obj-$(CONFIG_FSL_DCU_SII9022A) += dcu_sii9022a.o + obj-$(CONFIG_MPC8541CDS) += cds_pci_ft.o obj-$(CONFIG_MPC8548CDS) += cds_pci_ft.o obj-$(CONFIG_MPC8555CDS) += cds_pci_ft.o diff --git a/board/freescale/common/dcu_sii9022a.c b/board/freescale/common/dcu_sii9022a.c new file mode 100644 index 0000000..2da627e --- /dev/null +++ b/board/freescale/common/dcu_sii9022a.c @@ -0,0 +1,153 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include + +#define PIXEL_CLK_LSB_REG 0x00 +#define PIXEL_CLK_MSB_REG 0x01 +#define VERT_FREQ_LSB_REG 0x02 +#define VERT_FREQ_MSB_REG 0x03 +#define TOTAL_PIXELS_LSB_REG 0x04 +#define TOTAL_PIXELS_MSB_REG 0x05 +#define TOTAL_LINES_LSB_REG 0x06 +#define TOTAL_LINES_MSB_REG 0x07 +#define TPI_INBUS_FMT_REG 0x08 +#define TPI_INPUT_FMT_REG 0x09 +#define TPI_OUTPUT_FMT_REG 0x0A +#define TPI_SYS_CTRL_REG 0x1A +#define TPI_PWR_STAT_REG 0x1E +#define TPI_AUDIO_HANDING_REG 0x25 +#define TPI_AUDIO_INTF_REG 0x26 +#define TPI_AUDIO_FREQ_REG 0x27 +#define TPI_SET_PAGE_REG 0xBC +#define TPI_SET_OFFSET_REG 0xBD +#define TPI_RW_ACCESS_REG 0xBE +#define TPI_TRANS_MODE_REG 0xC7 + +#define TPI_INBUS_CLOCK_RATIO_1 (1 << 6) +#define TPI_INBUS_FULL_PIXEL_WIDE (1 << 5) +#define TPI_INBUS_RISING_EDGE (1 << 4) +#define TPI_INPUT_CLR_DEPTH_8BIT (0 << 6) +#define TPI_INPUT_VRANGE_EXPAN_AUTO (0 << 2) +#define TPI_INPUT_CLR_RGB (0 << 0) +#define TPI_OUTPUT_CLR_DEPTH_8BIT (0 << 6) +#define TPI_OUTPUT_VRANGE_COMPRE_AUTO (0 << 2) +#define TPI_OUTPUT_CLR_HDMI_RGB (0 << 0) +#define TPI_SYS_TMDS_OUTPUT (0 << 4) +#define TPI_SYS_AV_NORAML (0 << 3) +#define TPI_SYS_AV_MUTE (1 << 3) +#define TPI_SYS_DVI_MODE (0 << 0) +#define TPI_SYS_HDMI_MODE (1 << 0) +#define TPI_PWR_STAT_MASK (3 << 0) +#define TPI_PWR_STAT_D0 (0 << 0) +#define TPI_AUDIO_PASS_BASIC (0 << 0) +#define TPI_AUDIO_INTF_I2S (2 << 6) +#define TPI_AUDIO_INTF_NORMAL (0 << 4) +#define TPI_AUDIO_TYPE_PCM (1 << 0) +#define TPI_AUDIO_SAMP_SIZE_16BIT (1 << 6) +#define TPI_AUDIO_SAMP_FREQ_44K (2 << 3) +#define TPI_SET_PAGE_SII9022A 0x01 +#define TPI_SET_OFFSET_SII9022A 0x82 +#define TPI_RW_EN_SRC_TERMIN (1 << 0) +#define TPI_TRANS_MODE_ENABLE (0 << 7) + +/* Programming of Silicon SIi9022a HDMI Transmitter */ +int dcu_set_dvi_encoder(struct fb_videomode *videomode) +{ + u8 temp; + u16 temp1, temp2; + u32 temp3; + + i2c_set_bus_num(CONFIG_SYS_I2C_DVI_BUS_NUM); + + /* Enable TPI transmitter mode */ + temp = TPI_TRANS_MODE_ENABLE; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_TRANS_MODE_REG, 1, &temp, 1); + + /* Enter into D0 state, full operation */ + i2c_read(CONFIG_SYS_I2C_DVI_ADDR, TPI_PWR_STAT_REG, 1, &temp, 1); + temp &= ~TPI_PWR_STAT_MASK; + temp |= TPI_PWR_STAT_D0; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_PWR_STAT_REG, 1, &temp, 1); + + /* Enable source termination */ + temp = TPI_SET_PAGE_SII9022A; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SET_PAGE_REG, 1, &temp, 1); + temp = TPI_SET_OFFSET_SII9022A; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SET_OFFSET_REG, 1, &temp, 1); + + i2c_read(CONFIG_SYS_I2C_DVI_ADDR, TPI_RW_ACCESS_REG, 1, &temp, 1); + temp |= TPI_RW_EN_SRC_TERMIN; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_RW_ACCESS_REG, 1, &temp, 1); + + /* Set TPI system control */ + temp = TPI_SYS_TMDS_OUTPUT | TPI_SYS_AV_NORAML | TPI_SYS_DVI_MODE; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SYS_CTRL_REG, 1, &temp, 1); + + /* Set pixel clock */ + temp1 = PICOS2KHZ(videomode->pixclock) / 10; + temp = (u8)(temp1 & 0xFF); + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, PIXEL_CLK_LSB_REG, 1, &temp, 1); + temp = (u8)(temp1 >> 8); + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, PIXEL_CLK_MSB_REG, 1, &temp, 1); + + /* Set total pixels per line */ + temp1 = videomode->hsync_len + videomode->left_margin + + videomode->xres + videomode->right_margin; + temp = (u8)(temp1 & 0xFF); + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_PIXELS_LSB_REG, 1, &temp, 1); + temp = (u8)(temp1 >> 8); + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_PIXELS_MSB_REG, 1, &temp, 1); + + /* Set total lines */ + temp2 = videomode->vsync_len + videomode->upper_margin + + videomode->yres + videomode->lower_margin; + temp = (u8)(temp2 & 0xFF); + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_LINES_LSB_REG, 1, &temp, 1); + temp = (u8)(temp2 >> 8); + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TOTAL_LINES_MSB_REG, 1, &temp, 1); + + /* Set vertical frequency in Hz */ + temp3 = temp1 * temp2; + temp3 = (PICOS2KHZ(videomode->pixclock) * 1000) / temp3; + temp1 = (u16)temp3 * 100; + temp = (u8)(temp1 & 0xFF); + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, VERT_FREQ_LSB_REG, 1, &temp, 1); + temp = (u8)(temp1 >> 8); + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, VERT_FREQ_MSB_REG, 1, &temp, 1); + + /* Set TPI input bus and pixel repetition data */ + temp = TPI_INBUS_CLOCK_RATIO_1 | TPI_INBUS_FULL_PIXEL_WIDE | + TPI_INBUS_RISING_EDGE; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_INBUS_FMT_REG, 1, &temp, 1); + + /* Set TPI AVI Input format data */ + temp = TPI_INPUT_CLR_DEPTH_8BIT | TPI_INPUT_VRANGE_EXPAN_AUTO | + TPI_INPUT_CLR_RGB; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_INPUT_FMT_REG, 1, &temp, 1); + + /* Set TPI AVI Output format data */ + temp = TPI_OUTPUT_CLR_DEPTH_8BIT | TPI_OUTPUT_VRANGE_COMPRE_AUTO | + TPI_OUTPUT_CLR_HDMI_RGB; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_OUTPUT_FMT_REG, 1, &temp, 1); + + /* Set TPI audio configuration write data */ + temp = TPI_AUDIO_PASS_BASIC; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_HANDING_REG, 1, &temp, 1); + + temp = TPI_AUDIO_INTF_I2S | TPI_AUDIO_INTF_NORMAL | + TPI_AUDIO_TYPE_PCM; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_INTF_REG, 1, &temp, 1); + + temp = TPI_AUDIO_SAMP_SIZE_16BIT | TPI_AUDIO_SAMP_FREQ_44K; + i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_AUDIO_FREQ_REG, 1, &temp, 1); + + return 0; +} diff --git a/board/freescale/common/dcu_sii9022a.h b/board/freescale/common/dcu_sii9022a.h new file mode 100644 index 0000000..de76733 --- /dev/null +++ b/board/freescale/common/dcu_sii9022a.h @@ -0,0 +1,13 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DCU_HDMI_SII9022A__ +#define __DCU_HDMI_SII9022A__ + +/* Programming of Silicon SII9022A connector HDMI Transmitter*/ +int dcu_set_dvi_encoder(struct fb_videomode *videomode); + +#endif diff --git a/board/freescale/common/ics307_clk.c b/board/freescale/common/ics307_clk.c index 6789efb..e683be3 100644 --- a/board/freescale/common/ics307_clk.c +++ b/board/freescale/common/ics307_clk.c @@ -67,7 +67,7 @@ unsigned long ics307_sysclk_calculator(unsigned long out_freq) continue; /* Calculate the temp out frequency */ tmp_out = input_freq * 2 * vdw / (rdw * od * 1000); - diff = MAX(out_freq, tmp_out) - MIN(out_freq, tmp_out); + diff = max(out_freq, tmp_out) - min(out_freq, tmp_out); /* * calculate the percent, the precision is 1/1000 * If greater than 1/1000, continue diff --git a/board/freescale/corenet_ds/Kconfig b/board/freescale/corenet_ds/Kconfig index 8c3bd9c..433f539 100644 --- a/board/freescale/corenet_ds/Kconfig +++ b/board/freescale/corenet_ds/Kconfig @@ -1,15 +1,12 @@ if TARGET_P3041DS config SYS_BOARD - string default "corenet_ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P3041DS" endif @@ -17,15 +14,12 @@ endif if TARGET_P4080DS config SYS_BOARD - string default "corenet_ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P4080DS" endif @@ -33,15 +27,12 @@ endif if TARGET_P5020DS config SYS_BOARD - string default "corenet_ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P5020DS" endif @@ -49,15 +40,12 @@ endif if TARGET_P5040DS config SYS_BOARD - string default "corenet_ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P5040DS" endif diff --git a/board/freescale/corenet_ds/MAINTAINERS b/board/freescale/corenet_ds/MAINTAINERS index 841d82f..c8ca674 100644 --- a/board/freescale/corenet_ds/MAINTAINERS +++ b/board/freescale/corenet_ds/MAINTAINERS @@ -1,5 +1,5 @@ CORENET_DS BOARD -M: - +#M: - S: Maintained F: board/freescale/corenet_ds/ F: include/configs/P3041DS.h diff --git a/board/freescale/ls1021aqds/Kconfig b/board/freescale/ls1021aqds/Kconfig new file mode 100644 index 0000000..3cee468 --- /dev/null +++ b/board/freescale/ls1021aqds/Kconfig @@ -0,0 +1,18 @@ +if TARGET_LS1021AQDS + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "ls1021aqds" + +config SYS_VENDOR + default "freescale" + +config SYS_SOC + default "ls102xa" + +config SYS_CONFIG_NAME + default "ls1021aqds" + +endif diff --git a/board/freescale/ls1021aqds/MAINTAINERS b/board/freescale/ls1021aqds/MAINTAINERS new file mode 100644 index 0000000..ccf4513 --- /dev/null +++ b/board/freescale/ls1021aqds/MAINTAINERS @@ -0,0 +1,7 @@ +LS1021AQDS BOARD +M: Alison Wang +S: Maintained +F: board/freescale/ls1021aqds/ +F: include/configs/ls1021aqds.h +F: configs/ls1021aqds_nor_defconfig +F: configs/ls1021aqds_ddr4_nor_defconfig diff --git a/board/freescale/ls1021aqds/Makefile b/board/freescale/ls1021aqds/Makefile new file mode 100644 index 0000000..3b6903c --- /dev/null +++ b/board/freescale/ls1021aqds/Makefile @@ -0,0 +1,9 @@ +# +# Copyright 2014 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += ls1021aqds.o +obj-y += ddr.o +obj-y += eth.o diff --git a/board/freescale/ls1021aqds/README b/board/freescale/ls1021aqds/README new file mode 100644 index 0000000..c561776 --- /dev/null +++ b/board/freescale/ls1021aqds/README @@ -0,0 +1,112 @@ +Overview +-------- +The LS1021AQDS is a Freescale reference board that hosts the LS1021A SoC. + +LS1021A SoC Overview +------------------ +The QorIQ LS1 family, which includes the LS1021A communications processor, +is built on Layerscape architecture, the industry's first software-aware, +core-agnostic networking architecture to offer unprecedented efficiency +and scale. + +A member of the value-performance tier, the QorIQ LS1021A processor provides +extensive integration and power efficiency for fanless, small form factor +enterprise networking applications. Incorporating dual ARM Cortex-A7 cores +running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark +performance of over 6,000, as well as virtualization support, advanced +security features and the broadest array of high-speed interconnects and +optimized peripheral features ever offered in a sub-3 W processor. + +The QorIQ LS1021A processor features an integrated LCD controller, +CAN controller for implementing industrial protocols, DDR3L/4 running +up to 1600 MHz, integrated security engine and QUICC Engine, and ECC +protection on both L1 and L2 caches. The LS1021A processor is pin- and +software-compatible with the QorIQ LS1020A and LS1022A processors. + +The LS1021A SoC includes the following function and features: + + - ARM Cortex-A7 MPCore compliant with ARMv7-A architecture + - Dual high-preformance ARM Cortex-A7 cores, each core includes: + - 32 Kbyte L1 Instruction Cache and Data Cache for each core (ECC protection) + - 512 Kbyte shared coherent L2 Cache (with ECC protection) + - NEON Co-processor (per core) + - 40-bit physical addressing + - Vector floating-point support + - ARM Core-Link CCI-400 Cache Coherent Interconnect + - One DDR3L/DDR4 SDRAM memory controller with x8/x16/x32-bit configuration + supporting speeds up to 1600Mtps + - ECC and interleaving support + - VeTSEC Ethernet complex + - Up to 3x virtualized 10/100/1000 Ethernet controllers + - MII, RMII, RGMII, and SGMII support + - QoS, lossless flow control, and IEEE 1588 support + - 4-lane 6GHz SerDes + - High speed interconnect (4 SerDes lanes with are muxed for these protocol) + - Two PCI Express Gen2 controllers running at up to 5 GHz + - One Serial ATA 3.0 supporting 6 GT/s operation + - Two SGMII interfaces supporting 1000 Mbps + - Additional peripheral interfaces + - One high-speed USB 3.0 controller with integrated PHY and one high-speed + USB 2.00 controller with ULPI + - Integrated flash controller (IFC) with 16-bit interface + - Quad SPI NOR Flash + - One enhanced Secure digital host controller + - Display controller unit (DCU) 24-bit RGB (12-bit DDR pin interface) + - Ten UARTs comprised of two 16550 compliant DUARTs, and six low power + UARTs + - Three I2C controllers + - Eight FlexTimers four supporting PWM and four FlexCAN ports + - Four GPIO controllers supporting up to 109 general purpose I/O signals + - Integrated advanced audio block: + - Four synchronous audio interfaces (SAI) + - Sony/Philips Digital Interconnect Format (SPDIF) + - Asynchronous Sample Rate Converter (ASRC) + - Hardware based crypto offload engine + - IPSec forwarding at up to 1Gbps + - QorIQ Trust Architecture, Secure Boot, and ARM TrustZone supported + - Public key hardware accelerator + - True Random Number Generator (NIST Certified) + - Advanced Encryption Standard Accelerators (AESA) + - Data Encryption Standard Accelerators + - QUICC Engine ULite block + - Two universal communication controllers (TDM and HDLC) supporting 64 + multichannels, each running at 64 Kbps + - Support for 256 channels of HDLC + - QorIQ TrustArchitecture with Secure Boot, as well as ARM TrustZone supported + +LS1021AQDS board Overview +------------------------- + - DDR Controller + - Supports rates of up to 1600 MHz data-rate + - Supports one DDR3LP UDIMM, of single-, dual- types. + - IFC/Local Bus + - NAND flash: 512M 8-bit NAND flash + - NOR: 128MB 16-bit NOR Flash + - Ethernet + - Three on-board RGMII 10/100/1G ethernet ports. + - FPGA + - Clocks + - System and DDR clock (SYSCLK, DDRCLK) + - SERDES clocks + - Power Supplies + - SDHC + - SDHC/SDXC connector + - Other IO + - Two Serial ports + - Three I2C ports + +Memory map +----------- +The addresses in brackets are physical addresses. + +Start Address End Address Description Size +0x00_0000_0000 0x00_000F_FFFF Secure Boot ROM 1MB +0x00_0100_0000 0x00_0FFF_FFFF CCSRBAR 240MB +0x00_1000_0000 0x00_1000_FFFF OCRAM0 64KB +0x00_1001_0000 0x00_1001_FFFF OCRAM1 64KB +0x00_2000_0000 0x00_20FF_FFFF DCSR 16MB +0x00_4000_0000 0x00_5FFF_FFFF QSPI 512MB +0x00_6000_0000 0x00_67FF_FFFF IFC - NOR Flash 128MB +0x00_7E80_0000 0x00_7E80_FFFF IFC - NAND Flash 64KB +0x00_7FB0_0000 0x00_7FB0_0FFF IFC - FPGA 4KB +0x00_8000_0000 0x00_FFFF_FFFF DRAM1 2GB diff --git a/board/freescale/ls1021aqds/ddr.c b/board/freescale/ls1021aqds/ddr.c new file mode 100644 index 0000000..5898e33 --- /dev/null +++ b/board/freescale/ls1021aqds/ddr.c @@ -0,0 +1,166 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include "ddr.h" + +DECLARE_GLOBAL_DATA_PTR; + +void fsl_ddr_board_options(memctl_options_t *popts, + dimm_params_t *pdimm, + unsigned int ctrl_num) +{ + const struct board_specific_parameters *pbsp, *pbsp_highest = NULL; + ulong ddr_freq; + + if (ctrl_num > 3) { + printf("Not supported controller number %d\n", ctrl_num); + return; + } + if (!pdimm->n_ranks) + return; + + pbsp = udimms[0]; + + /* Get clk_adjust, wrlvl_start, wrlvl_ctl, according to the board ddr + * freqency and n_banks specified in board_specific_parameters table. + */ + ddr_freq = get_ddr_freq(0) / 1000000; + while (pbsp->datarate_mhz_high) { + if (pbsp->n_ranks == pdimm->n_ranks) { + if (ddr_freq <= pbsp->datarate_mhz_high) { + popts->clk_adjust = pbsp->clk_adjust; + popts->wrlvl_start = pbsp->wrlvl_start; + popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; + popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; + popts->cpo_override = pbsp->cpo_override; + popts->write_data_delay = + pbsp->write_data_delay; + goto found; + } + pbsp_highest = pbsp; + } + pbsp++; + } + + if (pbsp_highest) { + printf("Error: board specific timing not found for %lu MT/s\n", + ddr_freq); + printf("Trying to use the highest speed (%u) parameters\n", + pbsp_highest->datarate_mhz_high); + popts->clk_adjust = pbsp_highest->clk_adjust; + popts->wrlvl_start = pbsp_highest->wrlvl_start; + popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; + popts->wrlvl_ctl_3 = pbsp->wrlvl_ctl_3; + } else { + panic("DIMM is not supported by this board"); + } +found: + debug("Found timing match: n_ranks %d, data rate %d, rank_gb %d\n", + pbsp->n_ranks, pbsp->datarate_mhz_high, pbsp->rank_gb); + + /* force DDR bus width to 32 bits */ + popts->data_bus_width = 1; + popts->otf_burst_chop_en = 0; + popts->burst_length = DDR_BL8; + + /* + * Factors to consider for half-strength driver enable: + * - number of DIMMs installed + */ + popts->half_strength_driver_enable = 1; + /* + * Write leveling override + */ + popts->wrlvl_override = 1; + popts->wrlvl_sample = 0xf; + + /* + * Rtt and Rtt_WR override + */ + popts->rtt_override = 0; + + /* Enable ZQ calibration */ + popts->zq_en = 1; + +#ifdef CONFIG_SYS_FSL_DDR4 + popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_80ohm); + popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_80ohm) | + DDR_CDR2_VREF_OVRD(70); /* Vref = 70% */ +#else + popts->cswl_override = DDR_CSWL_CS0; + + /* DHC_EN =1, ODT = 75 Ohm */ + popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm); + popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm); +#endif +} + +#ifdef CONFIG_SYS_DDR_RAW_TIMING +dimm_params_t ddr_raw_timing = { + .n_ranks = 1, + .rank_density = 1073741824u, + .capacity = 1073741824u, + .primary_sdram_width = 32, + .ec_sdram_width = 0, + .registered_dimm = 0, + .mirrored_dimm = 0, + .n_row_addr = 15, + .n_col_addr = 10, + .n_banks_per_sdram_device = 8, + .edc_config = 0, + .burst_lengths_bitmask = 0x0c, + + .tckmin_x_ps = 1071, + .caslat_x = 0xfe << 4, /* 5,6,7,8 */ + .taa_ps = 13125, + .twr_ps = 15000, + .trcd_ps = 13125, + .trrd_ps = 7500, + .trp_ps = 13125, + .tras_ps = 37500, + .trc_ps = 50625, + .trfc_ps = 160000, + .twtr_ps = 7500, + .trtp_ps = 7500, + .refresh_rate_ps = 7800000, + .tfaw_ps = 37500, +}; + +int fsl_ddr_get_dimm_params(dimm_params_t *pdimm, + unsigned int controller_number, + unsigned int dimm_number) +{ + static const char dimm_model[] = "Fixed DDR on board"; + + if (((controller_number == 0) && (dimm_number == 0)) || + ((controller_number == 1) && (dimm_number == 0))) { + memcpy(pdimm, &ddr_raw_timing, sizeof(dimm_params_t)); + memset(pdimm->mpart, 0, sizeof(pdimm->mpart)); + memcpy(pdimm->mpart, dimm_model, sizeof(dimm_model) - 1); + } + + return 0; +} +#endif + +phys_size_t initdram(int board_type) +{ + phys_size_t dram_size; + + puts("Initializing DDR....using SPD\n"); + dram_size = fsl_ddr_sdram(); + + return dram_size; +} + +void dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = gd->ram_size; +} diff --git a/board/freescale/ls1021aqds/ddr.h b/board/freescale/ls1021aqds/ddr.h new file mode 100644 index 0000000..f819c99 --- /dev/null +++ b/board/freescale/ls1021aqds/ddr.h @@ -0,0 +1,59 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DDR_H__ +#define __DDR_H__ +struct board_specific_parameters { + u32 n_ranks; + u32 datarate_mhz_high; + u32 rank_gb; + u32 clk_adjust; + u32 wrlvl_start; + u32 wrlvl_ctl_2; + u32 wrlvl_ctl_3; + u32 cpo_override; + u32 write_data_delay; + u32 force_2t; +}; + +/* + * These tables contain all valid speeds we want to override with board + * specific parameters. datarate_mhz_high values need to be in ascending order + * for each n_ranks group. + */ +static const struct board_specific_parameters udimm0[] = { + /* + * memory controller 0 + * num| hi| rank| clk| wrlvl | wrlvl | wrlvl | cpo |wrdata|2T + * ranks| mhz| GB |adjst| start | ctl2 | ctl3 | |delay | + */ +#ifdef CONFIG_SYS_FSL_DDR4 + {2, 1666, 0, 4, 7, 0x0808090B, 0x0C0D0E0A,}, + {2, 1900, 0, 4, 6, 0x08080A0C, 0x0D0E0F0A,}, + {1, 1666, 0, 4, 8, 0x090A0B0B, 0x0C0D0E0C,}, + {1, 1900, 0, 4, 9, 0x0A0B0C0B, 0x0D0E0F0D,}, + {1, 2200, 0, 4, 10, 0x0B0C0D0C, 0x0E0F110E,}, +#elif defined(CONFIG_SYS_FSL_DDR3) + {1, 833, 1, 6, 8, 0x06060607, 0x08080807, 0x1f, 2, 0}, + {1, 1350, 1, 6, 8, 0x0708080A, 0x0A0B0C09, 0x1f, 2, 0}, + {1, 833, 2, 6, 8, 0x06060607, 0x08080807, 0x1f, 2, 0}, + {1, 1350, 2, 6, 8, 0x0708080A, 0x0A0B0C09, 0x1f, 2, 0}, + {2, 833, 4, 6, 8, 0x06060607, 0x08080807, 0x1f, 2, 0}, + {2, 1350, 4, 6, 8, 0x0708080A, 0x0A0B0C09, 0x1f, 2, 0}, + {2, 1350, 0, 6, 8, 0x0708080A, 0x0A0B0C09, 0x1f, 2, 0}, + {2, 1666, 4, 4, 0xa, 0x0B08090C, 0x0B0E0D0A, 0x1f, 2, 0}, + {2, 1666, 0, 4, 0xa, 0x0B08090C, 0x0B0E0D0A, 0x1f, 2, 0}, +#else +#error DDR type not defined +#endif + {} +}; + +static const struct board_specific_parameters *udimms[] = { + udimm0, +}; + +#endif diff --git a/board/freescale/ls1021aqds/eth.c b/board/freescale/ls1021aqds/eth.c new file mode 100644 index 0000000..be351be --- /dev/null +++ b/board/freescale/ls1021aqds/eth.c @@ -0,0 +1,186 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * + * This file handles the board muxing between the RGMII/SGMII PHYs on + * Freescale LS1021AQDS board. The RGMII PHYs are the three on-board 1Gb + * ports. The SGMII PHYs are provided by the standard Freescale four-port + * SGMII riser card. + * + * Muxing is handled via the PIXIS BRDCFG4 register. The EMI1 bits control + * muxing among the RGMII PHYs and the SGMII PHYs. The value for RGMII depends + * on which port is used. The value for SGMII depends on which slot the riser + * is inserted in. + */ + +#include +#include +#include +#include +#include +#include + +#include "../common/sgmii_riser.h" +#include "../common/qixis.h" + +#define EMI1_MASK 0x1f +#define EMI1_RGMII0 1 +#define EMI1_RGMII1 2 +#define EMI1_RGMII2 3 +#define EMI1_SGMII1 0x1c +#define EMI1_SGMII2 0x1d + +struct ls1021a_mdio { + struct mii_dev *realbus; +}; + +static void ls1021a_mux_mdio(int addr) +{ + u8 brdcfg4; + + brdcfg4 = QIXIS_READ(brdcfg[4]); + brdcfg4 &= EMI1_MASK; + + switch (addr) { + case EMI1_RGMII0: + brdcfg4 |= 0; + break; + case EMI1_RGMII1: + brdcfg4 |= 0x20; + break; + case EMI1_RGMII2: + brdcfg4 |= 0x40; + break; + case EMI1_SGMII1: + brdcfg4 |= 0x60; + break; + case EMI1_SGMII2: + brdcfg4 |= 0x80; + break; + default: + brdcfg4 |= 0xa0; + break; + } + + QIXIS_WRITE(brdcfg[4], brdcfg4); +} + +static int ls1021a_mdio_read(struct mii_dev *bus, int addr, int devad, + int regnum) +{ + struct ls1021a_mdio *priv = bus->priv; + + ls1021a_mux_mdio(addr); + + return priv->realbus->read(priv->realbus, addr, devad, regnum); +} + +static int ls1021a_mdio_write(struct mii_dev *bus, int addr, int devad, + int regnum, u16 value) +{ + struct ls1021a_mdio *priv = bus->priv; + + ls1021a_mux_mdio(addr); + + return priv->realbus->write(priv->realbus, addr, devad, regnum, value); +} + +static int ls1021a_mdio_reset(struct mii_dev *bus) +{ + struct ls1021a_mdio *priv = bus->priv; + + return priv->realbus->reset(priv->realbus); +} + +static int ls1021a_mdio_init(char *realbusname, char *fakebusname) +{ + struct ls1021a_mdio *lsmdio; + struct mii_dev *bus = mdio_alloc(); + + if (!bus) { + printf("Failed to allocate LS102xA MDIO bus\n"); + return -1; + } + + lsmdio = malloc(sizeof(*lsmdio)); + if (!lsmdio) { + printf("Failed to allocate LS102xA private data\n"); + free(bus); + return -1; + } + + bus->read = ls1021a_mdio_read; + bus->write = ls1021a_mdio_write; + bus->reset = ls1021a_mdio_reset; + sprintf(bus->name, fakebusname); + + lsmdio->realbus = miiphy_get_dev_by_name(realbusname); + + if (!lsmdio->realbus) { + printf("No bus with name %s\n", realbusname); + free(bus); + free(lsmdio); + return -1; + } + + bus->priv = lsmdio; + + return mdio_register(bus); +} + +int board_eth_init(bd_t *bis) +{ + struct fsl_pq_mdio_info mdio_info; + struct tsec_info_struct tsec_info[3]; + int num = 0; + +#ifdef CONFIG_TSEC1 + SET_STD_TSEC_INFO(tsec_info[num], 1); + if (is_serdes_configured(SGMII_TSEC1)) { + puts("eTSEC1 is in sgmii mode\n"); + tsec_info[num].flags |= TSEC_SGMII; + tsec_info[num].mii_devname = "LS1021A_SGMII_MDIO"; + } else { + tsec_info[num].mii_devname = "LS1021A_RGMII_MDIO"; + } + num++; +#endif +#ifdef CONFIG_TSEC2 + SET_STD_TSEC_INFO(tsec_info[num], 2); + if (is_serdes_configured(SGMII_TSEC2)) { + puts("eTSEC2 is in sgmii mode\n"); + tsec_info[num].flags |= TSEC_SGMII; + tsec_info[num].mii_devname = "LS1021A_SGMII_MDIO"; + } else { + tsec_info[num].mii_devname = "LS1021A_RGMII_MDIO"; + } + num++; +#endif +#ifdef CONFIG_TSEC3 + SET_STD_TSEC_INFO(tsec_info[num], 3); + tsec_info[num].mii_devname = "LS1021A_RGMII_MDIO"; + num++; +#endif + if (!num) { + printf("No TSECs initialized\n"); + return 0; + } + +#ifdef CONFIG_FSL_SGMII_RISER + fsl_sgmii_riser_init(tsec_info, num); +#endif + + mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR; + mdio_info.name = DEFAULT_MII_NAME; + + fsl_pq_mdio_init(bis, &mdio_info); + + /* Register the virtual MDIO front-ends */ + ls1021a_mdio_init(DEFAULT_MII_NAME, "LS1021A_RGMII_MDIO"); + ls1021a_mdio_init(DEFAULT_MII_NAME, "LS1021A_SGMII_MDIO"); + + tsec_eth_init(bis, tsec_info, num); + + return pci_eth_init(bis); +} diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c new file mode 100644 index 0000000..12e83f7 --- /dev/null +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -0,0 +1,255 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "../common/qixis.h" +#include "ls1021aqds_qixis.h" + +DECLARE_GLOBAL_DATA_PTR; + +enum { + MUX_TYPE_SD_PCI4, + MUX_TYPE_SD_PC_SA_SG_SG, + MUX_TYPE_SD_PC_SA_PC_SG, + MUX_TYPE_SD_PC_SG_SG, +}; + +int checkboard(void) +{ + char buf[64]; + u8 sw; + + puts("Board: LS1021AQDS\n"); + + sw = QIXIS_READ(brdcfg[0]); + sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; + + if (sw < 0x8) + printf("vBank: %d\n", sw); + else if (sw == 0x8) + puts("PromJet\n"); + else if (sw == 0x9) + puts("NAND\n"); + else if (sw == 0x15) + printf("IFCCard\n"); + else + printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH); + + printf("Sys ID:0x%02x, Sys Ver: 0x%02x\n", + QIXIS_READ(id), QIXIS_READ(arch)); + + printf("FPGA: v%d (%s), build %d\n", + (int)QIXIS_READ(scver), qixis_read_tag(buf), + (int)qixis_read_minor()); + + return 0; +} + +unsigned long get_board_sys_clk(void) +{ + u8 sysclk_conf = QIXIS_READ(brdcfg[1]); + + switch (sysclk_conf & 0x0f) { + case QIXIS_SYSCLK_64: + return 64000000; + case QIXIS_SYSCLK_83: + return 83333333; + case QIXIS_SYSCLK_100: + return 100000000; + case QIXIS_SYSCLK_125: + return 125000000; + case QIXIS_SYSCLK_133: + return 133333333; + case QIXIS_SYSCLK_150: + return 150000000; + case QIXIS_SYSCLK_160: + return 160000000; + case QIXIS_SYSCLK_166: + return 166666666; + } + return 66666666; +} + +unsigned long get_board_ddr_clk(void) +{ + u8 ddrclk_conf = QIXIS_READ(brdcfg[1]); + + switch ((ddrclk_conf & 0x30) >> 4) { + case QIXIS_DDRCLK_100: + return 100000000; + case QIXIS_DDRCLK_125: + return 125000000; + case QIXIS_DDRCLK_133: + return 133333333; + } + return 66666666; +} + +int dram_init(void) +{ + gd->ram_size = initdram(0); + + return 0; +} + +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg esdhc_cfg[1] = { + {CONFIG_SYS_FSL_ESDHC_ADDR}, +}; + +int board_mmc_init(bd_t *bis) +{ + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + + return fsl_esdhc_initialize(bis, &esdhc_cfg[0]); +} +#endif + +int select_i2c_ch_pca9547(u8 ch) +{ + int ret; + + ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1); + if (ret) { + puts("PCA: failed to select proper channel\n"); + return ret; + } + + return 0; +} + +int board_early_init_f(void) +{ + struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; + struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; + +#ifdef CONFIG_TSEC_ENET + out_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_REV); + out_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR); + out_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_NOREV); +#endif + +#ifdef CONFIG_FSL_IFC + init_early_memctl_regs(); +#endif + + /* Workaround for the issue that DDR could not respond to + * barrier transaction which is generated by executing DSB/ISB + * instruction. Set CCI-400 control override register to + * terminate the barrier transaction. After DDR is initialized, + * allow barrier transaction to DDR again */ + out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER); + + return 0; +} + +int config_board_mux(int ctrl_type) +{ + u8 reg12; + + reg12 = QIXIS_READ(brdcfg[12]); + + switch (ctrl_type) { + case MUX_TYPE_SD_PCI4: + reg12 = 0x38; + break; + case MUX_TYPE_SD_PC_SA_SG_SG: + reg12 = 0x01; + break; + case MUX_TYPE_SD_PC_SA_PC_SG: + reg12 = 0x01; + break; + case MUX_TYPE_SD_PC_SG_SG: + reg12 = 0x21; + break; + default: + printf("Wrong mux interface type\n"); + return -1; + } + + QIXIS_WRITE(brdcfg[12], reg12); + + return 0; +} + +int config_serdes_mux(void) +{ + struct ccsr_gur *gur = (struct ccsr_gur *)CONFIG_SYS_FSL_GUTS_ADDR; + u32 cfg; + + cfg = in_be32(&gur->rcwsr[4]) & RCWSR4_SRDS1_PRTCL_MASK; + cfg >>= RCWSR4_SRDS1_PRTCL_SHIFT; + + switch (cfg) { + case 0x0: + config_board_mux(MUX_TYPE_SD_PCI4); + break; + case 0x30: + config_board_mux(MUX_TYPE_SD_PC_SA_SG_SG); + break; + case 0x60: + config_board_mux(MUX_TYPE_SD_PC_SG_SG); + break; + case 0x70: + config_board_mux(MUX_TYPE_SD_PC_SA_PC_SG); + break; + default: + printf("SRDS1 prtcl:0x%x\n", cfg); + break; + } + + return 0; +} + +int board_init(void) +{ + struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; + + /* Set CCI-400 control override register to + * enable barrier transaction */ + out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER); + + select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT); + +#ifndef CONFIG_SYS_FSL_NO_SERDES + fsl_serdes_init(); + config_serdes_mux(); +#endif + return 0; +} + +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup(blob, bd); +} + +u8 flash_read8(void *addr) +{ + return __raw_readb(addr + 1); +} + +void flash_write16(u16 val, void *addr) +{ + u16 shftval = (((val >> 8) & 0xff) | ((val << 8) & 0xff00)); + + __raw_writew(shftval, addr); +} + +u16 flash_read16(void *addr) +{ + u16 val = __raw_readw(addr); + + return (((val) >> 8) & 0x00ff) | (((val) << 8) & 0xff00); +} diff --git a/board/freescale/ls1021aqds/ls1021aqds_qixis.h b/board/freescale/ls1021aqds/ls1021aqds_qixis.h new file mode 100644 index 0000000..09b3be2 --- /dev/null +++ b/board/freescale/ls1021aqds/ls1021aqds_qixis.h @@ -0,0 +1,35 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __LS1021AQDS_QIXIS_H__ +#define __LS1021AQDS_QIXIS_H__ + +/* Definitions of QIXIS Registers for LS1021AQDS */ + +/* BRDCFG4[4:7]] select EC1 and EC2 as a pair */ +#define BRDCFG4_EMISEL_MASK 0xe0 +#define BRDCFG4_EMISEL_SHIFT 5 + +/* SYSCLK */ +#define QIXIS_SYSCLK_66 0x0 +#define QIXIS_SYSCLK_83 0x1 +#define QIXIS_SYSCLK_100 0x2 +#define QIXIS_SYSCLK_125 0x3 +#define QIXIS_SYSCLK_133 0x4 +#define QIXIS_SYSCLK_150 0x5 +#define QIXIS_SYSCLK_160 0x6 +#define QIXIS_SYSCLK_166 0x7 +#define QIXIS_SYSCLK_64 0x8 + +/* DDRCLK */ +#define QIXIS_DDRCLK_66 0x0 +#define QIXIS_DDRCLK_100 0x1 +#define QIXIS_DDRCLK_125 0x2 +#define QIXIS_DDRCLK_133 0x3 + +#define QIXIS_SRDS1CLK_100 0x0 + +#endif diff --git a/board/freescale/ls1021atwr/Kconfig b/board/freescale/ls1021atwr/Kconfig new file mode 100644 index 0000000..312f938 --- /dev/null +++ b/board/freescale/ls1021atwr/Kconfig @@ -0,0 +1,18 @@ +if TARGET_LS1021ATWR + +config SYS_CPU + default "armv7" + +config SYS_BOARD + default "ls1021atwr" + +config SYS_VENDOR + default "freescale" + +config SYS_SOC + default "ls102xa" + +config SYS_CONFIG_NAME + default "ls1021atwr" + +endif diff --git a/board/freescale/ls1021atwr/MAINTAINERS b/board/freescale/ls1021atwr/MAINTAINERS new file mode 100644 index 0000000..4e5bc15 --- /dev/null +++ b/board/freescale/ls1021atwr/MAINTAINERS @@ -0,0 +1,6 @@ +LS1021ATWR BOARD +M: Alison Wang +S: Maintained +F: board/freescale/ls1021atwr/ +F: include/configs/ls1021atwr.h +F: configs/ls1021atwr_nor_defconfig diff --git a/board/freescale/ls1021atwr/Makefile b/board/freescale/ls1021atwr/Makefile new file mode 100644 index 0000000..01296c0 --- /dev/null +++ b/board/freescale/ls1021atwr/Makefile @@ -0,0 +1,8 @@ +# +# Copyright 2014 Freescale Semiconductor, Inc. +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += ls1021atwr.o +obj-$(CONFIG_FSL_DCU_FB) += dcu.o diff --git a/board/freescale/ls1021atwr/README b/board/freescale/ls1021atwr/README new file mode 100644 index 0000000..d2821cb --- /dev/null +++ b/board/freescale/ls1021atwr/README @@ -0,0 +1,109 @@ +Overview +-------- +The LS1021ATWR is a Freescale reference board that hosts the LS1021A SoC. + +LS1021A SoC Overview +------------------ +The QorIQ LS1 family, which includes the LS1021A communications processor, +is built on Layerscape architecture, the industry's first software-aware, +core-agnostic networking architecture to offer unprecedented efficiency +and scale. + +A member of the value-performance tier, the QorIQ LS1021A processor provides +extensive integration and power efficiency for fanless, small form factor +enterprise networking applications. Incorporating dual ARM Cortex-A7 cores +running up to 1.0 GHz, the LS1021A processor delivers pre-silicon CoreMark +performance of over 6,000, as well as virtualization support, advanced +security features and the broadest array of high-speed interconnects and +optimized peripheral features ever offered in a sub-3 W processor. + +The QorIQ LS1021A processor features an integrated LCD controller, +CAN controller for implementing industrial protocols, DDR3L/4 running +up to 1600 MHz, integrated security engine and QUICC Engine, and ECC +protection on both L1 and L2 caches. The LS1021A processor is pin- and +software-compatible with the QorIQ LS1020A and LS1022A processors. + +The LS1021A SoC includes the following function and features: + + - ARM Cortex-A7 MPCore compliant with ARMv7-A architecture + - Dual high-preformance ARM Cortex-A7 cores, each core includes: + - 32 Kbyte L1 Instruction Cache and Data Cache for each core (ECC protection) + - 512 Kbyte shared coherent L2 Cache (with ECC protection) + - NEON Co-processor (per core) + - 40-bit physical addressing + - Vector floating-point support + - ARM Core-Link CCI-400 Cache Coherent Interconnect + - One DDR3L/DDR4 SDRAM memory controller with x8/x16/x32-bit configuration + supporting speeds up to 1600Mtps + - ECC and interleaving support + - VeTSEC Ethernet complex + - Up to 3x virtualized 10/100/1000 Ethernet controllers + - MII, RMII, RGMII, and SGMII support + - QoS, lossless flow control, and IEEE 1588 support + - 4-lane 6GHz SerDes + - High speed interconnect (4 SerDes lanes with are muxed for these protocol) + - Two PCI Express Gen2 controllers running at up to 5 GHz + - One Serial ATA 3.0 supporting 6 GT/s operation + - Two SGMII interfaces supporting 1000 Mbps + - Additional peripheral interfaces + - One high-speed USB 3.0 controller with integrated PHY and one high-speed + USB 2.00 controller with ULPI + - Integrated flash controller (IFC) with 16-bit interface + - Quad SPI NOR Flash + - One enhanced Secure digital host controller + - Display controller unit (DCU) 24-bit RGB (12-bit DDR pin interface) + - Ten UARTs comprised of two 16550 compliant DUARTs, and six low power + UARTs + - Three I2C controllers + - Eight FlexTimers four supporting PWM and four FlexCAN ports + - Four GPIO controllers supporting up to 109 general purpose I/O signals + - Integrated advanced audio block: + - Four synchronous audio interfaces (SAI) + - Sony/Philips Digital Interconnect Format (SPDIF) + - Asynchronous Sample Rate Converter (ASRC) + - Hardware based crypto offload engine + - IPSec forwarding at up to 1Gbps + - QorIQ Trust Architecture, Secure Boot, and ARM TrustZone supported + - Public key hardware accelerator + - True Random Number Generator (NIST Certified) + - Advanced Encryption Standard Accelerators (AESA) + - Data Encryption Standard Accelerators + - QUICC Engine ULite block + - Two universal communication controllers (TDM and HDLC) supporting 64 + multichannels, each running at 64 Kbps + - Support for 256 channels of HDLC + - QorIQ TrustArchitecture with Secure Boot, as well as ARM TrustZone supported + +LS1021ATWR board Overview +------------------------- + - DDR Controller + - Supports rates of up to 1600 MHz data-rate + - Supports one DDR3LP SDRAM. + - IFC/Local Bus + - NOR: 128MB 16-bit NOR Flash + - Ethernet + - Three on-board RGMII 10/100/1G ethernet ports. + - CPLD + - Clocks + - System and DDR clock (SYSCLK, DDRCLK) + - SERDES clocks + - Power Supplies + - SDHC + - SDHC/SDXC connector + - Other IO + - One Serial port + - Three I2C ports + +Memory map +----------- +The addresses in brackets are physical addresses. + +Start Address End Address Description Size +0x00_0000_0000 0x00_000F_FFFF Secure Boot ROM 1MB +0x00_0100_0000 0x00_0FFF_FFFF CCSRBAR 240MB +0x00_1000_0000 0x00_1000_FFFF OCRAM0 64KB +0x00_1001_0000 0x00_1001_FFFF OCRAM1 64KB +0x00_2000_0000 0x00_20FF_FFFF DCSR 16MB +0x00_4000_0000 0x00_5FFF_FFFF QSPI 512MB +0x00_6000_0000 0x00_67FF_FFFF IFC - NOR Flash 128MB +0x00_8000_0000 0x00_FFFF_FFFF DRAM1 2GB diff --git a/board/freescale/ls1021atwr/dcu.c b/board/freescale/ls1021atwr/dcu.c new file mode 100644 index 0000000..8fe4ccb --- /dev/null +++ b/board/freescale/ls1021atwr/dcu.c @@ -0,0 +1,47 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * FSL DCU Framebuffer driver + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include "div64.h" +#include "../common/dcu_sii9022a.h" + +DECLARE_GLOBAL_DATA_PTR; + +unsigned int dcu_set_pixel_clock(unsigned int pixclock) +{ + unsigned long long div; + + div = (unsigned long long)(gd->bus_clk / 1000); + div *= (unsigned long long)pixclock; + do_div(div, 1000000000); + + return div; +} + +int platform_dcu_init(unsigned int xres, unsigned int yres, + const char *port, + struct fb_videomode *dcu_fb_videomode) +{ + const char *name; + unsigned int pixel_format; + + if (strncmp(port, "twr_lcd", 4) == 0) { + name = "TWR_LCD_RGB card"; + } else { + name = "HDMI"; + dcu_set_dvi_encoder(dcu_fb_videomode); + } + + printf("DCU: Switching to %s monitor @ %ux%u\n", name, xres, yres); + + pixel_format = 32; + fsl_dcu_init(xres, yres, pixel_format); + + return 0; +} diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c new file mode 100644 index 0000000..b522ff2 --- /dev/null +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -0,0 +1,488 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#define VERSION_MASK 0x00FF +#define BANK_MASK 0x0001 +#define CONFIG_RESET 0x1 +#define INIT_RESET 0x1 + +#define CPLD_SET_MUX_SERDES 0x20 +#define CPLD_SET_BOOT_BANK 0x40 + +#define BOOT_FROM_UPPER_BANK 0x0 +#define BOOT_FROM_LOWER_BANK 0x1 + +#define LANEB_SATA (0x01) +#define LANEB_SGMII1 (0x02) +#define LANEC_SGMII1 (0x04) +#define LANEC_PCIEX1 (0x08) +#define LANED_PCIEX2 (0x10) +#define LANED_SGMII2 (0x20) + +#define MASK_LANE_B 0x1 +#define MASK_LANE_C 0x2 +#define MASK_LANE_D 0x4 +#define MASK_SGMII 0x8 + +#define KEEP_STATUS 0x0 +#define NEED_RESET 0x1 + +struct cpld_data { + u8 cpld_ver; /* cpld revision */ + u8 cpld_ver_sub; /* cpld sub revision */ + u8 pcba_ver; /* pcb revision number */ + u8 system_rst; /* reset system by cpld */ + u8 soft_mux_on; /* CPLD override physical switches Enable */ + u8 cfg_rcw_src1; /* Reset config word 1 */ + u8 cfg_rcw_src2; /* Reset config word 2 */ + u8 vbank; /* Flash bank selection Control */ + u8 gpio; /* GPIO for TWR-ELEV */ + u8 i2c3_ifc_mux; + u8 mux_spi2; + u8 can3_usb2_mux; /* CAN3 and USB2 Selection */ + u8 qe_lcd_mux; /* QE and LCD Selection */ + u8 serdes_mux; /* Multiplexed pins for SerDes Lanes */ + u8 global_rst; /* reset with init CPLD reg to default */ + u8 rev1; /* Reserved */ + u8 rev2; /* Reserved */ +}; + +static void convert_serdes_mux(int type, int need_reset); + +void cpld_show(void) +{ + struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); + + printf("CPLD: V%x.%x\nPCBA: V%x.0\nVBank: %d\n", + in_8(&cpld_data->cpld_ver) & VERSION_MASK, + in_8(&cpld_data->cpld_ver_sub) & VERSION_MASK, + in_8(&cpld_data->pcba_ver) & VERSION_MASK, + in_8(&cpld_data->vbank) & BANK_MASK); + +#ifdef CONFIG_DEBUG + printf("soft_mux_on =%x\n", + in_8(&cpld_data->soft_mux_on)); + printf("cfg_rcw_src1 =%x\n", + in_8(&cpld_data->cfg_rcw_src1)); + printf("cfg_rcw_src2 =%x\n", + in_8(&cpld_data->cfg_rcw_src2)); + printf("vbank =%x\n", + in_8(&cpld_data->vbank)); + printf("gpio =%x\n", + in_8(&cpld_data->gpio)); + printf("i2c3_ifc_mux =%x\n", + in_8(&cpld_data->i2c3_ifc_mux)); + printf("mux_spi2 =%x\n", + in_8(&cpld_data->mux_spi2)); + printf("can3_usb2_mux =%x\n", + in_8(&cpld_data->can3_usb2_mux)); + printf("qe_lcd_mux =%x\n", + in_8(&cpld_data->qe_lcd_mux)); + printf("serdes_mux =%x\n", + in_8(&cpld_data->serdes_mux)); +#endif +} + +int checkboard(void) +{ + puts("Board: LS1021ATWR\n"); + cpld_show(); + + return 0; +} + +void ddrmc_init(void) +{ + struct ccsr_ddr *ddr = (struct ccsr_ddr *)CONFIG_SYS_FSL_DDR_ADDR; + + out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG); + + out_be32(&ddr->cs0_bnds, DDR_CS0_BNDS); + out_be32(&ddr->cs0_config, DDR_CS0_CONFIG); + + out_be32(&ddr->timing_cfg_0, DDR_TIMING_CFG_0); + out_be32(&ddr->timing_cfg_1, DDR_TIMING_CFG_1); + out_be32(&ddr->timing_cfg_2, DDR_TIMING_CFG_2); + out_be32(&ddr->timing_cfg_3, DDR_TIMING_CFG_3); + out_be32(&ddr->timing_cfg_4, DDR_TIMING_CFG_4); + out_be32(&ddr->timing_cfg_5, DDR_TIMING_CFG_5); + + out_be32(&ddr->sdram_cfg_2, DDR_SDRAM_CFG_2); + + out_be32(&ddr->sdram_mode, DDR_SDRAM_MODE); + out_be32(&ddr->sdram_mode_2, DDR_SDRAM_MODE_2); + + out_be32(&ddr->sdram_interval, DDR_SDRAM_INTERVAL); + + out_be32(&ddr->ddr_wrlvl_cntl, DDR_DDR_WRLVL_CNTL); + + out_be32(&ddr->ddr_wrlvl_cntl_2, DDR_DDR_WRLVL_CNTL_2); + out_be32(&ddr->ddr_wrlvl_cntl_3, DDR_DDR_WRLVL_CNTL_3); + + out_be32(&ddr->ddr_cdr1, DDR_DDR_CDR1); + out_be32(&ddr->ddr_cdr2, DDR_DDR_CDR2); + + out_be32(&ddr->sdram_clk_cntl, DDR_SDRAM_CLK_CNTL); + out_be32(&ddr->ddr_zq_cntl, DDR_DDR_ZQ_CNTL); + + out_be32(&ddr->cs0_config_2, DDR_CS0_CONFIG_2); + udelay(1); + out_be32(&ddr->sdram_cfg, DDR_SDRAM_CFG | DDR_SDRAM_CFG_MEM_EN); +} + +int dram_init(void) +{ +#if (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)) + ddrmc_init(); +#endif + + gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); + return 0; +} + +#ifdef CONFIG_FSL_ESDHC +struct fsl_esdhc_cfg esdhc_cfg[1] = { + {CONFIG_SYS_FSL_ESDHC_ADDR}, +}; + +int board_mmc_init(bd_t *bis) +{ + esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); + + return fsl_esdhc_initialize(bis, &esdhc_cfg[0]); +} +#endif + +#ifdef CONFIG_TSEC_ENET +int board_eth_init(bd_t *bis) +{ + struct fsl_pq_mdio_info mdio_info; + struct tsec_info_struct tsec_info[4]; + int num = 0; + +#ifdef CONFIG_TSEC1 + SET_STD_TSEC_INFO(tsec_info[num], 1); + if (is_serdes_configured(SGMII_TSEC1)) { + puts("eTSEC1 is in sgmii mode.\n"); + tsec_info[num].flags |= TSEC_SGMII; + } + num++; +#endif +#ifdef CONFIG_TSEC2 + SET_STD_TSEC_INFO(tsec_info[num], 2); + if (is_serdes_configured(SGMII_TSEC2)) { + puts("eTSEC2 is in sgmii mode.\n"); + tsec_info[num].flags |= TSEC_SGMII; + } + num++; +#endif +#ifdef CONFIG_TSEC3 + SET_STD_TSEC_INFO(tsec_info[num], 3); + num++; +#endif + if (!num) { + printf("No TSECs initialized\n"); + return 0; + } + + mdio_info.regs = (struct tsec_mii_mng *)CONFIG_SYS_MDIO_BASE_ADDR; + mdio_info.name = DEFAULT_MII_NAME; + fsl_pq_mdio_init(bis, &mdio_info); + + tsec_eth_init(bis, tsec_info, num); + + return pci_eth_init(bis); +} +#endif + +int config_serdes_mux(void) +{ + struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); + u32 protocol = in_be32(&gur->rcwsr[4]) & RCWSR4_SRDS1_PRTCL_MASK; + + protocol >>= RCWSR4_SRDS1_PRTCL_SHIFT; + switch (protocol) { + case 0x10: + convert_serdes_mux(LANEB_SATA, KEEP_STATUS); + convert_serdes_mux(LANED_PCIEX2 | + LANEC_PCIEX1, KEEP_STATUS); + break; + case 0x20: + convert_serdes_mux(LANEB_SGMII1, KEEP_STATUS); + convert_serdes_mux(LANEC_PCIEX1, KEEP_STATUS); + convert_serdes_mux(LANED_SGMII2, KEEP_STATUS); + break; + case 0x30: + convert_serdes_mux(LANEB_SATA, KEEP_STATUS); + convert_serdes_mux(LANEC_SGMII1, KEEP_STATUS); + convert_serdes_mux(LANED_SGMII2, KEEP_STATUS); + break; + case 0x70: + convert_serdes_mux(LANEB_SATA, KEEP_STATUS); + convert_serdes_mux(LANEC_PCIEX1, KEEP_STATUS); + convert_serdes_mux(LANED_SGMII2, KEEP_STATUS); + break; + } + + return 0; +} + +int board_early_init_f(void) +{ + struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; + +#ifdef CONFIG_TSEC_ENET + out_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_REV); + out_be32(&scfg->etsecdmamcr, SCFG_ETSECDMAMCR_LE_BD_FR); + out_be32(&scfg->etsecmcr, SCFG_ETSECCMCR_GE2_CLK125); + udelay(10); + out_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_NOREV); +#endif + +#ifdef CONFIG_FSL_IFC + init_early_memctl_regs(); +#endif + +#ifdef CONFIG_FSL_DCU_FB + out_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_REV); + out_be32(&scfg->pixclkcr, SCFG_PIXCLKCR_PXCKEN); + out_be32(&scfg->scfgrevcr, SCFG_SCFGREVCR_NOREV); +#endif + + return 0; +} + +int board_init(void) +{ +#ifndef CONFIG_SYS_FSL_NO_SERDES + fsl_serdes_init(); + config_serdes_mux(); +#endif + + return 0; +} + +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup(blob, bd); +} + +u8 flash_read8(void *addr) +{ + return __raw_readb(addr + 1); +} + +void flash_write16(u16 val, void *addr) +{ + u16 shftval = (((val >> 8) & 0xff) | ((val << 8) & 0xff00)); + + __raw_writew(shftval, addr); +} + +u16 flash_read16(void *addr) +{ + u16 val = __raw_readw(addr); + + return (((val) >> 8) & 0x00ff) | (((val) << 8) & 0xff00); +} + +static void convert_flash_bank(char bank) +{ + struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); + + printf("Now switch to boot from flash bank %d.\n", bank); + cpld_data->soft_mux_on = CPLD_SET_BOOT_BANK; + cpld_data->vbank = bank; + + printf("Reset board to enable configuration.\n"); + cpld_data->system_rst = CONFIG_RESET; +} + +static int flash_bank_cmd(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + if (argc != 2) + return CMD_RET_USAGE; + if (strcmp(argv[1], "0") == 0) + convert_flash_bank(BOOT_FROM_UPPER_BANK); + else if (strcmp(argv[1], "1") == 0) + convert_flash_bank(BOOT_FROM_LOWER_BANK); + else + return CMD_RET_USAGE; + + return 0; +} + +U_BOOT_CMD( + boot_bank, 2, 0, flash_bank_cmd, + "Flash bank Selection Control", + "bank[0-upper bank/1-lower bank] (e.g. boot_bank 0)" +); + +static int cpld_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); + + if (argc > 2) + return CMD_RET_USAGE; + if ((argc == 1) || (strcmp(argv[1], "conf") == 0)) + cpld_data->system_rst = CONFIG_RESET; + else if (strcmp(argv[1], "init") == 0) + cpld_data->global_rst = INIT_RESET; + else + return CMD_RET_USAGE; + + return 0; +} + +U_BOOT_CMD( + cpld_reset, 2, 0, cpld_reset_cmd, + "Reset via CPLD", + "conf\n" + " -reset with current CPLD configuration\n" + "init\n" + " -reset and initial CPLD configuration with default value" + +); + +static void convert_serdes_mux(int type, int need_reset) +{ + char current_serdes; + struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); + + current_serdes = cpld_data->serdes_mux; + + switch (type) { + case LANEB_SATA: + current_serdes &= ~MASK_LANE_B; + break; + case LANEB_SGMII1: + current_serdes |= (MASK_LANE_B | MASK_SGMII | MASK_LANE_C); + break; + case LANEC_SGMII1: + current_serdes &= ~(MASK_LANE_B | MASK_SGMII | MASK_LANE_C); + break; + case LANED_SGMII2: + current_serdes |= MASK_LANE_D; + break; + case LANEC_PCIEX1: + current_serdes |= MASK_LANE_C; + break; + case (LANED_PCIEX2 | LANEC_PCIEX1): + current_serdes |= MASK_LANE_C; + current_serdes &= ~MASK_LANE_D; + break; + default: + printf("CPLD serdes MUX: unsupported MUX type 0x%x\n", type); + return; + } + + cpld_data->soft_mux_on |= CPLD_SET_MUX_SERDES; + cpld_data->serdes_mux = current_serdes; + + if (need_reset == 1) { + printf("Reset board to enable configuration\n"); + cpld_data->system_rst = CONFIG_RESET; + } +} + +void print_serdes_mux(void) +{ + char current_serdes; + struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); + + current_serdes = cpld_data->serdes_mux; + + printf("Serdes Lane B: "); + if ((current_serdes & MASK_LANE_B) == 0) + printf("SATA,\n"); + else + printf("SGMII 1,\n"); + + printf("Serdes Lane C: "); + if ((current_serdes & MASK_LANE_C) == 0) + printf("SGMII 1,\n"); + else + printf("PCIe,\n"); + + printf("Serdes Lane D: "); + if ((current_serdes & MASK_LANE_D) == 0) + printf("PCIe,\n"); + else + printf("SGMII 2,\n"); + + printf("SGMII 1 is on lane "); + if ((current_serdes & MASK_SGMII) == 0) + printf("C.\n"); + else + printf("B.\n"); +} + +static int serdes_mux_cmd(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + if (argc != 2) + return CMD_RET_USAGE; + if (strcmp(argv[1], "sata") == 0) { + printf("Set serdes lane B to SATA.\n"); + convert_serdes_mux(LANEB_SATA, NEED_RESET); + } else if (strcmp(argv[1], "sgmii1b") == 0) { + printf("Set serdes lane B to SGMII 1.\n"); + convert_serdes_mux(LANEB_SGMII1, NEED_RESET); + } else if (strcmp(argv[1], "sgmii1c") == 0) { + printf("Set serdes lane C to SGMII 1.\n"); + convert_serdes_mux(LANEC_SGMII1, NEED_RESET); + } else if (strcmp(argv[1], "sgmii2") == 0) { + printf("Set serdes lane D to SGMII 2.\n"); + convert_serdes_mux(LANED_SGMII2, NEED_RESET); + } else if (strcmp(argv[1], "pciex1") == 0) { + printf("Set serdes lane C to PCIe X1.\n"); + convert_serdes_mux(LANEC_PCIEX1, NEED_RESET); + } else if (strcmp(argv[1], "pciex2") == 0) { + printf("Set serdes lane C & lane D to PCIe X2.\n"); + convert_serdes_mux((LANED_PCIEX2 | LANEC_PCIEX1), NEED_RESET); + } else if (strcmp(argv[1], "show") == 0) { + print_serdes_mux(); + } else { + return CMD_RET_USAGE; + } + + return 0; +} + +U_BOOT_CMD( + lane_bank, 2, 0, serdes_mux_cmd, + "Multiplexed function setting for SerDes Lanes", + "sata\n" + " -change lane B to sata\n" + "lane_bank sgmii1b\n" + " -change lane B to SGMII1\n" + "lane_bank sgmii1c\n" + " -change lane C to SGMII1\n" + "lane_bank sgmii2\n" + " -change lane D to SGMII2\n" + "lane_bank pciex1\n" + " -change lane C to PCIeX1\n" + "lane_bank pciex2\n" + " -change lane C & lane D to PCIeX2\n" + "\nWARNING: If you aren't familiar with the setting of serdes, don't try to change anything!\n" +); diff --git a/board/freescale/ls2085a/Kconfig b/board/freescale/ls2085a/Kconfig index 5655e18..f51afc8 100644 --- a/board/freescale/ls2085a/Kconfig +++ b/board/freescale/ls2085a/Kconfig @@ -1,47 +1,31 @@ if TARGET_LS2085A_EMU -config SYS_CPU - string - default "armv8" - config SYS_BOARD - string default "ls2085a" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "fsl-lsch3" config SYS_CONFIG_NAME - string default "ls2085a_emu" endif if TARGET_LS2085A_SIMU -config SYS_CPU - string - default "armv8" - config SYS_BOARD - string default "ls2085a" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "fsl-lsch3" config SYS_CONFIG_NAME - string default "ls2085a_simu" endif diff --git a/board/freescale/ls2085a/ddr.c b/board/freescale/ls2085a/ddr.c index 257bc16..b4a3fc9 100644 --- a/board/freescale/ls2085a/ddr.c +++ b/board/freescale/ls2085a/ddr.c @@ -30,9 +30,9 @@ void fsl_ddr_board_options(memctl_options_t *popts, * to pbsp = rdimms[ctrl_num] or pbsp = udimms[ctrl_num]; */ if (popts->registered_dimm_en) - pbsp = rdimms[0]; + pbsp = rdimms[ctrl_num]; else - pbsp = udimms[0]; + pbsp = udimms[ctrl_num]; /* Get clk_adjust, wrlvl_start, wrlvl_ctl, according to the board ddr @@ -72,6 +72,12 @@ found: pbsp->clk_adjust, pbsp->wrlvl_start, pbsp->wrlvl_ctl_2, pbsp->wrlvl_ctl_3); + if (ctrl_num == CONFIG_DP_DDR_CTRL) { + /* force DDR bus width to 32 bits */ + popts->data_bus_width = 1; + popts->otf_burst_chop_en = 0; + popts->burst_length = DDR_BL8; + } /* * Factors to consider for half-strength driver enable: * - number of DIMMs installed @@ -163,6 +169,10 @@ phys_size_t initdram(int board_type) void dram_init_banksize(void) { +#ifdef CONFIG_SYS_DP_DDR_BASE_PHY + phys_size_t dp_ddr_size; +#endif + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; if (gd->ram_size > CONFIG_SYS_LS2_DDR_BLOCK1_SIZE) { gd->bd->bi_dram[0].size = CONFIG_SYS_LS2_DDR_BLOCK1_SIZE; @@ -172,4 +182,24 @@ void dram_init_banksize(void) } else { gd->bd->bi_dram[0].size = gd->ram_size; } + +#ifdef CONFIG_SYS_DP_DDR_BASE_PHY + /* initialize DP-DDR here */ + puts("DP-DDR: "); + /* + * DDR controller use 0 as the base address for binding. + * It is mapped to CONFIG_SYS_DP_DDR_BASE for core to access. + */ + dp_ddr_size = fsl_other_ddr_sdram(CONFIG_SYS_DP_DDR_BASE_PHY, + CONFIG_DP_DDR_CTRL, + CONFIG_DP_DDR_NUM_CTRLS, + CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR, + NULL, NULL, NULL); + if (dp_ddr_size) { + gd->bd->bi_dram[2].start = CONFIG_SYS_DP_DDR_BASE; + gd->bd->bi_dram[2].size = dp_ddr_size; + } else { + puts("Not detected"); + } +#endif } diff --git a/board/freescale/ls2085a/ddr.h b/board/freescale/ls2085a/ddr.h index 77f6aaf..9958a68 100644 --- a/board/freescale/ls2085a/ddr.h +++ b/board/freescale/ls2085a/ddr.h @@ -33,6 +33,18 @@ static const struct board_specific_parameters udimm0[] = { {} }; +/* DP-DDR DIMM */ +static const struct board_specific_parameters udimm2[] = { + /* + * memory controller 2 + * num| hi| rank| clk| wrlvl | wrlvl | wrlvl + * ranks| mhz| GB |adjst| start | ctl2 | ctl3 + */ + {2, 2140, 0, 4, 4, 0x0, 0x0}, + {1, 2140, 0, 4, 4, 0x0, 0x0}, + {} +}; + static const struct board_specific_parameters rdimm0[] = { /* * memory controller 0 @@ -45,12 +57,29 @@ static const struct board_specific_parameters rdimm0[] = { {} }; +/* DP-DDR DIMM */ +static const struct board_specific_parameters rdimm2[] = { + /* + * memory controller 2 + * num| hi| rank| clk| wrlvl | wrlvl | wrlvl + * ranks| mhz| GB |adjst| start | ctl2 | ctl3 + */ + {4, 2140, 0, 5, 4, 0x0, 0x0}, + {2, 2140, 0, 5, 4, 0x0, 0x0}, + {1, 2140, 0, 4, 4, 0x0, 0x0}, + {} +}; + static const struct board_specific_parameters *udimms[] = { udimm0, + udimm0, + udimm2, }; static const struct board_specific_parameters *rdimms[] = { rdimm0, + rdimm0, + rdimm2, }; diff --git a/board/freescale/ls2085a/ls2085a.c b/board/freescale/ls2085a/ls2085a.c index a18db1d..2c79a71 100644 --- a/board/freescale/ls2085a/ls2085a.c +++ b/board/freescale/ls2085a/ls2085a.c @@ -13,12 +13,18 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; int board_init(void) { init_final_memctl_regs(); + +#ifdef CONFIG_ENV_IS_NOWHERE + gd->env_addr = (ulong)&default_environment[0]; +#endif + return 0; } @@ -29,9 +35,20 @@ int board_early_init_f(void) return 0; } +void detail_board_ddr_info(void) +{ + puts("\nDDR "); + print_size(gd->bd->bi_dram[0].size + gd->bd->bi_dram[1].size, ""); + print_ddr_info(0); + if (gd->bd->bi_dram[2].size) { + puts("\nDP-DDR "); + print_size(gd->bd->bi_dram[2].size, ""); + print_ddr_info(CONFIG_DP_DDR_CTRL); + } +} + int dram_init(void) { - printf("DRAM: "); gd->ram_size = initdram(0); return 0; @@ -88,6 +105,8 @@ void ft_board_setup(void *blob, bd_t *bd) phys_addr_t base; phys_size_t size; + ft_cpu_setup(blob, bd); + /* limit the memory size to bank 1 until Linux can handle 40-bit PA */ base = getenv_bootm_low(); size = getenv_bootm_size(); diff --git a/board/freescale/m5208evbe/Kconfig b/board/freescale/m5208evbe/Kconfig index 9b1fa42..9b416af 100644 --- a/board/freescale/m5208evbe/Kconfig +++ b/board/freescale/m5208evbe/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5208EVBE config SYS_CPU - string default "mcf52x2" config SYS_BOARD - string default "m5208evbe" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5208EVBE" endif diff --git a/board/freescale/m5208evbe/MAINTAINERS b/board/freescale/m5208evbe/MAINTAINERS index 65d04df..c9c3c88 100644 --- a/board/freescale/m5208evbe/MAINTAINERS +++ b/board/freescale/m5208evbe/MAINTAINERS @@ -1,5 +1,5 @@ M5208EVBE BOARD -M: - +#M: - S: Maintained F: board/freescale/m5208evbe/ F: include/configs/M5208EVBE.h diff --git a/board/freescale/m52277evb/Kconfig b/board/freescale/m52277evb/Kconfig index 54a86e4..c427892 100644 --- a/board/freescale/m52277evb/Kconfig +++ b/board/freescale/m52277evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M52277EVB config SYS_CPU - string default "mcf5227x" config SYS_BOARD - string default "m52277evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M52277EVB" endif diff --git a/board/freescale/m5235evb/Kconfig b/board/freescale/m5235evb/Kconfig index f996ca2..fc83419 100644 --- a/board/freescale/m5235evb/Kconfig +++ b/board/freescale/m5235evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5235EVB config SYS_CPU - string default "mcf523x" config SYS_BOARD - string default "m5235evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5235EVB" endif diff --git a/board/freescale/m5249evb/Kconfig b/board/freescale/m5249evb/Kconfig index 87643e4..0f62477 100644 --- a/board/freescale/m5249evb/Kconfig +++ b/board/freescale/m5249evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5249EVB config SYS_CPU - string default "mcf52x2" config SYS_BOARD - string default "m5249evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5249EVB" endif diff --git a/board/freescale/m5249evb/MAINTAINERS b/board/freescale/m5249evb/MAINTAINERS index 22301b7..c2273c3 100644 --- a/board/freescale/m5249evb/MAINTAINERS +++ b/board/freescale/m5249evb/MAINTAINERS @@ -1,5 +1,5 @@ M5249EVB BOARD -M: - +#M: - S: Maintained F: board/freescale/m5249evb/ F: include/configs/M5249EVB.h diff --git a/board/freescale/m5253demo/Kconfig b/board/freescale/m5253demo/Kconfig index 76197a7..303d29b 100644 --- a/board/freescale/m5253demo/Kconfig +++ b/board/freescale/m5253demo/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5253DEMO config SYS_CPU - string default "mcf52x2" config SYS_BOARD - string default "m5253demo" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5253DEMO" endif diff --git a/board/freescale/m5253evbe/Kconfig b/board/freescale/m5253evbe/Kconfig index bdc6c27..d97b87c 100644 --- a/board/freescale/m5253evbe/Kconfig +++ b/board/freescale/m5253evbe/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5253EVBE config SYS_CPU - string default "mcf52x2" config SYS_BOARD - string default "m5253evbe" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5253EVBE" endif diff --git a/board/freescale/m5253evbe/MAINTAINERS b/board/freescale/m5253evbe/MAINTAINERS index 1c21b03..74acd1e 100644 --- a/board/freescale/m5253evbe/MAINTAINERS +++ b/board/freescale/m5253evbe/MAINTAINERS @@ -1,5 +1,5 @@ M5253EVBE BOARD -M: Hayden Fraser +#M: Hayden Fraser S: Orphan (since 2014-06) F: board/freescale/m5253evbe/ F: include/configs/M5253EVBE.h diff --git a/board/freescale/m5272c3/Kconfig b/board/freescale/m5272c3/Kconfig index b69c37a..aee0b23 100644 --- a/board/freescale/m5272c3/Kconfig +++ b/board/freescale/m5272c3/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5272C3 config SYS_CPU - string default "mcf52x2" config SYS_BOARD - string default "m5272c3" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5272C3" endif diff --git a/board/freescale/m5272c3/MAINTAINERS b/board/freescale/m5272c3/MAINTAINERS index aa4739f..e586630 100644 --- a/board/freescale/m5272c3/MAINTAINERS +++ b/board/freescale/m5272c3/MAINTAINERS @@ -1,5 +1,5 @@ M5272C3 BOARD -M: - +#M: - S: Maintained F: board/freescale/m5272c3/ F: include/configs/M5272C3.h diff --git a/board/freescale/m5275evb/Kconfig b/board/freescale/m5275evb/Kconfig index 85514b7..5a6de9c 100644 --- a/board/freescale/m5275evb/Kconfig +++ b/board/freescale/m5275evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5275EVB config SYS_CPU - string default "mcf52x2" config SYS_BOARD - string default "m5275evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5275EVB" endif diff --git a/board/freescale/m5275evb/MAINTAINERS b/board/freescale/m5275evb/MAINTAINERS index b87d52c..4e6dbb1 100644 --- a/board/freescale/m5275evb/MAINTAINERS +++ b/board/freescale/m5275evb/MAINTAINERS @@ -1,5 +1,5 @@ M5275EVB BOARD -M: - +#M: - S: Maintained F: board/freescale/m5275evb/ F: include/configs/M5275EVB.h diff --git a/board/freescale/m5282evb/Kconfig b/board/freescale/m5282evb/Kconfig index 33e98a7..2ffdd52 100644 --- a/board/freescale/m5282evb/Kconfig +++ b/board/freescale/m5282evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5282EVB config SYS_CPU - string default "mcf52x2" config SYS_BOARD - string default "m5282evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5282EVB" endif diff --git a/board/freescale/m5282evb/MAINTAINERS b/board/freescale/m5282evb/MAINTAINERS index f945ab4..305e748 100644 --- a/board/freescale/m5282evb/MAINTAINERS +++ b/board/freescale/m5282evb/MAINTAINERS @@ -1,5 +1,5 @@ M5282EVB BOARD -M: - +#M: - S: Maintained F: board/freescale/m5282evb/ F: include/configs/M5282EVB.h diff --git a/board/freescale/m53017evb/Kconfig b/board/freescale/m53017evb/Kconfig index 99ffd7d..8ab89e5 100644 --- a/board/freescale/m53017evb/Kconfig +++ b/board/freescale/m53017evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M53017EVB config SYS_CPU - string default "mcf532x" config SYS_BOARD - string default "m53017evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M53017EVB" endif diff --git a/board/freescale/m5329evb/Kconfig b/board/freescale/m5329evb/Kconfig index c9a621a..930fbba 100644 --- a/board/freescale/m5329evb/Kconfig +++ b/board/freescale/m5329evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5329EVB config SYS_CPU - string default "mcf532x" config SYS_BOARD - string default "m5329evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5329EVB" endif diff --git a/board/freescale/m5373evb/Kconfig b/board/freescale/m5373evb/Kconfig index 583a4b5..67d049d 100644 --- a/board/freescale/m5373evb/Kconfig +++ b/board/freescale/m5373evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5373EVB config SYS_CPU - string default "mcf532x" config SYS_BOARD - string default "m5373evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5373EVB" endif diff --git a/board/freescale/m54418twr/Kconfig b/board/freescale/m54418twr/Kconfig index 7d73b94..4199a3f 100644 --- a/board/freescale/m54418twr/Kconfig +++ b/board/freescale/m54418twr/Kconfig @@ -1,19 +1,15 @@ if TARGET_M54418TWR config SYS_CPU - string default "mcf5445x" config SYS_BOARD - string default "m54418twr" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M54418TWR" endif diff --git a/board/freescale/m54418twr/MAINTAINERS b/board/freescale/m54418twr/MAINTAINERS index 37b24c7..f88aed9 100644 --- a/board/freescale/m54418twr/MAINTAINERS +++ b/board/freescale/m54418twr/MAINTAINERS @@ -1,5 +1,5 @@ M54418TWR BOARD -M: - +#M: - S: Maintained F: board/freescale/m54418twr/ F: include/configs/M54418TWR.h diff --git a/board/freescale/m54451evb/Kconfig b/board/freescale/m54451evb/Kconfig index 814db72..f460e51 100644 --- a/board/freescale/m54451evb/Kconfig +++ b/board/freescale/m54451evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M54451EVB config SYS_CPU - string default "mcf5445x" config SYS_BOARD - string default "m54451evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M54451EVB" endif diff --git a/board/freescale/m54451evb/MAINTAINERS b/board/freescale/m54451evb/MAINTAINERS index be14549..52a2681 100644 --- a/board/freescale/m54451evb/MAINTAINERS +++ b/board/freescale/m54451evb/MAINTAINERS @@ -1,5 +1,5 @@ M54451EVB BOARD -M: - +#M: - S: Maintained F: board/freescale/m54451evb/ F: include/configs/M54451EVB.h diff --git a/board/freescale/m54455evb/Kconfig b/board/freescale/m54455evb/Kconfig index acdd13f..096bce8 100644 --- a/board/freescale/m54455evb/Kconfig +++ b/board/freescale/m54455evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M54455EVB config SYS_CPU - string default "mcf5445x" config SYS_BOARD - string default "m54455evb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M54455EVB" endif diff --git a/board/freescale/m547xevb/Kconfig b/board/freescale/m547xevb/Kconfig index d21072e..8cfe20a 100644 --- a/board/freescale/m547xevb/Kconfig +++ b/board/freescale/m547xevb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5475EVB config SYS_CPU - string default "mcf547x_8x" config SYS_BOARD - string default "m547xevb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5475EVB" endif diff --git a/board/freescale/m548xevb/Kconfig b/board/freescale/m548xevb/Kconfig index 2afe11c..da924e3 100644 --- a/board/freescale/m548xevb/Kconfig +++ b/board/freescale/m548xevb/Kconfig @@ -1,19 +1,15 @@ if TARGET_M5485EVB config SYS_CPU - string default "mcf547x_8x" config SYS_BOARD - string default "m548xevb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "M5485EVB" endif diff --git a/board/freescale/mpc5121ads/Kconfig b/board/freescale/mpc5121ads/Kconfig index 9989ccb..f125f9e 100644 --- a/board/freescale/mpc5121ads/Kconfig +++ b/board/freescale/mpc5121ads/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC5121ADS config SYS_BOARD - string default "mpc5121ads" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "mpc5121ads" endif diff --git a/board/freescale/mpc5121ads/MAINTAINERS b/board/freescale/mpc5121ads/MAINTAINERS index 0c7f682..d4aab8f 100644 --- a/board/freescale/mpc5121ads/MAINTAINERS +++ b/board/freescale/mpc5121ads/MAINTAINERS @@ -1,5 +1,5 @@ MPC5121ADS BOARD -M: - +#M: - S: Maintained F: board/freescale/mpc5121ads/ F: include/configs/mpc5121ads.h diff --git a/board/freescale/mpc7448hpc2/Kconfig b/board/freescale/mpc7448hpc2/Kconfig index 0ea712c..3e7f6e8 100644 --- a/board/freescale/mpc7448hpc2/Kconfig +++ b/board/freescale/mpc7448hpc2/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC7448HPC2 config SYS_BOARD - string default "mpc7448hpc2" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "mpc7448hpc2" endif diff --git a/board/freescale/mpc8266ads/Kconfig b/board/freescale/mpc8266ads/Kconfig index 7c5a646..78963b9 100644 --- a/board/freescale/mpc8266ads/Kconfig +++ b/board/freescale/mpc8266ads/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8266ADS config SYS_BOARD - string default "mpc8266ads" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8266ADS" endif diff --git a/board/freescale/mpc8308rdb/Kconfig b/board/freescale/mpc8308rdb/Kconfig index b47765a..48d25e5 100644 --- a/board/freescale/mpc8308rdb/Kconfig +++ b/board/freescale/mpc8308rdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8308RDB config SYS_BOARD - string default "mpc8308rdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8308RDB" endif diff --git a/board/freescale/mpc8313erdb/Kconfig b/board/freescale/mpc8313erdb/Kconfig index 078f437..145608f 100644 --- a/board/freescale/mpc8313erdb/Kconfig +++ b/board/freescale/mpc8313erdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8313ERDB config SYS_BOARD - string default "mpc8313erdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8313ERDB" endif diff --git a/board/freescale/mpc8313erdb/MAINTAINERS b/board/freescale/mpc8313erdb/MAINTAINERS index 923ba95..807fb0b 100644 --- a/board/freescale/mpc8313erdb/MAINTAINERS +++ b/board/freescale/mpc8313erdb/MAINTAINERS @@ -1,5 +1,5 @@ MPC8313ERDB BOARD -M: - +#M: - S: Maintained F: board/freescale/mpc8313erdb/ F: include/configs/MPC8313ERDB.h diff --git a/board/freescale/mpc8315erdb/Kconfig b/board/freescale/mpc8315erdb/Kconfig index 46833ca..f76b0d1 100644 --- a/board/freescale/mpc8315erdb/Kconfig +++ b/board/freescale/mpc8315erdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8315ERDB config SYS_BOARD - string default "mpc8315erdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8315ERDB" endif diff --git a/board/freescale/mpc8323erdb/Kconfig b/board/freescale/mpc8323erdb/Kconfig index a1c0a61..acf8122 100644 --- a/board/freescale/mpc8323erdb/Kconfig +++ b/board/freescale/mpc8323erdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8323ERDB config SYS_BOARD - string default "mpc8323erdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8323ERDB" endif diff --git a/board/freescale/mpc832xemds/Kconfig b/board/freescale/mpc832xemds/Kconfig index 83af2c2..e4cfa15 100644 --- a/board/freescale/mpc832xemds/Kconfig +++ b/board/freescale/mpc832xemds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC832XEMDS config SYS_BOARD - string default "mpc832xemds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC832XEMDS" endif diff --git a/board/freescale/mpc8349emds/Kconfig b/board/freescale/mpc8349emds/Kconfig index 8f549dc..51f0b34 100644 --- a/board/freescale/mpc8349emds/Kconfig +++ b/board/freescale/mpc8349emds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8349EMDS config SYS_BOARD - string default "mpc8349emds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8349EMDS" endif diff --git a/board/freescale/mpc8349itx/Kconfig b/board/freescale/mpc8349itx/Kconfig index af3fedd..ce3fffd 100644 --- a/board/freescale/mpc8349itx/Kconfig +++ b/board/freescale/mpc8349itx/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8349ITX config SYS_BOARD - string default "mpc8349itx" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8349ITX" endif diff --git a/board/freescale/mpc8349itx/MAINTAINERS b/board/freescale/mpc8349itx/MAINTAINERS index ed6e4e5..d0388ad 100644 --- a/board/freescale/mpc8349itx/MAINTAINERS +++ b/board/freescale/mpc8349itx/MAINTAINERS @@ -1,5 +1,5 @@ MPC8349ITX BOARD -M: - +#M: - S: Maintained F: board/freescale/mpc8349itx/ F: include/configs/MPC8349ITX.h diff --git a/board/freescale/mpc8360emds/Kconfig b/board/freescale/mpc8360emds/Kconfig index d6e7766..3f4f95c 100644 --- a/board/freescale/mpc8360emds/Kconfig +++ b/board/freescale/mpc8360emds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8360EMDS config SYS_BOARD - string default "mpc8360emds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8360EMDS" endif diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c index ac96163..5ff9dff 100644 --- a/board/freescale/mpc8360emds/mpc8360emds.c +++ b/board/freescale/mpc8360emds/mpc8360emds.c @@ -11,13 +11,13 @@ #include #include #include +#include #if defined(CONFIG_PCI) #include #endif #include #include #include -#include #include #if defined(CONFIG_OF_LIBFDT) #include diff --git a/board/freescale/mpc8360erdk/Kconfig b/board/freescale/mpc8360erdk/Kconfig index bfb3b1f..5c9be7c 100644 --- a/board/freescale/mpc8360erdk/Kconfig +++ b/board/freescale/mpc8360erdk/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8360ERDK config SYS_BOARD - string default "mpc8360erdk" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8360ERDK" endif diff --git a/board/freescale/mpc8360erdk/MAINTAINERS b/board/freescale/mpc8360erdk/MAINTAINERS index cb075d6..e5b5995 100644 --- a/board/freescale/mpc8360erdk/MAINTAINERS +++ b/board/freescale/mpc8360erdk/MAINTAINERS @@ -1,5 +1,5 @@ MPC8360ERDK BOARD -M: Anton Vorontsov +#M: Anton Vorontsov S: Orphan (since 2014-03) F: board/freescale/mpc8360erdk/ F: include/configs/MPC8360ERDK.h diff --git a/board/freescale/mpc837xemds/Kconfig b/board/freescale/mpc837xemds/Kconfig index b0357cb..20d29db 100644 --- a/board/freescale/mpc837xemds/Kconfig +++ b/board/freescale/mpc837xemds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC837XEMDS config SYS_BOARD - string default "mpc837xemds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC837XEMDS" endif diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c index 0a3c972..c749e55 100644 --- a/board/freescale/mpc837xemds/mpc837xemds.c +++ b/board/freescale/mpc837xemds/mpc837xemds.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include diff --git a/board/freescale/mpc837xerdb/Kconfig b/board/freescale/mpc837xerdb/Kconfig index f8e33e6..03415f9 100644 --- a/board/freescale/mpc837xerdb/Kconfig +++ b/board/freescale/mpc837xerdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC837XERDB config SYS_BOARD - string default "mpc837xerdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC837XERDB" endif diff --git a/board/freescale/mpc837xerdb/MAINTAINERS b/board/freescale/mpc837xerdb/MAINTAINERS index c216d8d..8592a2c 100644 --- a/board/freescale/mpc837xerdb/MAINTAINERS +++ b/board/freescale/mpc837xerdb/MAINTAINERS @@ -1,5 +1,5 @@ MPC837XERDB BOARD -M: Joe D'Abbraccio +#M: Joe D'Abbraccio S: Orphan (since 2014-06) F: board/freescale/mpc837xerdb/ F: include/configs/MPC837XERDB.h diff --git a/board/freescale/mpc8536ds/Kconfig b/board/freescale/mpc8536ds/Kconfig index c7c818c..1a6a9d4 100644 --- a/board/freescale/mpc8536ds/Kconfig +++ b/board/freescale/mpc8536ds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8536DS config SYS_BOARD - string default "mpc8536ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8536DS" endif diff --git a/board/freescale/mpc8536ds/MAINTAINERS b/board/freescale/mpc8536ds/MAINTAINERS index 51d7cd7..953072c 100644 --- a/board/freescale/mpc8536ds/MAINTAINERS +++ b/board/freescale/mpc8536ds/MAINTAINERS @@ -1,5 +1,5 @@ MPC8536DS BOARD -M: - +#M: - S: Maintained F: board/freescale/mpc8536ds/ F: include/configs/MPC8536DS.h diff --git a/board/freescale/mpc8540ads/Kconfig b/board/freescale/mpc8540ads/Kconfig index 2cf252c..35a8545 100644 --- a/board/freescale/mpc8540ads/Kconfig +++ b/board/freescale/mpc8540ads/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8540ADS config SYS_BOARD - string default "mpc8540ads" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8540ADS" endif diff --git a/board/freescale/mpc8540ads/MAINTAINERS b/board/freescale/mpc8540ads/MAINTAINERS index 41a2191..acc4821 100644 --- a/board/freescale/mpc8540ads/MAINTAINERS +++ b/board/freescale/mpc8540ads/MAINTAINERS @@ -1,5 +1,5 @@ MPC8540ADS BOARD -M: Kumar Gala +#M: Kumar Gala S: Orphan (since 2014-06) F: board/freescale/mpc8540ads/ F: include/configs/MPC8540ADS.h diff --git a/board/freescale/mpc8541cds/Kconfig b/board/freescale/mpc8541cds/Kconfig index 2beefc2..034eab2 100644 --- a/board/freescale/mpc8541cds/Kconfig +++ b/board/freescale/mpc8541cds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8541CDS config SYS_BOARD - string default "mpc8541cds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8541CDS" endif diff --git a/board/freescale/mpc8541cds/MAINTAINERS b/board/freescale/mpc8541cds/MAINTAINERS index 073210d..d421b12 100644 --- a/board/freescale/mpc8541cds/MAINTAINERS +++ b/board/freescale/mpc8541cds/MAINTAINERS @@ -1,5 +1,5 @@ MPC8541CDS BOARD -M: Kumar Gala +#M: Kumar Gala S: Orphan (since 2014-06) F: board/freescale/mpc8541cds/ F: include/configs/MPC8541CDS.h diff --git a/board/freescale/mpc8544ds/Kconfig b/board/freescale/mpc8544ds/Kconfig index d55b680..c3e25b8 100644 --- a/board/freescale/mpc8544ds/Kconfig +++ b/board/freescale/mpc8544ds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8544DS config SYS_BOARD - string default "mpc8544ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8544DS" endif diff --git a/board/freescale/mpc8544ds/MAINTAINERS b/board/freescale/mpc8544ds/MAINTAINERS index 81b664c..328be7f 100644 --- a/board/freescale/mpc8544ds/MAINTAINERS +++ b/board/freescale/mpc8544ds/MAINTAINERS @@ -1,5 +1,5 @@ MPC8544DS BOARD -M: - +#M: - S: Maintained F: board/freescale/mpc8544ds/ F: include/configs/MPC8544DS.h diff --git a/board/freescale/mpc8548cds/Kconfig b/board/freescale/mpc8548cds/Kconfig index 69d717e..09f3b0b 100644 --- a/board/freescale/mpc8548cds/Kconfig +++ b/board/freescale/mpc8548cds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8548CDS config SYS_BOARD - string default "mpc8548cds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8548CDS" endif diff --git a/board/freescale/mpc8548cds/MAINTAINERS b/board/freescale/mpc8548cds/MAINTAINERS index 89b2425..6f22922 100644 --- a/board/freescale/mpc8548cds/MAINTAINERS +++ b/board/freescale/mpc8548cds/MAINTAINERS @@ -1,5 +1,5 @@ MPC8548CDS BOARD -M: - +#M: - S: Maintained F: board/freescale/mpc8548cds/ F: include/configs/MPC8548CDS.h diff --git a/board/freescale/mpc8555cds/Kconfig b/board/freescale/mpc8555cds/Kconfig index 5858308..04bd572 100644 --- a/board/freescale/mpc8555cds/Kconfig +++ b/board/freescale/mpc8555cds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8555CDS config SYS_BOARD - string default "mpc8555cds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8555CDS" endif diff --git a/board/freescale/mpc8555cds/MAINTAINERS b/board/freescale/mpc8555cds/MAINTAINERS index 14470d7..1ef6690 100644 --- a/board/freescale/mpc8555cds/MAINTAINERS +++ b/board/freescale/mpc8555cds/MAINTAINERS @@ -1,5 +1,5 @@ MPC8555CDS BOARD -M: Kumar Gala +#M: Kumar Gala S: Orphan (since 2014-06) F: board/freescale/mpc8555cds/ F: include/configs/MPC8555CDS.h diff --git a/board/freescale/mpc8560ads/Kconfig b/board/freescale/mpc8560ads/Kconfig index 55cdb62..828c068 100644 --- a/board/freescale/mpc8560ads/Kconfig +++ b/board/freescale/mpc8560ads/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8560ADS config SYS_BOARD - string default "mpc8560ads" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8560ADS" endif diff --git a/board/freescale/mpc8560ads/MAINTAINERS b/board/freescale/mpc8560ads/MAINTAINERS index 836def2..96e6da2 100644 --- a/board/freescale/mpc8560ads/MAINTAINERS +++ b/board/freescale/mpc8560ads/MAINTAINERS @@ -1,5 +1,5 @@ MPC8560ADS BOARD -M: Kumar Gala +#M: Kumar Gala S: Orphan (since 2014-06) F: board/freescale/mpc8560ads/ F: include/configs/MPC8560ADS.h diff --git a/board/freescale/mpc8568mds/Kconfig b/board/freescale/mpc8568mds/Kconfig index b02946b..4e178c5 100644 --- a/board/freescale/mpc8568mds/Kconfig +++ b/board/freescale/mpc8568mds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8568MDS config SYS_BOARD - string default "mpc8568mds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8568MDS" endif diff --git a/board/freescale/mpc8568mds/MAINTAINERS b/board/freescale/mpc8568mds/MAINTAINERS index 72c25f5..379d8cc 100644 --- a/board/freescale/mpc8568mds/MAINTAINERS +++ b/board/freescale/mpc8568mds/MAINTAINERS @@ -1,5 +1,5 @@ MPC8568MDS BOARD -M: - +#M: - S: Maintained F: board/freescale/mpc8568mds/ F: include/configs/MPC8568MDS.h diff --git a/board/freescale/mpc8569mds/Kconfig b/board/freescale/mpc8569mds/Kconfig index f13a07e..4871857 100644 --- a/board/freescale/mpc8569mds/Kconfig +++ b/board/freescale/mpc8569mds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8569MDS config SYS_BOARD - string default "mpc8569mds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8569MDS" endif diff --git a/board/freescale/mpc8569mds/MAINTAINERS b/board/freescale/mpc8569mds/MAINTAINERS index b5478db..c181407 100644 --- a/board/freescale/mpc8569mds/MAINTAINERS +++ b/board/freescale/mpc8569mds/MAINTAINERS @@ -1,5 +1,5 @@ MPC8569MDS BOARD -M: - +#M: - S: Maintained F: board/freescale/mpc8569mds/ F: include/configs/MPC8569MDS.h diff --git a/board/freescale/mpc8572ds/Kconfig b/board/freescale/mpc8572ds/Kconfig index 3794f03..38132cf 100644 --- a/board/freescale/mpc8572ds/Kconfig +++ b/board/freescale/mpc8572ds/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8572DS config SYS_BOARD - string default "mpc8572ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8572DS" endif diff --git a/board/freescale/mpc8610hpcd/Kconfig b/board/freescale/mpc8610hpcd/Kconfig index 463a433..8f713be 100644 --- a/board/freescale/mpc8610hpcd/Kconfig +++ b/board/freescale/mpc8610hpcd/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8610HPCD config SYS_BOARD - string default "mpc8610hpcd" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8610HPCD" endif diff --git a/board/freescale/mpc8610hpcd/MAINTAINERS b/board/freescale/mpc8610hpcd/MAINTAINERS index 993c02a..de6ab89 100644 --- a/board/freescale/mpc8610hpcd/MAINTAINERS +++ b/board/freescale/mpc8610hpcd/MAINTAINERS @@ -1,5 +1,5 @@ MPC8610HPCD BOARD -M: - +#M: - S: Maintained F: board/freescale/mpc8610hpcd/ F: include/configs/MPC8610HPCD.h diff --git a/board/freescale/mpc8641hpcn/Kconfig b/board/freescale/mpc8641hpcn/Kconfig index 9fc4241..ae45d63 100644 --- a/board/freescale/mpc8641hpcn/Kconfig +++ b/board/freescale/mpc8641hpcn/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPC8641HPCN config SYS_BOARD - string default "mpc8641hpcn" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "MPC8641HPCN" endif diff --git a/board/freescale/mpc8641hpcn/MAINTAINERS b/board/freescale/mpc8641hpcn/MAINTAINERS index 34bcc6c..9790247 100644 --- a/board/freescale/mpc8641hpcn/MAINTAINERS +++ b/board/freescale/mpc8641hpcn/MAINTAINERS @@ -1,5 +1,5 @@ MPC8641HPCN BOARD -M: Kumar Gala +#M: Kumar Gala S: Orphan (since 2014-06) F: board/freescale/mpc8641hpcn/ F: include/configs/MPC8641HPCN.h diff --git a/board/freescale/mx23evk/Kconfig b/board/freescale/mx23evk/Kconfig index ee7911c..1bbbe2d 100644 --- a/board/freescale/mx23evk/Kconfig +++ b/board/freescale/mx23evk/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX23EVK config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "mx23evk" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mxs" config SYS_CONFIG_NAME - string default "mx23evk" endif diff --git a/board/freescale/mx25pdk/Kconfig b/board/freescale/mx25pdk/Kconfig index 67cb5ec..a693239 100644 --- a/board/freescale/mx25pdk/Kconfig +++ b/board/freescale/mx25pdk/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX25PDK config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "mx25pdk" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx25" config SYS_CONFIG_NAME - string default "mx25pdk" endif diff --git a/board/freescale/mx28evk/Kconfig b/board/freescale/mx28evk/Kconfig index 2fe6f32..cc654bc 100644 --- a/board/freescale/mx28evk/Kconfig +++ b/board/freescale/mx28evk/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX28EVK config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "mx28evk" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mxs" config SYS_CONFIG_NAME - string default "mx28evk" endif diff --git a/board/freescale/mx31ads/Kconfig b/board/freescale/mx31ads/Kconfig index 96116dd..b4ea64b 100644 --- a/board/freescale/mx31ads/Kconfig +++ b/board/freescale/mx31ads/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX31ADS config SYS_CPU - string default "arm1136" config SYS_BOARD - string default "mx31ads" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx31" config SYS_CONFIG_NAME - string default "mx31ads" endif diff --git a/board/freescale/mx31ads/MAINTAINERS b/board/freescale/mx31ads/MAINTAINERS index e9c8fe7..5f6ec26 100644 --- a/board/freescale/mx31ads/MAINTAINERS +++ b/board/freescale/mx31ads/MAINTAINERS @@ -1,5 +1,5 @@ MX31ADS BOARD -M: (resigned) Guennadi Liakhovetski +#M: (resigned) Guennadi Liakhovetski S: Orphan (since 2013-09) F: board/freescale/mx31ads/ F: include/configs/mx31ads.h diff --git a/board/freescale/mx31pdk/Kconfig b/board/freescale/mx31pdk/Kconfig index 6ac6a59..68c3880 100644 --- a/board/freescale/mx31pdk/Kconfig +++ b/board/freescale/mx31pdk/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX31PDK config SYS_CPU - string default "arm1136" config SYS_BOARD - string default "mx31pdk" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx31" config SYS_CONFIG_NAME - string default "mx31pdk" endif diff --git a/board/freescale/mx35pdk/Kconfig b/board/freescale/mx35pdk/Kconfig index 5555b0b..ca5b40f 100644 --- a/board/freescale/mx35pdk/Kconfig +++ b/board/freescale/mx35pdk/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX35PDK config SYS_CPU - string default "arm1136" config SYS_BOARD - string default "mx35pdk" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx35" config SYS_CONFIG_NAME - string default "mx35pdk" endif diff --git a/board/freescale/mx51evk/Kconfig b/board/freescale/mx51evk/Kconfig index a6dbbdd..07861a9 100644 --- a/board/freescale/mx51evk/Kconfig +++ b/board/freescale/mx51evk/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX51EVK config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx51evk" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx5" config SYS_CONFIG_NAME - string default "mx51evk" endif diff --git a/board/freescale/mx53ard/Kconfig b/board/freescale/mx53ard/Kconfig index eaaa1b2..566df85 100644 --- a/board/freescale/mx53ard/Kconfig +++ b/board/freescale/mx53ard/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX53ARD config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx53ard" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx5" config SYS_CONFIG_NAME - string default "mx53ard" endif diff --git a/board/freescale/mx53evk/Kconfig b/board/freescale/mx53evk/Kconfig index dda1ada..d064b10 100644 --- a/board/freescale/mx53evk/Kconfig +++ b/board/freescale/mx53evk/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX53EVK config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx53evk" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx5" config SYS_CONFIG_NAME - string default "mx53evk" endif diff --git a/board/freescale/mx53loco/Kconfig b/board/freescale/mx53loco/Kconfig index 8b285d2..bc44e59 100644 --- a/board/freescale/mx53loco/Kconfig +++ b/board/freescale/mx53loco/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX53LOCO config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx53loco" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx5" config SYS_CONFIG_NAME - string default "mx53loco" endif diff --git a/board/freescale/mx53smd/Kconfig b/board/freescale/mx53smd/Kconfig index 1f7e42f..62c37d4 100644 --- a/board/freescale/mx53smd/Kconfig +++ b/board/freescale/mx53smd/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX53SMD config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx53smd" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx5" config SYS_CONFIG_NAME - string default "mx53smd" endif diff --git a/board/freescale/mx6qarm2/Kconfig b/board/freescale/mx6qarm2/Kconfig index 2c42e9a..f7f18db 100644 --- a/board/freescale/mx6qarm2/Kconfig +++ b/board/freescale/mx6qarm2/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX6QARM2 config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx6qarm2" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "mx6qarm2" endif diff --git a/board/freescale/mx6qsabreauto/Kconfig b/board/freescale/mx6qsabreauto/Kconfig index 21fb4fc..d0cf355 100644 --- a/board/freescale/mx6qsabreauto/Kconfig +++ b/board/freescale/mx6qsabreauto/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX6QSABREAUTO config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx6qsabreauto" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "mx6qsabreauto" endif diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index 928dadf..6c676fe 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -259,6 +260,13 @@ int board_init(void) return 0; } +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(4, 9)) : -1; +} +#endif + #ifdef CONFIG_CMD_BMODE static const struct boot_mode board_boot_modes[] = { /* 4 bit bus width */ diff --git a/board/freescale/mx6sabresd/Kconfig b/board/freescale/mx6sabresd/Kconfig index 65d6736..15b65c0 100644 --- a/board/freescale/mx6sabresd/Kconfig +++ b/board/freescale/mx6sabresd/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX6SABRESD config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx6sabresd" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "mx6sabresd" endif diff --git a/board/freescale/mx6sabresd/mx6dlsabresd.cfg b/board/freescale/mx6sabresd/mx6dlsabresd.cfg new file mode 100644 index 0000000..f35f22e --- /dev/null +++ b/board/freescale/mx6sabresd/mx6dlsabresd.cfg @@ -0,0 +1,131 @@ +/* + * Copyright (C) 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Refer docs/README.imxmage for more details about how-to configure + * and create imximage boot image + * + * The syntax is taken as close as possible with the kwbimage + */ + +/* image version */ + +IMAGE_VERSION 2 + +/* + * Boot Device : one of + * spi, sd (the board has no nand neither onenand) + */ + +BOOT_FROM sd + +/* + * Device Configuration Data (DCD) + * + * Each entry must have the format: + * Addr-type Address Value + * + * where: + * Addr-type register length (1,2 or 4 bytes) + * Address absolute address of the register + * value value to be stored in the register + */ +DATA 4 0x020e0774 0x000C0000 +DATA 4 0x020e0754 0x00000000 +DATA 4 0x020e04ac 0x00000030 +DATA 4 0x020e04b0 0x00000030 +DATA 4 0x020e0464 0x00000030 +DATA 4 0x020e0490 0x00000030 +DATA 4 0x020e074c 0x00000030 +DATA 4 0x020e0494 0x00000030 +DATA 4 0x020e04a0 0x00000000 +DATA 4 0x020e04b4 0x00000030 +DATA 4 0x020e04b8 0x00000030 +DATA 4 0x020e076c 0x00000030 +DATA 4 0x020e0750 0x00020000 +DATA 4 0x020e04bc 0x00000030 +DATA 4 0x020e04c0 0x00000030 +DATA 4 0x020e04c4 0x00000030 +DATA 4 0x020e04c8 0x00000030 +DATA 4 0x020e04cc 0x00000030 +DATA 4 0x020e04d0 0x00000030 +DATA 4 0x020e04d4 0x00000030 +DATA 4 0x020e04d8 0x00000030 +DATA 4 0x020e0760 0x00020000 +DATA 4 0x020e0764 0x00000030 +DATA 4 0x020e0770 0x00000030 +DATA 4 0x020e0778 0x00000030 +DATA 4 0x020e077c 0x00000030 +DATA 4 0x020e0780 0x00000030 +DATA 4 0x020e0784 0x00000030 +DATA 4 0x020e078c 0x00000030 +DATA 4 0x020e0748 0x00000030 +DATA 4 0x020e0470 0x00000030 +DATA 4 0x020e0474 0x00000030 +DATA 4 0x020e0478 0x00000030 +DATA 4 0x020e047c 0x00000030 +DATA 4 0x020e0480 0x00000030 +DATA 4 0x020e0484 0x00000030 +DATA 4 0x020e0488 0x00000030 +DATA 4 0x020e048c 0x00000030 +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b080c 0x001F001F +DATA 4 0x021b0810 0x001F001F +DATA 4 0x021b480c 0x001F001F +DATA 4 0x021b4810 0x001F001F +DATA 4 0x021b083c 0x4220021F +DATA 4 0x021b0840 0x0207017E +DATA 4 0x021b483c 0x4201020C +DATA 4 0x021b4840 0x01660172 +DATA 4 0x021b0848 0x4A4D4E4D +DATA 4 0x021b4848 0x4A4F5049 +DATA 4 0x021b0850 0x3F3C3D31 +DATA 4 0x021b4850 0x3238372B +DATA 4 0x021b081c 0x33333333 +DATA 4 0x021b0820 0x33333333 +DATA 4 0x021b0824 0x33333333 +DATA 4 0x021b0828 0x33333333 +DATA 4 0x021b481c 0x33333333 +DATA 4 0x021b4820 0x33333333 +DATA 4 0x021b4824 0x33333333 +DATA 4 0x021b4828 0x33333333 +DATA 4 0x021b08b8 0x00000800 +DATA 4 0x021b48b8 0x00000800 +DATA 4 0x021b0004 0x0002002D +DATA 4 0x021b0008 0x00333030 +DATA 4 0x021b000c 0x3F435313 +DATA 4 0x021b0010 0xB66E8B63 +DATA 4 0x021b0014 0x01FF00DB +DATA 4 0x021b0018 0x00001740 +DATA 4 0x021b001c 0x00008000 +DATA 4 0x021b002c 0x000026d2 +DATA 4 0x021b0030 0x00431023 +DATA 4 0x021b0040 0x00000027 +DATA 4 0x021b0000 0x831A0000 +DATA 4 0x021b001c 0x04008032 +DATA 4 0x021b001c 0x00008033 +DATA 4 0x021b001c 0x00048031 +DATA 4 0x021b001c 0x05208030 +DATA 4 0x021b001c 0x04008040 +DATA 4 0x021b0020 0x00005800 +DATA 4 0x021b0818 0x00011117 +DATA 4 0x021b4818 0x00011117 +DATA 4 0x021b0004 0x0002556D +DATA 4 0x021b0404 0x00011006 +DATA 4 0x021b001c 0x00000000 + +/* set the default clock gate to save power */ +DATA 4 0x020c4068 0x00C03F3F +DATA 4 0x020c406c 0x0030FC03 +DATA 4 0x020c4070 0x0FFFC000 +DATA 4 0x020c4074 0x3FF00000 +DATA 4 0x020c4078 0x00FFF300 +DATA 4 0x020c407c 0x0F0000C3 +DATA 4 0x020c4080 0x000003FF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4 0x020e0010 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4 0x020e0018 0x007F007F +DATA 4 0x020e001c 0x007F007F diff --git a/board/freescale/mx6sabresd/mx6sabresd.c b/board/freescale/mx6sabresd/mx6sabresd.c index 80c8ebd..81dcd6e 100644 --- a/board/freescale/mx6sabresd/mx6sabresd.c +++ b/board/freescale/mx6sabresd/mx6sabresd.c @@ -513,6 +513,13 @@ static int pfuze_init(void) return 0; } +#ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(4, 9)) : -1; +} +#endif + #ifdef CONFIG_CMD_BMODE static const struct boot_mode board_boot_modes[] = { /* 4 bit bus width */ diff --git a/board/freescale/mx6slevk/Kconfig b/board/freescale/mx6slevk/Kconfig index 23c3154..558aeab 100644 --- a/board/freescale/mx6slevk/Kconfig +++ b/board/freescale/mx6slevk/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX6SLEVK config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx6slevk" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "mx6slevk" endif diff --git a/board/freescale/mx6slevk/mx6slevk.c b/board/freescale/mx6slevk/mx6slevk.c index a990b4c..a500133 100644 --- a/board/freescale/mx6slevk/mx6slevk.c +++ b/board/freescale/mx6slevk/mx6slevk.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include #include @@ -82,6 +83,11 @@ static iomux_v3_cfg_t ecspi1_pads[] = { MX6_PAD_ECSPI1_SS0__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), }; +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(4, 11)) : -1; +} + static void setup_spi(void) { imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); diff --git a/board/freescale/mx6sxsabresd/Kconfig b/board/freescale/mx6sxsabresd/Kconfig index ee8f4a6..2a86b68 100644 --- a/board/freescale/mx6sxsabresd/Kconfig +++ b/board/freescale/mx6sxsabresd/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX6SXSABRESD config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx6sxsabresd" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "mx6sxsabresd" endif diff --git a/board/freescale/p1010rdb/Kconfig b/board/freescale/p1010rdb/Kconfig index 2abe1c0..b0a7a8d 100644 --- a/board/freescale/p1010rdb/Kconfig +++ b/board/freescale/p1010rdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_P1010RDB config SYS_BOARD - string default "p1010rdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P1010RDB" endif diff --git a/board/freescale/p1010rdb/MAINTAINERS b/board/freescale/p1010rdb/MAINTAINERS index 579e775..db00143 100644 --- a/board/freescale/p1010rdb/MAINTAINERS +++ b/board/freescale/p1010rdb/MAINTAINERS @@ -1,5 +1,5 @@ P1010RDB BOARD -M: - +#M: - S: Maintained F: board/freescale/p1010rdb/ F: include/configs/P1010RDB.h diff --git a/board/freescale/p1022ds/Kconfig b/board/freescale/p1022ds/Kconfig index 39e37bd..f1792de 100644 --- a/board/freescale/p1022ds/Kconfig +++ b/board/freescale/p1022ds/Kconfig @@ -1,15 +1,12 @@ if TARGET_P1022DS config SYS_BOARD - string default "p1022ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P1022DS" endif diff --git a/board/freescale/p1023rdb/Kconfig b/board/freescale/p1023rdb/Kconfig index 95d3295..1e4cd10 100644 --- a/board/freescale/p1023rdb/Kconfig +++ b/board/freescale/p1023rdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_P1023RDB config SYS_BOARD - string default "p1023rdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P1023RDB" endif diff --git a/board/freescale/p1023rdb/MAINTAINERS b/board/freescale/p1023rdb/MAINTAINERS index 81501aa..c06bac6 100644 --- a/board/freescale/p1023rdb/MAINTAINERS +++ b/board/freescale/p1023rdb/MAINTAINERS @@ -1,5 +1,5 @@ P1023RDB BOARD -M: - +#M: - S: Maintained F: board/freescale/p1023rdb/ F: include/configs/P1023RDB.h diff --git a/board/freescale/p1_p2_rdb/Kconfig b/board/freescale/p1_p2_rdb/Kconfig index 6d718b9..d7ad35d 100644 --- a/board/freescale/p1_p2_rdb/Kconfig +++ b/board/freescale/p1_p2_rdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_P1_P2_RDB config SYS_BOARD - string default "p1_p2_rdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P1_P2_RDB" endif diff --git a/board/freescale/p1_p2_rdb/MAINTAINERS b/board/freescale/p1_p2_rdb/MAINTAINERS index ad0a858..aabf587 100644 --- a/board/freescale/p1_p2_rdb/MAINTAINERS +++ b/board/freescale/p1_p2_rdb/MAINTAINERS @@ -1,5 +1,5 @@ P1_P2_RDB BOARD -M: - +#M: - S: Maintained F: board/freescale/p1_p2_rdb/ F: include/configs/P1_P2_RDB.h diff --git a/board/freescale/p1_p2_rdb_pc/Kconfig b/board/freescale/p1_p2_rdb_pc/Kconfig index 01b89fa..d3352d2 100644 --- a/board/freescale/p1_p2_rdb_pc/Kconfig +++ b/board/freescale/p1_p2_rdb_pc/Kconfig @@ -1,15 +1,12 @@ if TARGET_P1_P2_RDB_PC config SYS_BOARD - string default "p1_p2_rdb_pc" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "p1_p2_rdb_pc" endif diff --git a/board/freescale/p1_p2_rdb_pc/MAINTAINERS b/board/freescale/p1_p2_rdb_pc/MAINTAINERS index 4d429fe..c2e9247 100644 --- a/board/freescale/p1_p2_rdb_pc/MAINTAINERS +++ b/board/freescale/p1_p2_rdb_pc/MAINTAINERS @@ -1,5 +1,5 @@ P1_P2_RDB_PC BOARD -M: - +#M: - S: Maintained F: board/freescale/p1_p2_rdb_pc/ F: include/configs/p1_p2_rdb_pc.h diff --git a/board/freescale/p1_twr/Kconfig b/board/freescale/p1_twr/Kconfig index 5fb4705..8f9a8d4 100644 --- a/board/freescale/p1_twr/Kconfig +++ b/board/freescale/p1_twr/Kconfig @@ -1,15 +1,12 @@ if TARGET_P1_TWR config SYS_BOARD - string default "p1_twr" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "p1_twr" endif diff --git a/board/freescale/p1_twr/MAINTAINERS b/board/freescale/p1_twr/MAINTAINERS index 2d7d7e1..c19d436 100644 --- a/board/freescale/p1_twr/MAINTAINERS +++ b/board/freescale/p1_twr/MAINTAINERS @@ -1,5 +1,5 @@ P1_TWR BOARD -M: - +#M: - S: Maintained F: board/freescale/p1_twr/ F: include/configs/p1_twr.h diff --git a/board/freescale/p2020come/Kconfig b/board/freescale/p2020come/Kconfig index d4d7e13..8ce5cf1 100644 --- a/board/freescale/p2020come/Kconfig +++ b/board/freescale/p2020come/Kconfig @@ -1,15 +1,12 @@ if TARGET_P2020COME config SYS_BOARD - string default "p2020come" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P2020COME" endif diff --git a/board/freescale/p2020ds/Kconfig b/board/freescale/p2020ds/Kconfig index 29031d0..e527ec9 100644 --- a/board/freescale/p2020ds/Kconfig +++ b/board/freescale/p2020ds/Kconfig @@ -1,15 +1,12 @@ if TARGET_P2020DS config SYS_BOARD - string default "p2020ds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P2020DS" endif diff --git a/board/freescale/p2020ds/MAINTAINERS b/board/freescale/p2020ds/MAINTAINERS index 42cb18d..cb61fc5 100644 --- a/board/freescale/p2020ds/MAINTAINERS +++ b/board/freescale/p2020ds/MAINTAINERS @@ -1,5 +1,5 @@ P2020DS BOARD -M: - +#M: - S: Maintained F: board/freescale/p2020ds/ F: include/configs/P2020DS.h diff --git a/board/freescale/p2041rdb/Kconfig b/board/freescale/p2041rdb/Kconfig index b086b1b..78e1121 100644 --- a/board/freescale/p2041rdb/Kconfig +++ b/board/freescale/p2041rdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_P2041RDB config SYS_BOARD - string default "p2041rdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "P2041RDB" endif diff --git a/board/freescale/p2041rdb/MAINTAINERS b/board/freescale/p2041rdb/MAINTAINERS index bb5bb83..d93cb0b 100644 --- a/board/freescale/p2041rdb/MAINTAINERS +++ b/board/freescale/p2041rdb/MAINTAINERS @@ -1,5 +1,5 @@ P2041RDB BOARD -M: - +#M: - S: Maintained F: board/freescale/p2041rdb/ F: include/configs/P2041RDB.h diff --git a/board/freescale/qemu-ppce500/Kconfig b/board/freescale/qemu-ppce500/Kconfig index 314f6a1..236cd17 100644 --- a/board/freescale/qemu-ppce500/Kconfig +++ b/board/freescale/qemu-ppce500/Kconfig @@ -1,15 +1,12 @@ if TARGET_QEMU_PPCE500 config SYS_BOARD - string default "qemu-ppce500" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "qemu-ppce500" endif diff --git a/board/freescale/t1040qds/Kconfig b/board/freescale/t1040qds/Kconfig index c1c96f0..1bb1684 100644 --- a/board/freescale/t1040qds/Kconfig +++ b/board/freescale/t1040qds/Kconfig @@ -1,15 +1,12 @@ if TARGET_T1040QDS config SYS_BOARD - string default "t1040qds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "T1040QDS" endif diff --git a/board/freescale/t1040qds/eth.c b/board/freescale/t1040qds/eth.c index 1929bba..06d9086 100644 --- a/board/freescale/t1040qds/eth.c +++ b/board/freescale/t1040qds/eth.c @@ -241,6 +241,8 @@ static void initialize_lane_to_slot(void) break; case 0xA7: lane_to_slot[1] = 7; + lane_to_slot[2] = 6; + lane_to_slot[3] = 5; lane_to_slot[7] = 7; break; case 0xAA: @@ -410,6 +412,8 @@ void t1040_handle_phy_interface_sgmii(int i) fm_info_set_phy_address(i, riser_phy_addr[1]); if (FM1_DTSEC3 == i) fm_info_set_phy_address(i, riser_phy_addr[2]); + if (FM1_DTSEC5 == i) + fm_info_set_phy_address(i, riser_phy_addr[3]); mdio_mux[i] = EMI1_SLOT7; fm_info_set_mdio(i, mii_dev_for_muxval(mdio_mux[i])); diff --git a/board/freescale/t104xrdb/Kconfig b/board/freescale/t104xrdb/Kconfig index d0fd3de..f28728d 100644 --- a/board/freescale/t104xrdb/Kconfig +++ b/board/freescale/t104xrdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_T104XRDB config SYS_BOARD - string default "t104xrdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "T104xRDB" endif diff --git a/board/freescale/t104xrdb/MAINTAINERS b/board/freescale/t104xrdb/MAINTAINERS index 364b0a9..b61e1c0 100644 --- a/board/freescale/t104xrdb/MAINTAINERS +++ b/board/freescale/t104xrdb/MAINTAINERS @@ -6,12 +6,13 @@ F: include/configs/T104xRDB.h F: configs/T1040RDB_defconfig F: configs/T1040RDB_NAND_defconfig F: configs/T1040RDB_SPIFLASH_defconfig +F: configs/T1042RDB_defconfig F: configs/T1042RDB_PI_defconfig F: configs/T1042RDB_PI_NAND_defconfig F: configs/T1042RDB_PI_SPIFLASH_defconfig T1040RDB_SDCARD BOARD -M: - +#M: - S: Maintained F: configs/T1040RDB_SDCARD_defconfig F: configs/T1042RDB_PI_SDCARD_defconfig diff --git a/board/freescale/t104xrdb/README b/board/freescale/t104xrdb/README index cdbe1fa..ac95b5e 100644 --- a/board/freescale/t104xrdb/README +++ b/board/freescale/t104xrdb/README @@ -4,10 +4,23 @@ The T1040RDB is a Freescale reference board that hosts the T1040 SoC (and variants). Variants inclued T1042 presonality of T1040, in which case T1040RDB can also be called T1042RDB. +The T1042RDB is a Freescale reference board that hosts the T1042 SoC +(and variants). The board is similar to T1040RDB, T1040 is a reduced +personality of T1040 SoC without Integrated 8-port Gigabit(L2 Switch). + The T1042RDB_PI is a Freescale reference board that hosts the T1042 SoC. (a personality of T1040 SoC). The board is similar to T1040RDB but is designed specially with low power features targeted for Printing Image Market. +Basic difference's among T1040RDB, T1042RDB_PI, T1042RDB +------------------------------------------------------------------------- +Board Si Protocol Targeted Market +------------------------------------------------------------------------- +T1040RDB T1040 0x66 Networking +T1040RDB T1042 0x86 Networking +T1042RDB_PI T1042 0x06 Printing & Imaging + + T1040 SoC Overview ------------------ The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA @@ -194,10 +207,10 @@ The below commands apply to the board Commands for switching to alternate bank. 1. To change from vbank0 to vbank4 - => qixis_reset altbank (it will boot using vbank4) + => cpld reset altbank (it will boot using vbank4) 2.To change from vbank4 to vbank0 - => qixis reset (it will boot using vbank0) + => cpld reset (it will boot using vbank0) NAND boot with 2 Stage boot loader ---------------------------------- @@ -259,15 +272,15 @@ Switch Settings: (ON is 0, OFF is 1) =============== NAND boot SW setting: SW1: 10001000 -SW2: 00111001 +SW2: 00111011 SW3: 11110001 SPI boot SW setting: SW1: 00100010 -SW2: 10111001 +SW2: 10111011 SW3: 11100001 SD boot SW setting: SW1: 00100000 -SW2: 00111001 +SW2: 00111011 SW3: 11100001 diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c index 34c9224..2c331ee 100644 --- a/board/freescale/t104xrdb/ddr.c +++ b/board/freescale/t104xrdb/ddr.c @@ -105,8 +105,8 @@ found: popts->zq_en = 1; /* DHC_EN =1, ODT = 75 Ohm */ - popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_OFF); - popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_OFF); + popts->ddr_cdr1 = DDR_CDR1_DHC_EN | DDR_CDR1_ODT(DDR_CDR_ODT_75ohm); + popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm); } phys_size_t initdram(int board_type) diff --git a/board/freescale/t104xrdb/eth.c b/board/freescale/t104xrdb/eth.c index 63e5f90..c8b6c67 100644 --- a/board/freescale/t104xrdb/eth.c +++ b/board/freescale/t104xrdb/eth.c @@ -43,6 +43,16 @@ int board_eth_init(bd_t *bis) CONFIG_SYS_SGMII1_PHY_ADDR); break; #endif +#ifdef CONFIG_T1042RDB + case PHY_INTERFACE_MODE_SGMII: + /* T1042RDB doesn't supports SGMII on DTSEC1 & DTSEC2 */ + if ((FM1_DTSEC1 == i) || (FM1_DTSEC2 == i)) + fm_info_set_phy_address(i, 0); + /* T1042RDB only supports SGMII on DTSEC3 */ + fm_info_set_phy_address(FM1_DTSEC3, + CONFIG_SYS_SGMII1_PHY_ADDR); + break; +#endif case PHY_INTERFACE_MODE_RGMII: if (FM1_DTSEC4 == i) phy_addr = CONFIG_SYS_RGMII1_PHY_ADDR; diff --git a/board/freescale/t104xrdb/t1042_pi_rcw.cfg b/board/freescale/t104xrdb/t1042_pi_rcw.cfg new file mode 100644 index 0000000..57de89a --- /dev/null +++ b/board/freescale/t104xrdb/t1042_pi_rcw.cfg @@ -0,0 +1,7 @@ +#PBL preamble and RCW header +aa55aa55 010e0100 +# serdes protocol 0x06 +0c18000e 0e000000 00000000 00000000 +06000002 00400002 e8106000 01000000 +00000000 00000000 00000000 00030810 +00000000 01fe0a06 00000000 00000000 diff --git a/board/freescale/t104xrdb/t1042_rcw.cfg b/board/freescale/t104xrdb/t1042_rcw.cfg index a3ea8ad..db4d52f 100644 --- a/board/freescale/t104xrdb/t1042_rcw.cfg +++ b/board/freescale/t104xrdb/t1042_rcw.cfg @@ -1,7 +1,7 @@ #PBL preamble and RCW header aa55aa55 010e0100 -# serdes protocol 0x66 +# serdes protocol 0x86 0c18000e 0e000000 00000000 00000000 -06000002 00400002 e8106000 01000000 -00000000 00000000 00000000 00030810 -00000000 01fe0a06 00000000 00000000 +86000002 80000002 ec027000 01000000 +00000000 00000000 00000000 00032810 +00000000 0342500f 00000000 00000000 diff --git a/board/freescale/t208xqds/Kconfig b/board/freescale/t208xqds/Kconfig index 3d0c6ab..4e329dd 100644 --- a/board/freescale/t208xqds/Kconfig +++ b/board/freescale/t208xqds/Kconfig @@ -1,15 +1,12 @@ if TARGET_T208XQDS config SYS_BOARD - string default "t208xqds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "T208xQDS" endif diff --git a/board/freescale/t208xqds/MAINTAINERS b/board/freescale/t208xqds/MAINTAINERS index 643926f..deda092 100644 --- a/board/freescale/t208xqds/MAINTAINERS +++ b/board/freescale/t208xqds/MAINTAINERS @@ -1,5 +1,5 @@ T208XQDS BOARD -M: - +#M: - S: Maintained F: board/freescale/t208xqds/ F: include/configs/T208xQDS.h diff --git a/board/freescale/t208xrdb/Kconfig b/board/freescale/t208xrdb/Kconfig index f8d2c3c..845af3d 100644 --- a/board/freescale/t208xrdb/Kconfig +++ b/board/freescale/t208xrdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_T208XRDB config SYS_BOARD - string default "t208xrdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "T208xRDB" endif diff --git a/board/freescale/t208xrdb/MAINTAINERS b/board/freescale/t208xrdb/MAINTAINERS index 5987143..1642879 100644 --- a/board/freescale/t208xrdb/MAINTAINERS +++ b/board/freescale/t208xrdb/MAINTAINERS @@ -1,5 +1,5 @@ T208XRDB BOARD -M: - +#M: - S: Maintained F: board/freescale/t208xrdb/ F: include/configs/T208xRDB.h diff --git a/board/freescale/t4qds/Kconfig b/board/freescale/t4qds/Kconfig index f4b0ba2..ab34b9e 100644 --- a/board/freescale/t4qds/Kconfig +++ b/board/freescale/t4qds/Kconfig @@ -1,15 +1,12 @@ if TARGET_T4240EMU config SYS_BOARD - string default "t4qds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "T4240EMU" endif @@ -17,15 +14,12 @@ endif if TARGET_T4240QDS config SYS_BOARD - string default "t4qds" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "T4240QDS" endif diff --git a/board/freescale/t4qds/MAINTAINERS b/board/freescale/t4qds/MAINTAINERS index da796bd..f88ee7d 100644 --- a/board/freescale/t4qds/MAINTAINERS +++ b/board/freescale/t4qds/MAINTAINERS @@ -1,5 +1,5 @@ T4QDS BOARD -M: - +#M: - S: Maintained F: board/freescale/t4qds/ F: include/configs/T4240QDS.h diff --git a/board/freescale/t4rdb/Kconfig b/board/freescale/t4rdb/Kconfig index 07e3c0d..d93e453 100644 --- a/board/freescale/t4rdb/Kconfig +++ b/board/freescale/t4rdb/Kconfig @@ -1,15 +1,12 @@ if TARGET_T4240RDB config SYS_BOARD - string default "t4rdb" config SYS_VENDOR - string default "freescale" config SYS_CONFIG_NAME - string default "T4240RDB" endif diff --git a/board/freescale/vf610twr/Kconfig b/board/freescale/vf610twr/Kconfig index 56bc52a..684ef27 100644 --- a/board/freescale/vf610twr/Kconfig +++ b/board/freescale/vf610twr/Kconfig @@ -1,23 +1,18 @@ if TARGET_VF610TWR config SYS_CPU - string default "armv7" config SYS_BOARD - string default "vf610twr" config SYS_VENDOR - string default "freescale" config SYS_SOC - string default "vf610" config SYS_CONFIG_NAME - string default "vf610twr" endif diff --git a/board/funkwerk/vovpn-gw/Kconfig b/board/funkwerk/vovpn-gw/Kconfig index dc3deca..6b6c328 100644 --- a/board/funkwerk/vovpn-gw/Kconfig +++ b/board/funkwerk/vovpn-gw/Kconfig @@ -1,15 +1,12 @@ if TARGET_VOVPN_GW config SYS_BOARD - string default "vovpn-gw" config SYS_VENDOR - string default "funkwerk" config SYS_CONFIG_NAME - string default "VoVPN-GW" endif diff --git a/board/funkwerk/vovpn-gw/MAINTAINERS b/board/funkwerk/vovpn-gw/MAINTAINERS index 9af5f78..34d1cc1 100644 --- a/board/funkwerk/vovpn-gw/MAINTAINERS +++ b/board/funkwerk/vovpn-gw/MAINTAINERS @@ -1,5 +1,5 @@ VOVPN-GW BOARD -M: - +#M: - S: Maintained F: board/funkwerk/vovpn-gw/ F: include/configs/VoVPN-GW.h diff --git a/board/g2000/Kconfig b/board/g2000/Kconfig index eae4886..031fae9 100644 --- a/board/g2000/Kconfig +++ b/board/g2000/Kconfig @@ -1,11 +1,9 @@ if TARGET_G2000 config SYS_BOARD - string default "g2000" config SYS_CONFIG_NAME - string default "G2000" endif diff --git a/board/gaisler/gr_cpci_ax2000/Kconfig b/board/gaisler/gr_cpci_ax2000/Kconfig index d5a2eb4..8da0504 100644 --- a/board/gaisler/gr_cpci_ax2000/Kconfig +++ b/board/gaisler/gr_cpci_ax2000/Kconfig @@ -1,19 +1,15 @@ if TARGET_GR_CPCI_AX2000 config SYS_CPU - string default "leon3" config SYS_BOARD - string default "gr_cpci_ax2000" config SYS_VENDOR - string default "gaisler" config SYS_CONFIG_NAME - string default "gr_cpci_ax2000" endif diff --git a/board/gaisler/gr_cpci_ax2000/MAINTAINERS b/board/gaisler/gr_cpci_ax2000/MAINTAINERS index 493c31e..df55a4c 100644 --- a/board/gaisler/gr_cpci_ax2000/MAINTAINERS +++ b/board/gaisler/gr_cpci_ax2000/MAINTAINERS @@ -1,5 +1,5 @@ GR_CPCI_AX2000 BOARD -M: - +#M: - S: Maintained F: board/gaisler/gr_cpci_ax2000/ F: include/configs/gr_cpci_ax2000.h diff --git a/board/gaisler/gr_ep2s60/Kconfig b/board/gaisler/gr_ep2s60/Kconfig index e742ea8..00b2097 100644 --- a/board/gaisler/gr_ep2s60/Kconfig +++ b/board/gaisler/gr_ep2s60/Kconfig @@ -1,19 +1,15 @@ if TARGET_GR_EP2S60 config SYS_CPU - string default "leon3" config SYS_BOARD - string default "gr_ep2s60" config SYS_VENDOR - string default "gaisler" config SYS_CONFIG_NAME - string default "gr_ep2s60" endif diff --git a/board/gaisler/gr_ep2s60/MAINTAINERS b/board/gaisler/gr_ep2s60/MAINTAINERS index 151bef1..7acd5f4 100644 --- a/board/gaisler/gr_ep2s60/MAINTAINERS +++ b/board/gaisler/gr_ep2s60/MAINTAINERS @@ -1,5 +1,5 @@ GR_EP2S60 BOARD -M: - +#M: - S: Maintained F: board/gaisler/gr_ep2s60/ F: include/configs/gr_ep2s60.h diff --git a/board/gaisler/gr_xc3s_1500/Kconfig b/board/gaisler/gr_xc3s_1500/Kconfig index 6d9f107..765e028 100644 --- a/board/gaisler/gr_xc3s_1500/Kconfig +++ b/board/gaisler/gr_xc3s_1500/Kconfig @@ -1,19 +1,15 @@ if TARGET_GR_XC3S_1500 config SYS_CPU - string default "leon3" config SYS_BOARD - string default "gr_xc3s_1500" config SYS_VENDOR - string default "gaisler" config SYS_CONFIG_NAME - string default "gr_xc3s_1500" endif diff --git a/board/gaisler/gr_xc3s_1500/MAINTAINERS b/board/gaisler/gr_xc3s_1500/MAINTAINERS index 187f323..c4179d2 100644 --- a/board/gaisler/gr_xc3s_1500/MAINTAINERS +++ b/board/gaisler/gr_xc3s_1500/MAINTAINERS @@ -1,5 +1,5 @@ GR_XC3S_1500 BOARD -M: - +#M: - S: Maintained F: board/gaisler/gr_xc3s_1500/ F: include/configs/gr_xc3s_1500.h diff --git a/board/gaisler/grsim/Kconfig b/board/gaisler/grsim/Kconfig index 10f51e1..751fa03 100644 --- a/board/gaisler/grsim/Kconfig +++ b/board/gaisler/grsim/Kconfig @@ -1,19 +1,15 @@ if TARGET_GRSIM config SYS_CPU - string default "leon3" config SYS_BOARD - string default "grsim" config SYS_VENDOR - string default "gaisler" config SYS_CONFIG_NAME - string default "grsim" endif diff --git a/board/gaisler/grsim/MAINTAINERS b/board/gaisler/grsim/MAINTAINERS index acb863c..4b3312e 100644 --- a/board/gaisler/grsim/MAINTAINERS +++ b/board/gaisler/grsim/MAINTAINERS @@ -1,5 +1,5 @@ GRSIM BOARD -M: - +#M: - S: Maintained F: board/gaisler/grsim/ F: include/configs/grsim.h diff --git a/board/gaisler/grsim_leon2/Kconfig b/board/gaisler/grsim_leon2/Kconfig index 8dd2d27..0907f3a 100644 --- a/board/gaisler/grsim_leon2/Kconfig +++ b/board/gaisler/grsim_leon2/Kconfig @@ -1,19 +1,15 @@ if TARGET_GRSIM_LEON2 config SYS_CPU - string default "leon2" config SYS_BOARD - string default "grsim_leon2" config SYS_VENDOR - string default "gaisler" config SYS_CONFIG_NAME - string default "grsim_leon2" endif diff --git a/board/gaisler/grsim_leon2/MAINTAINERS b/board/gaisler/grsim_leon2/MAINTAINERS index 6da9b78..bf4a950 100644 --- a/board/gaisler/grsim_leon2/MAINTAINERS +++ b/board/gaisler/grsim_leon2/MAINTAINERS @@ -1,5 +1,5 @@ GRSIM_LEON2 BOARD -M: - +#M: - S: Maintained F: board/gaisler/grsim_leon2/ F: include/configs/grsim_leon2.h diff --git a/board/galaxy5200/Kconfig b/board/galaxy5200/Kconfig index 04f079c..3103581 100644 --- a/board/galaxy5200/Kconfig +++ b/board/galaxy5200/Kconfig @@ -1,11 +1,9 @@ if TARGET_GALAXY5200 config SYS_BOARD - string default "galaxy5200" config SYS_CONFIG_NAME - string default "galaxy5200" endif diff --git a/board/galaxy5200/MAINTAINERS b/board/galaxy5200/MAINTAINERS index f070132..614625d 100644 --- a/board/galaxy5200/MAINTAINERS +++ b/board/galaxy5200/MAINTAINERS @@ -1,5 +1,5 @@ GALAXY5200 BOARD -M: Eric Millbrandt +#M: Eric Millbrandt S: Orphan (since 2014-06) F: board/galaxy5200/ F: include/configs/galaxy5200.h diff --git a/board/gateworks/gw_ventana/Kconfig b/board/gateworks/gw_ventana/Kconfig index a9ff70a..82909a8 100644 --- a/board/gateworks/gw_ventana/Kconfig +++ b/board/gateworks/gw_ventana/Kconfig @@ -1,23 +1,18 @@ if TARGET_GW_VENTANA config SYS_CPU - string default "armv7" config SYS_BOARD - string default "gw_ventana" config SYS_VENDOR - string default "gateworks" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "gw_ventana" endif diff --git a/board/gateworks/gw_ventana/eeprom.c b/board/gateworks/gw_ventana/eeprom.c index 3edc915..ab3bab8 100644 --- a/board/gateworks/gw_ventana/eeprom.c +++ b/board/gateworks/gw_ventana/eeprom.c @@ -80,6 +80,9 @@ read_eeprom(int bus, struct ventana_board_info *info) case '4': type = GW54xx; break; + case '5': + type = GW552x; + break; default: printf("EEPROM: Unknown model in EEPROM: %s\n", info->model); type = GW_UNKNOWN; diff --git a/board/gateworks/gw_ventana/gsc.c b/board/gateworks/gw_ventana/gsc.c index 1cf38d4..a34a9a8 100644 --- a/board/gateworks/gw_ventana/gsc.c +++ b/board/gateworks/gw_ventana/gsc.c @@ -117,6 +117,10 @@ int do_gsc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) read_hwmon("VDD_SOC", GSC_HWMON_VDD_SOC, 3, MINMAX(1375, 10)); read_hwmon("VDD_1P0", GSC_HWMON_VDD_1P0, 3, MINMAX(1000, 10)); break; + case '5': /* GW55xx */ + read_hwmon("VDD_CORE", GSC_HWMON_VDD_CORE, 3, MINMAX(1175, 10)); + read_hwmon("VDD_SOC", GSC_HWMON_VDD_SOC, 3, MINMAX(1175, 10)); + break; } return 0; } diff --git a/board/gateworks/gw_ventana/gw_ventana.c b/board/gateworks/gw_ventana/gw_ventana.c index a222921..df491a8 100644 --- a/board/gateworks/gw_ventana/gw_ventana.c +++ b/board/gateworks/gw_ventana/gw_ventana.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -31,6 +32,7 @@ #include #include #include +#include #include #include #include @@ -299,6 +301,7 @@ int board_ehci_hcd_init(int port) /* Reset USB HUB (present on GW54xx/GW53xx) */ switch (info->model[3]) { case '3': /* GW53xx */ + case '5': /* GW552x */ SETUP_IOMUX_PAD(PAD_GPIO_9__GPIO1_IO09 | DIO_PAD_CFG); gpio_direction_output(IMX_GPIO_NR(1, 9), 0); mdelay(2); @@ -354,9 +357,14 @@ iomux_v3_cfg_t const ecspi1_pads[] = { IOMUX_PADS(PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL)), }; +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(3, 19)) : -1; +} + static void setup_spi(void) { - gpio_direction_output(CONFIG_SF_DEFAULT_CS, 1); + gpio_direction_output(IMX_GPIO_NR(3, 19), 1); SETUP_IOMUX_PADS(ecspi1_pads); } #endif @@ -392,7 +400,8 @@ int board_eth_init(bd_t *bis) setup_iomux_enet(); #ifdef CONFIG_FEC_MXC - cpu_eth_init(bis); + if (board_type != GW552x) + cpu_eth_init(bis); #endif #ifdef CONFIG_CI_UDC @@ -614,15 +623,14 @@ static iomux_v3_cfg_t const gw53xx_gpio_pads[] = { IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), /* PANLEDR# */ IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG), + /* MX6_LOCLED# */ + IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG), /* IOEXP_PWREN# */ IOMUX_PADS(PAD_EIM_A19__GPIO2_IO19 | DIO_PAD_CFG), /* IOEXP_IRQ# */ IOMUX_PADS(PAD_EIM_A20__GPIO2_IO18 | MUX_PAD_CTRL(IRQ_PAD_CTRL)), /* DIOI2C_DIS# */ IOMUX_PADS(PAD_GPIO_19__GPIO4_IO05 | DIO_PAD_CFG), - - /* MX6_LOCLED# */ - IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG), /* GPS_SHDN */ IOMUX_PADS(PAD_ENET_RXD0__GPIO1_IO27 | DIO_PAD_CFG), /* VID_EN */ @@ -660,6 +668,30 @@ static iomux_v3_cfg_t const gw54xx_gpio_pads[] = { IOMUX_PADS(PAD_DISP0_DAT23__GPIO5_IO17 | DIO_PAD_CFG), }; +static iomux_v3_cfg_t const gw552x_gpio_pads[] = { + /* PANLEDG# */ + IOMUX_PADS(PAD_KEY_COL0__GPIO4_IO06 | DIO_PAD_CFG), + /* PANLEDR# */ + IOMUX_PADS(PAD_KEY_ROW0__GPIO4_IO07 | DIO_PAD_CFG), + /* MX6_LOCLED# */ + IOMUX_PADS(PAD_KEY_ROW4__GPIO4_IO15 | DIO_PAD_CFG), + /* PCI_RST# */ + IOMUX_PADS(PAD_ENET_TXD1__GPIO1_IO29 | DIO_PAD_CFG), + /* MX6_DIO[4:9] */ + IOMUX_PADS(PAD_CSI0_PIXCLK__GPIO5_IO18 | DIO_PAD_CFG), + IOMUX_PADS(PAD_CSI0_DATA_EN__GPIO5_IO20 | DIO_PAD_CFG), + IOMUX_PADS(PAD_CSI0_VSYNC__GPIO5_IO21 | DIO_PAD_CFG), + IOMUX_PADS(PAD_CSI0_DAT4__GPIO5_IO22 | DIO_PAD_CFG), + IOMUX_PADS(PAD_CSI0_DAT5__GPIO5_IO23 | DIO_PAD_CFG), + IOMUX_PADS(PAD_CSI0_DAT7__GPIO5_IO25 | DIO_PAD_CFG), + /* PCIEGBE1_OFF# */ + IOMUX_PADS(PAD_GPIO_1__GPIO1_IO01 | DIO_PAD_CFG), + /* PCIEGBE2_OFF# */ + IOMUX_PADS(PAD_GPIO_2__GPIO1_IO02 | DIO_PAD_CFG), + /* PCIESKT_WDIS# */ + IOMUX_PADS(PAD_GPIO_17__GPIO7_IO12 | DIO_PAD_CFG), +}; + /* * each baseboard has 4 user configurable Digital IO lines which can * be pinmuxed as a GPIO or in some cases a PWM @@ -908,6 +940,44 @@ struct ventana gpio_cfg[] = { .pcie_sson = IMX_GPIO_NR(1, 20), .wdis = IMX_GPIO_NR(5, 17), }, + + /* GW552x */ + { + .gpio_pads = gw552x_gpio_pads, + .num_pads = ARRAY_SIZE(gw552x_gpio_pads)/2, + .dio_cfg = { + { + { IOMUX_PADS(PAD_SD1_DAT0__GPIO1_IO16) }, + IMX_GPIO_NR(1, 16), + { 0, 0 }, + 0 + }, + { + { IOMUX_PADS(PAD_SD1_DAT2__GPIO1_IO19) }, + IMX_GPIO_NR(1, 19), + { IOMUX_PADS(PAD_SD1_DAT2__PWM2_OUT) }, + 2 + }, + { + { IOMUX_PADS(PAD_SD1_DAT1__GPIO1_IO17) }, + IMX_GPIO_NR(1, 17), + { IOMUX_PADS(PAD_SD1_DAT1__PWM3_OUT) }, + 3 + }, + { + { IOMUX_PADS(PAD_SD1_CLK__GPIO1_IO20) }, + IMX_GPIO_NR(2, 10), + { 0, 0 }, + 0 + }, + }, + .leds = { + IMX_GPIO_NR(4, 6), + IMX_GPIO_NR(4, 7), + IMX_GPIO_NR(4, 15), + }, + .pcie_rst = IMX_GPIO_NR(1, 29), + }, }; /* setup board specific PMIC */ @@ -997,14 +1067,16 @@ static void setup_board_gpio(int board) #endif /* turn off (active-high) user LED's */ - for (i = 0; i < 4; i++) { + for (i = 0; i < ARRAY_SIZE(gpio_cfg[board].leds); i++) { if (gpio_cfg[board].leds[i]) gpio_direction_output(gpio_cfg[board].leds[i], 1); } /* Expansion Mezzanine IO */ - gpio_direction_output(gpio_cfg[board].mezz_pwren, 0); - gpio_direction_input(gpio_cfg[board].mezz_irq); + if (gpio_cfg[board].mezz_pwren) + gpio_direction_output(gpio_cfg[board].mezz_pwren, 0); + if (gpio_cfg[board].mezz_irq) + gpio_direction_input(gpio_cfg[board].mezz_irq); /* RS485 Transmit Enable */ if (gpio_cfg[board].rs485en) @@ -1092,6 +1164,35 @@ int imx6_pcie_toggle_reset(void) } return 0; } + +/* + * Most Ventana boards have a PLX PEX860x PCIe switch onboard and use its + * GPIO's as PERST# signals for its downstream ports - configure the GPIO's + * properly and assert reset for 100ms. + */ +void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev, + unsigned short vendor, unsigned short device, + unsigned short class) +{ + u32 dw; + + debug("%s: %02d:%02d.%02d: %04x:%04x\n", __func__, + PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), vendor, device); + if (vendor == PCI_VENDOR_ID_PLX && + (device & 0xfff0) == 0x8600 && + PCI_DEV(dev) == 0 && PCI_FUNC(dev) == 0) { + debug("configuring PLX 860X downstream PERST#\n"); + pci_hose_read_config_dword(hose, dev, 0x62c, &dw); + dw |= 0xaaa8; /* GPIO1-7 outputs */ + pci_hose_write_config_dword(hose, dev, 0x62c, dw); + + pci_hose_read_config_dword(hose, dev, 0x644, &dw); + dw |= 0xfe; /* GPIO1-7 output high */ + pci_hose_write_config_dword(hose, dev, 0x644, dw); + + mdelay(100); + } +} #endif /* CONFIG_CMD_PCI */ #ifdef CONFIG_SERIAL_TAG @@ -1283,6 +1384,7 @@ int misc_init_r(void) else if (is_cpu_type(MXC_CPU_MX6DL) || is_cpu_type(MXC_CPU_MX6SOLO)) cputype = "imx6dl"; + setenv("soctype", cputype); if (8 << (ventana_info.nand_flash_size-1) >= 2048) setenv("flash_layout", "large"); else @@ -1305,7 +1407,8 @@ int misc_init_r(void) sprintf(fdt, "%s-%s.dtb", cputype, str); setenv("fdt_file1", fdt); } - str[4] = 'x'; + if (board_type != GW552x) + str[4] = 'x'; str[5] = 'x'; str[6] = 0; if (!getenv("fdt_file2")) { @@ -1341,10 +1444,11 @@ int misc_init_r(void) * The Gateworks System Controller implements a boot * watchdog (always enabled) as a workaround for IMX6 boot related * errata such as: - * ERR005768 - no fix - * ERR006282 - fixed in silicon r1.3 + * ERR005768 - no fix scheduled + * ERR006282 - fixed in silicon r1.2 * ERR007117 - fixed in silicon r1.3 * ERR007220 - fixed in silicon r1.3 + * ERR007926 - no fix scheduled * see http://cache.freescale.com/files/32bit/doc/errata/IMX6DQCE.pdf * * Disable the boot watchdog and display/clear the timeout flag if set diff --git a/board/gateworks/gw_ventana/gw_ventana_spl.c b/board/gateworks/gw_ventana/gw_ventana_spl.c index e943879..9fc253b 100644 --- a/board/gateworks/gw_ventana/gw_ventana_spl.c +++ b/board/gateworks/gw_ventana/gw_ventana_spl.c @@ -201,55 +201,79 @@ static struct mx6_ddr3_cfg mt41k128m16jt_125 = { .trasmin = 3500, }; -/* GW54xx specific calibration */ -static struct mx6_mmdc_calibration gw54xxq_mmdc_calib = { +/* MT41K256M16HA-125 */ +static struct mx6_ddr3_cfg mt41k256m16ha_125 = { + .mem_speed = 1600, + .density = 4, + .width = 16, + .banks = 8, + .rowaddr = 15, + .coladdr = 10, + .pagesz = 2, + .trcd = 1375, + .trcmin = 4875, + .trasmin = 3500, +}; + +/* + * calibration - these are the various CPU/DDR3 combinations we support + */ + +static struct mx6_mmdc_calibration mx6dq_128x32_mmdc_calib = { /* write leveling calibration determine */ - .p0_mpwldectrl0 = 0x00190018, - .p0_mpwldectrl1 = 0x0021001D, - .p1_mpwldectrl0 = 0x00160027, - .p1_mpwldectrl1 = 0x0012001E, + .p0_mpwldectrl0 = 0x00190017, + .p0_mpwldectrl1 = 0x00140026, /* Read DQS Gating calibration */ - .p0_mpdgctrl0 = 0x43370346, - .p0_mpdgctrl1 = 0x032A0321, - .p1_mpdgctrl0 = 0x433A034D, - .p1_mpdgctrl1 = 0x032F0235, + .p0_mpdgctrl0 = 0x43380347, + .p0_mpdgctrl1 = 0x433C034D, /* Read Calibration: DQS delay relative to DQ read access */ .p0_mprddlctl = 0x3C313539, - .p1_mprddlctl = 0x37333140, /* Write Calibration: DQ/DM delay relative to DQS write access */ - .p0_mpwrdlctl = 0x37393C38, - .p1_mpwrdlctl = 0x42334538, + .p0_mpwrdlctl = 0x36393C39, +}; + +static struct mx6_mmdc_calibration mx6sdl_128x32_mmdc_calib = { + /* write leveling calibration determine */ + .p0_mpwldectrl0 = 0x003C003C, + .p0_mpwldectrl1 = 0x001F002A, + /* Read DQS Gating calibration */ + .p0_mpdgctrl0 = 0x42410244, + .p0_mpdgctrl1 = 0x4234023A, + /* Read Calibration: DQS delay relative to DQ read access */ + .p0_mprddlctl = 0x484A4C4B, + /* Write Calibration: DQ/DM delay relative to DQS write access */ + .p0_mpwrdlctl = 0x33342B32, }; -/* GW53xx specific calibration */ -static struct mx6_mmdc_calibration gw53xxq_mmdc_calib = { +static struct mx6_mmdc_calibration mx6dq_128x64_mmdc_calib = { /* write leveling calibration determine */ - .p0_mpwldectrl0 = 0x00160013, - .p0_mpwldectrl1 = 0x00090024, - .p1_mpwldectrl0 = 0x001F0018, - .p1_mpwldectrl1 = 0x000C001C, + .p0_mpwldectrl0 = 0x00190017, + .p0_mpwldectrl1 = 0x00140026, + .p1_mpwldectrl0 = 0x0021001C, + .p1_mpwldectrl1 = 0x0011001D, /* Read DQS Gating calibration */ - .p0_mpdgctrl0 = 0x433A034C, - .p0_mpdgctrl1 = 0x0336032F, - .p1_mpdgctrl0 = 0x4343034A, - .p1_mpdgctrl1 = 0x03370222, + .p0_mpdgctrl0 = 0x43380347, + .p0_mpdgctrl1 = 0x433C034D, + .p1_mpdgctrl0 = 0x032C0324, + .p1_mpdgctrl1 = 0x03310232, /* Read Calibration: DQS delay relative to DQ read access */ - .p0_mprddlctl = 0x3F343638, - .p1_mprddlctl = 0x38373442, + .p0_mprddlctl = 0x3C313539, + .p1_mprddlctl = 0x37343141, /* Write Calibration: DQ/DM delay relative to DQS write access */ - .p0_mpwrdlctl = 0x343A3E39, - .p1_mpwrdlctl = 0x44344239, + .p0_mpwrdlctl = 0x36393C39, + .p1_mpwrdlctl = 0x42344438, }; -static struct mx6_mmdc_calibration gw53xxdl_mmdc_calib = { + +static struct mx6_mmdc_calibration mx6sdl_128x64_mmdc_calib = { /* write leveling calibration determine */ .p0_mpwldectrl0 = 0x003C003C, - .p0_mpwldectrl1 = 0x00330038, - .p1_mpwldectrl0 = 0x001F002A, + .p0_mpwldectrl1 = 0x001F002A, + .p1_mpwldectrl0 = 0x00330038, .p1_mpwldectrl1 = 0x0022003F, /* Read DQS Gating calibration */ .p0_mpdgctrl0 = 0x42410244, - .p0_mpdgctrl1 = 0x022D022D, - .p1_mpdgctrl0 = 0x4234023A, + .p0_mpdgctrl1 = 0x4234023A, + .p1_mpdgctrl0 = 0x022D022D, .p1_mpdgctrl1 = 0x021C0228, /* Read Calibration: DQS delay relative to DQ read access */ .p0_mprddlctl = 0x484A4C4B, @@ -259,51 +283,42 @@ static struct mx6_mmdc_calibration gw53xxdl_mmdc_calib = { .p1_mpwrdlctl = 0x3933332B, }; -/* GW52xx specific calibration */ -static struct mx6_mmdc_calibration gw52xxdl_mmdc_calib = { - /* write leveling calibration determine */ - .p0_mpwldectrl0 = 0x0040003F, - .p0_mpwldectrl1 = 0x00370037, - /* Read DQS Gating calibration */ - .p0_mpdgctrl0 = 0x42420244, - .p0_mpdgctrl1 = 0x022F022F, - /* Read Calibration: DQS delay relative to DQ read access */ - .p0_mprddlctl = 0x49464B4A, - /* Write Calibration: DQ/DM delay relative to DQS write access */ - .p0_mpwrdlctl = 0x32362C32, -}; - -/* GW51xx specific calibration */ -static struct mx6_mmdc_calibration gw51xxq_mmdc_calib = { +static struct mx6_mmdc_calibration mx6dq_256x32_mmdc_calib = { /* write leveling calibration determine */ - .p0_mpwldectrl0 = 0x00150016, - .p0_mpwldectrl1 = 0x001F0017, + .p0_mpwldectrl0 = 0x001E001A, + .p0_mpwldectrl1 = 0x0026001F, /* Read DQS Gating calibration */ - .p0_mpdgctrl0 = 0x433D034D, - .p0_mpdgctrl1 = 0x033D032F, + .p0_mpdgctrl0 = 0x43370349, + .p0_mpdgctrl1 = 0x032D0327, /* Read Calibration: DQS delay relative to DQ read access */ - .p0_mprddlctl = 0x3F313639, + .p0_mprddlctl = 0x3D303639, /* Write Calibration: DQ/DM delay relative to DQS write access */ - .p0_mpwrdlctl = 0x33393F36, + .p0_mpwrdlctl = 0x32363934, }; -static struct mx6_mmdc_calibration gw51xxdl_mmdc_calib = { +static struct mx6_mmdc_calibration mx6dq_256x64_mmdc_calib = { /* write leveling calibration determine */ - .p0_mpwldectrl0 = 0x003D003F, - .p0_mpwldectrl1 = 0x002F0038, + .p0_mpwldectrl0 = 0X00220021, + .p0_mpwldectrl1 = 0X00200030, + .p1_mpwldectrl0 = 0X002D0027, + .p1_mpwldectrl1 = 0X00150026, /* Read DQS Gating calibration */ - .p0_mpdgctrl0 = 0x423A023A, - .p0_mpdgctrl1 = 0x022A0228, + .p0_mpdgctrl0 = 0x43330342, + .p0_mpdgctrl1 = 0x0339034A, + .p1_mpdgctrl0 = 0x032F0325, + .p1_mpdgctrl1 = 0x032F022E, /* Read Calibration: DQS delay relative to DQ read access */ - .p0_mprddlctl = 0x48494C4C, + .p0_mprddlctl = 0X3A2E3437, + .p1_mprddlctl = 0X35312F3F, /* Write Calibration: DQ/DM delay relative to DQS write access */ - .p0_mpwrdlctl = 0x34352D31, + .p0_mpwrdlctl = 0X33363B37, + .p1_mpwrdlctl = 0X40304239, }; -static void spl_dram_init(int width, int size, int board_model) +static void spl_dram_init(int width, int size_mb, int board_model) { - struct mx6_ddr3_cfg *mem = &mt41k128m16jt_125; - struct mx6_mmdc_calibration *calib; + struct mx6_ddr3_cfg *mem = NULL; + struct mx6_mmdc_calibration *calib = NULL; struct mx6_ddr_sysinfo sysinfo = { /* width of data bus:0=16,1=32,2=64 */ .dsize = width/32, @@ -329,29 +344,43 @@ static void spl_dram_init(int width, int size, int board_model) /* * MMDC Calibration requires the following data: * mx6_mmdc_calibration - board-specific calibration (routing delays) + * these calibration values depend on board routing, SoC, and DDR * mx6_ddr_sysinfo - board-specific memory architecture (width/cs/etc) * mx6_ddr_cfg - chip specific timing/layout details */ - switch (board_model) { - default: - case GW51xx: + if (width == 32 && size_mb == 512) { + mem = &mt41k128m16jt_125; if (is_cpu_type(MXC_CPU_MX6Q)) - calib = &gw51xxq_mmdc_calib; + calib = &mx6dq_128x32_mmdc_calib; else - calib = &gw51xxdl_mmdc_calib; - break; - case GW52xx: - calib = &gw52xxdl_mmdc_calib; - break; - case GW53xx: + calib = &mx6sdl_128x32_mmdc_calib; + debug("2gB density\n"); + } else if (width == 64 && size_mb == 1024) { + mem = &mt41k128m16jt_125; if (is_cpu_type(MXC_CPU_MX6Q)) - calib = &gw53xxq_mmdc_calib; + calib = &mx6dq_128x64_mmdc_calib; else - calib = &gw53xxdl_mmdc_calib; - break; - case GW54xx: - calib = &gw54xxq_mmdc_calib; - break; + calib = &mx6sdl_128x64_mmdc_calib; + debug("2gB density\n"); + } else if (width == 32 && size_mb == 1024) { + mem = &mt41k256m16ha_125; + if (is_cpu_type(MXC_CPU_MX6Q)) + calib = &mx6dq_256x32_mmdc_calib; + debug("4gB density\n"); + } else if (width == 64 && size_mb == 2048) { + mem = &mt41k256m16ha_125; + if (is_cpu_type(MXC_CPU_MX6Q)) + calib = &mx6dq_256x64_mmdc_calib; + debug("4gB density\n"); + } + + if (!mem) { + puts("Error: Invalid Memory Configuration\n"); + hang(); + } + if (!calib) { + puts("Error: Invalid Board Calibration Configuration\n"); + hang(); } if (is_cpu_type(MXC_CPU_MX6Q)) diff --git a/board/gateworks/gw_ventana/ventana_eeprom.h b/board/gateworks/gw_ventana/ventana_eeprom.h index d64b910..af12711 100644 --- a/board/gateworks/gw_ventana/ventana_eeprom.h +++ b/board/gateworks/gw_ventana/ventana_eeprom.h @@ -109,6 +109,7 @@ enum { GW52xx, GW53xx, GW54xx, + GW552x, GW_UNKNOWN, GW_BADCRC, }; diff --git a/board/gdsys/405ep/Kconfig b/board/gdsys/405ep/Kconfig index 8a5d3f5..20cb80f 100644 --- a/board/gdsys/405ep/Kconfig +++ b/board/gdsys/405ep/Kconfig @@ -1,15 +1,12 @@ if TARGET_DLVISION_10G config SYS_BOARD - string default "405ep" config SYS_VENDOR - string default "gdsys" config SYS_CONFIG_NAME - string default "dlvision-10g" endif @@ -17,15 +14,12 @@ endif if TARGET_IO config SYS_BOARD - string default "405ep" config SYS_VENDOR - string default "gdsys" config SYS_CONFIG_NAME - string default "io" endif @@ -33,15 +27,12 @@ endif if TARGET_IOCON config SYS_BOARD - string default "405ep" config SYS_VENDOR - string default "gdsys" config SYS_CONFIG_NAME - string default "iocon" endif @@ -49,15 +40,12 @@ endif if TARGET_NEO config SYS_BOARD - string default "405ep" config SYS_VENDOR - string default "gdsys" config SYS_CONFIG_NAME - string default "neo" endif diff --git a/board/gdsys/405ex/Kconfig b/board/gdsys/405ex/Kconfig index b4fb975..52a8d89 100644 --- a/board/gdsys/405ex/Kconfig +++ b/board/gdsys/405ex/Kconfig @@ -1,15 +1,12 @@ if TARGET_IO64 config SYS_BOARD - string default "405ex" config SYS_VENDOR - string default "gdsys" config SYS_CONFIG_NAME - string default "io64" endif diff --git a/board/gdsys/dlvision/Kconfig b/board/gdsys/dlvision/Kconfig index af8334e..8db4fbe 100644 --- a/board/gdsys/dlvision/Kconfig +++ b/board/gdsys/dlvision/Kconfig @@ -1,15 +1,12 @@ if TARGET_DLVISION config SYS_BOARD - string default "dlvision" config SYS_VENDOR - string default "gdsys" config SYS_CONFIG_NAME - string default "dlvision" endif diff --git a/board/gdsys/gdppc440etx/Kconfig b/board/gdsys/gdppc440etx/Kconfig index 5a05c1c..1f21c89 100644 --- a/board/gdsys/gdppc440etx/Kconfig +++ b/board/gdsys/gdppc440etx/Kconfig @@ -1,15 +1,12 @@ if TARGET_GDPPC440ETX config SYS_BOARD - string default "gdppc440etx" config SYS_VENDOR - string default "gdsys" config SYS_CONFIG_NAME - string default "gdppc440etx" endif diff --git a/board/gdsys/intip/Kconfig b/board/gdsys/intip/Kconfig index 7be439c..479bb12 100644 --- a/board/gdsys/intip/Kconfig +++ b/board/gdsys/intip/Kconfig @@ -1,15 +1,12 @@ if TARGET_INTIP config SYS_BOARD - string default "intip" config SYS_VENDOR - string default "gdsys" config SYS_CONFIG_NAME - string default "intip" endif diff --git a/board/gdsys/p1022/Kconfig b/board/gdsys/p1022/Kconfig index 277ed7d..8514d08 100644 --- a/board/gdsys/p1022/Kconfig +++ b/board/gdsys/p1022/Kconfig @@ -1,15 +1,12 @@ if TARGET_CONTROLCENTERD config SYS_BOARD - string default "p1022" config SYS_VENDOR - string default "gdsys" config SYS_CONFIG_NAME - string default "controlcenterd" endif diff --git a/board/genesi/mx51_efikamx/Kconfig b/board/genesi/mx51_efikamx/Kconfig index adfddeb..87d15a5 100644 --- a/board/genesi/mx51_efikamx/Kconfig +++ b/board/genesi/mx51_efikamx/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX51_EFIKAMX config SYS_CPU - string default "armv7" config SYS_BOARD - string default "mx51_efikamx" config SYS_VENDOR - string default "genesi" config SYS_SOC - string default "mx5" config SYS_CONFIG_NAME - string default "mx51_efikamx" endif diff --git a/board/genesi/mx51_efikamx/MAINTAINERS b/board/genesi/mx51_efikamx/MAINTAINERS index a85df77..f1398c4 100644 --- a/board/genesi/mx51_efikamx/MAINTAINERS +++ b/board/genesi/mx51_efikamx/MAINTAINERS @@ -1,5 +1,5 @@ MX51_EFIKAMX BOARD -M: - +#M: - S: Maintained F: board/genesi/mx51_efikamx/ F: include/configs/mx51_efikamx.h diff --git a/board/genesi/mx51_efikamx/efikamx.c b/board/genesi/mx51_efikamx/efikamx.c index 16769e5..6ba55cd 100644 --- a/board/genesi/mx51_efikamx/efikamx.c +++ b/board/genesi/mx51_efikamx/efikamx.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -152,6 +153,11 @@ static iomux_v3_cfg_t const efikamx_spi_pads[] = { * PMIC configuration */ #ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 1) ? 121 : -1; +} + static void power_init(void) { unsigned int val; diff --git a/board/gumstix/duovero/Kconfig b/board/gumstix/duovero/Kconfig index f662798..2f8558a 100644 --- a/board/gumstix/duovero/Kconfig +++ b/board/gumstix/duovero/Kconfig @@ -1,15 +1,12 @@ if TARGET_DUOVERO config SYS_BOARD - string default "duovero" config SYS_VENDOR - string default "gumstix" config SYS_CONFIG_NAME - string default "duovero" endif diff --git a/board/gumstix/pepper/Kconfig b/board/gumstix/pepper/Kconfig index 290b428..0b73955 100644 --- a/board/gumstix/pepper/Kconfig +++ b/board/gumstix/pepper/Kconfig @@ -1,23 +1,18 @@ if TARGET_PEPPER config SYS_CPU - string default "armv7" config SYS_BOARD - string default "pepper" config SYS_VENDOR - string default "gumstix" config SYS_SOC - string default "am33xx" config SYS_CONFIG_NAME - string default "pepper" endif diff --git a/board/gw8260/Kconfig b/board/gw8260/Kconfig index ce8d1b0..1d6aa80 100644 --- a/board/gw8260/Kconfig +++ b/board/gw8260/Kconfig @@ -1,11 +1,9 @@ if TARGET_GW8260 config SYS_BOARD - string default "gw8260" config SYS_CONFIG_NAME - string default "gw8260" endif diff --git a/board/h2200/Kconfig b/board/h2200/Kconfig index f36b4d9..75956be 100644 --- a/board/h2200/Kconfig +++ b/board/h2200/Kconfig @@ -1,15 +1,12 @@ if TARGET_H2200 config SYS_CPU - string default "pxa" config SYS_BOARD - string default "h2200" config SYS_CONFIG_NAME - string default "h2200" endif diff --git a/board/hale/tt01/Kconfig b/board/hale/tt01/Kconfig index 549c18b..40e56cb 100644 --- a/board/hale/tt01/Kconfig +++ b/board/hale/tt01/Kconfig @@ -1,23 +1,18 @@ if TARGET_TT01 config SYS_CPU - string default "arm1136" config SYS_BOARD - string default "tt01" config SYS_VENDOR - string default "hale" config SYS_SOC - string default "mx31" config SYS_CONFIG_NAME - string default "tt01" endif diff --git a/board/hermes/Kconfig b/board/hermes/Kconfig index 9d80650..deb37fd 100644 --- a/board/hermes/Kconfig +++ b/board/hermes/Kconfig @@ -1,11 +1,9 @@ if TARGET_HERMES config SYS_BOARD - string default "hermes" config SYS_CONFIG_NAME - string default "hermes" endif diff --git a/board/htkw/mcx/Kconfig b/board/htkw/mcx/Kconfig index 343ff4d..25ba548 100644 --- a/board/htkw/mcx/Kconfig +++ b/board/htkw/mcx/Kconfig @@ -1,15 +1,12 @@ if TARGET_MCX config SYS_BOARD - string default "mcx" config SYS_VENDOR - string default "htkw" config SYS_CONFIG_NAME - string default "mcx" endif diff --git a/board/hymod/Kconfig b/board/hymod/Kconfig index 106a837..fa162eb 100644 --- a/board/hymod/Kconfig +++ b/board/hymod/Kconfig @@ -1,11 +1,9 @@ if TARGET_HYMOD config SYS_BOARD - string default "hymod" config SYS_CONFIG_NAME - string default "hymod" endif diff --git a/board/ibf-dsp561/Kconfig b/board/ibf-dsp561/Kconfig index 5183aff..acf5d7c 100644 --- a/board/ibf-dsp561/Kconfig +++ b/board/ibf-dsp561/Kconfig @@ -1,11 +1,9 @@ if TARGET_IBF_DSP561 config SYS_BOARD - string default "ibf-dsp561" config SYS_CONFIG_NAME - string default "ibf-dsp561" endif diff --git a/board/icecube/Kconfig b/board/icecube/Kconfig index d409cd7..e5b2153 100644 --- a/board/icecube/Kconfig +++ b/board/icecube/Kconfig @@ -1,11 +1,9 @@ if TARGET_ICECUBE config SYS_BOARD - string default "icecube" config SYS_CONFIG_NAME - string default "IceCube" endif diff --git a/board/icecube/MAINTAINERS b/board/icecube/MAINTAINERS index 02e6c04..8a24eb4 100644 --- a/board/icecube/MAINTAINERS +++ b/board/icecube/MAINTAINERS @@ -6,7 +6,7 @@ F: include/configs/IceCube.h F: configs/icecube_5200_defconfig ICECUBE_5200_DDR BOARD -M: - +#M: - S: Maintained F: configs/icecube_5200_DDR_defconfig F: configs/icecube_5200_DDR_LOWBOOT_defconfig diff --git a/board/icpdas/lp8x4x/Kconfig b/board/icpdas/lp8x4x/Kconfig index 6d58984..4374fb6 100644 --- a/board/icpdas/lp8x4x/Kconfig +++ b/board/icpdas/lp8x4x/Kconfig @@ -1,19 +1,15 @@ if TARGET_LP8X4X config SYS_CPU - string default "pxa" config SYS_BOARD - string default "lp8x4x" config SYS_VENDOR - string default "icpdas" config SYS_CONFIG_NAME - string default "lp8x4x" endif diff --git a/board/icu862/Kconfig b/board/icu862/Kconfig index d2a7a0a..da11d7b 100644 --- a/board/icu862/Kconfig +++ b/board/icu862/Kconfig @@ -1,11 +1,9 @@ if TARGET_ICU862 config SYS_BOARD - string default "icu862" config SYS_CONFIG_NAME - string default "ICU862" endif diff --git a/board/ids/ids8247/Kconfig b/board/ids/ids8247/Kconfig index a80af9e..bbab727 100644 --- a/board/ids/ids8247/Kconfig +++ b/board/ids/ids8247/Kconfig @@ -1,15 +1,12 @@ if TARGET_IDS8247 config SYS_BOARD - string default "ids8247" config SYS_VENDOR - string default "ids" config SYS_CONFIG_NAME - string default "IDS8247" endif diff --git a/board/ids/ids8313/Kconfig b/board/ids/ids8313/Kconfig index b38877b..d165b4b 100644 --- a/board/ids/ids8313/Kconfig +++ b/board/ids/ids8313/Kconfig @@ -1,15 +1,12 @@ if TARGET_IDS8313 config SYS_BOARD - string default "ids8313" config SYS_VENDOR - string default "ids" config SYS_CONFIG_NAME - string default "ids8313" endif diff --git a/board/ifm/ac14xx/Kconfig b/board/ifm/ac14xx/Kconfig index 0772d57..97e80d5 100644 --- a/board/ifm/ac14xx/Kconfig +++ b/board/ifm/ac14xx/Kconfig @@ -1,15 +1,12 @@ if TARGET_AC14XX config SYS_BOARD - string default "ac14xx" config SYS_VENDOR - string default "ifm" config SYS_CONFIG_NAME - string default "ac14xx" endif diff --git a/board/ifm/o2dnt2/Kconfig b/board/ifm/o2dnt2/Kconfig index 53e9c0f..e9d32dd 100644 --- a/board/ifm/o2dnt2/Kconfig +++ b/board/ifm/o2dnt2/Kconfig @@ -1,15 +1,12 @@ if TARGET_O2D config SYS_BOARD - string default "o2dnt2" config SYS_VENDOR - string default "ifm" config SYS_CONFIG_NAME - string default "o2d" endif @@ -17,15 +14,12 @@ endif if TARGET_O2D300 config SYS_BOARD - string default "o2dnt2" config SYS_VENDOR - string default "ifm" config SYS_CONFIG_NAME - string default "o2d300" endif @@ -33,15 +27,12 @@ endif if TARGET_O2DNT2 config SYS_BOARD - string default "o2dnt2" config SYS_VENDOR - string default "ifm" config SYS_CONFIG_NAME - string default "o2dnt2" endif @@ -49,15 +40,12 @@ endif if TARGET_O2I config SYS_BOARD - string default "o2dnt2" config SYS_VENDOR - string default "ifm" config SYS_CONFIG_NAME - string default "o2i" endif @@ -65,15 +53,12 @@ endif if TARGET_O2MNT config SYS_BOARD - string default "o2dnt2" config SYS_VENDOR - string default "ifm" config SYS_CONFIG_NAME - string default "o2mnt" endif @@ -81,15 +66,12 @@ endif if TARGET_O3DNT config SYS_BOARD - string default "o2dnt2" config SYS_VENDOR - string default "ifm" config SYS_CONFIG_NAME - string default "o3dnt" endif diff --git a/board/imgtec/malta/Kconfig b/board/imgtec/malta/Kconfig index 8e5cab1..401962c 100644 --- a/board/imgtec/malta/Kconfig +++ b/board/imgtec/malta/Kconfig @@ -1,19 +1,15 @@ if TARGET_MALTA config SYS_CPU - string default "mips32" config SYS_BOARD - string default "malta" config SYS_VENDOR - string default "imgtec" config SYS_CONFIG_NAME - string default "malta" endif diff --git a/board/imx31_phycore/Kconfig b/board/imx31_phycore/Kconfig index c74f4a6..cf3358d 100644 --- a/board/imx31_phycore/Kconfig +++ b/board/imx31_phycore/Kconfig @@ -1,19 +1,15 @@ if TARGET_IMX31_PHYCORE config SYS_CPU - string default "arm1136" config SYS_BOARD - string default "imx31_phycore" config SYS_SOC - string default "mx31" config SYS_CONFIG_NAME - string default "imx31_phycore" endif diff --git a/board/imx31_phycore/MAINTAINERS b/board/imx31_phycore/MAINTAINERS index efd5e77..41f6cae 100644 --- a/board/imx31_phycore/MAINTAINERS +++ b/board/imx31_phycore/MAINTAINERS @@ -1,11 +1,11 @@ IMX31_PHYCORE BOARD -M: - +#M: - S: Maintained F: board/imx31_phycore/ F: include/configs/imx31_phycore.h F: configs/imx31_phycore_defconfig IMX31_PHYCORE_EET BOARD -M: (resigned) Guennadi Liakhovetski +#M: (resigned) Guennadi Liakhovetski S: Orphan (since 2013-09) F: configs/imx31_phycore_eet_defconfig diff --git a/board/in-circuit/grasshopper/Kconfig b/board/in-circuit/grasshopper/Kconfig index da3bcc3..30e3855 100644 --- a/board/in-circuit/grasshopper/Kconfig +++ b/board/in-circuit/grasshopper/Kconfig @@ -1,19 +1,15 @@ if TARGET_GRASSHOPPER config SYS_BOARD - string default "grasshopper" config SYS_VENDOR - string default "in-circuit" config SYS_SOC - string default "at32ap700x" config SYS_CONFIG_NAME - string default "grasshopper" endif diff --git a/board/inka4x0/Kconfig b/board/inka4x0/Kconfig index 44bca35..94a41f0 100644 --- a/board/inka4x0/Kconfig +++ b/board/inka4x0/Kconfig @@ -1,11 +1,9 @@ if TARGET_INKA4X0 config SYS_BOARD - string default "inka4x0" config SYS_CONFIG_NAME - string default "inka4x0" endif diff --git a/board/intercontrol/digsy_mtc/Kconfig b/board/intercontrol/digsy_mtc/Kconfig index 0b14bc0..1cf2275 100644 --- a/board/intercontrol/digsy_mtc/Kconfig +++ b/board/intercontrol/digsy_mtc/Kconfig @@ -1,15 +1,12 @@ if TARGET_DIGSY_MTC config SYS_BOARD - string default "digsy_mtc" config SYS_VENDOR - string default "intercontrol" config SYS_CONFIG_NAME - string default "digsy_mtc" endif diff --git a/board/iomega/iconnect/Kconfig b/board/iomega/iconnect/Kconfig index f75c06b..e56b029 100644 --- a/board/iomega/iconnect/Kconfig +++ b/board/iomega/iconnect/Kconfig @@ -1,15 +1,12 @@ if TARGET_ICONNECT config SYS_BOARD - string default "iconnect" config SYS_VENDOR - string default "iomega" config SYS_CONFIG_NAME - string default "iconnect" endif diff --git a/board/ip04/Kconfig b/board/ip04/Kconfig index 95abe63..670bf89 100644 --- a/board/ip04/Kconfig +++ b/board/ip04/Kconfig @@ -1,11 +1,9 @@ if TARGET_IP04 config SYS_BOARD - string default "ip04" config SYS_CONFIG_NAME - string default "ip04" endif diff --git a/board/ip04/MAINTAINERS b/board/ip04/MAINTAINERS index 278072b..c37b011 100644 --- a/board/ip04/MAINTAINERS +++ b/board/ip04/MAINTAINERS @@ -1,5 +1,5 @@ IP04 BOARD -M: Brent Kandetzki +#M: Brent Kandetzki S: Orphan (since 2014-06) F: board/ip04/ F: include/configs/ip04.h diff --git a/board/ip860/Kconfig b/board/ip860/Kconfig index df1ce8d..955c9db 100644 --- a/board/ip860/Kconfig +++ b/board/ip860/Kconfig @@ -1,11 +1,9 @@ if TARGET_IP860 config SYS_BOARD - string default "ip860" config SYS_CONFIG_NAME - string default "IP860" endif diff --git a/board/ip860/u-boot.lds b/board/ip860/u-boot.lds deleted file mode 100644 index 0eb2fba..0000000 --- a/board/ip860/u-boot.lds +++ /dev/null @@ -1,82 +0,0 @@ -/* - * (C) Copyright 2000-2010 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(powerpc) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .text : - { - arch/powerpc/cpu/mpc8xx/start.o (.text*) - arch/powerpc/cpu/mpc8xx/traps.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/ipek01/Kconfig b/board/ipek01/Kconfig index a2a1f86..34e094d 100644 --- a/board/ipek01/Kconfig +++ b/board/ipek01/Kconfig @@ -1,11 +1,9 @@ if TARGET_IPEK01 config SYS_BOARD - string default "ipek01" config SYS_CONFIG_NAME - string default "ipek01" endif diff --git a/board/iphase4539/Kconfig b/board/iphase4539/Kconfig index 1ce42f3..74594d2 100644 --- a/board/iphase4539/Kconfig +++ b/board/iphase4539/Kconfig @@ -1,11 +1,9 @@ if TARGET_IPHASE4539 config SYS_BOARD - string default "iphase4539" config SYS_CONFIG_NAME - string default "IPHASE4539" endif diff --git a/board/isee/igep0033/Kconfig b/board/isee/igep0033/Kconfig index cdb67ed..4f3aaf4 100644 --- a/board/isee/igep0033/Kconfig +++ b/board/isee/igep0033/Kconfig @@ -1,23 +1,18 @@ if TARGET_AM335X_IGEP0033 config SYS_CPU - string default "armv7" config SYS_BOARD - string default "igep0033" config SYS_VENDOR - string default "isee" config SYS_SOC - string default "am33xx" config SYS_CONFIG_NAME - string default "am335x_igep0033" endif diff --git a/board/isee/igep00x0/Kconfig b/board/isee/igep00x0/Kconfig index c9352fd..aa46882 100644 --- a/board/isee/igep00x0/Kconfig +++ b/board/isee/igep00x0/Kconfig @@ -1,15 +1,12 @@ if TARGET_OMAP3_IGEP00X0 config SYS_BOARD - string default "igep00x0" config SYS_VENDOR - string default "isee" config SYS_CONFIG_NAME - string default "omap3_igep00x0" endif diff --git a/board/isee/igep00x0/MAINTAINERS b/board/isee/igep00x0/MAINTAINERS index fe4a8cd..3fc2c6c 100644 --- a/board/isee/igep00x0/MAINTAINERS +++ b/board/isee/igep00x0/MAINTAINERS @@ -8,7 +8,7 @@ F: configs/igep0030_defconfig F: configs/igep0032_defconfig IGEP0020_NAND BOARD -M: - +#M: - S: Maintained F: configs/igep0020_nand_defconfig F: configs/igep0030_nand_defconfig diff --git a/board/ivm/Kconfig b/board/ivm/Kconfig index ab3da79..6ff3025 100644 --- a/board/ivm/Kconfig +++ b/board/ivm/Kconfig @@ -1,11 +1,9 @@ if TARGET_IVML24 config SYS_BOARD - string default "ivm" config SYS_CONFIG_NAME - string default "IVML24" endif @@ -13,11 +11,9 @@ endif if TARGET_IVMS8 config SYS_BOARD - string default "ivm" config SYS_CONFIG_NAME - string default "IVMS8" endif diff --git a/board/ivm/u-boot.lds b/board/ivm/u-boot.lds deleted file mode 100644 index 3d4fc8a..0000000 --- a/board/ivm/u-boot.lds +++ /dev/null @@ -1,82 +0,0 @@ -/* - * (C) Copyright 2000-2010 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(powerpc) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .text : - { - arch/powerpc/cpu/mpc8xx/start.o (.text*) - arch/powerpc/cpu/mpc8xx/traps.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x0FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/jornada/Kconfig b/board/jornada/Kconfig index 345d3b6..9c11a13 100644 --- a/board/jornada/Kconfig +++ b/board/jornada/Kconfig @@ -1,15 +1,12 @@ if TARGET_JORNADA config SYS_CPU - string default "sa1100" config SYS_BOARD - string default "jornada" config SYS_CONFIG_NAME - string default "jornada" endif diff --git a/board/jse/Kconfig b/board/jse/Kconfig index bb265f2..48905fa 100644 --- a/board/jse/Kconfig +++ b/board/jse/Kconfig @@ -1,11 +1,9 @@ if TARGET_JSE config SYS_BOARD - string default "jse" config SYS_CONFIG_NAME - string default "JSE" endif diff --git a/board/jupiter/Kconfig b/board/jupiter/Kconfig index 36e43b7..d71acbb 100644 --- a/board/jupiter/Kconfig +++ b/board/jupiter/Kconfig @@ -1,11 +1,9 @@ if TARGET_JUPITER config SYS_BOARD - string default "jupiter" config SYS_CONFIG_NAME - string default "jupiter" endif diff --git a/board/karo/tk71/Kconfig b/board/karo/tk71/Kconfig index 24071f6..7b3d548 100644 --- a/board/karo/tk71/Kconfig +++ b/board/karo/tk71/Kconfig @@ -1,15 +1,12 @@ if TARGET_TK71 config SYS_BOARD - string default "tk71" config SYS_VENDOR - string default "karo" config SYS_CONFIG_NAME - string default "tk71" endif diff --git a/board/karo/tk71/MAINTAINERS b/board/karo/tk71/MAINTAINERS index 39b2b1d..ac85d6b 100644 --- a/board/karo/tk71/MAINTAINERS +++ b/board/karo/tk71/MAINTAINERS @@ -1,5 +1,5 @@ TK71 BOARD -M: - +#M: - S: Maintained F: board/karo/tk71/ F: include/configs/tk71.h diff --git a/board/karo/tx25/Kconfig b/board/karo/tx25/Kconfig index 095b1a5..24edcc4 100644 --- a/board/karo/tx25/Kconfig +++ b/board/karo/tx25/Kconfig @@ -1,23 +1,18 @@ if TARGET_TX25 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "tx25" config SYS_VENDOR - string default "karo" config SYS_SOC - string default "mx25" config SYS_CONFIG_NAME - string default "tx25" endif diff --git a/board/keymile/km82xx/Kconfig b/board/keymile/km82xx/Kconfig index c29032a..c9a093c 100644 --- a/board/keymile/km82xx/Kconfig +++ b/board/keymile/km82xx/Kconfig @@ -1,15 +1,12 @@ if TARGET_KM82XX config SYS_BOARD - string default "km82xx" config SYS_VENDOR - string default "keymile" config SYS_CONFIG_NAME - string default "km82xx" endif diff --git a/board/keymile/km83xx/Kconfig b/board/keymile/km83xx/Kconfig index 934c45d..d6c594c 100644 --- a/board/keymile/km83xx/Kconfig +++ b/board/keymile/km83xx/Kconfig @@ -1,15 +1,12 @@ if TARGET_KM8360 config SYS_BOARD - string default "km83xx" config SYS_VENDOR - string default "keymile" config SYS_CONFIG_NAME - string default "km8360" endif @@ -17,15 +14,12 @@ endif if TARGET_SUVD3 config SYS_BOARD - string default "km83xx" config SYS_VENDOR - string default "keymile" config SYS_CONFIG_NAME - string default "suvd3" endif @@ -33,15 +27,12 @@ endif if TARGET_TUXX1 config SYS_BOARD - string default "km83xx" config SYS_VENDOR - string default "keymile" config SYS_CONFIG_NAME - string default "tuxx1" endif diff --git a/board/keymile/km_arm/Kconfig b/board/keymile/km_arm/Kconfig index 3e9cddb..3476780 100644 --- a/board/keymile/km_arm/Kconfig +++ b/board/keymile/km_arm/Kconfig @@ -1,15 +1,12 @@ if TARGET_KM_KIRKWOOD config SYS_BOARD - string default "km_arm" config SYS_VENDOR - string default "keymile" config SYS_CONFIG_NAME - string default "km_kirkwood" endif diff --git a/board/keymile/kmp204x/Kconfig b/board/keymile/kmp204x/Kconfig index 0236f69..7b45a13 100644 --- a/board/keymile/kmp204x/Kconfig +++ b/board/keymile/kmp204x/Kconfig @@ -1,15 +1,12 @@ if TARGET_KMP204X config SYS_BOARD - string default "kmp204x" config SYS_VENDOR - string default "keymile" config SYS_CONFIG_NAME - string default "kmp204x" endif diff --git a/board/kmc/kzm9g/Kconfig b/board/kmc/kzm9g/Kconfig index ab4812f..f163efd 100644 --- a/board/kmc/kzm9g/Kconfig +++ b/board/kmc/kzm9g/Kconfig @@ -1,15 +1,12 @@ if TARGET_KZM9G config SYS_BOARD - string default "kzm9g" config SYS_VENDOR - string default "kmc" config SYS_CONFIG_NAME - string default "kzm9g" endif diff --git a/board/korat/Kconfig b/board/korat/Kconfig index c23061c..f434dea 100644 --- a/board/korat/Kconfig +++ b/board/korat/Kconfig @@ -1,11 +1,9 @@ if TARGET_KORAT config SYS_BOARD - string default "korat" config SYS_CONFIG_NAME - string default "korat" endif diff --git a/board/kup/kup4k/Kconfig b/board/kup/kup4k/Kconfig index bac89aa..903c341 100644 --- a/board/kup/kup4k/Kconfig +++ b/board/kup/kup4k/Kconfig @@ -1,15 +1,12 @@ if TARGET_KUP4K config SYS_BOARD - string default "kup4k" config SYS_VENDOR - string default "kup" config SYS_CONFIG_NAME - string default "KUP4K" endif diff --git a/board/kup/kup4k/u-boot.lds b/board/kup/kup4k/u-boot.lds deleted file mode 100644 index 0eb2fba..0000000 --- a/board/kup/kup4k/u-boot.lds +++ /dev/null @@ -1,82 +0,0 @@ -/* - * (C) Copyright 2000-2010 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(powerpc) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .text : - { - arch/powerpc/cpu/mpc8xx/start.o (.text*) - arch/powerpc/cpu/mpc8xx/traps.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/kup/kup4x/Kconfig b/board/kup/kup4x/Kconfig index e04b919..eeb5d83 100644 --- a/board/kup/kup4x/Kconfig +++ b/board/kup/kup4x/Kconfig @@ -1,15 +1,12 @@ if TARGET_KUP4X config SYS_BOARD - string default "kup4x" config SYS_VENDOR - string default "kup" config SYS_CONFIG_NAME - string default "KUP4X" endif diff --git a/board/logicpd/am3517evm/Kconfig b/board/logicpd/am3517evm/Kconfig index 1012d3d..901f609 100644 --- a/board/logicpd/am3517evm/Kconfig +++ b/board/logicpd/am3517evm/Kconfig @@ -1,15 +1,12 @@ if TARGET_AM3517_EVM config SYS_BOARD - string default "am3517evm" config SYS_VENDOR - string default "logicpd" config SYS_CONFIG_NAME - string default "am3517_evm" endif diff --git a/board/logicpd/imx27lite/Kconfig b/board/logicpd/imx27lite/Kconfig index f107267..842d1ba 100644 --- a/board/logicpd/imx27lite/Kconfig +++ b/board/logicpd/imx27lite/Kconfig @@ -1,23 +1,18 @@ if TARGET_IMX27LITE config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "imx27lite" config SYS_VENDOR - string default "logicpd" config SYS_SOC - string default "mx27" config SYS_CONFIG_NAME - string default "imx27lite" endif @@ -25,23 +20,18 @@ endif if TARGET_MAGNESIUM config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "imx27lite" config SYS_VENDOR - string default "logicpd" config SYS_SOC - string default "mx27" config SYS_CONFIG_NAME - string default "magnesium" endif diff --git a/board/logicpd/imx31_litekit/Kconfig b/board/logicpd/imx31_litekit/Kconfig index ae3343b..a87fa81 100644 --- a/board/logicpd/imx31_litekit/Kconfig +++ b/board/logicpd/imx31_litekit/Kconfig @@ -1,23 +1,18 @@ if TARGET_IMX31_LITEKIT config SYS_CPU - string default "arm1136" config SYS_BOARD - string default "imx31_litekit" config SYS_VENDOR - string default "logicpd" config SYS_SOC - string default "mx31" config SYS_CONFIG_NAME - string default "imx31_litekit" endif diff --git a/board/logicpd/imx31_litekit/MAINTAINERS b/board/logicpd/imx31_litekit/MAINTAINERS index 98cc7bd..8e3608e 100644 --- a/board/logicpd/imx31_litekit/MAINTAINERS +++ b/board/logicpd/imx31_litekit/MAINTAINERS @@ -1,5 +1,5 @@ IMX31_LITEKIT BOARD -M: - +#M: - S: Maintained F: board/logicpd/imx31_litekit/ F: include/configs/imx31_litekit.h diff --git a/board/logicpd/omap3som/Kconfig b/board/logicpd/omap3som/Kconfig index adeaf4d..03d272a 100644 --- a/board/logicpd/omap3som/Kconfig +++ b/board/logicpd/omap3som/Kconfig @@ -1,15 +1,12 @@ if TARGET_OMAP3_LOGIC config SYS_BOARD - string default "omap3som" config SYS_VENDOR - string default "logicpd" config SYS_CONFIG_NAME - string default "omap3_logic" endif diff --git a/board/logicpd/zoom1/Kconfig b/board/logicpd/zoom1/Kconfig index e9a5623..d76cb66 100644 --- a/board/logicpd/zoom1/Kconfig +++ b/board/logicpd/zoom1/Kconfig @@ -1,15 +1,12 @@ if TARGET_OMAP3_ZOOM1 config SYS_BOARD - string default "zoom1" config SYS_VENDOR - string default "logicpd" config SYS_CONFIG_NAME - string default "omap3_zoom1" endif diff --git a/board/lwmon/Kconfig b/board/lwmon/Kconfig index a0c7587..e98c794 100644 --- a/board/lwmon/Kconfig +++ b/board/lwmon/Kconfig @@ -1,11 +1,9 @@ if TARGET_LWMON config SYS_BOARD - string default "lwmon" config SYS_CONFIG_NAME - string default "lwmon" endif diff --git a/board/lwmon/u-boot.lds b/board/lwmon/u-boot.lds deleted file mode 100644 index 90e2e2e..0000000 --- a/board/lwmon/u-boot.lds +++ /dev/null @@ -1,82 +0,0 @@ -/* - * (C) Copyright 2001-2010 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(powerpc) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .text : - { - arch/powerpc/cpu/mpc8xx/start.o (.text*) - arch/powerpc/cpu/mpc8xx/traps.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x0FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/lwmon5/Kconfig b/board/lwmon5/Kconfig index 79cf08e..90566d8 100644 --- a/board/lwmon5/Kconfig +++ b/board/lwmon5/Kconfig @@ -1,11 +1,9 @@ if TARGET_LWMON5 config SYS_BOARD - string default "lwmon5" config SYS_CONFIG_NAME - string default "lwmon5" endif diff --git a/board/manroland/hmi1001/Kconfig b/board/manroland/hmi1001/Kconfig index 2f576dd..996a87f 100644 --- a/board/manroland/hmi1001/Kconfig +++ b/board/manroland/hmi1001/Kconfig @@ -1,15 +1,12 @@ if TARGET_HMI1001 config SYS_BOARD - string default "hmi1001" config SYS_VENDOR - string default "manroland" config SYS_CONFIG_NAME - string default "hmi1001" endif diff --git a/board/manroland/hmi1001/MAINTAINERS b/board/manroland/hmi1001/MAINTAINERS index bdfdc01..a66a981 100644 --- a/board/manroland/hmi1001/MAINTAINERS +++ b/board/manroland/hmi1001/MAINTAINERS @@ -1,5 +1,5 @@ HMI1001 BOARD -M: - +#M: - S: Maintained F: board/manroland/hmi1001/ F: include/configs/hmi1001.h diff --git a/board/manroland/mucmc52/Kconfig b/board/manroland/mucmc52/Kconfig index 4be0722..a033610 100644 --- a/board/manroland/mucmc52/Kconfig +++ b/board/manroland/mucmc52/Kconfig @@ -1,15 +1,12 @@ if TARGET_MUCMC52 config SYS_BOARD - string default "mucmc52" config SYS_VENDOR - string default "manroland" config SYS_CONFIG_NAME - string default "mucmc52" endif diff --git a/board/manroland/uc100/Kconfig b/board/manroland/uc100/Kconfig index a41a780..08f681b 100644 --- a/board/manroland/uc100/Kconfig +++ b/board/manroland/uc100/Kconfig @@ -1,15 +1,12 @@ if TARGET_UC100 config SYS_BOARD - string default "uc100" config SYS_VENDOR - string default "manroland" config SYS_CONFIG_NAME - string default "uc100" endif diff --git a/board/manroland/uc100/u-boot.lds b/board/manroland/uc100/u-boot.lds deleted file mode 100644 index 47f2de8..0000000 --- a/board/manroland/uc100/u-boot.lds +++ /dev/null @@ -1,85 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(powerpc) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - arch/powerpc/cpu/mpc8xx/start.o (.text*) - arch/powerpc/cpu/mpc8xx/traps.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/manroland/uc101/Kconfig b/board/manroland/uc101/Kconfig index 07cfcc6..c285b22 100644 --- a/board/manroland/uc101/Kconfig +++ b/board/manroland/uc101/Kconfig @@ -1,15 +1,12 @@ if TARGET_UC101 config SYS_BOARD - string default "uc101" config SYS_VENDOR - string default "manroland" config SYS_CONFIG_NAME - string default "uc101" endif diff --git a/board/matrix_vision/mergerbox/Kconfig b/board/matrix_vision/mergerbox/Kconfig index 5b292dc..3857535 100644 --- a/board/matrix_vision/mergerbox/Kconfig +++ b/board/matrix_vision/mergerbox/Kconfig @@ -1,15 +1,12 @@ if TARGET_MERGERBOX config SYS_BOARD - string default "mergerbox" config SYS_VENDOR - string default "matrix_vision" config SYS_CONFIG_NAME - string default "MERGERBOX" endif diff --git a/board/matrix_vision/mergerbox/MAINTAINERS b/board/matrix_vision/mergerbox/MAINTAINERS index 22be981..20bd073 100644 --- a/board/matrix_vision/mergerbox/MAINTAINERS +++ b/board/matrix_vision/mergerbox/MAINTAINERS @@ -1,5 +1,5 @@ MERGERBOX BOARD -M: Andre Schwarz +#M: Andre Schwarz S: Orphan (since 2014-03) F: board/matrix_vision/mergerbox/ F: include/configs/MERGERBOX.h diff --git a/board/matrix_vision/mvbc_p/Kconfig b/board/matrix_vision/mvbc_p/Kconfig index ab1fe65..4a68493 100644 --- a/board/matrix_vision/mvbc_p/Kconfig +++ b/board/matrix_vision/mvbc_p/Kconfig @@ -1,15 +1,12 @@ if TARGET_MVBC_P config SYS_BOARD - string default "mvbc_p" config SYS_VENDOR - string default "matrix_vision" config SYS_CONFIG_NAME - string default "MVBC_P" endif diff --git a/board/matrix_vision/mvbc_p/MAINTAINERS b/board/matrix_vision/mvbc_p/MAINTAINERS index 9e76b57..aad14ed 100644 --- a/board/matrix_vision/mvbc_p/MAINTAINERS +++ b/board/matrix_vision/mvbc_p/MAINTAINERS @@ -1,5 +1,5 @@ MVBC_P BOARD -M: Andre Schwarz +#M: Andre Schwarz S: Orphan (since 2014-03) F: board/matrix_vision/mvbc_p/ F: include/configs/MVBC_P.h diff --git a/board/matrix_vision/mvblm7/Kconfig b/board/matrix_vision/mvblm7/Kconfig index c5998b3..ea7a6f8 100644 --- a/board/matrix_vision/mvblm7/Kconfig +++ b/board/matrix_vision/mvblm7/Kconfig @@ -1,15 +1,12 @@ if TARGET_MVBLM7 config SYS_BOARD - string default "mvblm7" config SYS_VENDOR - string default "matrix_vision" config SYS_CONFIG_NAME - string default "MVBLM7" endif diff --git a/board/matrix_vision/mvblm7/MAINTAINERS b/board/matrix_vision/mvblm7/MAINTAINERS index 4f7ca50..947a14e 100644 --- a/board/matrix_vision/mvblm7/MAINTAINERS +++ b/board/matrix_vision/mvblm7/MAINTAINERS @@ -1,5 +1,5 @@ MVBLM7 BOARD -M: Andre Schwarz +#M: Andre Schwarz S: Orphan (since 2014-03) F: board/matrix_vision/mvblm7/ F: include/configs/MVBLM7.h diff --git a/board/matrix_vision/mvblx/Kconfig b/board/matrix_vision/mvblx/Kconfig index 69f0566..adbc20a 100644 --- a/board/matrix_vision/mvblx/Kconfig +++ b/board/matrix_vision/mvblx/Kconfig @@ -1,15 +1,12 @@ if TARGET_OMAP3_MVBLX config SYS_BOARD - string default "mvblx" config SYS_VENDOR - string default "matrix_vision" config SYS_CONFIG_NAME - string default "omap3_mvblx" endif diff --git a/board/matrix_vision/mvsmr/Kconfig b/board/matrix_vision/mvsmr/Kconfig index 1627a36..d725c5a 100644 --- a/board/matrix_vision/mvsmr/Kconfig +++ b/board/matrix_vision/mvsmr/Kconfig @@ -1,15 +1,12 @@ if TARGET_MVSMR config SYS_BOARD - string default "mvsmr" config SYS_VENDOR - string default "matrix_vision" config SYS_CONFIG_NAME - string default "MVSMR" endif diff --git a/board/matrix_vision/mvsmr/MAINTAINERS b/board/matrix_vision/mvsmr/MAINTAINERS index 9659730..ae3cf9c 100644 --- a/board/matrix_vision/mvsmr/MAINTAINERS +++ b/board/matrix_vision/mvsmr/MAINTAINERS @@ -1,5 +1,5 @@ MVSMR BOARD -M: Andre Schwarz +#M: Andre Schwarz S: Orphan (since 2014-03) F: board/matrix_vision/mvsmr/ F: include/configs/MVSMR.h diff --git a/board/mcc200/Kconfig b/board/mcc200/Kconfig index c4e8cf1..3b27eeb 100644 --- a/board/mcc200/Kconfig +++ b/board/mcc200/Kconfig @@ -1,11 +1,9 @@ if TARGET_MCC200 config SYS_BOARD - string default "mcc200" config SYS_CONFIG_NAME - string default "mcc200" endif diff --git a/board/mcc200/MAINTAINERS b/board/mcc200/MAINTAINERS index 3d02bc6..a59a498 100644 --- a/board/mcc200/MAINTAINERS +++ b/board/mcc200/MAINTAINERS @@ -1,5 +1,5 @@ MCC200 BOARD -M: - +#M: - S: Maintained F: board/mcc200/ F: include/configs/mcc200.h diff --git a/board/micronas/vct/Kconfig b/board/micronas/vct/Kconfig index 76c5f7c..75046fe 100644 --- a/board/micronas/vct/Kconfig +++ b/board/micronas/vct/Kconfig @@ -1,19 +1,15 @@ if TARGET_VCT config SYS_CPU - string default "mips32" config SYS_BOARD - string default "vct" config SYS_VENDOR - string default "micronas" config SYS_CONFIG_NAME - string default "vct" endif diff --git a/board/micronas/vct/MAINTAINERS b/board/micronas/vct/MAINTAINERS index 4b825d3..cbaa585 100644 --- a/board/micronas/vct/MAINTAINERS +++ b/board/micronas/vct/MAINTAINERS @@ -1,5 +1,5 @@ VCT BOARD -M: - +#M: - S: Maintained F: board/micronas/vct/ F: include/configs/vct.h diff --git a/board/mimc/mimc200/Kconfig b/board/mimc/mimc200/Kconfig index 146c3b7..18736d7 100644 --- a/board/mimc/mimc200/Kconfig +++ b/board/mimc/mimc200/Kconfig @@ -1,19 +1,15 @@ if TARGET_MIMC200 config SYS_BOARD - string default "mimc200" config SYS_VENDOR - string default "mimc" config SYS_SOC - string default "at32ap700x" config SYS_CONFIG_NAME - string default "mimc200" endif diff --git a/board/miromico/hammerhead/Kconfig b/board/miromico/hammerhead/Kconfig index 9795e55..1f09ef7 100644 --- a/board/miromico/hammerhead/Kconfig +++ b/board/miromico/hammerhead/Kconfig @@ -1,19 +1,15 @@ if TARGET_HAMMERHEAD config SYS_BOARD - string default "hammerhead" config SYS_VENDOR - string default "miromico" config SYS_SOC - string default "at32ap700x" config SYS_CONFIG_NAME - string default "hammerhead" endif diff --git a/board/mosaixtech/icon/Kconfig b/board/mosaixtech/icon/Kconfig index c439b14..3145a06 100644 --- a/board/mosaixtech/icon/Kconfig +++ b/board/mosaixtech/icon/Kconfig @@ -1,15 +1,12 @@ if TARGET_ICON config SYS_BOARD - string default "icon" config SYS_VENDOR - string default "mosaixtech" config SYS_CONFIG_NAME - string default "icon" endif diff --git a/board/motionpro/Kconfig b/board/motionpro/Kconfig index c8ee043..f624f6c 100644 --- a/board/motionpro/Kconfig +++ b/board/motionpro/Kconfig @@ -1,11 +1,9 @@ if TARGET_MOTIONPRO config SYS_BOARD - string default "motionpro" config SYS_CONFIG_NAME - string default "motionpro" endif diff --git a/board/motionpro/MAINTAINERS b/board/motionpro/MAINTAINERS index 10a97cc..2f8b5cb 100644 --- a/board/motionpro/MAINTAINERS +++ b/board/motionpro/MAINTAINERS @@ -1,5 +1,5 @@ MOTIONPRO BOARD -M: - +#M: - S: Maintained F: board/motionpro/ F: include/configs/motionpro.h diff --git a/board/mpc8308_p1m/Kconfig b/board/mpc8308_p1m/Kconfig index 6e84bdf..b7e39da 100644 --- a/board/mpc8308_p1m/Kconfig +++ b/board/mpc8308_p1m/Kconfig @@ -1,11 +1,9 @@ if TARGET_MPC8308_P1M config SYS_BOARD - string default "mpc8308_p1m" config SYS_CONFIG_NAME - string default "mpc8308_p1m" endif diff --git a/board/mpl/mip405/Kconfig b/board/mpl/mip405/Kconfig index 6705260..48ba91a 100644 --- a/board/mpl/mip405/Kconfig +++ b/board/mpl/mip405/Kconfig @@ -1,15 +1,12 @@ if TARGET_MIP405 config SYS_BOARD - string default "mip405" config SYS_VENDOR - string default "mpl" config SYS_CONFIG_NAME - string default "MIP405" endif diff --git a/board/mpl/pati/Kconfig b/board/mpl/pati/Kconfig index b902cbd..b141da3 100644 --- a/board/mpl/pati/Kconfig +++ b/board/mpl/pati/Kconfig @@ -1,15 +1,12 @@ if TARGET_PATI config SYS_BOARD - string default "pati" config SYS_VENDOR - string default "mpl" config SYS_CONFIG_NAME - string default "PATI" endif diff --git a/board/mpl/pati/MAINTAINERS b/board/mpl/pati/MAINTAINERS index f7c1bd8..19ad05d 100644 --- a/board/mpl/pati/MAINTAINERS +++ b/board/mpl/pati/MAINTAINERS @@ -1,5 +1,5 @@ PATI BOARD -M: - +#M: - S: Maintained F: board/mpl/pati/ F: include/configs/PATI.h diff --git a/board/mpl/pip405/Kconfig b/board/mpl/pip405/Kconfig index 1e1295b..f485367 100644 --- a/board/mpl/pip405/Kconfig +++ b/board/mpl/pip405/Kconfig @@ -1,15 +1,12 @@ if TARGET_PIP405 config SYS_BOARD - string default "pip405" config SYS_VENDOR - string default "mpl" config SYS_CONFIG_NAME - string default "PIP405" endif diff --git a/board/mpl/vcma9/Kconfig b/board/mpl/vcma9/Kconfig index 91246be..08b0fa0 100644 --- a/board/mpl/vcma9/Kconfig +++ b/board/mpl/vcma9/Kconfig @@ -1,23 +1,18 @@ if TARGET_VCMA9 config SYS_CPU - string default "arm920t" config SYS_BOARD - string default "vcma9" config SYS_VENDOR - string default "mpl" config SYS_SOC - string default "s3c24x0" config SYS_CONFIG_NAME - string default "VCMA9" endif diff --git a/board/mpr2/Kconfig b/board/mpr2/Kconfig index 93bec59..79a60c2 100644 --- a/board/mpr2/Kconfig +++ b/board/mpr2/Kconfig @@ -1,15 +1,12 @@ if TARGET_MPR2 config SYS_CPU - string default "sh3" config SYS_BOARD - string default "mpr2" config SYS_CONFIG_NAME - string default "mpr2" endif diff --git a/board/ms7720se/Kconfig b/board/ms7720se/Kconfig index 8873062..d935aff 100644 --- a/board/ms7720se/Kconfig +++ b/board/ms7720se/Kconfig @@ -1,15 +1,12 @@ if TARGET_MS7720SE config SYS_CPU - string default "sh3" config SYS_BOARD - string default "ms7720se" config SYS_CONFIG_NAME - string default "ms7720se" endif diff --git a/board/ms7722se/Kconfig b/board/ms7722se/Kconfig index c5b5b4f..17073e8 100644 --- a/board/ms7722se/Kconfig +++ b/board/ms7722se/Kconfig @@ -1,15 +1,12 @@ if TARGET_MS7722SE config SYS_CPU - string default "sh4" config SYS_BOARD - string default "ms7722se" config SYS_CONFIG_NAME - string default "ms7722se" endif diff --git a/board/ms7750se/Kconfig b/board/ms7750se/Kconfig index 0c9d88f..07aa024 100644 --- a/board/ms7750se/Kconfig +++ b/board/ms7750se/Kconfig @@ -1,15 +1,12 @@ if TARGET_MS7750SE config SYS_CPU - string default "sh4" config SYS_BOARD - string default "ms7750se" config SYS_CONFIG_NAME - string default "ms7750se" endif diff --git a/board/muas3001/Kconfig b/board/muas3001/Kconfig index 982d32f..94a00b3 100644 --- a/board/muas3001/Kconfig +++ b/board/muas3001/Kconfig @@ -1,11 +1,9 @@ if TARGET_MUAS3001 config SYS_BOARD - string default "muas3001" config SYS_CONFIG_NAME - string default "muas3001" endif diff --git a/board/munices/Kconfig b/board/munices/Kconfig index d242d56..019aaae 100644 --- a/board/munices/Kconfig +++ b/board/munices/Kconfig @@ -1,11 +1,9 @@ if TARGET_MUNICES config SYS_BOARD - string default "munices" config SYS_CONFIG_NAME - string default "munices" endif diff --git a/board/munices/MAINTAINERS b/board/munices/MAINTAINERS index b8f5761..50d3e7e 100644 --- a/board/munices/MAINTAINERS +++ b/board/munices/MAINTAINERS @@ -1,5 +1,5 @@ MUNICES BOARD -M: - +#M: - S: Maintained F: board/munices/ F: include/configs/munices.h diff --git a/board/musenki/Kconfig b/board/musenki/Kconfig index ea33d16..26b680f 100644 --- a/board/musenki/Kconfig +++ b/board/musenki/Kconfig @@ -1,11 +1,9 @@ if TARGET_MUSENKI config SYS_BOARD - string default "musenki" config SYS_CONFIG_NAME - string default "MUSENKI" endif diff --git a/board/musenki/MAINTAINERS b/board/musenki/MAINTAINERS index 03a1fe7..4196c80 100644 --- a/board/musenki/MAINTAINERS +++ b/board/musenki/MAINTAINERS @@ -1,5 +1,5 @@ MUSENKI BOARD -M: Jim Thompson +#M: Jim Thompson S: Orphan (since 2014-04) F: board/musenki/ F: include/configs/MUSENKI.h diff --git a/board/mvblue/Kconfig b/board/mvblue/Kconfig index a70bcbe..cee206b 100644 --- a/board/mvblue/Kconfig +++ b/board/mvblue/Kconfig @@ -1,11 +1,9 @@ if TARGET_MVBLUE config SYS_BOARD - string default "mvblue" config SYS_CONFIG_NAME - string default "MVBLUE" endif diff --git a/board/mvblue/MAINTAINERS b/board/mvblue/MAINTAINERS index a809ba5..5955f1a 100644 --- a/board/mvblue/MAINTAINERS +++ b/board/mvblue/MAINTAINERS @@ -1,5 +1,5 @@ MVBLUE BOARD -M: - +#M: - S: Maintained F: board/mvblue/ F: include/configs/MVBLUE.h diff --git a/board/netvia/Kconfig b/board/netvia/Kconfig index d177b70..3e740e5 100644 --- a/board/netvia/Kconfig +++ b/board/netvia/Kconfig @@ -1,11 +1,9 @@ if TARGET_NETVIA config SYS_BOARD - string default "netvia" config SYS_CONFIG_NAME - string default "NETVIA" endif diff --git a/board/netvia/u-boot.lds b/board/netvia/u-boot.lds deleted file mode 100644 index 0dff5a4..0000000 --- a/board/netvia/u-boot.lds +++ /dev/null @@ -1,82 +0,0 @@ -/* - * (C) Copyright 2000-2010 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -OUTPUT_ARCH(powerpc) - -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .text : - { - arch/powerpc/cpu/mpc8xx/start.o (.text*) - arch/powerpc/cpu/mpc8xx/traps.o (.text*) - - *(.text*) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) - } - - /* Read-write section, merged into data segment: */ - . = (. + 0x00FF) & 0xFFFFFF00; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - _GOT2_TABLE_ = .; - KEEP(*(.got2)) - KEEP(*(.got)) - PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); - _FIXUP_TABLE_ = .; - KEEP(*(.fixup)) - } - __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data*) - *(.sdata*) - } - _edata = .; - PROVIDE (edata = .); - - . = .; - - . = ALIGN(4); - .u_boot_list : { - KEEP(*(SORT(.u_boot_list*))); - } - - - . = .; - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(256); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(256); - __init_end = .; - - __bss_start = .; - .bss (NOLOAD) : - { - *(.bss*) - *(.sbss*) - *(COMMON) - . = ALIGN(4); - } - __bss_end = . ; - PROVIDE (end = .); -} diff --git a/board/nokia/rx51/Kconfig b/board/nokia/rx51/Kconfig index faa90d2..ec6a571 100644 --- a/board/nokia/rx51/Kconfig +++ b/board/nokia/rx51/Kconfig @@ -1,15 +1,12 @@ if TARGET_NOKIA_RX51 config SYS_BOARD - string default "rx51" config SYS_VENDOR - string default "nokia" config SYS_CONFIG_NAME - string default "nokia_rx51" endif diff --git a/board/nvidia/beaver/Kconfig b/board/nvidia/beaver/Kconfig index e487b66..23f7c94 100644 --- a/board/nvidia/beaver/Kconfig +++ b/board/nvidia/beaver/Kconfig @@ -1,15 +1,12 @@ if TARGET_BEAVER config SYS_BOARD - string default "beaver" config SYS_VENDOR - string default "nvidia" config SYS_CONFIG_NAME - string default "beaver" endif diff --git a/board/nvidia/cardhu/Kconfig b/board/nvidia/cardhu/Kconfig index 150815f..63ace66 100644 --- a/board/nvidia/cardhu/Kconfig +++ b/board/nvidia/cardhu/Kconfig @@ -1,15 +1,12 @@ if TARGET_CARDHU config SYS_BOARD - string default "cardhu" config SYS_VENDOR - string default "nvidia" config SYS_CONFIG_NAME - string default "cardhu" endif diff --git a/board/nvidia/dalmore/Kconfig b/board/nvidia/dalmore/Kconfig index 9eed19c..96eaa01 100644 --- a/board/nvidia/dalmore/Kconfig +++ b/board/nvidia/dalmore/Kconfig @@ -1,15 +1,12 @@ if TARGET_DALMORE config SYS_BOARD - string default "dalmore" config SYS_VENDOR - string default "nvidia" config SYS_CONFIG_NAME - string default "dalmore" endif diff --git a/board/nvidia/harmony/Kconfig b/board/nvidia/harmony/Kconfig index 7d75f2d..328c946 100644 --- a/board/nvidia/harmony/Kconfig +++ b/board/nvidia/harmony/Kconfig @@ -1,15 +1,12 @@ if TARGET_HARMONY config SYS_BOARD - string default "harmony" config SYS_VENDOR - string default "nvidia" config SYS_CONFIG_NAME - string default "harmony" endif diff --git a/board/nvidia/jetson-tk1/Kconfig b/board/nvidia/jetson-tk1/Kconfig index 02b46b7..d90a74e 100644 --- a/board/nvidia/jetson-tk1/Kconfig +++ b/board/nvidia/jetson-tk1/Kconfig @@ -1,15 +1,12 @@ if TARGET_JETSON_TK1 config SYS_BOARD - string default "jetson-tk1" config SYS_VENDOR - string default "nvidia" config SYS_CONFIG_NAME - string default "jetson-tk1" endif diff --git a/board/nvidia/seaboard/Kconfig b/board/nvidia/seaboard/Kconfig index 7863702..0924bde 100644 --- a/board/nvidia/seaboard/Kconfig +++ b/board/nvidia/seaboard/Kconfig @@ -1,15 +1,12 @@ if TARGET_SEABOARD config SYS_BOARD - string default "seaboard" config SYS_VENDOR - string default "nvidia" config SYS_CONFIG_NAME - string default "seaboard" endif diff --git a/board/nvidia/seaboard/seaboard.c b/board/nvidia/seaboard/seaboard.c index ce2db40..6a243f0 100644 --- a/board/nvidia/seaboard/seaboard.c +++ b/board/nvidia/seaboard/seaboard.c @@ -22,7 +22,7 @@ void gpio_early_init_uart(void) #ifndef CONFIG_SPL_BUILD gpio_request(GPIO_PI3, NULL); #endif - gpio_direction_output(GPIO_PI3, 0); + tegra_spl_gpio_direction_output(GPIO_PI3, 0); } #endif diff --git a/board/nvidia/venice2/Kconfig b/board/nvidia/venice2/Kconfig index 993da79..6905f00 100644 --- a/board/nvidia/venice2/Kconfig +++ b/board/nvidia/venice2/Kconfig @@ -1,15 +1,12 @@ if TARGET_VENICE2 config SYS_BOARD - string default "venice2" config SYS_VENDOR - string default "nvidia" config SYS_CONFIG_NAME - string default "venice2" endif diff --git a/board/nvidia/ventana/Kconfig b/board/nvidia/ventana/Kconfig index 95840a8..c1ad7b7 100644 --- a/board/nvidia/ventana/Kconfig +++ b/board/nvidia/ventana/Kconfig @@ -1,15 +1,12 @@ if TARGET_VENTANA config SYS_BOARD - string default "ventana" config SYS_VENDOR - string default "nvidia" config SYS_CONFIG_NAME - string default "ventana" endif diff --git a/board/nvidia/whistler/Kconfig b/board/nvidia/whistler/Kconfig index 113e2ef..5febc07 100644 --- a/board/nvidia/whistler/Kconfig +++ b/board/nvidia/whistler/Kconfig @@ -1,15 +1,12 @@ if TARGET_WHISTLER config SYS_BOARD - string default "whistler" config SYS_VENDOR - string default "nvidia" config SYS_CONFIG_NAME - string default "whistler" endif diff --git a/board/olimex/mx23_olinuxino/Kconfig b/board/olimex/mx23_olinuxino/Kconfig index 07b3284..fb09309 100644 --- a/board/olimex/mx23_olinuxino/Kconfig +++ b/board/olimex/mx23_olinuxino/Kconfig @@ -1,23 +1,18 @@ if TARGET_MX23_OLINUXINO config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "mx23_olinuxino" config SYS_VENDOR - string default "olimex" config SYS_SOC - string default "mxs" config SYS_CONFIG_NAME - string default "mx23_olinuxino" endif diff --git a/board/omicron/calimain/Kconfig b/board/omicron/calimain/Kconfig index 46e95d8..1ec48e6 100644 --- a/board/omicron/calimain/Kconfig +++ b/board/omicron/calimain/Kconfig @@ -1,15 +1,12 @@ if TARGET_CALIMAIN config SYS_BOARD - string default "calimain" config SYS_VENDOR - string default "omicron" config SYS_CONFIG_NAME - string default "calimain" endif diff --git a/board/openrisc/openrisc-generic/Kconfig b/board/openrisc/openrisc-generic/Kconfig index 71a8246..cd2a94f 100644 --- a/board/openrisc/openrisc-generic/Kconfig +++ b/board/openrisc/openrisc-generic/Kconfig @@ -1,15 +1,12 @@ if TARGET_OPENRISC_GENERIC config SYS_BOARD - string default "openrisc-generic" config SYS_VENDOR - string default "openrisc" config SYS_CONFIG_NAME - string default "openrisc-generic" endif diff --git a/board/overo/Kconfig b/board/overo/Kconfig index d1ea236..74572a6 100644 --- a/board/overo/Kconfig +++ b/board/overo/Kconfig @@ -1,11 +1,9 @@ if TARGET_OMAP3_OVERO config SYS_BOARD - string default "overo" config SYS_CONFIG_NAME - string default "omap3_overo" endif diff --git a/board/palmld/Kconfig b/board/palmld/Kconfig index bed99b6..a749c8d 100644 --- a/board/palmld/Kconfig +++ b/board/palmld/Kconfig @@ -1,15 +1,12 @@ if TARGET_PALMLD config SYS_CPU - string default "pxa" config SYS_BOARD - string default "palmld" config SYS_CONFIG_NAME - string default "palmld" endif diff --git a/board/palmtc/Kconfig b/board/palmtc/Kconfig index 86fb63b..5207490 100644 --- a/board/palmtc/Kconfig +++ b/board/palmtc/Kconfig @@ -1,15 +1,12 @@ if TARGET_PALMTC config SYS_CPU - string default "pxa" config SYS_BOARD - string default "palmtc" config SYS_CONFIG_NAME - string default "palmtc" endif diff --git a/board/palmtreo680/Kconfig b/board/palmtreo680/Kconfig index 4df6c63..1992970 100644 --- a/board/palmtreo680/Kconfig +++ b/board/palmtreo680/Kconfig @@ -1,15 +1,12 @@ if TARGET_PALMTREO680 config SYS_CPU - string default "pxa" config SYS_BOARD - string default "palmtreo680" config SYS_CONFIG_NAME - string default "palmtreo680" endif diff --git a/board/palmtreo680/MAINTAINERS b/board/palmtreo680/MAINTAINERS index bdc034e..b0ff9d0 100644 --- a/board/palmtreo680/MAINTAINERS +++ b/board/palmtreo680/MAINTAINERS @@ -1,5 +1,5 @@ PALMTREO680 BOARD -M: Mike Dunn +#M: Mike Dunn S: Orphan (since 2014-06) F: board/palmtreo680/ F: include/configs/palmtreo680.h diff --git a/board/pandora/Kconfig b/board/pandora/Kconfig index 6f41005..0b33818 100644 --- a/board/pandora/Kconfig +++ b/board/pandora/Kconfig @@ -1,11 +1,9 @@ if TARGET_OMAP3_PANDORA config SYS_BOARD - string default "pandora" config SYS_CONFIG_NAME - string default "omap3_pandora" endif diff --git a/board/pb1x00/Kconfig b/board/pb1x00/Kconfig index 0ad3f23..ef2844a 100644 --- a/board/pb1x00/Kconfig +++ b/board/pb1x00/Kconfig @@ -1,19 +1,15 @@ if TARGET_PB1X00 config SYS_CPU - string default "mips32" config SYS_BOARD - string default "pb1x00" config SYS_SOC - string default "au1x00" config SYS_CONFIG_NAME - string default "pb1x00" endif diff --git a/board/pb1x00/MAINTAINERS b/board/pb1x00/MAINTAINERS index 6c5c2bb..8326cc7 100644 --- a/board/pb1x00/MAINTAINERS +++ b/board/pb1x00/MAINTAINERS @@ -1,5 +1,5 @@ PB1X00 BOARD -M: - +#M: - S: Maintained F: board/pb1x00/ F: include/configs/pb1x00.h diff --git a/board/pcs440ep/Kconfig b/board/pcs440ep/Kconfig index 7e69fd3..5b280f6 100644 --- a/board/pcs440ep/Kconfig +++ b/board/pcs440ep/Kconfig @@ -1,11 +1,9 @@ if TARGET_PCS440EP config SYS_BOARD - string default "pcs440ep" config SYS_CONFIG_NAME - string default "pcs440ep" endif diff --git a/board/pdm360ng/Kconfig b/board/pdm360ng/Kconfig index e7a8985..33173a0 100644 --- a/board/pdm360ng/Kconfig +++ b/board/pdm360ng/Kconfig @@ -1,11 +1,9 @@ if TARGET_PDM360NG config SYS_BOARD - string default "pdm360ng" config SYS_CONFIG_NAME - string default "pdm360ng" endif diff --git a/board/phytec/pcm030/Kconfig b/board/phytec/pcm030/Kconfig index 6eea7e8..3a3eab8 100644 --- a/board/phytec/pcm030/Kconfig +++ b/board/phytec/pcm030/Kconfig @@ -1,15 +1,12 @@ if TARGET_PCM030 config SYS_BOARD - string default "pcm030" config SYS_VENDOR - string default "phytec" config SYS_CONFIG_NAME - string default "pcm030" endif diff --git a/board/phytec/pcm051/Kconfig b/board/phytec/pcm051/Kconfig index e710445..f4ed7fd 100644 --- a/board/phytec/pcm051/Kconfig +++ b/board/phytec/pcm051/Kconfig @@ -1,23 +1,18 @@ if TARGET_PCM051 config SYS_CPU - string default "armv7" config SYS_BOARD - string default "pcm051" config SYS_VENDOR - string default "phytec" config SYS_SOC - string default "am33xx" config SYS_CONFIG_NAME - string default "pcm051" endif diff --git a/board/pm520/Kconfig b/board/pm520/Kconfig index d32f857..3f0a258 100644 --- a/board/pm520/Kconfig +++ b/board/pm520/Kconfig @@ -1,11 +1,9 @@ if TARGET_PM520 config SYS_BOARD - string default "pm520" config SYS_CONFIG_NAME - string default "PM520" endif diff --git a/board/pm826/Kconfig b/board/pm826/Kconfig index f1de16a..dd11b7a 100644 --- a/board/pm826/Kconfig +++ b/board/pm826/Kconfig @@ -1,11 +1,9 @@ if TARGET_PM826 config SYS_BOARD - string default "pm826" config SYS_CONFIG_NAME - string default "PM826" endif diff --git a/board/pm828/Kconfig b/board/pm828/Kconfig index 20f6b34..e7970a3 100644 --- a/board/pm828/Kconfig +++ b/board/pm828/Kconfig @@ -1,11 +1,9 @@ if TARGET_PM828 config SYS_BOARD - string default "pm828" config SYS_CONFIG_NAME - string default "PM828" endif diff --git a/board/pm828/MAINTAINERS b/board/pm828/MAINTAINERS index 767a84d..97c1ccc 100644 --- a/board/pm828/MAINTAINERS +++ b/board/pm828/MAINTAINERS @@ -1,5 +1,5 @@ PM828 BOARD -M: - +#M: - S: Maintained F: board/pm828/ F: include/configs/PM828.h diff --git a/board/ppcag/bg0900/Kconfig b/board/ppcag/bg0900/Kconfig index e4fb601..9d301c2 100644 --- a/board/ppcag/bg0900/Kconfig +++ b/board/ppcag/bg0900/Kconfig @@ -1,23 +1,18 @@ if TARGET_BG0900 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "bg0900" config SYS_VENDOR - string default "ppcag" config SYS_SOC - string default "mxs" config SYS_CONFIG_NAME - string default "bg0900" endif diff --git a/board/ppmc7xx/Kconfig b/board/ppmc7xx/Kconfig index a28ab98..f101940 100644 --- a/board/ppmc7xx/Kconfig +++ b/board/ppmc7xx/Kconfig @@ -1,11 +1,9 @@ if TARGET_PPMC7XX config SYS_BOARD - string default "ppmc7xx" config SYS_CONFIG_NAME - string default "ppmc7xx" endif diff --git a/board/ppmc7xx/MAINTAINERS b/board/ppmc7xx/MAINTAINERS index 5b21aa7..a0c1f44 100644 --- a/board/ppmc7xx/MAINTAINERS +++ b/board/ppmc7xx/MAINTAINERS @@ -1,5 +1,5 @@ PPMC7XX BOARD -M: - +#M: - S: Maintained F: board/ppmc7xx/ F: include/configs/ppmc7xx.h diff --git a/board/ppmc8260/Kconfig b/board/ppmc8260/Kconfig index e2e8793..1a6dcd3 100644 --- a/board/ppmc8260/Kconfig +++ b/board/ppmc8260/Kconfig @@ -1,11 +1,9 @@ if TARGET_PPMC8260 config SYS_BOARD - string default "ppmc8260" config SYS_CONFIG_NAME - string default "ppmc8260" endif diff --git a/board/ppmc8260/MAINTAINERS b/board/ppmc8260/MAINTAINERS index 768d092..8b896af 100644 --- a/board/ppmc8260/MAINTAINERS +++ b/board/ppmc8260/MAINTAINERS @@ -1,5 +1,5 @@ PPMC8260 BOARD -M: Brad Kemp +#M: Brad Kemp S: Orphan (since 2014-04) F: board/ppmc8260/ F: include/configs/ppmc8260.h diff --git a/board/pr1/Kconfig b/board/pr1/Kconfig index 2d80cd4..fb04648 100644 --- a/board/pr1/Kconfig +++ b/board/pr1/Kconfig @@ -1,11 +1,9 @@ if TARGET_PR1 config SYS_BOARD - string default "pr1" config SYS_CONFIG_NAME - string default "pr1" endif diff --git a/board/prodrive/alpr/Kconfig b/board/prodrive/alpr/Kconfig index 6e99fc7..543b455 100644 --- a/board/prodrive/alpr/Kconfig +++ b/board/prodrive/alpr/Kconfig @@ -1,15 +1,12 @@ if TARGET_ALPR config SYS_BOARD - string default "alpr" config SYS_VENDOR - string default "prodrive" config SYS_CONFIG_NAME - string default "alpr" endif diff --git a/board/prodrive/p3mx/Kconfig b/board/prodrive/p3mx/Kconfig index 89dcba0..28fb8bb 100644 --- a/board/prodrive/p3mx/Kconfig +++ b/board/prodrive/p3mx/Kconfig @@ -1,15 +1,12 @@ if TARGET_P3MX config SYS_BOARD - string default "p3mx" config SYS_VENDOR - string default "prodrive" config SYS_CONFIG_NAME - string default "p3mx" endif diff --git a/board/prodrive/p3p440/Kconfig b/board/prodrive/p3p440/Kconfig index a0eabe1..cf53aac 100644 --- a/board/prodrive/p3p440/Kconfig +++ b/board/prodrive/p3p440/Kconfig @@ -1,15 +1,12 @@ if TARGET_P3P440 config SYS_BOARD - string default "p3p440" config SYS_VENDOR - string default "prodrive" config SYS_CONFIG_NAME - string default "p3p440" endif diff --git a/board/pxa255_idp/Kconfig b/board/pxa255_idp/Kconfig index e231f28..e8b1d47 100644 --- a/board/pxa255_idp/Kconfig +++ b/board/pxa255_idp/Kconfig @@ -1,15 +1,12 @@ if TARGET_PXA255_IDP config SYS_CPU - string default "pxa" config SYS_BOARD - string default "pxa255_idp" config SYS_CONFIG_NAME - string default "pxa255_idp" endif diff --git a/board/qemu-mips/Kconfig b/board/qemu-mips/Kconfig index 0ca816d..e4d9663 100644 --- a/board/qemu-mips/Kconfig +++ b/board/qemu-mips/Kconfig @@ -1,15 +1,12 @@ if TARGET_QEMU_MIPS config SYS_CPU - string default "mips32" config SYS_BOARD - string default "qemu-mips" config SYS_CONFIG_NAME - string default "qemu-mips" endif @@ -17,15 +14,12 @@ endif if TARGET_QEMU_MIPS64 config SYS_CPU - string default "mips64" config SYS_BOARD - string default "qemu-mips" config SYS_CONFIG_NAME - string default "qemu-mips64" endif diff --git a/board/qemu-mips/MAINTAINERS b/board/qemu-mips/MAINTAINERS index 079949a..334f9d8 100644 --- a/board/qemu-mips/MAINTAINERS +++ b/board/qemu-mips/MAINTAINERS @@ -6,7 +6,7 @@ F: include/configs/qemu-mips.h F: configs/qemu_mips_defconfig QEMU_MIPSEL BOARD -M: - +#M: - S: Maintained F: configs/qemu_mipsel_defconfig F: include/configs/qemu-mips64.h diff --git a/board/r360mpi/Kconfig b/board/r360mpi/Kconfig index ea4614f..fe8484f 100644 --- a/board/r360mpi/Kconfig +++ b/board/r360mpi/Kconfig @@ -1,11 +1,9 @@ if TARGET_R360MPI config SYS_BOARD - string default "r360mpi" config SYS_CONFIG_NAME - string default "R360MPI" endif diff --git a/board/raidsonic/ib62x0/Kconfig b/board/raidsonic/ib62x0/Kconfig index c0c3a93..129aac8 100644 --- a/board/raidsonic/ib62x0/Kconfig +++ b/board/raidsonic/ib62x0/Kconfig @@ -1,15 +1,12 @@ if TARGET_IB62X0 config SYS_BOARD - string default "ib62x0" config SYS_VENDOR - string default "raidsonic" config SYS_CONFIG_NAME - string default "ib62x0" endif diff --git a/board/raspberrypi/rpi_b/Kconfig b/board/raspberrypi/rpi_b/Kconfig index 6e99c91..1a767b2 100644 --- a/board/raspberrypi/rpi_b/Kconfig +++ b/board/raspberrypi/rpi_b/Kconfig @@ -1,23 +1,18 @@ if TARGET_RPI_B config SYS_CPU - string default "arm1176" config SYS_BOARD - string default "rpi_b" config SYS_VENDOR - string default "raspberrypi" config SYS_SOC - string default "bcm2835" config SYS_CONFIG_NAME - string default "rpi_b" endif diff --git a/board/renesas/MigoR/Kconfig b/board/renesas/MigoR/Kconfig index d72a453..10dffed 100644 --- a/board/renesas/MigoR/Kconfig +++ b/board/renesas/MigoR/Kconfig @@ -1,19 +1,15 @@ if TARGET_MIGOR config SYS_CPU - string default "sh4" config SYS_BOARD - string default "MigoR" config SYS_VENDOR - string default "renesas" config SYS_CONFIG_NAME - string default "MigoR" endif diff --git a/board/renesas/MigoR/MAINTAINERS b/board/renesas/MigoR/MAINTAINERS index 9368b05..21ee5e2 100644 --- a/board/renesas/MigoR/MAINTAINERS +++ b/board/renesas/MigoR/MAINTAINERS @@ -1,5 +1,5 @@ MIGOR BOARD -M: - +#M: - S: Maintained F: board/renesas/MigoR/ F: include/configs/MigoR.h diff --git a/board/renesas/alt/Kconfig b/board/renesas/alt/Kconfig index dc01a38..957962d 100644 --- a/board/renesas/alt/Kconfig +++ b/board/renesas/alt/Kconfig @@ -1,15 +1,12 @@ if TARGET_ALT config SYS_BOARD - string default "alt" config SYS_VENDOR - string default "renesas" config SYS_CONFIG_NAME - string default "alt" endif diff --git a/board/renesas/ap325rxa/Kconfig b/board/renesas/ap325rxa/Kconfig index ac1e9ef..45bd600 100644 --- a/board/renesas/ap325rxa/Kconfig +++ b/board/renesas/ap325rxa/Kconfig @@ -1,19 +1,15 @@ if TARGET_AP325RXA config SYS_CPU - string default "sh4" config SYS_BOARD - string default "ap325rxa" config SYS_VENDOR - string default "renesas" config SYS_CONFIG_NAME - string default "ap325rxa" endif diff --git a/board/renesas/ecovec/Kconfig b/board/renesas/ecovec/Kconfig index d62389e..a24fe91 100644 --- a/board/renesas/ecovec/Kconfig +++ b/board/renesas/ecovec/Kconfig @@ -1,19 +1,15 @@ if TARGET_ECOVEC config SYS_CPU - string default "sh4" config SYS_BOARD - string default "ecovec" config SYS_VENDOR - string default "renesas" config SYS_CONFIG_NAME - string default "ecovec" endif diff --git a/board/renesas/koelsch/Kconfig b/board/renesas/koelsch/Kconfig index e7c6437..6475f02 100644 --- a/board/renesas/koelsch/Kconfig +++ b/board/renesas/koelsch/Kconfig @@ -1,15 +1,12 @@ if TARGET_KOELSCH config SYS_BOARD - string default "koelsch" config SYS_VENDOR - string default "renesas" config SYS_CONFIG_NAME - string default "koelsch" endif diff --git a/board/renesas/lager/Kconfig b/board/renesas/lager/Kconfig index 07dc98c..e990c20 100644 --- a/board/renesas/lager/Kconfig +++ b/board/renesas/lager/Kconfig @@ -1,15 +1,12 @@ if TARGET_LAGER config SYS_BOARD - string default "lager" config SYS_VENDOR - string default "renesas" config SYS_CONFIG_NAME - string default "lager" endif diff --git a/board/renesas/r0p7734/Kconfig b/board/renesas/r0p7734/Kconfig index 2eb1de2..bda785d 100644 --- a/board/renesas/r0p7734/Kconfig +++ b/board/renesas/r0p7734/Kconfig @@ -1,19 +1,15 @@ if TARGET_R0P7734 config SYS_CPU - string default "sh4" config SYS_BOARD - string default "r0p7734" config SYS_VENDOR - string default "renesas" config SYS_CONFIG_NAME - string default "r0p7734" endif diff --git a/board/renesas/r2dplus/Kconfig b/board/renesas/r2dplus/Kconfig index d674d77..c55c109 100644 --- a/board/renesas/r2dplus/Kconfig +++ b/board/renesas/r2dplus/Kconfig @@ -1,19 +1,15 @@ if TARGET_R2DPLUS config SYS_CPU - string default "sh4" config SYS_BOARD - string default "r2dplus" config SYS_VENDOR - string default "renesas" config SYS_CONFIG_NAME - string default "r2dplus" endif diff --git a/board/renesas/r7780mp/Kconfig b/board/renesas/r7780mp/Kconfig index a862f59..2d3cbec 100644 --- a/board/renesas/r7780mp/Kconfig +++ b/board/renesas/r7780mp/Kconfig @@ -1,19 +1,15 @@ if TARGET_R7780MP config SYS_CPU - string default "sh4" config SYS_BOARD - string default "r7780mp" config SYS_VENDOR - string default "renesas" config SYS_CONFIG_NAME - string default "r7780mp" endif diff --git a/board/renesas/rsk7203/Kconfig b/board/renesas/rsk7203/Kconfig index 61e9913..5eb2923 100644 --- a/board/renesas/rsk7203/Kconfig +++ b/board/renesas/rsk7203/Kconfig @@ -1,19 +1,15 @@ if TARGET_RSK7203 config SYS_CPU - string default "sh2" config SYS_BOARD - string default "rsk7203" config SYS_VENDOR - string default "renesas" config SYS_CONFIG_NAME - string default "rsk7203" endif diff --git a/board/renesas/rsk7264/Kconfig b/board/renesas/rsk7264/Kconfig index a32d3ca..af71295 100644 --- a/board/renesas/rsk7264/Kconfig +++ b/board/renesas/rsk7264/Kconfig @@ -1,19 +1,15 @@ if TARGET_RSK7264 config SYS_CPU - string default "sh2" config SYS_BOARD - string default "rsk7264" config SYS_VENDOR - string default "renesas" config SYS_CONFIG_NAME - string default "rsk7264" endif diff --git a/board/renesas/rsk7269/Kconfig b/board/renesas/rsk7269/Kconfig index c126fcb..cc0092c 100644 --- a/board/renesas/rsk7269/Kconfig +++ b/board/renesas/rsk7269/Kconfig @@ -1,19 +1,15 @@ if TARGET_RSK7269 config SYS_CPU - string default "sh2" config SYS_BOARD - string default "rsk7269" config SYS_VENDOR - string default "renesas" config SYS_CONFIG_NAME - string default "rsk7269" endif diff --git a/board/renesas/rsk7269/MAINTAINERS b/board/renesas/rsk7269/MAINTAINERS index d3c77c3..698fbdb 100644 --- a/board/renesas/rsk7269/MAINTAINERS +++ b/board/renesas/rsk7269/MAINTAINERS @@ -1,5 +1,5 @@ RSK7269 BOARD -M: - +#M: - S: Maintained F: board/renesas/rsk7269/ F: include/configs/rsk7269.h diff --git a/board/renesas/sh7752evb/Kconfig b/board/renesas/sh7752evb/Kconfig index 12e52b4..7c6aae9 100644 --- a/board/renesas/sh7752evb/Kconfig +++ b/board/renesas/sh7752evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_SH7752EVB config SYS_CPU - string default "sh4" config SYS_BOARD - string default "sh7752evb" config SYS_VENDOR - string default "renesas" config SYS_CONFIG_NAME - string default "sh7752evb" endif diff --git a/board/renesas/sh7752evb/MAINTAINERS b/board/renesas/sh7752evb/MAINTAINERS index 8910669..9840477 100644 --- a/board/renesas/sh7752evb/MAINTAINERS +++ b/board/renesas/sh7752evb/MAINTAINERS @@ -1,5 +1,5 @@ SH7752EVB BOARD -M: - +#M: - S: Maintained F: board/renesas/sh7752evb/ F: include/configs/sh7752evb.h diff --git a/board/renesas/sh7753evb/Kconfig b/board/renesas/sh7753evb/Kconfig index a1f4cd0..8abdea0 100644 --- a/board/renesas/sh7753evb/Kconfig +++ b/board/renesas/sh7753evb/Kconfig @@ -1,19 +1,15 @@ if TARGET_SH7753EVB config SYS_CPU - string default "sh4" config SYS_BOARD - string default "sh7753evb" config SYS_VENDOR - string default "renesas" config SYS_CONFIG_NAME - string default "sh7753evb" endif diff --git a/board/renesas/sh7753evb/MAINTAINERS b/board/renesas/sh7753evb/MAINTAINERS index 03e6c8c..b6c85ee 100644 --- a/board/renesas/sh7753evb/MAINTAINERS +++ b/board/renesas/sh7753evb/MAINTAINERS @@ -1,5 +1,5 @@ SH7753EVB BOARD -M: - +#M: - S: Maintained F: board/renesas/sh7753evb/ F: include/configs/sh7753evb.h diff --git a/board/renesas/sh7757lcr/Kconfig b/board/renesas/sh7757lcr/Kconfig index a0e3265..97d966f 100644 --- a/board/renesas/sh7757lcr/Kconfig +++ b/board/renesas/sh7757lcr/Kconfig @@ -1,19 +1,15 @@ if TARGET_SH7757LCR config SYS_CPU - string default "sh4" config SYS_BOARD - string default "sh7757lcr" config SYS_VENDOR - string default "renesas" config SYS_CONFIG_NAME - string default "sh7757lcr" endif diff --git a/board/renesas/sh7757lcr/MAINTAINERS b/board/renesas/sh7757lcr/MAINTAINERS index bbdd6d0..20aca67 100644 --- a/board/renesas/sh7757lcr/MAINTAINERS +++ b/board/renesas/sh7757lcr/MAINTAINERS @@ -1,5 +1,5 @@ SH7757LCR BOARD -M: - +#M: - S: Maintained F: board/renesas/sh7757lcr/ F: include/configs/sh7757lcr.h diff --git a/board/renesas/sh7763rdp/Kconfig b/board/renesas/sh7763rdp/Kconfig index fbc11af..d512988 100644 --- a/board/renesas/sh7763rdp/Kconfig +++ b/board/renesas/sh7763rdp/Kconfig @@ -1,19 +1,15 @@ if TARGET_SH7763RDP config SYS_CPU - string default "sh4" config SYS_BOARD - string default "sh7763rdp" config SYS_VENDOR - string default "renesas" config SYS_CONFIG_NAME - string default "sh7763rdp" endif diff --git a/board/renesas/sh7785lcr/Kconfig b/board/renesas/sh7785lcr/Kconfig index 8939f7d..15787e6 100644 --- a/board/renesas/sh7785lcr/Kconfig +++ b/board/renesas/sh7785lcr/Kconfig @@ -1,19 +1,15 @@ if TARGET_SH7785LCR config SYS_CPU - string default "sh4" config SYS_BOARD - string default "sh7785lcr" config SYS_VENDOR - string default "renesas" config SYS_CONFIG_NAME - string default "sh7785lcr" endif diff --git a/board/renesas/sh7785lcr/MAINTAINERS b/board/renesas/sh7785lcr/MAINTAINERS index 0d99de6..17578e0 100644 --- a/board/renesas/sh7785lcr/MAINTAINERS +++ b/board/renesas/sh7785lcr/MAINTAINERS @@ -1,5 +1,5 @@ SH7785LCR BOARD -M: - +#M: - S: Maintained F: board/renesas/sh7785lcr/ F: include/configs/sh7785lcr.h diff --git a/board/ronetix/pm9261/Kconfig b/board/ronetix/pm9261/Kconfig index 1cb9149..4a2ca02 100644 --- a/board/ronetix/pm9261/Kconfig +++ b/board/ronetix/pm9261/Kconfig @@ -1,23 +1,18 @@ if TARGET_PM9261 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "pm9261" config SYS_VENDOR - string default "ronetix" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "pm9261" endif diff --git a/board/ronetix/pm9263/Kconfig b/board/ronetix/pm9263/Kconfig index 292ccd6..9512919 100644 --- a/board/ronetix/pm9263/Kconfig +++ b/board/ronetix/pm9263/Kconfig @@ -1,23 +1,18 @@ if TARGET_PM9263 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "pm9263" config SYS_VENDOR - string default "ronetix" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "pm9263" endif diff --git a/board/ronetix/pm9g45/Kconfig b/board/ronetix/pm9g45/Kconfig index e60e9aa..0c0af96 100644 --- a/board/ronetix/pm9g45/Kconfig +++ b/board/ronetix/pm9g45/Kconfig @@ -1,23 +1,18 @@ if TARGET_PM9G45 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "pm9g45" config SYS_VENDOR - string default "ronetix" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "pm9g45" endif diff --git a/board/sacsng/Kconfig b/board/sacsng/Kconfig index f716a91..1646425 100644 --- a/board/sacsng/Kconfig +++ b/board/sacsng/Kconfig @@ -1,11 +1,9 @@ if TARGET_SACSNG config SYS_BOARD - string default "sacsng" config SYS_CONFIG_NAME - string default "sacsng" endif diff --git a/board/sacsng/MAINTAINERS b/board/sacsng/MAINTAINERS index c2c8ee3..b76e462 100644 --- a/board/sacsng/MAINTAINERS +++ b/board/sacsng/MAINTAINERS @@ -1,5 +1,5 @@ SACSNG BOARD -M: Jerry Van Baren +#M: Jerry Van Baren S: Orphan (since 2014-06) F: board/sacsng/ F: include/configs/sacsng.h diff --git a/board/samsung/arndale/Kconfig b/board/samsung/arndale/Kconfig index 5fdbacb..b620974 100644 --- a/board/samsung/arndale/Kconfig +++ b/board/samsung/arndale/Kconfig @@ -1,15 +1,12 @@ if TARGET_ARNDALE config SYS_BOARD - string default "arndale" config SYS_VENDOR - string default "samsung" config SYS_CONFIG_NAME - string default "arndale" endif diff --git a/board/samsung/arndale/MAINTAINERS b/board/samsung/arndale/MAINTAINERS index 0a01a07..7dc1785 100644 --- a/board/samsung/arndale/MAINTAINERS +++ b/board/samsung/arndale/MAINTAINERS @@ -1,5 +1,5 @@ ARNDALE BOARD -M: Inderpal Singh +M: Chander Kashyap S: Maintained F: board/samsung/arndale/ F: include/configs/arndale.h diff --git a/board/samsung/common/board.c b/board/samsung/common/board.c index 9dc7c83..5c3c5bb 100644 --- a/board/samsung/common/board.c +++ b/board/samsung/common/board.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -137,7 +138,9 @@ static int board_uart_init(void) int board_early_init_f(void) { int err; - +#ifdef CONFIG_BOARD_TYPES + set_board_type(); +#endif err = board_uart_init(); if (err) { debug("UART init failed\n"); @@ -148,6 +151,20 @@ int board_early_init_f(void) board_i2c_init(gd->fdt_blob); #endif +#if defined(CONFIG_OF_CONTROL) && defined(CONFIG_EXYNOS_FB) +/* + * board_init_f(arch/arm/lib/board.c) calls lcd_setmem() which needs + * panel_info.vl_col, panel_info.vl_row and panel_info.vl_bpix, to reserve + * FB memory at a very early stage. So, we need to fill panel_info.vl_col, + * panel_info.vl_row and panel_info.vl_bpix before lcd_setmem() is called. + */ + err = exynos_lcd_early_init(gd->fdt_blob); + if (err) { + debug("LCD early init failed\n"); + return err; + } +#endif + return exynos_early_init_f(); } #endif @@ -240,22 +257,39 @@ int board_eth_init(bd_t *bis) } #ifdef CONFIG_GENERIC_MMC -int board_mmc_init(bd_t *bis) +static int init_mmc(void) +{ +#ifdef CONFIG_SDHCI + return exynos_mmc_init(gd->fdt_blob); +#else + return 0; +#endif +} + +static int init_dwmmc(void) { - int ret; #ifdef CONFIG_DWMMC - /* dwmmc initializattion for available channels */ - ret = exynos_dwmmc_init(gd->fdt_blob); - if (ret) - debug("dwmmc init failed\n"); + return exynos_dwmmc_init(gd->fdt_blob); +#else + return 0; #endif +} + +int board_mmc_init(bd_t *bis) +{ + int ret; + + if (get_boot_mode() == BOOT_MODE_SD) { + ret = init_mmc(); + ret |= init_dwmmc(); + } else { + ret = init_dwmmc(); + ret |= init_mmc(); + } -#ifdef CONFIG_SDHCI - /* mmc initializattion for available channels */ - ret = exynos_mmc_init(gd->fdt_blob); if (ret) debug("mmc init failed\n"); -#endif + return ret; } #endif @@ -263,11 +297,15 @@ int board_mmc_init(bd_t *bis) #ifdef CONFIG_DISPLAY_BOARDINFO int checkboard(void) { - const char *board_name; + const char *board_info; - board_name = fdt_getprop(gd->fdt_blob, 0, "model", NULL); - printf("Board: %s\n", board_name ? board_name : "unknown"); + board_info = fdt_getprop(gd->fdt_blob, 0, "model", NULL); + printf("Board: %s\n", board_info ? board_info : "unknown"); +#ifdef CONFIG_BOARD_TYPES + board_info = get_board_type(); + printf("Model: %s\n", board_info ? board_info : "unknown"); +#endif return 0; } #endif @@ -307,6 +345,9 @@ int arch_early_init_r(void) #ifdef CONFIG_MISC_INIT_R int misc_init_r(void) { +#ifdef CONFIG_SET_DFU_ALT_INFO + set_dfu_alt_info(); +#endif #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG set_board_info(); #endif diff --git a/board/samsung/common/misc.c b/board/samsung/common/misc.c index 03106fd..8766f0c 100644 --- a/board/samsung/common/misc.c +++ b/board/samsung/common/misc.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -21,13 +22,53 @@ DECLARE_GLOBAL_DATA_PTR; +#ifdef CONFIG_SET_DFU_ALT_INFO +void set_dfu_alt_info(void) +{ + size_t buf_size = CONFIG_SET_DFU_ALT_BUF_LEN; + ALLOC_CACHE_ALIGN_BUFFER(char, buf, buf_size); + char *alt_info = "Settings not found!"; + char *status = "error!\n"; + char *alt_setting; + char *alt_sep; + int offset = 0; + + puts("DFU alt info setting: "); + + alt_setting = get_dfu_alt_boot(); + if (alt_setting) { + setenv("dfu_alt_boot", alt_setting); + offset = snprintf(buf, buf_size, "%s", alt_setting); + } + + alt_setting = get_dfu_alt_system(); + if (alt_setting) { + if (offset) + alt_sep = ";"; + else + alt_sep = ""; + + offset += snprintf(buf + offset, buf_size - offset, + "%s%s", alt_sep, alt_setting); + } + + if (offset) { + alt_info = buf; + status = "done\n"; + } + + setenv("dfu_alt_info", alt_info); + puts(status); +} +#endif + #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG void set_board_info(void) { char info[64]; - snprintf(info, ARRAY_SIZE(info), "%d.%d", s5p_cpu_rev & 0x0f, - (s5p_cpu_rev & 0xf0) >> 0x04); + snprintf(info, ARRAY_SIZE(info), "%u.%u", (s5p_cpu_rev & 0xf0) >> 4, + s5p_cpu_rev & 0xf); setenv("soc_rev", info); snprintf(info, ARRAY_SIZE(info), "%x", s5p_cpu_id); @@ -38,8 +79,16 @@ void set_board_info(void) setenv("board_rev", info); #endif #ifdef CONFIG_OF_LIBFDT - snprintf(info, ARRAY_SIZE(info), "%s%x-%s.dtb", - CONFIG_SYS_SOC, s5p_cpu_id, CONFIG_SYS_BOARD); + const char *bdtype = ""; + const char *bdname = CONFIG_SYS_BOARD; + +#ifdef CONFIG_BOARD_TYPES + bdtype = get_board_type(); + sprintf(info, "%s%s", bdname, bdtype); + setenv("boardname", info); +#endif + snprintf(info, ARRAY_SIZE(info), "%s%x-%s%s.dtb", + CONFIG_SYS_SOC, s5p_cpu_id, bdname, bdtype); setenv("fdtfile", info); #endif } diff --git a/board/samsung/goni/Kconfig b/board/samsung/goni/Kconfig index 0be535e..a320c2b 100644 --- a/board/samsung/goni/Kconfig +++ b/board/samsung/goni/Kconfig @@ -1,23 +1,18 @@ if TARGET_S5P_GONI config SYS_CPU - string default "armv7" config SYS_BOARD - string default "goni" config SYS_VENDOR - string default "samsung" config SYS_SOC - string default "s5pc1xx" config SYS_CONFIG_NAME - string default "s5p_goni" endif diff --git a/board/samsung/odroid/Kconfig b/board/samsung/odroid/Kconfig new file mode 100644 index 0000000..8b52a0d --- /dev/null +++ b/board/samsung/odroid/Kconfig @@ -0,0 +1,12 @@ +if TARGET_ODROID + +config SYS_BOARD + default "odroid" + +config SYS_VENDOR + default "samsung" + +config SYS_CONFIG_NAME + default "odroid" + +endif diff --git a/board/samsung/odroid/MAINTAINERS b/board/samsung/odroid/MAINTAINERS new file mode 100644 index 0000000..2131d36 --- /dev/null +++ b/board/samsung/odroid/MAINTAINERS @@ -0,0 +1,6 @@ +ODROID BOARD +M: Przemyslaw Marczak +S: Maintained +F: board/samsung/odroid/ +F: include/configs/odroid.h +F: configs/odroid_defconfig diff --git a/board/samsung/odroid/Makefile b/board/samsung/odroid/Makefile new file mode 100644 index 0000000..b98aaeb --- /dev/null +++ b/board/samsung/odroid/Makefile @@ -0,0 +1,8 @@ +# +# Copyright (c) 2014 Samsung Electronics Co., Ltd. All rights reserved. +# Przemyslaw Marczak +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := odroid.o diff --git a/board/samsung/odroid/odroid.c b/board/samsung/odroid/odroid.c new file mode 100644 index 0000000..fd5d2d2 --- /dev/null +++ b/board/samsung/odroid/odroid.c @@ -0,0 +1,470 @@ +/* + * Copyright (C) 2014 Samsung Electronics + * Przemyslaw Marczak + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "setup.h" + +DECLARE_GLOBAL_DATA_PTR; + +#ifdef CONFIG_BOARD_TYPES +/* Odroid board types */ +enum { + ODROID_TYPE_U3, + ODROID_TYPE_X2, + ODROID_TYPES, +}; + +void set_board_type(void) +{ + /* Set GPA1 pin 1 to HI - enable XCL205 output */ + writel(XCL205_EN_GPIO_CON_CFG, XCL205_EN_GPIO_CON); + writel(XCL205_EN_GPIO_DAT_CFG, XCL205_EN_GPIO_CON + 0x4); + writel(XCL205_EN_GPIO_PUD_CFG, XCL205_EN_GPIO_CON + 0x8); + writel(XCL205_EN_GPIO_DRV_CFG, XCL205_EN_GPIO_CON + 0xc); + + /* Set GPC1 pin 2 to IN - check XCL205 output state */ + writel(XCL205_STATE_GPIO_CON_CFG, XCL205_STATE_GPIO_CON); + writel(XCL205_STATE_GPIO_PUD_CFG, XCL205_STATE_GPIO_CON + 0x8); + + /* XCL205 - needs some latch time */ + sdelay(200000); + + /* Check GPC1 pin2 - LED supplied by XCL205 - X2 only */ + if (readl(XCL205_STATE_GPIO_DAT) & (1 << XCL205_STATE_GPIO_PIN)) + gd->board_type = ODROID_TYPE_X2; + else + gd->board_type = ODROID_TYPE_U3; +} + +const char *get_board_type(void) +{ + const char *board_type[] = {"u3", "x2"}; + + return board_type[gd->board_type]; +} +#endif + +#ifdef CONFIG_SET_DFU_ALT_INFO +char *get_dfu_alt_system(void) +{ + return getenv("dfu_alt_system"); +} + +char *get_dfu_alt_boot(void) +{ + char *alt_boot; + + switch (get_boot_mode()) { + case BOOT_MODE_SD: + alt_boot = CONFIG_DFU_ALT_BOOT_SD; + break; + case BOOT_MODE_EMMC: + case BOOT_MODE_EMMC_SD: + alt_boot = CONFIG_DFU_ALT_BOOT_EMMC; + break; + default: + alt_boot = NULL; + break; + } + return alt_boot; +} +#endif + +static void board_clock_init(void) +{ + unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; + struct exynos4x12_clock *clk = (struct exynos4x12_clock *) + samsung_get_base_clock(); + + /* + * CMU_CPU clocks src to MPLL + * Bit values: 0 ; 1 + * MUX_APLL_SEL: FIN_PLL ; FOUT_APLL + * MUX_CORE_SEL: MOUT_APLL ; SCLK_MPLL + * MUX_HPM_SEL: MOUT_APLL ; SCLK_MPLL_USER_C + * MUX_MPLL_USER_SEL_C: FIN_PLL ; SCLK_MPLL + */ + clr_src_cpu = MUX_APLL_SEL(1) | MUX_CORE_SEL(1) | + MUX_HPM_SEL(1) | MUX_MPLL_USER_SEL_C(1); + set = MUX_APLL_SEL(0) | MUX_CORE_SEL(1) | MUX_HPM_SEL(1) | + MUX_MPLL_USER_SEL_C(1); + + clrsetbits_le32(&clk->src_cpu, clr_src_cpu, set); + + /* Wait for mux change */ + while (readl(&clk->mux_stat_cpu) & MUX_STAT_CPU_CHANGING) + continue; + + /* Set APLL to 1000MHz */ + clr_pll_con0 = SDIV(7) | PDIV(63) | MDIV(1023) | FSEL(1); + set = SDIV(0) | PDIV(3) | MDIV(125) | FSEL(1); + + clrsetbits_le32(&clk->apll_con0, clr_pll_con0, set); + + /* Wait for PLL to be locked */ + while (!(readl(&clk->apll_con0) & PLL_LOCKED_BIT)) + continue; + + /* Set CMU_CPU clocks src to APLL */ + set = MUX_APLL_SEL(1) | MUX_CORE_SEL(0) | MUX_HPM_SEL(0) | + MUX_MPLL_USER_SEL_C(1); + clrsetbits_le32(&clk->src_cpu, clr_src_cpu, set); + + /* Wait for mux change */ + while (readl(&clk->mux_stat_cpu) & MUX_STAT_CPU_CHANGING) + continue; + + set = CORE_RATIO(0) | COREM0_RATIO(2) | COREM1_RATIO(5) | + PERIPH_RATIO(0) | ATB_RATIO(4) | PCLK_DBG_RATIO(1) | + APLL_RATIO(0) | CORE2_RATIO(0); + /* + * Set dividers for MOUTcore = 1000 MHz + * coreout = MOUT / (ratio + 1) = 1000 MHz (0) + * corem0 = armclk / (ratio + 1) = 333 MHz (2) + * corem1 = armclk / (ratio + 1) = 166 MHz (5) + * periph = armclk / (ratio + 1) = 1000 MHz (0) + * atbout = MOUT / (ratio + 1) = 200 MHz (4) + * pclkdbgout = atbout / (ratio + 1) = 100 MHz (1) + * sclkapll = MOUTapll / (ratio + 1) = 1000 MHz (0) + * core2out = core_out / (ratio + 1) = 1000 MHz (0) (armclk) + */ + clr = CORE_RATIO(7) | COREM0_RATIO(7) | COREM1_RATIO(7) | + PERIPH_RATIO(7) | ATB_RATIO(7) | PCLK_DBG_RATIO(7) | + APLL_RATIO(7) | CORE2_RATIO(7); + + clrsetbits_le32(&clk->div_cpu0, clr, set); + + /* Wait for divider ready status */ + while (readl(&clk->div_stat_cpu0) & DIV_STAT_CPU0_CHANGING) + continue; + + /* + * For MOUThpm = 1000 MHz (MOUTapll) + * doutcopy = MOUThpm / (ratio + 1) = 200 (4) + * sclkhpm = doutcopy / (ratio + 1) = 200 (4) + * cores_out = armclk / (ratio + 1) = 1000 (0) + */ + clr = COPY_RATIO(7) | HPM_RATIO(7) | CORES_RATIO(7); + set = COPY_RATIO(4) | HPM_RATIO(4) | CORES_RATIO(0); + + clrsetbits_le32(&clk->div_cpu1, clr, set); + + /* Wait for divider ready status */ + while (readl(&clk->div_stat_cpu1) & DIV_STAT_CPU1_CHANGING) + continue; + + /* + * Set CMU_DMC clocks src to APLL + * Bit values: 0 ; 1 + * MUX_C2C_SEL: SCLKMPLL ; SCLKAPLL + * MUX_DMC_BUS_SEL: SCLKMPLL ; SCLKAPLL + * MUX_DPHY_SEL: SCLKMPLL ; SCLKAPLL + * MUX_MPLL_SEL: FINPLL ; MOUT_MPLL_FOUT + * MUX_PWI_SEL: 0110 (MPLL); 0111 (EPLL); 1000 (VPLL); 0(XXTI) + * MUX_G2D_ACP0_SEL: SCLKMPLL ; SCLKAPLL + * MUX_G2D_ACP1_SEL: SCLKEPLL ; SCLKVPLL + * MUX_G2D_ACP_SEL: OUT_ACP0 ; OUT_ACP1 + */ + clr_src_dmc = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | + MUX_DPHY_SEL(1) | MUX_MPLL_SEL(1) | + MUX_PWI_SEL(15) | MUX_G2D_ACP0_SEL(1) | + MUX_G2D_ACP1_SEL(1) | MUX_G2D_ACP_SEL(1); + set = MUX_C2C_SEL(1) | MUX_DMC_BUS_SEL(1) | MUX_DPHY_SEL(1) | + MUX_MPLL_SEL(0) | MUX_PWI_SEL(0) | MUX_G2D_ACP0_SEL(1) | + MUX_G2D_ACP1_SEL(1) | MUX_G2D_ACP_SEL(1); + + clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); + + /* Wait for mux change */ + while (readl(&clk->mux_stat_dmc) & MUX_STAT_DMC_CHANGING) + continue; + + /* Set MPLL to 880MHz */ + set = SDIV(0) | PDIV(3) | MDIV(110) | FSEL(0) | PLL_ENABLE(1); + + clrsetbits_le32(&clk->mpll_con0, clr_pll_con0, set); + + /* Wait for PLL to be locked */ + while (!(readl(&clk->mpll_con0) & PLL_LOCKED_BIT)) + continue; + + /* Switch back CMU_DMC mux */ + set = MUX_C2C_SEL(0) | MUX_DMC_BUS_SEL(0) | MUX_DPHY_SEL(0) | + MUX_MPLL_SEL(1) | MUX_PWI_SEL(8) | MUX_G2D_ACP0_SEL(0) | + MUX_G2D_ACP1_SEL(0) | MUX_G2D_ACP_SEL(0); + + clrsetbits_le32(&clk->src_dmc, clr_src_dmc, set); + + /* Wait for mux change */ + while (readl(&clk->mux_stat_dmc) & MUX_STAT_DMC_CHANGING) + continue; + + /* CLK_DIV_DMC0 */ + clr = ACP_RATIO(7) | ACP_PCLK_RATIO(7) | DPHY_RATIO(7) | + DMC_RATIO(7) | DMCD_RATIO(7) | DMCP_RATIO(7); + /* + * For: + * MOUTdmc = 880 MHz + * MOUTdphy = 880 MHz + * + * aclk_acp = MOUTdmc / (ratio + 1) = 220 (3) + * pclk_acp = aclk_acp / (ratio + 1) = 110 (1) + * sclk_dphy = MOUTdphy / (ratio + 1) = 440 (1) + * sclk_dmc = MOUTdmc / (ratio + 1) = 440 (1) + * aclk_dmcd = sclk_dmc / (ratio + 1) = 220 (1) + * aclk_dmcp = aclk_dmcd / (ratio + 1) = 110 (1) + */ + set = ACP_RATIO(3) | ACP_PCLK_RATIO(1) | DPHY_RATIO(1) | + DMC_RATIO(1) | DMCD_RATIO(1) | DMCP_RATIO(1); + + clrsetbits_le32(&clk->div_dmc0, clr, set); + + /* Wait for divider ready status */ + while (readl(&clk->div_stat_dmc0) & DIV_STAT_DMC0_CHANGING) + continue; + + /* CLK_DIV_DMC1 */ + clr = G2D_ACP_RATIO(15) | C2C_RATIO(7) | PWI_RATIO(15) | + C2C_ACLK_RATIO(7) | DVSEM_RATIO(127) | DPM_RATIO(127); + /* + * For: + * MOUTg2d = 880 MHz + * MOUTc2c = 880 Mhz + * MOUTpwi = 108 MHz + * + * sclk_g2d_acp = MOUTg2d / (ratio + 1) = 440 (1) + * sclk_c2c = MOUTc2c / (ratio + 1) = 440 (1) + * aclk_c2c = sclk_c2c / (ratio + 1) = 220 (1) + * sclk_pwi = MOUTpwi / (ratio + 1) = 18 (5) + */ + set = G2D_ACP_RATIO(1) | C2C_RATIO(1) | PWI_RATIO(5) | + C2C_ACLK_RATIO(1) | DVSEM_RATIO(1) | DPM_RATIO(1); + + clrsetbits_le32(&clk->div_dmc1, clr, set); + + /* Wait for divider ready status */ + while (readl(&clk->div_stat_dmc1) & DIV_STAT_DMC1_CHANGING) + continue; + + /* CLK_SRC_PERIL0 */ + clr = UART0_SEL(15) | UART1_SEL(15) | UART2_SEL(15) | + UART3_SEL(15) | UART4_SEL(15); + /* + * Set CLK_SRC_PERIL0 clocks src to MPLL + * src values: 0(XXTI); 1(XusbXTI); 2(SCLK_HDMI24M); 3(SCLK_USBPHY0); + * 5(SCLK_HDMIPHY); 6(SCLK_MPLL_USER_T); 7(SCLK_EPLL); + * 8(SCLK_VPLL) + * + * Set all to SCLK_MPLL_USER_T + */ + set = UART0_SEL(6) | UART1_SEL(6) | UART2_SEL(6) | UART3_SEL(6) | + UART4_SEL(6); + + clrsetbits_le32(&clk->src_peril0, clr, set); + + /* CLK_DIV_PERIL0 */ + clr = UART0_RATIO(15) | UART1_RATIO(15) | UART2_RATIO(15) | + UART3_RATIO(15) | UART4_RATIO(15); + /* + * For MOUTuart0-4: 880MHz + * + * SCLK_UARTx = MOUTuartX / (ratio + 1) = 110 (7) + */ + set = UART0_RATIO(7) | UART1_RATIO(7) | UART2_RATIO(7) | + UART3_RATIO(7) | UART4_RATIO(7); + + clrsetbits_le32(&clk->div_peril0, clr, set); + + while (readl(&clk->div_stat_peril0) & DIV_STAT_PERIL0_CHANGING) + continue; + + /* CLK_DIV_FSYS1 */ + clr = MMC0_RATIO(15) | MMC0_PRE_RATIO(255) | MMC1_RATIO(15) | + MMC1_PRE_RATIO(255); + /* + * For MOUTmmc0-3 = 880 MHz (MPLL) + * + * DOUTmmc1 = MOUTmmc1 / (ratio + 1) = 110 (7) + * sclk_mmc1 = DOUTmmc1 / (ratio + 1) = 60 (1) + * DOUTmmc0 = MOUTmmc0 / (ratio + 1) = 110 (7) + * sclk_mmc0 = DOUTmmc0 / (ratio + 1) = 60 (1) + */ + set = MMC0_RATIO(7) | MMC0_PRE_RATIO(1) | MMC1_RATIO(7) | + MMC1_PRE_RATIO(1); + + clrsetbits_le32(&clk->div_fsys1, clr, set); + + /* Wait for divider ready status */ + while (readl(&clk->div_stat_fsys1) & DIV_STAT_FSYS1_CHANGING) + continue; + + /* CLK_DIV_FSYS2 */ + clr = MMC2_RATIO(15) | MMC2_PRE_RATIO(255) | MMC3_RATIO(15) | + MMC3_PRE_RATIO(255); + /* + * For MOUTmmc0-3 = 880 MHz (MPLL) + * + * DOUTmmc3 = MOUTmmc3 / (ratio + 1) = 110 (7) + * sclk_mmc3 = DOUTmmc3 / (ratio + 1) = 60 (1) + * DOUTmmc2 = MOUTmmc2 / (ratio + 1) = 110 (7) + * sclk_mmc2 = DOUTmmc2 / (ratio + 1) = 60 (1) + */ + set = MMC2_RATIO(7) | MMC2_PRE_RATIO(1) | MMC3_RATIO(7) | + MMC3_PRE_RATIO(1); + + clrsetbits_le32(&clk->div_fsys2, clr, set); + + /* Wait for divider ready status */ + while (readl(&clk->div_stat_fsys2) & DIV_STAT_FSYS2_CHANGING) + continue; + + /* CLK_DIV_FSYS3 */ + clr = MMC4_RATIO(15) | MMC4_PRE_RATIO(255); + /* + * For MOUTmmc4 = 880 MHz (MPLL) + * + * DOUTmmc4 = MOUTmmc4 / (ratio + 1) = 110 (7) + * sclk_mmc4 = DOUTmmc4 / (ratio + 1) = 110 (0) + */ + set = MMC4_RATIO(7) | MMC4_PRE_RATIO(0); + + clrsetbits_le32(&clk->div_fsys3, clr, set); + + /* Wait for divider ready status */ + while (readl(&clk->div_stat_fsys3) & DIV_STAT_FSYS3_CHANGING) + continue; + + return; +} + +static void board_gpio_init(void) +{ + /* eMMC Reset Pin */ + gpio_cfg_pin(EXYNOS4X12_GPIO_K12, S5P_GPIO_FUNC(0x1)); + gpio_set_pull(EXYNOS4X12_GPIO_K12, S5P_GPIO_PULL_NONE); + gpio_set_drv(EXYNOS4X12_GPIO_K12, S5P_GPIO_DRV_4X); + + /* Enable FAN (Odroid U3) */ + gpio_set_pull(EXYNOS4X12_GPIO_D00, S5P_GPIO_PULL_UP); + gpio_set_drv(EXYNOS4X12_GPIO_D00, S5P_GPIO_DRV_4X); + gpio_direction_output(EXYNOS4X12_GPIO_D00, 1); + + /* OTG Vbus output (Odroid U3+) */ + gpio_set_pull(EXYNOS4X12_GPIO_L20, S5P_GPIO_PULL_NONE); + gpio_set_drv(EXYNOS4X12_GPIO_L20, S5P_GPIO_DRV_4X); + gpio_direction_output(EXYNOS4X12_GPIO_L20, 0); + + /* OTG INT (Odroid U3+) */ + gpio_set_pull(EXYNOS4X12_GPIO_X31, S5P_GPIO_PULL_UP); + gpio_set_drv(EXYNOS4X12_GPIO_X31, S5P_GPIO_DRV_4X); + gpio_direction_input(EXYNOS4X12_GPIO_X31); +} + +static int pmic_init_max77686(void) +{ + struct pmic *p = pmic_get("MAX77686_PMIC"); + + if (pmic_probe(p)) + return -ENODEV; + + /* Set LDO Voltage */ + max77686_set_ldo_voltage(p, 20, 1800000); /* LDO20 eMMC */ + max77686_set_ldo_voltage(p, 21, 2800000); /* LDO21 SD */ + max77686_set_ldo_voltage(p, 22, 2800000); /* LDO22 eMMC */ + + return 0; +} + +#ifdef CONFIG_SYS_I2C_INIT_BOARD +static void board_init_i2c(void) +{ + /* I2C_0 */ + if (exynos_pinmux_config(PERIPH_ID_I2C0, PINMUX_FLAG_NONE)) + debug("I2C%d not configured\n", (I2C_0)); +} +#endif + +int exynos_early_init_f(void) +{ + board_clock_init(); + board_gpio_init(); + + return 0; +} + +int exynos_init(void) +{ + /* The last MB of memory is reserved for secure firmware */ + gd->ram_size -= SZ_1M; + gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS - 1].size -= SZ_1M; + + return 0; +} + +int exynos_power_init(void) +{ +#ifdef CONFIG_SYS_I2C_INIT_BOARD + board_init_i2c(); +#endif + pmic_init(I2C_0); + pmic_init_max77686(); + + return 0; +} + +#ifdef CONFIG_USB_GADGET +static int s5pc210_phy_control(int on) +{ + struct pmic *p_pmic; + + p_pmic = pmic_get("MAX77686_PMIC"); + if (!p_pmic) + return -ENODEV; + + if (pmic_probe(p_pmic)) + return -1; + + if (on) + return max77686_set_ldo_mode(p_pmic, 12, OPMODE_ON); + else + return max77686_set_ldo_mode(p_pmic, 12, OPMODE_LPM); +} + +struct s3c_plat_otg_data s5pc210_otg_data = { + .phy_control = s5pc210_phy_control, + .regs_phy = EXYNOS4X12_USBPHY_BASE, + .regs_otg = EXYNOS4X12_USBOTG_BASE, + .usb_phy_ctrl = EXYNOS4X12_USBPHY_CONTROL, + .usb_flags = PHY0_SLEEP, +}; + +int board_usb_init(int index, enum usb_init_type init) +{ + debug("USB_udc_probe\n"); + return s3c_udc_probe(&s5pc210_otg_data); +} +#endif + +void reset_misc(void) +{ + /* Reset eMMC*/ + gpio_set_value(EXYNOS4X12_GPIO_K12, 0); + mdelay(10); + gpio_set_value(EXYNOS4X12_GPIO_K12, 1); +} diff --git a/board/samsung/odroid/setup.h b/board/samsung/odroid/setup.h new file mode 100644 index 0000000..3e48dad --- /dev/null +++ b/board/samsung/odroid/setup.h @@ -0,0 +1,255 @@ +/* + * Copyright (C) 2014 Samsung Electronics + * Przemyslaw Marczak + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __ODROIDU3_SETUP__ +#define __ODROIDU3_SETUP__ + +/* A/M PLL_CON0 */ +#define SDIV(x) ((x) & 0x7) +#define PDIV(x) (((x) & 0x3f) << 8) +#define MDIV(x) (((x) & 0x3ff) << 16) +#define FSEL(x) (((x) & 0x1) << 27) +#define PLL_LOCKED_BIT (0x1 << 29) +#define PLL_ENABLE(x) (((x) & 0x1) << 31) + +/* CLK_SRC_CPU */ +#define MUX_APLL_SEL(x) ((x) & 0x1) +#define MUX_CORE_SEL(x) (((x) & 0x1) << 16) +#define MUX_HPM_SEL(x) (((x) & 0x1) << 20) +#define MUX_MPLL_USER_SEL_C(x) (((x) & 0x1) << 24) + +#define MUX_STAT_CHANGING 0x100 + +/* CLK_MUX_STAT_CPU */ +#define APLL_SEL(x) ((x) & 0x7) +#define CORE_SEL(x) (((x) & 0x7) << 16) +#define HPM_SEL(x) (((x) & 0x7) << 20) +#define MPLL_USER_SEL_C(x) (((x) & 0x7) << 24) +#define MUX_STAT_CPU_CHANGING (APLL_SEL(MUX_STAT_CHANGING) | \ + CORE_SEL(MUX_STAT_CHANGING) | \ + HPM_SEL(MUX_STAT_CHANGING) | \ + MPLL_USER_SEL_C(MUX_STAT_CHANGING)) + +/* CLK_DIV_CPU0 */ +#define CORE_RATIO(x) ((x) & 0x7) +#define COREM0_RATIO(x) (((x) & 0x7) << 4) +#define COREM1_RATIO(x) (((x) & 0x7) << 8) +#define PERIPH_RATIO(x) (((x) & 0x7) << 12) +#define ATB_RATIO(x) (((x) & 0x7) << 16) +#define PCLK_DBG_RATIO(x) (((x) & 0x7) << 20) +#define APLL_RATIO(x) (((x) & 0x7) << 24) +#define CORE2_RATIO(x) (((x) & 0x7) << 28) + +/* CLK_DIV_STAT_CPU0 */ +#define DIV_CORE(x) ((x) & 0x1) +#define DIV_COREM0(x) (((x) & 0x1) << 4) +#define DIV_COREM1(x) (((x) & 0x1) << 8) +#define DIV_PERIPH(x) (((x) & 0x1) << 12) +#define DIV_ATB(x) (((x) & 0x1) << 16) +#define DIV_PCLK_DBG(x) (((x) & 0x1) << 20) +#define DIV_APLL(x) (((x) & 0x1) << 24) +#define DIV_CORE2(x) (((x) & 0x1) << 28) + +#define DIV_STAT_CHANGING 0x1 +#define DIV_STAT_CPU0_CHANGING (DIV_CORE(DIV_STAT_CHANGING) | \ + DIV_COREM0(DIV_STAT_CHANGING) | \ + DIV_COREM1(DIV_STAT_CHANGING) | \ + DIV_PERIPH(DIV_STAT_CHANGING) | \ + DIV_ATB(DIV_STAT_CHANGING) | \ + DIV_PCLK_DBG(DIV_STAT_CHANGING) | \ + DIV_APLL(DIV_STAT_CHANGING) | \ + DIV_CORE2(DIV_STAT_CHANGING)) + +/* CLK_DIV_CPU1 */ +#define COPY_RATIO(x) ((x) & 0x7) +#define HPM_RATIO(x) (((x) & 0x7) << 4) +#define CORES_RATIO(x) (((x) & 0x7) << 8) + +/* CLK_DIV_STAT_CPU1 */ +#define DIV_COPY(x) ((x) & 0x7) +#define DIV_HPM(x) (((x) & 0x1) << 4) +#define DIV_CORES(x) (((x) & 0x1) << 8) + +#define DIV_STAT_CPU1_CHANGING (DIV_COPY(DIV_STAT_CHANGING) | \ + DIV_HPM(DIV_STAT_CHANGING) | \ + DIV_CORES(DIV_STAT_CHANGING)) + +/* CLK_SRC_DMC */ +#define MUX_C2C_SEL(x) ((x) & 0x1) +#define MUX_DMC_BUS_SEL(x) (((x) & 0x1) << 4) +#define MUX_DPHY_SEL(x) (((x) & 0x1) << 8) +#define MUX_MPLL_SEL(x) (((x) & 0x1) << 12) +#define MUX_PWI_SEL(x) (((x) & 0xf) << 16) +#define MUX_G2D_ACP0_SEL(x) (((x) & 0x1) << 20) +#define MUX_G2D_ACP1_SEL(x) (((x) & 0x1) << 24) +#define MUX_G2D_ACP_SEL(x) (((x) & 0x1) << 28) + +/* CLK_MUX_STAT_DMC */ +#define C2C_SEL(x) (((x)) & 0x7) +#define DMC_BUS_SEL(x) (((x) & 0x7) << 4) +#define DPHY_SEL(x) (((x) & 0x7) << 8) +#define MPLL_SEL(x) (((x) & 0x7) << 12) +/* #define PWI_SEL(x) (((x) & 0xf) << 16) - Reserved */ +#define G2D_ACP0_SEL(x) (((x) & 0x7) << 20) +#define G2D_ACP1_SEL(x) (((x) & 0x7) << 24) +#define G2D_ACP_SEL(x) (((x) & 0x7) << 28) + +#define MUX_STAT_DMC_CHANGING (C2C_SEL(MUX_STAT_CHANGING) | \ + DMC_BUS_SEL(MUX_STAT_CHANGING) | \ + DPHY_SEL(MUX_STAT_CHANGING) | \ + MPLL_SEL(MUX_STAT_CHANGING) |\ + G2D_ACP0_SEL(MUX_STAT_CHANGING) | \ + G2D_ACP1_SEL(MUX_STAT_CHANGING) | \ + G2D_ACP_SEL(MUX_STAT_CHANGING)) + +/* CLK_DIV_DMC0 */ +#define ACP_RATIO(x) ((x) & 0x7) +#define ACP_PCLK_RATIO(x) (((x) & 0x7) << 4) +#define DPHY_RATIO(x) (((x) & 0x7) << 8) +#define DMC_RATIO(x) (((x) & 0x7) << 12) +#define DMCD_RATIO(x) (((x) & 0x7) << 16) +#define DMCP_RATIO(x) (((x) & 0x7) << 20) + +/* CLK_DIV_STAT_DMC0 */ +#define DIV_ACP(x) ((x) & 0x1) +#define DIV_ACP_PCLK(x) (((x) & 0x1) << 4) +#define DIV_DPHY(x) (((x) & 0x1) << 8) +#define DIV_DMC(x) (((x) & 0x1) << 12) +#define DIV_DMCD(x) (((x) & 0x1) << 16) +#define DIV_DMCP(x) (((x) & 0x1) << 20) + +#define DIV_STAT_DMC0_CHANGING (DIV_ACP(DIV_STAT_CHANGING) | \ + DIV_ACP_PCLK(DIV_STAT_CHANGING) | \ + DIV_DPHY(DIV_STAT_CHANGING) | \ + DIV_DMC(DIV_STAT_CHANGING) | \ + DIV_DMCD(DIV_STAT_CHANGING) | \ + DIV_DMCP(DIV_STAT_CHANGING)) + +/* CLK_DIV_DMC1 */ +#define G2D_ACP_RATIO(x) ((x) & 0xf) +#define C2C_RATIO(x) (((x) & 0x7) << 4) +#define PWI_RATIO(x) (((x) & 0xf) << 8) +#define C2C_ACLK_RATIO(x) (((x) & 0x7) << 12) +#define DVSEM_RATIO(x) (((x) & 0x7f) << 16) +#define DPM_RATIO(x) (((x) & 0x7f) << 24) + +/* CLK_DIV_STAT_DMC1 */ +#define DIV_G2D_ACP(x) ((x) & 0x1) +#define DIV_C2C(x) (((x) & 0x1) << 4) +#define DIV_PWI(x) (((x) & 0x1) << 8) +#define DIV_C2C_ACLK(x) (((x) & 0x1) << 12) +#define DIV_DVSEM(x) (((x) & 0x1) << 16) +#define DIV_DPM(x) (((x) & 0x1) << 24) + +#define DIV_STAT_DMC1_CHANGING (DIV_G2D_ACP(DIV_STAT_CHANGING) | \ + DIV_C2C(DIV_STAT_CHANGING) | \ + DIV_PWI(DIV_STAT_CHANGING) | \ + DIV_C2C_ACLK(DIV_STAT_CHANGING) | \ + DIV_DVSEM(DIV_STAT_CHANGING) | \ + DIV_DPM(DIV_STAT_CHANGING)) + +/* Set CLK_SRC_PERIL0 */ +#define UART4_SEL(x) (((x) & 0xf) << 16) +#define UART3_SEL(x) (((x) & 0xf) << 12) +#define UART2_SEL(x) (((x) & 0xf) << 8) +#define UART1_SEL(x) (((x) & 0xf) << 4) +#define UART0_SEL(x) ((x) & 0xf) + +/* Set CLK_DIV_PERIL0 */ +#define UART4_RATIO(x) (((x) & 0xf) << 16) +#define UART3_RATIO(x) (((x) & 0xf) << 12) +#define UART2_RATIO(x) (((x) & 0xf) << 8) +#define UART1_RATIO(x) (((x) & 0xf) << 4) +#define UART0_RATIO(x) ((x) & 0xf) + +/* Set CLK_DIV_STAT_PERIL0 */ +#define DIV_UART4(x) (((x) & 0x1) << 16) +#define DIV_UART3(x) (((x) & 0x1) << 12) +#define DIV_UART2(x) (((x) & 0x1) << 8) +#define DIV_UART1(x) (((x) & 0x1) << 4) +#define DIV_UART0(x) ((x) & 0x1) + +#define DIV_STAT_PERIL0_CHANGING (DIV_UART4(DIV_STAT_CHANGING) | \ + DIV_UART3(DIV_STAT_CHANGING) | \ + DIV_UART2(DIV_STAT_CHANGING) | \ + DIV_UART1(DIV_STAT_CHANGING) | \ + DIV_UART0(DIV_STAT_CHANGING)) + +/* CLK_DIV_FSYS1 */ +#define MMC0_RATIO(x) ((x) & 0xf) +#define MMC0_PRE_RATIO(x) (((x) & 0xff) << 8) +#define MMC1_RATIO(x) (((x) & 0xf) << 16) +#define MMC1_PRE_RATIO(x) (((x) & 0xff) << 24) + +/* CLK_DIV_STAT_FSYS1 */ +#define DIV_MMC0(x) ((x) & 1) +#define DIV_MMC0_PRE(x) (((x) & 1) << 8) +#define DIV_MMC1(x) (((x) & 1) << 16) +#define DIV_MMC1_PRE(x) (((x) & 1) << 24) + +#define DIV_STAT_FSYS1_CHANGING (DIV_MMC0(DIV_STAT_CHANGING) | \ + DIV_MMC0_PRE(DIV_STAT_CHANGING) | \ + DIV_MMC1(DIV_STAT_CHANGING) | \ + DIV_MMC1_PRE(DIV_STAT_CHANGING)) + +/* CLK_DIV_FSYS2 */ +#define MMC2_RATIO(x) ((x) & 0xf) +#define MMC2_PRE_RATIO(x) (((x) & 0xff) << 8) +#define MMC3_RATIO(x) (((x) & 0xf) << 16) +#define MMC3_PRE_RATIO(x) (((x) & 0xff) << 24) + +/* CLK_DIV_STAT_FSYS2 */ +#define DIV_MMC2(x) ((x) & 0x1) +#define DIV_MMC2_PRE(x) (((x) & 0x1) << 8) +#define DIV_MMC3(x) (((x) & 0x1) << 16) +#define DIV_MMC3_PRE(x) (((x) & 0x1) << 24) + +#define DIV_STAT_FSYS2_CHANGING (DIV_MMC2(DIV_STAT_CHANGING) | \ + DIV_MMC2_PRE(DIV_STAT_CHANGING) | \ + DIV_MMC3(DIV_STAT_CHANGING) | \ + DIV_MMC3_PRE(DIV_STAT_CHANGING)) + +/* CLK_DIV_FSYS3 */ +#define MMC4_RATIO(x) ((x) & 0x7) +#define MMC4_PRE_RATIO(x) (((x) & 0xff) << 8) + +/* CLK_DIV_STAT_FSYS3 */ +#define DIV_MMC4(x) ((x) & 0x1) +#define DIV_MMC4_PRE(x) (((x) & 0x1) << 8) + +#define DIV_STAT_FSYS3_CHANGING (DIV_MMC4(DIV_STAT_CHANGING) | \ + DIV_MMC4_PRE(DIV_STAT_CHANGING)) + +/* XCL205 GPIO config - Odroid U3 */ +#define XCL205_GPIO_BASE EXYNOS4X12_GPIO_PART1_BASE +#define XCL205_EN_GPIO_OFFSET 0x20 /* GPA1 */ +#define XCL205_EN_GPIO_PIN 1 +#define XCL205_EN_GPIO_CON (XCL205_GPIO_BASE + \ + XCL205_EN_GPIO_OFFSET) +#define XCL205_EN_GPIO_CON_CFG (S5P_GPIO_OUTPUT << \ + 4 * XCL205_EN_GPIO_PIN) +#define XCL205_EN_GPIO_DAT_CFG (0x1 << XCL205_EN_GPIO_PIN) +#define XCL205_EN_GPIO_PUD_CFG (S5P_GPIO_PULL_UP << \ + 2 * XCL205_EN_GPIO_PIN) +#define XCL205_EN_GPIO_DRV_CFG (S5P_GPIO_DRV_4X << \ + 2 * XCL205_EN_GPIO_PIN) + +#define XCL205_STATE_GPIO_OFFSET 0x80 /* GPC1 */ +#define XCL205_STATE_GPIO_PIN 2 +#define XCL205_STATE_GPIO_CON (XCL205_GPIO_BASE + \ + XCL205_STATE_GPIO_OFFSET) +#define XCL205_STATE_GPIO_DAT XCL205_STATE_GPIO_CON + 0x4 +#define XCL205_STATE_GPIO_CON_CFG (S5P_GPIO_INPUT << \ + 4 * XCL205_STATE_GPIO_PIN) +#define XCL205_STATE_GPIO_PUD_CFG (S5P_GPIO_PULL_NONE << \ + 2 * XCL205_STATE_GPIO_PIN) + +#ifdef CONFIG_BOARD_TYPES +extern void sdelay(unsigned long); +#endif + +#endif /*__ODROIDU3_SETUP__ */ diff --git a/board/samsung/origen/Kconfig b/board/samsung/origen/Kconfig index 3eda350..63e3efe 100644 --- a/board/samsung/origen/Kconfig +++ b/board/samsung/origen/Kconfig @@ -1,15 +1,12 @@ if TARGET_ORIGEN config SYS_BOARD - string default "origen" config SYS_VENDOR - string default "samsung" config SYS_CONFIG_NAME - string default "origen" endif diff --git a/board/samsung/smdk2410/Kconfig b/board/samsung/smdk2410/Kconfig index e921c09..94f1e3c 100644 --- a/board/samsung/smdk2410/Kconfig +++ b/board/samsung/smdk2410/Kconfig @@ -1,23 +1,18 @@ if TARGET_SMDK2410 config SYS_CPU - string default "arm920t" config SYS_BOARD - string default "smdk2410" config SYS_VENDOR - string default "samsung" config SYS_SOC - string default "s3c24x0" config SYS_CONFIG_NAME - string default "smdk2410" endif diff --git a/board/samsung/smdk5250/Kconfig b/board/samsung/smdk5250/Kconfig index e7036f5..698ee91 100644 --- a/board/samsung/smdk5250/Kconfig +++ b/board/samsung/smdk5250/Kconfig @@ -1,15 +1,12 @@ if TARGET_SMDK5250 config SYS_BOARD - string default "smdk5250" config SYS_VENDOR - string default "samsung" config SYS_CONFIG_NAME - string default "smdk5250" endif @@ -17,15 +14,12 @@ endif if TARGET_SNOW config SYS_BOARD - string default "smdk5250" config SYS_VENDOR - string default "samsung" config SYS_CONFIG_NAME - string default "snow" endif diff --git a/board/samsung/smdk5420/Kconfig b/board/samsung/smdk5420/Kconfig index fb9bedd..d3a5b7f 100644 --- a/board/samsung/smdk5420/Kconfig +++ b/board/samsung/smdk5420/Kconfig @@ -1,15 +1,12 @@ if TARGET_PEACH_PIT config SYS_BOARD - string default "smdk5420" config SYS_VENDOR - string default "samsung" config SYS_CONFIG_NAME - string default "peach-pit" endif @@ -17,15 +14,12 @@ endif if TARGET_SMDK5420 config SYS_BOARD - string default "smdk5420" config SYS_VENDOR - string default "samsung" config SYS_CONFIG_NAME - string default "smdk5420" endif diff --git a/board/samsung/smdk5420/smdk5420.c b/board/samsung/smdk5420/smdk5420.c index 183c522..270ee83 100644 --- a/board/samsung/smdk5420/smdk5420.c +++ b/board/samsung/smdk5420/smdk5420.c @@ -10,11 +10,14 @@ #include #include #include +#include #include #include #include #include +#include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -40,95 +43,57 @@ int exynos_init(void) } #ifdef CONFIG_LCD -void cfg_lcd_gpio(void) +static int has_edp_bridge(void) { - /* For Backlight */ - gpio_cfg_pin(EXYNOS5420_GPIO_B20, S5P_GPIO_OUTPUT); - gpio_set_value(EXYNOS5420_GPIO_B20, 1); + int node; + + node = fdtdec_next_compatible(gd->fdt_blob, 0, COMPAT_PARADE_PS8625); - /* LCD power on */ - gpio_cfg_pin(EXYNOS5420_GPIO_X15, S5P_GPIO_OUTPUT); - gpio_set_value(EXYNOS5420_GPIO_X15, 1); + /* No node for bridge in device tree. */ + if (node <= 0) + return 0; - /* Set Hotplug detect for DP */ - gpio_cfg_pin(EXYNOS5420_GPIO_X07, S5P_GPIO_FUNC(0x3)); + /* Default is with bridge ic */ + return 1; } -vidinfo_t panel_info = { - .vl_freq = 60, - .vl_col = 2560, - .vl_row = 1600, - .vl_width = 2560, - .vl_height = 1600, - .vl_clkp = CONFIG_SYS_LOW, - .vl_hsp = CONFIG_SYS_LOW, - .vl_vsp = CONFIG_SYS_LOW, - .vl_dp = CONFIG_SYS_LOW, - .vl_bpix = 4, /* LCD_BPP = 2^4, for output conosle on LCD */ - - /* wDP panel timing infomation */ - .vl_hspw = 32, - .vl_hbpd = 80, - .vl_hfpd = 48, - - .vl_vspw = 6, - .vl_vbpd = 37, - .vl_vfpd = 3, - .vl_cmd_allow_len = 0xf, - - .win_id = 3, - .cfg_gpio = cfg_lcd_gpio, - .backlight_on = NULL, - .lcd_power_on = NULL, - .reset_lcd = NULL, - .dual_lcd_enabled = 0, - - .init_delay = 0, - .power_on_delay = 0, - .reset_delay = 0, - .interface_mode = FIMD_RGB_INTERFACE, - .dp_enabled = 1, -}; - -static struct edp_device_info edp_info = { - .disp_info = { - .h_res = 2560, - .h_sync_width = 32, - .h_back_porch = 80, - .h_front_porch = 48, - .v_res = 1600, - .v_sync_width = 6, - .v_back_porch = 37, - .v_front_porch = 3, - .v_sync_rate = 60, - }, - .lt_info = { - .lt_status = DP_LT_NONE, - }, - .video_info = { - .master_mode = 0, - .bist_mode = DP_DISABLE, - .bist_pattern = NO_PATTERN, - .h_sync_polarity = 0, - .v_sync_polarity = 0, - .interlaced = 0, - .color_space = COLOR_RGB, - .dynamic_range = VESA, - .ycbcr_coeff = COLOR_YCBCR601, - .color_depth = COLOR_8, - }, -}; - -static struct exynos_dp_platform_data dp_platform_data = { - .phy_enable = set_dp_phy_ctrl, - .edp_dev_info = &edp_info, -}; - -void init_panel_info(vidinfo_t *vid) +void exynos_lcd_power_on(void) { - vid->rgb_mode = MODE_RGB_P; + int ret; + +#ifdef CONFIG_POWER_TPS65090 + ret = tps65090_init(); + if (ret < 0) { + printf("%s: tps65090_init() failed\n", __func__); + return; + } + + tps65090_fet_enable(6); +#endif + + mdelay(5); + + /* TODO(ajaykumar.rs@samsung.com): Use device tree */ + gpio_direction_output(EXYNOS5420_GPIO_X35, 1); /* EDP_SLP# */ + mdelay(10); + gpio_direction_output(EXYNOS5420_GPIO_Y77, 1); /* EDP_RST# */ + gpio_direction_input(EXYNOS5420_GPIO_X26); /* EDP_HPD */ + gpio_set_pull(EXYNOS5420_GPIO_X26, S5P_GPIO_PULL_NONE); - exynos_set_dp_platform_data(&dp_platform_data); + if (has_edp_bridge()) + if (parade_init(gd->fdt_blob)) + printf("%s: ps8625_init() failed\n", __func__); +} + +void exynos_backlight_on(unsigned int onoff) +{ + /* For PWM */ + gpio_cfg_pin(EXYNOS5420_GPIO_B20, S5P_GPIO_FUNC(0x1)); + gpio_set_value(EXYNOS5420_GPIO_B20, 1); + +#ifdef CONFIG_POWER_TPS65090 + tps65090_fet_enable(1); +#endif } #endif diff --git a/board/samsung/smdkc100/Kconfig b/board/samsung/smdkc100/Kconfig index 9c2b4da..5e6b0dd 100644 --- a/board/samsung/smdkc100/Kconfig +++ b/board/samsung/smdkc100/Kconfig @@ -1,23 +1,18 @@ if TARGET_SMDKC100 config SYS_CPU - string default "armv7" config SYS_BOARD - string default "smdkc100" config SYS_VENDOR - string default "samsung" config SYS_SOC - string default "s5pc1xx" config SYS_CONFIG_NAME - string default "smdkc100" endif diff --git a/board/samsung/smdkv310/Kconfig b/board/samsung/smdkv310/Kconfig index 785fae2..a6fd657 100644 --- a/board/samsung/smdkv310/Kconfig +++ b/board/samsung/smdkv310/Kconfig @@ -1,15 +1,12 @@ if TARGET_SMDKV310 config SYS_BOARD - string default "smdkv310" config SYS_VENDOR - string default "samsung" config SYS_CONFIG_NAME - string default "smdkv310" endif diff --git a/board/samsung/trats/Kconfig b/board/samsung/trats/Kconfig index 8bfb12d..7e8377b 100644 --- a/board/samsung/trats/Kconfig +++ b/board/samsung/trats/Kconfig @@ -1,15 +1,12 @@ if TARGET_TRATS config SYS_BOARD - string default "trats" config SYS_VENDOR - string default "samsung" config SYS_CONFIG_NAME - string default "trats" endif diff --git a/board/samsung/trats2/Kconfig b/board/samsung/trats2/Kconfig index f359c03..5670e14 100644 --- a/board/samsung/trats2/Kconfig +++ b/board/samsung/trats2/Kconfig @@ -1,15 +1,12 @@ if TARGET_TRATS2 config SYS_BOARD - string default "trats2" config SYS_VENDOR - string default "samsung" config SYS_CONFIG_NAME - string default "trats2" endif diff --git a/board/samsung/universal_c210/Kconfig b/board/samsung/universal_c210/Kconfig index 72b879a..e692668 100644 --- a/board/samsung/universal_c210/Kconfig +++ b/board/samsung/universal_c210/Kconfig @@ -1,15 +1,12 @@ if TARGET_S5PC210_UNIVERSAL config SYS_BOARD - string default "universal_c210" config SYS_VENDOR - string default "samsung" config SYS_CONFIG_NAME - string default "s5pc210_universal" endif diff --git a/board/sandbox/README.sandbox b/board/sandbox/README.sandbox index 529c447..5f879f5 100644 --- a/board/sandbox/README.sandbox +++ b/board/sandbox/README.sandbox @@ -19,7 +19,7 @@ create unit tests which we can run to test this upper level code. CONFIG_SANDBOX is defined when building a native board. The chosen vendor and board names are also 'sandbox', so there is a single -board in board/sandbox/sandbox. +board in board/sandbox. CONFIG_SANDBOX_BIG_ENDIAN should be defined when running on big-endian machines. @@ -32,7 +32,7 @@ Basic Operation To run sandbox U-Boot use something like: - make sandbox_config all + make sandbox_defconfig all ./u-boot Note: @@ -41,7 +41,7 @@ Note: build sandbox without SDL (i.e. no display/keyboard support) by removing the CONFIG_SANDBOX_SDL line in include/configs/sandbox.h or using: - make sandbox_config all NO_SDL=1 + make sandbox_defconfig all NO_SDL=1 ./u-boot diff --git a/board/sandburst/karef/Kconfig b/board/sandburst/karef/Kconfig index d4aaea5..1b04576 100644 --- a/board/sandburst/karef/Kconfig +++ b/board/sandburst/karef/Kconfig @@ -1,15 +1,12 @@ if TARGET_KAREF config SYS_BOARD - string default "karef" config SYS_VENDOR - string default "sandburst" config SYS_CONFIG_NAME - string default "KAREF" endif diff --git a/board/sandburst/karef/MAINTAINERS b/board/sandburst/karef/MAINTAINERS index 4c29ae7..21510e8 100644 --- a/board/sandburst/karef/MAINTAINERS +++ b/board/sandburst/karef/MAINTAINERS @@ -1,5 +1,5 @@ KAREF BOARD -M: Travis Sawyer +#M: Travis Sawyer S: Orphan (since 2014-03) F: board/sandburst/karef/ F: include/configs/KAREF.h diff --git a/board/sandburst/metrobox/Kconfig b/board/sandburst/metrobox/Kconfig index be2affc..4a771ef 100644 --- a/board/sandburst/metrobox/Kconfig +++ b/board/sandburst/metrobox/Kconfig @@ -1,15 +1,12 @@ if TARGET_METROBOX config SYS_BOARD - string default "metrobox" config SYS_VENDOR - string default "sandburst" config SYS_CONFIG_NAME - string default "METROBOX" endif diff --git a/board/sandburst/metrobox/MAINTAINERS b/board/sandburst/metrobox/MAINTAINERS index f5734ba..71d18f9 100644 --- a/board/sandburst/metrobox/MAINTAINERS +++ b/board/sandburst/metrobox/MAINTAINERS @@ -1,5 +1,5 @@ METROBOX BOARD -M: Travis Sawyer +#M: Travis Sawyer S: Orphan (since 2014-03) F: board/sandburst/metrobox/ F: include/configs/METROBOX.h diff --git a/board/sandisk/sansa_fuze_plus/Kconfig b/board/sandisk/sansa_fuze_plus/Kconfig index eddbfd8..99e7379 100644 --- a/board/sandisk/sansa_fuze_plus/Kconfig +++ b/board/sandisk/sansa_fuze_plus/Kconfig @@ -1,23 +1,18 @@ if TARGET_SANSA_FUZE_PLUS config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "sansa_fuze_plus" config SYS_VENDOR - string default "sandisk" config SYS_SOC - string default "mxs" config SYS_CONFIG_NAME - string default "sansa_fuze_plus" endif diff --git a/board/sandpoint/Kconfig b/board/sandpoint/Kconfig index 3cc99de..c19b63e 100644 --- a/board/sandpoint/Kconfig +++ b/board/sandpoint/Kconfig @@ -1,11 +1,9 @@ if TARGET_SANDPOINT8240 config SYS_BOARD - string default "sandpoint" config SYS_CONFIG_NAME - string default "Sandpoint8240" endif @@ -13,11 +11,9 @@ endif if TARGET_SANDPOINT8245 config SYS_BOARD - string default "sandpoint" config SYS_CONFIG_NAME - string default "Sandpoint8245" endif diff --git a/board/sandpoint/MAINTAINERS b/board/sandpoint/MAINTAINERS index f28c309..569cf42 100644 --- a/board/sandpoint/MAINTAINERS +++ b/board/sandpoint/MAINTAINERS @@ -6,7 +6,7 @@ F: include/configs/Sandpoint8240.h F: configs/Sandpoint8240_defconfig SANDPOINT8245 BOARD -M: Jim Thompson +#M: Jim Thompson S: Orphan (since 2014-04) F: include/configs/Sandpoint8245.h F: configs/Sandpoint8245_defconfig diff --git a/board/sbc405/Kconfig b/board/sbc405/Kconfig index 77082bf..4e7e843 100644 --- a/board/sbc405/Kconfig +++ b/board/sbc405/Kconfig @@ -1,11 +1,9 @@ if TARGET_SBC405 config SYS_BOARD - string default "sbc405" config SYS_CONFIG_NAME - string default "sbc405" endif diff --git a/board/sbc405/MAINTAINERS b/board/sbc405/MAINTAINERS index dbb4451..2abad25 100644 --- a/board/sbc405/MAINTAINERS +++ b/board/sbc405/MAINTAINERS @@ -1,5 +1,5 @@ SBC405 BOARD -M: - +#M: - S: Maintained F: board/sbc405/ F: include/configs/sbc405.h diff --git a/board/sbc8349/Kconfig b/board/sbc8349/Kconfig index 5b851f8..129d6b9 100644 --- a/board/sbc8349/Kconfig +++ b/board/sbc8349/Kconfig @@ -1,11 +1,9 @@ if TARGET_SBC8349 config SYS_BOARD - string default "sbc8349" config SYS_CONFIG_NAME - string default "sbc8349" endif diff --git a/board/sbc8548/Kconfig b/board/sbc8548/Kconfig index 5223d3d..626cbdf 100644 --- a/board/sbc8548/Kconfig +++ b/board/sbc8548/Kconfig @@ -1,11 +1,9 @@ if TARGET_SBC8548 config SYS_BOARD - string default "sbc8548" config SYS_CONFIG_NAME - string default "sbc8548" endif diff --git a/board/sbc8641d/Kconfig b/board/sbc8641d/Kconfig index 7f77bca..8dfc90c 100644 --- a/board/sbc8641d/Kconfig +++ b/board/sbc8641d/Kconfig @@ -1,11 +1,9 @@ if TARGET_SBC8641D config SYS_BOARD - string default "sbc8641d" config SYS_CONFIG_NAME - string default "sbc8641d" endif diff --git a/board/sc3/Kconfig b/board/sc3/Kconfig index 74694be..88a6d86 100644 --- a/board/sc3/Kconfig +++ b/board/sc3/Kconfig @@ -1,11 +1,9 @@ if TARGET_SC3 config SYS_BOARD - string default "sc3" config SYS_CONFIG_NAME - string default "sc3" endif diff --git a/board/scb9328/Kconfig b/board/scb9328/Kconfig index 040d055..7ff7dbc 100644 --- a/board/scb9328/Kconfig +++ b/board/scb9328/Kconfig @@ -1,19 +1,15 @@ if TARGET_SCB9328 config SYS_CPU - string default "arm920t" config SYS_BOARD - string default "scb9328" config SYS_SOC - string default "imx" config SYS_CONFIG_NAME - string default "scb9328" endif diff --git a/board/schulercontrol/sc_sps_1/Kconfig b/board/schulercontrol/sc_sps_1/Kconfig index 30071ed..379e53b 100644 --- a/board/schulercontrol/sc_sps_1/Kconfig +++ b/board/schulercontrol/sc_sps_1/Kconfig @@ -1,23 +1,18 @@ if TARGET_SC_SPS_1 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "sc_sps_1" config SYS_VENDOR - string default "schulercontrol" config SYS_SOC - string default "mxs" config SYS_CONFIG_NAME - string default "sc_sps_1" endif diff --git a/board/shmin/Kconfig b/board/shmin/Kconfig index cb9fb9f..a1c383e 100644 --- a/board/shmin/Kconfig +++ b/board/shmin/Kconfig @@ -1,15 +1,12 @@ if TARGET_SHMIN config SYS_CPU - string default "sh3" config SYS_BOARD - string default "shmin" config SYS_CONFIG_NAME - string default "shmin" endif diff --git a/board/siemens/corvus/Kconfig b/board/siemens/corvus/Kconfig index e24364c..80018c5 100644 --- a/board/siemens/corvus/Kconfig +++ b/board/siemens/corvus/Kconfig @@ -1,23 +1,18 @@ if TARGET_CORVUS config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "corvus" config SYS_VENDOR - string default "siemens" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "corvus" endif diff --git a/board/siemens/draco/Kconfig b/board/siemens/draco/Kconfig index c6dac1c..b930a76 100644 --- a/board/siemens/draco/Kconfig +++ b/board/siemens/draco/Kconfig @@ -1,23 +1,18 @@ if TARGET_DRACO config SYS_CPU - string default "armv7" config SYS_BOARD - string default "draco" config SYS_VENDOR - string default "siemens" config SYS_SOC - string default "am33xx" config SYS_CONFIG_NAME - string default "draco" endif @@ -25,23 +20,18 @@ endif if TARGET_DXR2 config SYS_CPU - string default "armv7" config SYS_BOARD - string default "draco" config SYS_VENDOR - string default "siemens" config SYS_SOC - string default "am33xx" config SYS_CONFIG_NAME - string default "dxr2" endif diff --git a/board/siemens/pxm2/Kconfig b/board/siemens/pxm2/Kconfig index db69537..f76ec69 100644 --- a/board/siemens/pxm2/Kconfig +++ b/board/siemens/pxm2/Kconfig @@ -1,23 +1,18 @@ if TARGET_PXM2 config SYS_CPU - string default "armv7" config SYS_BOARD - string default "pxm2" config SYS_VENDOR - string default "siemens" config SYS_SOC - string default "am33xx" config SYS_CONFIG_NAME - string default "pxm2" endif diff --git a/board/siemens/rut/Kconfig b/board/siemens/rut/Kconfig index c4d9e7e..b7e49da 100644 --- a/board/siemens/rut/Kconfig +++ b/board/siemens/rut/Kconfig @@ -1,23 +1,18 @@ if TARGET_RUT config SYS_CPU - string default "armv7" config SYS_BOARD - string default "rut" config SYS_VENDOR - string default "siemens" config SYS_SOC - string default "am33xx" config SYS_CONFIG_NAME - string default "rut" endif diff --git a/board/siemens/taurus/Kconfig b/board/siemens/taurus/Kconfig index 3ef14c6..1fedbd3 100644 --- a/board/siemens/taurus/Kconfig +++ b/board/siemens/taurus/Kconfig @@ -1,23 +1,18 @@ if TARGET_TAURUS config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "taurus" config SYS_VENDOR - string default "siemens" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "taurus" endif diff --git a/board/silica/pengwyn/Kconfig b/board/silica/pengwyn/Kconfig index abf86b1..90bfb69 100644 --- a/board/silica/pengwyn/Kconfig +++ b/board/silica/pengwyn/Kconfig @@ -1,23 +1,18 @@ if TARGET_PENGWYN config SYS_CPU - string default "armv7" config SYS_BOARD - string default "pengwyn" config SYS_VENDOR - string default "silica" config SYS_SOC - string default "am33xx" config SYS_CONFIG_NAME - string default "pengwyn" endif diff --git a/board/socrates/Kconfig b/board/socrates/Kconfig index 06abd9d..ca945c2 100644 --- a/board/socrates/Kconfig +++ b/board/socrates/Kconfig @@ -1,11 +1,9 @@ if TARGET_SOCRATES config SYS_BOARD - string default "socrates" config SYS_CONFIG_NAME - string default "socrates" endif diff --git a/board/socrates/MAINTAINERS b/board/socrates/MAINTAINERS index fc3e11d..293b8e6 100644 --- a/board/socrates/MAINTAINERS +++ b/board/socrates/MAINTAINERS @@ -1,5 +1,5 @@ SOCRATES BOARD -M: - +#M: - S: Maintained F: board/socrates/ F: include/configs/socrates.h diff --git a/board/solidrun/hummingboard/Kconfig b/board/solidrun/hummingboard/Kconfig index a412347..a4eb62f 100644 --- a/board/solidrun/hummingboard/Kconfig +++ b/board/solidrun/hummingboard/Kconfig @@ -1,23 +1,18 @@ if TARGET_HUMMINGBOARD config SYS_CPU - string default "armv7" config SYS_BOARD - string default "hummingboard" config SYS_VENDOR - string default "solidrun" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "hummingboard" endif diff --git a/board/spd8xx/Kconfig b/board/spd8xx/Kconfig index 4845cba..2430616 100644 --- a/board/spd8xx/Kconfig +++ b/board/spd8xx/Kconfig @@ -1,11 +1,9 @@ if TARGET_SPD823TS config SYS_BOARD - string default "spd8xx" config SYS_CONFIG_NAME - string default "SPD823TS" endif diff --git a/board/spear/spear300/Kconfig b/board/spear/spear300/Kconfig index 7e49e34..5b702ce 100644 --- a/board/spear/spear300/Kconfig +++ b/board/spear/spear300/Kconfig @@ -1,23 +1,18 @@ if TARGET_SPEAR300 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "spear300" config SYS_VENDOR - string default "spear" config SYS_SOC - string default "spear" config SYS_CONFIG_NAME - string default "spear3xx_evb" endif diff --git a/board/spear/spear300/MAINTAINERS b/board/spear/spear300/MAINTAINERS index 15164fe..07152ae 100644 --- a/board/spear/spear300/MAINTAINERS +++ b/board/spear/spear300/MAINTAINERS @@ -6,7 +6,7 @@ F: include/configs/spear3xx_evb.h F: configs/spear300_defconfig SPEAR300_NAND BOARD -M: - +#M: - S: Maintained F: configs/spear300_nand_defconfig F: configs/spear300_usbtty_defconfig diff --git a/board/spear/spear310/Kconfig b/board/spear/spear310/Kconfig index de71040..b8f5154 100644 --- a/board/spear/spear310/Kconfig +++ b/board/spear/spear310/Kconfig @@ -1,23 +1,18 @@ if TARGET_SPEAR310 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "spear310" config SYS_VENDOR - string default "spear" config SYS_SOC - string default "spear" config SYS_CONFIG_NAME - string default "spear3xx_evb" endif diff --git a/board/spear/spear310/MAINTAINERS b/board/spear/spear310/MAINTAINERS index 3a7e610..4f9aa15 100644 --- a/board/spear/spear310/MAINTAINERS +++ b/board/spear/spear310/MAINTAINERS @@ -6,7 +6,7 @@ F: include/configs/spear3xx_evb.h F: configs/spear310_defconfig SPEAR310_NAND BOARD -M: - +#M: - S: Maintained F: configs/spear310_nand_defconfig F: configs/spear310_pnor_defconfig diff --git a/board/spear/spear320/Kconfig b/board/spear/spear320/Kconfig index 4cf6baf..150d64f 100644 --- a/board/spear/spear320/Kconfig +++ b/board/spear/spear320/Kconfig @@ -1,23 +1,18 @@ if TARGET_SPEAR320 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "spear320" config SYS_VENDOR - string default "spear" config SYS_SOC - string default "spear" config SYS_CONFIG_NAME - string default "spear3xx_evb" endif diff --git a/board/spear/spear320/MAINTAINERS b/board/spear/spear320/MAINTAINERS index 414beca..bf78092 100644 --- a/board/spear/spear320/MAINTAINERS +++ b/board/spear/spear320/MAINTAINERS @@ -6,7 +6,7 @@ F: include/configs/spear3xx_evb.h F: configs/spear320_defconfig SPEAR320_NAND BOARD -M: - +#M: - S: Maintained F: configs/spear320_nand_defconfig F: configs/spear320_pnor_defconfig diff --git a/board/spear/spear600/Kconfig b/board/spear/spear600/Kconfig index d62f9e7..f03e19e 100644 --- a/board/spear/spear600/Kconfig +++ b/board/spear/spear600/Kconfig @@ -1,23 +1,18 @@ if TARGET_SPEAR600 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "spear600" config SYS_VENDOR - string default "spear" config SYS_SOC - string default "spear" config SYS_CONFIG_NAME - string default "spear6xx_evb" endif diff --git a/board/spear/spear600/MAINTAINERS b/board/spear/spear600/MAINTAINERS index a978fdd..ddcd11a 100644 --- a/board/spear/spear600/MAINTAINERS +++ b/board/spear/spear600/MAINTAINERS @@ -6,7 +6,7 @@ F: include/configs/spear6xx_evb.h F: configs/spear600_defconfig SPEAR600_NAND BOARD -M: - +#M: - S: Maintained F: configs/spear600_nand_defconfig F: configs/spear600_usbtty_defconfig diff --git a/board/spear/x600/Kconfig b/board/spear/x600/Kconfig index a924559..620be5f 100644 --- a/board/spear/x600/Kconfig +++ b/board/spear/x600/Kconfig @@ -1,23 +1,18 @@ if TARGET_X600 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "x600" config SYS_VENDOR - string default "spear" config SYS_SOC - string default "spear" config SYS_CONFIG_NAME - string default "x600" endif diff --git a/board/st-ericsson/snowball/Kconfig b/board/st-ericsson/snowball/Kconfig index b5ead0f..7eb9969 100644 --- a/board/st-ericsson/snowball/Kconfig +++ b/board/st-ericsson/snowball/Kconfig @@ -1,23 +1,18 @@ if TARGET_SNOWBALL config SYS_CPU - string default "armv7" config SYS_BOARD - string default "snowball" config SYS_VENDOR - string default "st-ericsson" config SYS_SOC - string default "u8500" config SYS_CONFIG_NAME - string default "snowball" endif diff --git a/board/st-ericsson/u8500/Kconfig b/board/st-ericsson/u8500/Kconfig index bbcfdaf..ca25876 100644 --- a/board/st-ericsson/u8500/Kconfig +++ b/board/st-ericsson/u8500/Kconfig @@ -1,23 +1,18 @@ if TARGET_U8500_HREF config SYS_CPU - string default "armv7" config SYS_BOARD - string default "u8500" config SYS_VENDOR - string default "st-ericsson" config SYS_SOC - string default "u8500" config SYS_CONFIG_NAME - string default "u8500_href" endif diff --git a/board/st-ericsson/u8500/MAINTAINERS b/board/st-ericsson/u8500/MAINTAINERS index 54e7921..e2581eb 100644 --- a/board/st-ericsson/u8500/MAINTAINERS +++ b/board/st-ericsson/u8500/MAINTAINERS @@ -1,5 +1,5 @@ U8500 BOARD -M: - +#M: - S: Maintained F: board/st-ericsson/u8500/ F: include/configs/u8500_href.h diff --git a/board/st/nhk8815/Kconfig b/board/st/nhk8815/Kconfig index ba2e7c2..94547dc 100644 --- a/board/st/nhk8815/Kconfig +++ b/board/st/nhk8815/Kconfig @@ -1,15 +1,12 @@ if NOMADIK_NHK8815 config SYS_BOARD - string default "nhk8815" config SYS_VENDOR - string default "st" config SYS_CONFIG_NAME - string default "nhk8815" endif diff --git a/board/stx/stxgp3/Kconfig b/board/stx/stxgp3/Kconfig index aac2940..910b31b 100644 --- a/board/stx/stxgp3/Kconfig +++ b/board/stx/stxgp3/Kconfig @@ -1,15 +1,12 @@ if TARGET_STXGP3 config SYS_BOARD - string default "stxgp3" config SYS_VENDOR - string default "stx" config SYS_CONFIG_NAME - string default "stxgp3" endif diff --git a/board/stx/stxgp3/MAINTAINERS b/board/stx/stxgp3/MAINTAINERS index 6f485d4..bd5743c 100644 --- a/board/stx/stxgp3/MAINTAINERS +++ b/board/stx/stxgp3/MAINTAINERS @@ -1,5 +1,5 @@ STXGP3 BOARD -M: Dan Malek +#M: Dan Malek S: Orphan (since 2014-06) F: board/stx/stxgp3/ F: include/configs/stxgp3.h diff --git a/board/stx/stxssa/Kconfig b/board/stx/stxssa/Kconfig index 06dd8be..bd47b04 100644 --- a/board/stx/stxssa/Kconfig +++ b/board/stx/stxssa/Kconfig @@ -1,15 +1,12 @@ if TARGET_STXSSA config SYS_BOARD - string default "stxssa" config SYS_VENDOR - string default "stx" config SYS_CONFIG_NAME - string default "stxssa" endif diff --git a/board/stx/stxssa/MAINTAINERS b/board/stx/stxssa/MAINTAINERS index f56adf0..b7cc89b 100644 --- a/board/stx/stxssa/MAINTAINERS +++ b/board/stx/stxssa/MAINTAINERS @@ -1,5 +1,5 @@ STXSSA BOARD -M: Dan Malek +#M: Dan Malek S: Orphan (since 2014-06) F: board/stx/stxssa/ F: include/configs/stxssa.h diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index c61c650..bcd0a55 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -1,7 +1,6 @@ if TARGET_SUN4I config SYS_CONFIG_NAME - string default "sun4i" endif @@ -9,7 +8,6 @@ endif if TARGET_SUN5I config SYS_CONFIG_NAME - string default "sun5i" endif @@ -17,7 +15,6 @@ endif if TARGET_SUN7I config SYS_CONFIG_NAME - string default "sun7i" endif @@ -25,18 +22,15 @@ endif if TARGET_SUN4I || TARGET_SUN5I || TARGET_SUN7I config SYS_CPU - string default "armv7" config SYS_BOARD - string default "sunxi" config SYS_SOC - string default "sunxi" -config FTDFILE - string "Default ftdfile env setting for this board" +config FDTFILE + string "Default fdtfile env setting for this board" endif diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index b0b1804..4f32195 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -32,3 +32,9 @@ F: configs/Cubieboard2_defconfig F: configs/Cubieboard2_FEL_defconfig F: configs/Cubietruck_defconfig F: configs/Cubietruck_FEL_defconfig + +A20-OLINUXINO-LIME BOARD +M: FUKAUMI Naoki +S: Maintained +F: board/sunxi/dram_a20_olinuxino_l.c +F: configs/A20-OLinuXino-Lime_defconfig diff --git a/board/sunxi/Makefile b/board/sunxi/Makefile index cf001e7..56073a0 100644 --- a/board/sunxi/Makefile +++ b/board/sunxi/Makefile @@ -15,6 +15,7 @@ obj-$(CONFIG_A10_OLINUXINO_L) += dram_a10_olinuxino_l.o obj-$(CONFIG_A10S_OLINUXINO_M) += dram_a10s_olinuxino_m.o obj-$(CONFIG_A13_OLINUXINO) += dram_a13_olinuxino.o obj-$(CONFIG_A13_OLINUXINOM) += dram_a13_oli_micro.o +obj-$(CONFIG_A20_OLINUXINO_L) += dram_a20_olinuxino_l.o obj-$(CONFIG_A20_OLINUXINO_M) += dram_sun7i_384_1024_iow16.o # This is not a typo, uses the same mem settings as the a10s-olinuxino-m obj-$(CONFIG_AUXTEK_T004) += dram_a10s_olinuxino_m.o diff --git a/board/sunxi/dram_a20_olinuxino_l.c b/board/sunxi/dram_a20_olinuxino_l.c new file mode 100644 index 0000000..2c74999 --- /dev/null +++ b/board/sunxi/dram_a20_olinuxino_l.c @@ -0,0 +1,31 @@ +/* this file is generated, don't edit it yourself */ + +#include "common.h" +#include + +static struct dram_para dram_para = { + .clock = 480, + .type = 3, + .rank_num = 1, + .density = 4096, + .io_width = 16, + .bus_width = 16, + .cas = 9, + .zq = 0x7f, + .odt_en = 0, + .size = 512, + .tpr0 = 0x42d899b7, + .tpr1 = 0xa090, + .tpr2 = 0x22a00, + .tpr3 = 0, + .tpr4 = 0, + .tpr5 = 0, + .emr1 = 0x4, + .emr2 = 0x10, + .emr3 = 0, +}; + +unsigned long sunxi_dram_init(void) +{ + return dramc_init(&dram_para); +} diff --git a/board/synopsys/Kconfig b/board/synopsys/Kconfig index 22034c1..a54d3df 100644 --- a/board/synopsys/Kconfig +++ b/board/synopsys/Kconfig @@ -1,15 +1,12 @@ if TARGET_ARCANGEL4 config SYS_CPU - string default "arc700" config SYS_VENDOR - string default "synopsys" config SYS_CONFIG_NAME - string default "arcangel4" endif @@ -17,15 +14,12 @@ endif if TARGET_ARCANGEL4_BE config SYS_CPU - string default "arc700" config SYS_VENDOR - string default "synopsys" config SYS_CONFIG_NAME - string default "arcangel4-be" endif diff --git a/board/synopsys/axs101/Kconfig b/board/synopsys/axs101/Kconfig index 535b8eb..8448265 100644 --- a/board/synopsys/axs101/Kconfig +++ b/board/synopsys/axs101/Kconfig @@ -1,19 +1,15 @@ if TARGET_AXS101 config SYS_CPU - string default "arc700" config SYS_BOARD - string default "axs101" config SYS_VENDOR - string default "synopsys" config SYS_CONFIG_NAME - string default "axs101" endif diff --git a/board/syteco/jadecpu/Kconfig b/board/syteco/jadecpu/Kconfig index c00204a..3965e90 100644 --- a/board/syteco/jadecpu/Kconfig +++ b/board/syteco/jadecpu/Kconfig @@ -1,23 +1,18 @@ if TARGET_JADECPU config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "jadecpu" config SYS_VENDOR - string default "syteco" config SYS_SOC - string default "mb86r0x" config SYS_CONFIG_NAME - string default "jadecpu" endif diff --git a/board/syteco/zmx25/Kconfig b/board/syteco/zmx25/Kconfig index dbf34e5..260774d 100644 --- a/board/syteco/zmx25/Kconfig +++ b/board/syteco/zmx25/Kconfig @@ -1,23 +1,18 @@ if TARGET_ZMX25 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "zmx25" config SYS_VENDOR - string default "syteco" config SYS_SOC - string default "mx25" config SYS_CONFIG_NAME - string default "zmx25" endif diff --git a/board/t3corp/Kconfig b/board/t3corp/Kconfig index 818293a..82ed4c9 100644 --- a/board/t3corp/Kconfig +++ b/board/t3corp/Kconfig @@ -1,11 +1,9 @@ if TARGET_T3CORP config SYS_BOARD - string default "t3corp" config SYS_CONFIG_NAME - string default "t3corp" endif diff --git a/board/taskit/stamp9g20/Kconfig b/board/taskit/stamp9g20/Kconfig index 3aecad9..67be227 100644 --- a/board/taskit/stamp9g20/Kconfig +++ b/board/taskit/stamp9g20/Kconfig @@ -1,23 +1,18 @@ if TARGET_STAMP9G20 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "stamp9g20" config SYS_VENDOR - string default "taskit" config SYS_SOC - string default "at91" config SYS_CONFIG_NAME - string default "stamp9g20" endif diff --git a/board/tcm-bf518/Kconfig b/board/tcm-bf518/Kconfig index a246099..558c2fe 100644 --- a/board/tcm-bf518/Kconfig +++ b/board/tcm-bf518/Kconfig @@ -1,11 +1,9 @@ if TARGET_TCM_BF518 config SYS_BOARD - string default "tcm-bf518" config SYS_CONFIG_NAME - string default "tcm-bf518" endif diff --git a/board/tcm-bf518/MAINTAINERS b/board/tcm-bf518/MAINTAINERS index f649b06..1690122 100644 --- a/board/tcm-bf518/MAINTAINERS +++ b/board/tcm-bf518/MAINTAINERS @@ -1,5 +1,5 @@ TCM-BF518 BOARD -M: Bluetechnix Tinyboards +#M: Bluetechnix Tinyboards S: Orphan (since 2014-03) F: board/tcm-bf518/ F: include/configs/tcm-bf518.h diff --git a/board/tcm-bf537/Kconfig b/board/tcm-bf537/Kconfig index a7f1b21..e0127c6 100644 --- a/board/tcm-bf537/Kconfig +++ b/board/tcm-bf537/Kconfig @@ -1,11 +1,9 @@ if TARGET_TCM_BF537 config SYS_BOARD - string default "tcm-bf537" config SYS_CONFIG_NAME - string default "tcm-bf537" endif diff --git a/board/tcm-bf537/MAINTAINERS b/board/tcm-bf537/MAINTAINERS index 9ee557d..1cd4845 100644 --- a/board/tcm-bf537/MAINTAINERS +++ b/board/tcm-bf537/MAINTAINERS @@ -1,5 +1,5 @@ TCM-BF537 BOARD -M: Bluetechnix Tinyboards +#M: Bluetechnix Tinyboards S: Orphan (since 2014-03) F: board/tcm-bf537/ F: include/configs/tcm-bf537.h diff --git a/board/technexion/tao3530/Kconfig b/board/technexion/tao3530/Kconfig index 910a9cd..27bc91f 100644 --- a/board/technexion/tao3530/Kconfig +++ b/board/technexion/tao3530/Kconfig @@ -1,15 +1,12 @@ if TARGET_TAO3530 config SYS_BOARD - string default "tao3530" config SYS_VENDOR - string default "technexion" config SYS_CONFIG_NAME - string default "tao3530" endif diff --git a/board/technexion/twister/Kconfig b/board/technexion/twister/Kconfig index e6f811a..4c0ace8 100644 --- a/board/technexion/twister/Kconfig +++ b/board/technexion/twister/Kconfig @@ -1,15 +1,12 @@ if TARGET_TWISTER config SYS_BOARD - string default "twister" config SYS_VENDOR - string default "technexion" config SYS_CONFIG_NAME - string default "twister" endif diff --git a/board/teejet/mt_ventoux/Kconfig b/board/teejet/mt_ventoux/Kconfig index a567204..fd7196a 100644 --- a/board/teejet/mt_ventoux/Kconfig +++ b/board/teejet/mt_ventoux/Kconfig @@ -1,15 +1,12 @@ if TARGET_MT_VENTOUX config SYS_BOARD - string default "mt_ventoux" config SYS_VENDOR - string default "teejet" config SYS_CONFIG_NAME - string default "mt_ventoux" endif diff --git a/board/ti/am335x/Kconfig b/board/ti/am335x/Kconfig index 0e5149c..d8958ef 100644 --- a/board/ti/am335x/Kconfig +++ b/board/ti/am335x/Kconfig @@ -1,27 +1,23 @@ if TARGET_AM335X_EVM config SYS_CPU - string default "armv7" config SYS_BOARD - string default "am335x" config SYS_VENDOR - string default "ti" config SYS_SOC - string default "am33xx" config SYS_CONFIG_NAME - string default "am335x_evm" config CONS_INDEX int "UART used for console" + range 1 6 default 1 help The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced diff --git a/board/ti/am3517crane/Kconfig b/board/ti/am3517crane/Kconfig index c44dab5..ad025a3 100644 --- a/board/ti/am3517crane/Kconfig +++ b/board/ti/am3517crane/Kconfig @@ -1,15 +1,12 @@ if TARGET_AM3517_CRANE config SYS_BOARD - string default "am3517crane" config SYS_VENDOR - string default "ti" config SYS_CONFIG_NAME - string default "am3517_crane" endif diff --git a/board/ti/am43xx/Kconfig b/board/ti/am43xx/Kconfig index 3c61ec1..47b96bd 100644 --- a/board/ti/am43xx/Kconfig +++ b/board/ti/am43xx/Kconfig @@ -1,23 +1,18 @@ if TARGET_AM43XX_EVM config SYS_CPU - string default "armv7" config SYS_BOARD - string default "am43xx" config SYS_VENDOR - string default "ti" config SYS_SOC - string default "am33xx" config SYS_CONFIG_NAME - string default "am43xx_evm" endif diff --git a/board/ti/beagle/Kconfig b/board/ti/beagle/Kconfig index 10c81c2..c2eff9e 100644 --- a/board/ti/beagle/Kconfig +++ b/board/ti/beagle/Kconfig @@ -1,15 +1,12 @@ if TARGET_OMAP3_BEAGLE config SYS_BOARD - string default "beagle" config SYS_VENDOR - string default "ti" config SYS_CONFIG_NAME - string default "omap3_beagle" endif diff --git a/board/ti/dra7xx/Kconfig b/board/ti/dra7xx/Kconfig index 9ee13c5..3bbd866 100644 --- a/board/ti/dra7xx/Kconfig +++ b/board/ti/dra7xx/Kconfig @@ -1,15 +1,12 @@ if TARGET_DRA7XX_EVM config SYS_BOARD - string default "dra7xx" config SYS_VENDOR - string default "ti" config SYS_CONFIG_NAME - string default "dra7xx_evm" endif diff --git a/board/ti/evm/Kconfig b/board/ti/evm/Kconfig index c54ce33..f02aa31 100644 --- a/board/ti/evm/Kconfig +++ b/board/ti/evm/Kconfig @@ -1,15 +1,12 @@ if TARGET_OMAP3_EVM config SYS_BOARD - string default "evm" config SYS_VENDOR - string default "ti" config SYS_CONFIG_NAME - string default "omap3_evm" endif @@ -17,15 +14,12 @@ endif if TARGET_OMAP3_EVM_QUICK_MMC config SYS_BOARD - string default "evm" config SYS_VENDOR - string default "ti" config SYS_CONFIG_NAME - string default "omap3_evm_quick_mmc" endif @@ -33,15 +27,12 @@ endif if TARGET_OMAP3_EVM_QUICK_NAND config SYS_BOARD - string default "evm" config SYS_VENDOR - string default "ti" config SYS_CONFIG_NAME - string default "omap3_evm_quick_nand" endif diff --git a/board/ti/evm/MAINTAINERS b/board/ti/evm/MAINTAINERS index b2ebadc..d0b2788 100644 --- a/board/ti/evm/MAINTAINERS +++ b/board/ti/evm/MAINTAINERS @@ -6,7 +6,7 @@ F: include/configs/omap3_evm.h F: configs/omap3_evm_defconfig OMAP3_EVM_QUICK_MMC BOARD -M: - +#M: - S: Maintained F: include/configs/omap3_evm_quick_mmc.h F: configs/omap3_evm_quick_mmc_defconfig diff --git a/board/ti/ks2_evm/Kconfig b/board/ti/ks2_evm/Kconfig index 3108782..9c1e103 100644 --- a/board/ti/ks2_evm/Kconfig +++ b/board/ti/ks2_evm/Kconfig @@ -1,15 +1,12 @@ if TARGET_K2E_EVM config SYS_BOARD - string default "ks2_evm" config SYS_VENDOR - string default "ti" config SYS_CONFIG_NAME - string default "k2e_evm" endif @@ -17,15 +14,12 @@ endif if TARGET_K2HK_EVM config SYS_BOARD - string default "ks2_evm" config SYS_VENDOR - string default "ti" config SYS_CONFIG_NAME - string default "k2hk_evm" endif diff --git a/board/ti/ks2_evm/ddr3_k2hk.c b/board/ti/ks2_evm/ddr3_k2hk.c index 21a5a0a..6070a99 100644 --- a/board/ti/ks2_evm/ddr3_k2hk.c +++ b/board/ti/ks2_evm/ddr3_k2hk.c @@ -81,4 +81,8 @@ void ddr3_init(void) while (1) ; } + + /* Apply the workaround for PG 1.0 and 1.1 Silicons */ + if (cpu_revision() <= 1) + ddr3_err_reset_workaround(); } diff --git a/board/ti/omap5_uevm/Kconfig b/board/ti/omap5_uevm/Kconfig index 3592e7b..aa13844 100644 --- a/board/ti/omap5_uevm/Kconfig +++ b/board/ti/omap5_uevm/Kconfig @@ -1,15 +1,12 @@ if TARGET_OMAP5_UEVM config SYS_BOARD - string default "omap5_uevm" config SYS_VENDOR - string default "ti" config SYS_CONFIG_NAME - string default "omap5_uevm" endif diff --git a/board/ti/panda/Kconfig b/board/ti/panda/Kconfig index b69218b..8f277b6 100644 --- a/board/ti/panda/Kconfig +++ b/board/ti/panda/Kconfig @@ -1,15 +1,12 @@ if TARGET_OMAP4_PANDA config SYS_BOARD - string default "panda" config SYS_VENDOR - string default "ti" config SYS_CONFIG_NAME - string default "omap4_panda" endif diff --git a/board/ti/sdp3430/Kconfig b/board/ti/sdp3430/Kconfig index fcf7329..7e73d99 100644 --- a/board/ti/sdp3430/Kconfig +++ b/board/ti/sdp3430/Kconfig @@ -1,15 +1,12 @@ if TARGET_OMAP3_SDP3430 config SYS_BOARD - string default "sdp3430" config SYS_VENDOR - string default "ti" config SYS_CONFIG_NAME - string default "omap3_sdp3430" endif diff --git a/board/ti/sdp4430/Kconfig b/board/ti/sdp4430/Kconfig index 9c1d8fe..5826d8f 100644 --- a/board/ti/sdp4430/Kconfig +++ b/board/ti/sdp4430/Kconfig @@ -1,15 +1,12 @@ if TARGET_OMAP4_SDP4430 config SYS_BOARD - string default "sdp4430" config SYS_VENDOR - string default "ti" config SYS_CONFIG_NAME - string default "omap4_sdp4430" endif diff --git a/board/ti/ti814x/Kconfig b/board/ti/ti814x/Kconfig index 4d4f52c..9bd3d73 100644 --- a/board/ti/ti814x/Kconfig +++ b/board/ti/ti814x/Kconfig @@ -1,23 +1,18 @@ if TARGET_TI814X_EVM config SYS_CPU - string default "armv7" config SYS_BOARD - string default "ti814x" config SYS_VENDOR - string default "ti" config SYS_SOC - string default "am33xx" config SYS_CONFIG_NAME - string default "ti814x_evm" endif diff --git a/board/ti/ti816x/Kconfig b/board/ti/ti816x/Kconfig index 5821172..c0bdb9e 100644 --- a/board/ti/ti816x/Kconfig +++ b/board/ti/ti816x/Kconfig @@ -1,23 +1,18 @@ if TARGET_TI816X_EVM config SYS_CPU - string default "armv7" config SYS_BOARD - string default "ti816x" config SYS_VENDOR - string default "ti" config SYS_SOC - string default "am33xx" config SYS_CONFIG_NAME - string default "ti816x_evm" endif diff --git a/board/ti/ti816x/MAINTAINERS b/board/ti/ti816x/MAINTAINERS index 8bf6122..d3de144 100644 --- a/board/ti/ti816x/MAINTAINERS +++ b/board/ti/ti816x/MAINTAINERS @@ -1,5 +1,5 @@ TI816X BOARD -M: - +#M: - S: Maintained F: board/ti/ti816x/ F: include/configs/ti816x_evm.h diff --git a/board/ti/tnetv107xevm/Kconfig b/board/ti/tnetv107xevm/Kconfig index 9cffd7c..aa80d0f 100644 --- a/board/ti/tnetv107xevm/Kconfig +++ b/board/ti/tnetv107xevm/Kconfig @@ -1,23 +1,18 @@ if TARGET_TNETV107X_EVM config SYS_CPU - string default "arm1176" config SYS_BOARD - string default "tnetv107xevm" config SYS_VENDOR - string default "ti" config SYS_SOC - string default "tnetv107x" config SYS_CONFIG_NAME - string default "tnetv107x_evm" endif diff --git a/board/ti/tnetv107xevm/MAINTAINERS b/board/ti/tnetv107xevm/MAINTAINERS index 76ccfdc..8a92c6b 100644 --- a/board/ti/tnetv107xevm/MAINTAINERS +++ b/board/ti/tnetv107xevm/MAINTAINERS @@ -1,5 +1,5 @@ TNETV107XEVM BOARD -M: Chan-Taek Park +#M: Chan-Taek Park S: Orphan (since 2014-06) F: board/ti/tnetv107xevm/ F: include/configs/tnetv107x_evm.h diff --git a/board/timll/devkit3250/Kconfig b/board/timll/devkit3250/Kconfig index 4caee60..087356d 100644 --- a/board/timll/devkit3250/Kconfig +++ b/board/timll/devkit3250/Kconfig @@ -1,23 +1,18 @@ if TARGET_DEVKIT3250 config SYS_CPU - string default "arm926ejs" config SYS_BOARD - string default "devkit3250" config SYS_VENDOR - string default "timll" config SYS_SOC - string default "lpc32xx" config SYS_CONFIG_NAME - string default "devkit3250" endif diff --git a/board/timll/devkit8000/Kconfig b/board/timll/devkit8000/Kconfig index d1603f4..3c63ced 100644 --- a/board/timll/devkit8000/Kconfig +++ b/board/timll/devkit8000/Kconfig @@ -1,15 +1,12 @@ if TARGET_DEVKIT8000 config SYS_BOARD - string default "devkit8000" config SYS_VENDOR - string default "timll" config SYS_CONFIG_NAME - string default "devkit8000" endif diff --git a/board/toradex/colibri_pxa270/Kconfig b/board/toradex/colibri_pxa270/Kconfig index 9367c88..e4b1a5e 100644 --- a/board/toradex/colibri_pxa270/Kconfig +++ b/board/toradex/colibri_pxa270/Kconfig @@ -1,19 +1,15 @@ if TARGET_COLIBRI_PXA270 config SYS_CPU - string default "pxa" config SYS_BOARD - string default "colibri_pxa270" config SYS_VENDOR - string default "toradex" config SYS_CONFIG_NAME - string default "colibri_pxa270" endif diff --git a/board/toradex/colibri_t20_iris/Kconfig b/board/toradex/colibri_t20_iris/Kconfig index cccdd58..4bf7278 100644 --- a/board/toradex/colibri_t20_iris/Kconfig +++ b/board/toradex/colibri_t20_iris/Kconfig @@ -1,15 +1,12 @@ if TARGET_COLIBRI_T20_IRIS config SYS_BOARD - string default "colibri_t20_iris" config SYS_VENDOR - string default "toradex" config SYS_CONFIG_NAME - string default "colibri_t20_iris" endif diff --git a/board/toradex/colibri_t30/Kconfig b/board/toradex/colibri_t30/Kconfig index ea6c08a..3e436a2 100644 --- a/board/toradex/colibri_t30/Kconfig +++ b/board/toradex/colibri_t30/Kconfig @@ -1,15 +1,12 @@ if TARGET_COLIBRI_T30 config SYS_BOARD - string default "colibri_t30" config SYS_VENDOR - string default "toradex" config SYS_CONFIG_NAME - string default "colibri_t30" endif diff --git a/board/total5200/Kconfig b/board/total5200/Kconfig index 774eb98..ffa9516 100644 --- a/board/total5200/Kconfig +++ b/board/total5200/Kconfig @@ -1,11 +1,9 @@ if TARGET_TOTAL5200 config SYS_BOARD - string default "total5200" config SYS_CONFIG_NAME - string default "Total5200" endif diff --git a/board/total5200/MAINTAINERS b/board/total5200/MAINTAINERS index 983b96d..afb0058 100644 --- a/board/total5200/MAINTAINERS +++ b/board/total5200/MAINTAINERS @@ -1,5 +1,5 @@ TOTAL5200 BOARD -M: - +#M: - S: Maintained F: board/total5200/ F: include/configs/Total5200.h diff --git a/board/tqc/tqm5200/Kconfig b/board/tqc/tqm5200/Kconfig index c692196..0e4cd69 100644 --- a/board/tqc/tqm5200/Kconfig +++ b/board/tqc/tqm5200/Kconfig @@ -1,15 +1,12 @@ if TARGET_AEV config SYS_BOARD - string default "tqm5200" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "aev" endif @@ -17,15 +14,12 @@ endif if TARGET_CHARON config SYS_BOARD - string default "tqm5200" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "charon" endif @@ -33,15 +27,12 @@ endif if TARGET_TB5200 config SYS_BOARD - string default "tqm5200" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TB5200" endif @@ -49,15 +40,12 @@ endif if TARGET_TQM5200 config SYS_BOARD - string default "tqm5200" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TQM5200" endif diff --git a/board/tqc/tqm5200/MAINTAINERS b/board/tqc/tqm5200/MAINTAINERS index 581ef95..d3eb543 100644 --- a/board/tqc/tqm5200/MAINTAINERS +++ b/board/tqc/tqm5200/MAINTAINERS @@ -1,5 +1,5 @@ TQM5200 BOARD -M: - +#M: - S: Maintained F: board/tqc/tqm5200/ F: include/configs/aev.h diff --git a/board/tqc/tqm8260/Kconfig b/board/tqc/tqm8260/Kconfig index 0cf80dd..90a96eb 100644 --- a/board/tqc/tqm8260/Kconfig +++ b/board/tqc/tqm8260/Kconfig @@ -1,15 +1,12 @@ if TARGET_TQM8260 config SYS_BOARD - string default "tqm8260" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TQM8260" endif diff --git a/board/tqc/tqm8272/Kconfig b/board/tqc/tqm8272/Kconfig index 9be43d3..7b5cd8b 100644 --- a/board/tqc/tqm8272/Kconfig +++ b/board/tqc/tqm8272/Kconfig @@ -1,15 +1,12 @@ if TARGET_TQM8272 config SYS_BOARD - string default "tqm8272" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TQM8272" endif diff --git a/board/tqc/tqm8272/MAINTAINERS b/board/tqc/tqm8272/MAINTAINERS index a660de1..988d2b1 100644 --- a/board/tqc/tqm8272/MAINTAINERS +++ b/board/tqc/tqm8272/MAINTAINERS @@ -1,5 +1,5 @@ TQM8272 BOARD -M: - +#M: - S: Maintained F: board/tqc/tqm8272/ F: include/configs/TQM8272.h diff --git a/board/tqc/tqm834x/Kconfig b/board/tqc/tqm834x/Kconfig index cd2e817..028b846 100644 --- a/board/tqc/tqm834x/Kconfig +++ b/board/tqc/tqm834x/Kconfig @@ -1,15 +1,12 @@ if TARGET_TQM834X config SYS_BOARD - string default "tqm834x" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TQM834x" endif diff --git a/board/tqc/tqm834x/MAINTAINERS b/board/tqc/tqm834x/MAINTAINERS index 10c14f3..543ab1b 100644 --- a/board/tqc/tqm834x/MAINTAINERS +++ b/board/tqc/tqm834x/MAINTAINERS @@ -1,5 +1,5 @@ TQM834X BOARD -M: - +#M: - S: Maintained F: board/tqc/tqm834x/ F: include/configs/TQM834x.h diff --git a/board/tqc/tqm8xx/Kconfig b/board/tqc/tqm8xx/Kconfig index 5700d22..926a37a 100644 --- a/board/tqc/tqm8xx/Kconfig +++ b/board/tqc/tqm8xx/Kconfig @@ -1,15 +1,12 @@ if TARGET_FPS850L config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "FPS850L" endif @@ -17,15 +14,12 @@ endif if TARGET_FPS860L config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "FPS860L" endif @@ -33,15 +27,12 @@ endif if TARGET_NSCU config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "NSCU" endif @@ -49,15 +40,12 @@ endif if TARGET_SM850 config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "SM850" endif @@ -65,15 +53,12 @@ endif if TARGET_TK885D config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TK885D" endif @@ -81,15 +66,12 @@ endif if TARGET_TQM823L config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TQM823L" endif @@ -97,15 +79,12 @@ endif if TARGET_TQM823M config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TQM823M" endif @@ -113,15 +92,12 @@ endif if TARGET_TQM850L config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TQM850L" endif @@ -129,15 +105,12 @@ endif if TARGET_TQM850M config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TQM850M" endif @@ -145,15 +118,12 @@ endif if TARGET_TQM855L config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TQM855L" endif @@ -161,15 +131,12 @@ endif if TARGET_TQM855M config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TQM855M" endif @@ -177,15 +144,12 @@ endif if TARGET_TQM860L config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TQM860L" endif @@ -193,15 +157,12 @@ endif if TARGET_TQM860M config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TQM860M" endif @@ -209,15 +170,12 @@ endif if TARGET_TQM862L config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TQM862L" endif @@ -225,15 +183,12 @@ endif if TARGET_TQM862M config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TQM862M" endif @@ -241,15 +196,12 @@ endif if TARGET_TQM866M config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TQM866M" endif @@ -257,15 +209,12 @@ endif if TARGET_TQM885D config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "TQM885D" endif @@ -273,15 +222,12 @@ endif if TARGET_VIRTLAB2 config SYS_BOARD - string default "tqm8xx" config SYS_VENDOR - string default "tqc" config SYS_CONFIG_NAME - string default "virtlab2" endif diff --git a/board/tqc/tqm8xx/MAINTAINERS b/board/tqc/tqm8xx/MAINTAINERS index 161fa68..fe4a212 100644 --- a/board/tqc/tqm8xx/MAINTAINERS +++ b/board/tqc/tqm8xx/MAINTAINERS @@ -39,7 +39,7 @@ F: configs/virtlab2_defconfig F: configs/wtk_defconfig NSCU BOARD -M: - +#M: - S: Maintained F: include/configs/NSCU.h F: configs/NSCU_defconfig diff --git a/board/tqc/tqma6/Kconfig b/board/tqc/tqma6/Kconfig index 44b4142..b70cbf0 100644 --- a/board/tqc/tqma6/Kconfig +++ b/board/tqc/tqma6/Kconfig @@ -1,23 +1,18 @@ if TARGET_TQMA6 config SYS_CPU - string default "armv7" config SYS_BOARD - string default "tqma6" config SYS_VENDOR - string default "tqc" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "tqma6" endif diff --git a/board/trizepsiv/Kconfig b/board/trizepsiv/Kconfig index ddd2ce3..9844c69 100644 --- a/board/trizepsiv/Kconfig +++ b/board/trizepsiv/Kconfig @@ -1,15 +1,12 @@ if TARGET_TRIZEPSIV config SYS_CPU - string default "pxa" config SYS_BOARD - string default "trizepsiv" config SYS_CONFIG_NAME - string default "trizepsiv" endif diff --git a/board/ttcontrol/vision2/Kconfig b/board/ttcontrol/vision2/Kconfig index 3b18bea..4e2271b 100644 --- a/board/ttcontrol/vision2/Kconfig +++ b/board/ttcontrol/vision2/Kconfig @@ -1,23 +1,18 @@ if TARGET_VISION2 config SYS_CPU - string default "armv7" config SYS_BOARD - string default "vision2" config SYS_VENDOR - string default "ttcontrol" config SYS_SOC - string default "mx5" config SYS_CONFIG_NAME - string default "vision2" endif diff --git a/board/ttcontrol/vision2/vision2.c b/board/ttcontrol/vision2/vision2.c index b4d3994..247991d 100644 --- a/board/ttcontrol/vision2/vision2.c +++ b/board/ttcontrol/vision2/vision2.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -144,6 +145,11 @@ static void setup_uart(void) } #ifdef CONFIG_MXC_SPI +int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return (bus == 0 && cs == 1) ? 121 : -1; +} + void spi_io_init(void) { static const iomux_v3_cfg_t spi_pads[] = { diff --git a/board/udoo/Kconfig b/board/udoo/Kconfig index 69dbce0..a98d0d6 100644 --- a/board/udoo/Kconfig +++ b/board/udoo/Kconfig @@ -1,19 +1,15 @@ if TARGET_UDOO config SYS_CPU - string default "armv7" config SYS_BOARD - string default "udoo" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "udoo" endif diff --git a/board/utx8245/Kconfig b/board/utx8245/Kconfig index 3dd264b..aec0eb9 100644 --- a/board/utx8245/Kconfig +++ b/board/utx8245/Kconfig @@ -1,11 +1,9 @@ if TARGET_UTX8245 config SYS_BOARD - string default "utx8245" config SYS_CONFIG_NAME - string default "utx8245" endif diff --git a/board/v38b/Kconfig b/board/v38b/Kconfig index f473d89..653bfc1 100644 --- a/board/v38b/Kconfig +++ b/board/v38b/Kconfig @@ -1,11 +1,9 @@ if TARGET_V38B config SYS_BOARD - string default "v38b" config SYS_CONFIG_NAME - string default "v38b" endif diff --git a/board/v38b/MAINTAINERS b/board/v38b/MAINTAINERS index 1b12d0b..d1a6ae6 100644 --- a/board/v38b/MAINTAINERS +++ b/board/v38b/MAINTAINERS @@ -1,5 +1,5 @@ V38B BOARD -M: - +#M: - S: Maintained F: board/v38b/ F: include/configs/v38b.h diff --git a/board/ve8313/Kconfig b/board/ve8313/Kconfig index ed9efbf..a63744b 100644 --- a/board/ve8313/Kconfig +++ b/board/ve8313/Kconfig @@ -1,11 +1,9 @@ if TARGET_VE8313 config SYS_BOARD - string default "ve8313" config SYS_CONFIG_NAME - string default "ve8313" endif diff --git a/board/vpac270/Kconfig b/board/vpac270/Kconfig index e9170b0..a046f01 100644 --- a/board/vpac270/Kconfig +++ b/board/vpac270/Kconfig @@ -1,15 +1,12 @@ if TARGET_VPAC270 config SYS_CPU - string default "pxa" config SYS_BOARD - string default "vpac270" config SYS_CONFIG_NAME - string default "vpac270" endif diff --git a/board/w7o/Kconfig b/board/w7o/Kconfig index c0e879a..fd1b422 100644 --- a/board/w7o/Kconfig +++ b/board/w7o/Kconfig @@ -1,11 +1,9 @@ if TARGET_W7OLMC config SYS_BOARD - string default "w7o" config SYS_CONFIG_NAME - string default "W7OLMC" endif @@ -13,11 +11,9 @@ endif if TARGET_W7OLMG config SYS_BOARD - string default "w7o" config SYS_CONFIG_NAME - string default "W7OLMG" endif diff --git a/board/wandboard/Kconfig b/board/wandboard/Kconfig index a323afa..c862769 100644 --- a/board/wandboard/Kconfig +++ b/board/wandboard/Kconfig @@ -1,19 +1,15 @@ if TARGET_WANDBOARD config SYS_CPU - string default "armv7" config SYS_BOARD - string default "wandboard" config SYS_SOC - string default "mx6" config SYS_CONFIG_NAME - string default "wandboard" endif diff --git a/board/woodburn/Kconfig b/board/woodburn/Kconfig index 1aca934..6702319 100644 --- a/board/woodburn/Kconfig +++ b/board/woodburn/Kconfig @@ -1,19 +1,15 @@ if TARGET_WOODBURN config SYS_CPU - string default "arm1136" config SYS_BOARD - string default "woodburn" config SYS_SOC - string default "mx35" config SYS_CONFIG_NAME - string default "woodburn" endif @@ -21,19 +17,15 @@ endif if TARGET_WOODBURN_SD config SYS_CPU - string default "arm1136" config SYS_BOARD - string default "woodburn" config SYS_SOC - string default "mx35" config SYS_CONFIG_NAME - string default "woodburn_sd" endif diff --git a/board/woodburn/MAINTAINERS b/board/woodburn/MAINTAINERS index 715f2ca..4fbf6bb 100644 --- a/board/woodburn/MAINTAINERS +++ b/board/woodburn/MAINTAINERS @@ -6,7 +6,7 @@ F: include/configs/woodburn.h F: configs/woodburn_defconfig WOODBURN_SD BOARD -M: - +#M: - S: Maintained F: include/configs/woodburn_sd.h F: configs/woodburn_sd_defconfig diff --git a/board/xaeniax/Kconfig b/board/xaeniax/Kconfig index 9b41435..288f24b 100644 --- a/board/xaeniax/Kconfig +++ b/board/xaeniax/Kconfig @@ -1,15 +1,12 @@ if TARGET_XAENIAX config SYS_CPU - string default "pxa" config SYS_BOARD - string default "xaeniax" config SYS_CONFIG_NAME - string default "xaeniax" endif diff --git a/board/xaeniax/MAINTAINERS b/board/xaeniax/MAINTAINERS index f2fa4bf..44bb588 100644 --- a/board/xaeniax/MAINTAINERS +++ b/board/xaeniax/MAINTAINERS @@ -1,5 +1,5 @@ XAENIAX BOARD -M: - +#M: - S: Maintained F: board/xaeniax/ F: include/configs/xaeniax.h diff --git a/board/xes/xpedite1000/Kconfig b/board/xes/xpedite1000/Kconfig index 115439a..4d0ab2f 100644 --- a/board/xes/xpedite1000/Kconfig +++ b/board/xes/xpedite1000/Kconfig @@ -1,15 +1,12 @@ if TARGET_XPEDITE1000 config SYS_BOARD - string default "xpedite1000" config SYS_VENDOR - string default "xes" config SYS_CONFIG_NAME - string default "xpedite1000" endif diff --git a/board/xes/xpedite517x/Kconfig b/board/xes/xpedite517x/Kconfig index b938746..91bbd22 100644 --- a/board/xes/xpedite517x/Kconfig +++ b/board/xes/xpedite517x/Kconfig @@ -1,15 +1,12 @@ if TARGET_XPEDITE517X config SYS_BOARD - string default "xpedite517x" config SYS_VENDOR - string default "xes" config SYS_CONFIG_NAME - string default "xpedite517x" endif diff --git a/board/xes/xpedite517x/MAINTAINERS b/board/xes/xpedite517x/MAINTAINERS index c74fdf4..035cb14 100644 --- a/board/xes/xpedite517x/MAINTAINERS +++ b/board/xes/xpedite517x/MAINTAINERS @@ -1,5 +1,5 @@ XPEDITE517X BOARD -M: - +#M: - S: Maintained F: board/xes/xpedite517x/ F: include/configs/xpedite517x.h diff --git a/board/xes/xpedite520x/Kconfig b/board/xes/xpedite520x/Kconfig index e524ff1..9c0c246 100644 --- a/board/xes/xpedite520x/Kconfig +++ b/board/xes/xpedite520x/Kconfig @@ -1,15 +1,12 @@ if TARGET_XPEDITE520X config SYS_BOARD - string default "xpedite520x" config SYS_VENDOR - string default "xes" config SYS_CONFIG_NAME - string default "xpedite520x" endif diff --git a/board/xes/xpedite520x/MAINTAINERS b/board/xes/xpedite520x/MAINTAINERS index 7f9bf9a..2fd4ac0 100644 --- a/board/xes/xpedite520x/MAINTAINERS +++ b/board/xes/xpedite520x/MAINTAINERS @@ -1,5 +1,5 @@ XPEDITE520X BOARD -M: - +#M: - S: Maintained F: board/xes/xpedite520x/ F: include/configs/xpedite520x.h diff --git a/board/xes/xpedite537x/Kconfig b/board/xes/xpedite537x/Kconfig index cab2ab3..35b3917 100644 --- a/board/xes/xpedite537x/Kconfig +++ b/board/xes/xpedite537x/Kconfig @@ -1,15 +1,12 @@ if TARGET_XPEDITE537X config SYS_BOARD - string default "xpedite537x" config SYS_VENDOR - string default "xes" config SYS_CONFIG_NAME - string default "xpedite537x" endif diff --git a/board/xes/xpedite537x/MAINTAINERS b/board/xes/xpedite537x/MAINTAINERS index a13dcf1..45a420d 100644 --- a/board/xes/xpedite537x/MAINTAINERS +++ b/board/xes/xpedite537x/MAINTAINERS @@ -1,5 +1,5 @@ XPEDITE537X BOARD -M: - +#M: - S: Maintained F: board/xes/xpedite537x/ F: include/configs/xpedite537x.h diff --git a/board/xes/xpedite550x/Kconfig b/board/xes/xpedite550x/Kconfig index fa11719..1b00137 100644 --- a/board/xes/xpedite550x/Kconfig +++ b/board/xes/xpedite550x/Kconfig @@ -1,15 +1,12 @@ if TARGET_XPEDITE550X config SYS_BOARD - string default "xpedite550x" config SYS_VENDOR - string default "xes" config SYS_CONFIG_NAME - string default "xpedite550x" endif diff --git a/board/xes/xpedite550x/MAINTAINERS b/board/xes/xpedite550x/MAINTAINERS index 12d321e..b22f0e6 100644 --- a/board/xes/xpedite550x/MAINTAINERS +++ b/board/xes/xpedite550x/MAINTAINERS @@ -1,5 +1,5 @@ XPEDITE550X BOARD -M: - +#M: - S: Maintained F: board/xes/xpedite550x/ F: include/configs/xpedite550x.h diff --git a/board/xilinx/microblaze-generic/Kconfig b/board/xilinx/microblaze-generic/Kconfig index b9cb334..461d7dc 100644 --- a/board/xilinx/microblaze-generic/Kconfig +++ b/board/xilinx/microblaze-generic/Kconfig @@ -1,15 +1,12 @@ if TARGET_MICROBLAZE_GENERIC config SYS_BOARD - string default "microblaze-generic" config SYS_VENDOR - string default "xilinx" config SYS_CONFIG_NAME - string default "microblaze-generic" endif diff --git a/board/xilinx/ml507/Kconfig b/board/xilinx/ml507/Kconfig index 6f3483d..d580a7b 100644 --- a/board/xilinx/ml507/Kconfig +++ b/board/xilinx/ml507/Kconfig @@ -1,15 +1,12 @@ if TARGET_ML507 config SYS_BOARD - string default "ml507" config SYS_VENDOR - string default "xilinx" config SYS_CONFIG_NAME - string default "ml507" endif diff --git a/board/xilinx/ppc405-generic/Kconfig b/board/xilinx/ppc405-generic/Kconfig index 98411c7..dfbc07b 100644 --- a/board/xilinx/ppc405-generic/Kconfig +++ b/board/xilinx/ppc405-generic/Kconfig @@ -1,15 +1,12 @@ if TARGET_XILINX_PPC405_GENERIC config SYS_BOARD - string default "ppc405-generic" config SYS_VENDOR - string default "xilinx" config SYS_CONFIG_NAME - string default "xilinx-ppc405-generic" endif diff --git a/board/xilinx/ppc440-generic/Kconfig b/board/xilinx/ppc440-generic/Kconfig index 37abe63..d40783a 100644 --- a/board/xilinx/ppc440-generic/Kconfig +++ b/board/xilinx/ppc440-generic/Kconfig @@ -1,15 +1,12 @@ if TARGET_XILINX_PPC440_GENERIC config SYS_BOARD - string default "ppc440-generic" config SYS_VENDOR - string default "xilinx" config SYS_CONFIG_NAME - string default "xilinx-ppc440-generic" endif diff --git a/board/zeus/Kconfig b/board/zeus/Kconfig index 5678694..6779650 100644 --- a/board/zeus/Kconfig +++ b/board/zeus/Kconfig @@ -1,11 +1,9 @@ if TARGET_ZEUS config SYS_BOARD - string default "zeus" config SYS_CONFIG_NAME - string default "zeus" endif diff --git a/board/zipitz2/Kconfig b/board/zipitz2/Kconfig index 702edbf..5f7fe1b 100644 --- a/board/zipitz2/Kconfig +++ b/board/zipitz2/Kconfig @@ -1,15 +1,12 @@ if TARGET_ZIPITZ2 config SYS_CPU - string default "pxa" config SYS_BOARD - string default "zipitz2" config SYS_CONFIG_NAME - string default "zipitz2" endif diff --git a/common/Kconfig b/common/Kconfig new file mode 100644 index 0000000..216a8de --- /dev/null +++ b/common/Kconfig @@ -0,0 +1,34 @@ +menu "Command line interface" + depends on !SPL_BUILD + +config CMD_BOOTM + bool "Enable bootm command" + default y + help + Boot an application image from the memory. + +config CMD_CRC32 + bool "Enable crc32 command" + default y + help + Compute CRC32. + +config CMD_EXPORTENV + bool "Enable env export command" + default y + help + Export environments. + +config CMD_IMPORTENV + bool "Enable env import command" + default y + help + Import environments. + +config CMD_GO + bool "Enable go command" + default y + help + Start an application at a given address. + +endmenu diff --git a/common/Makefile b/common/Makefile index aca0f7f..b19d379 100644 --- a/common/Makefile +++ b/common/Makefile @@ -243,13 +243,8 @@ obj-y += cmd_nvedit.o #environment obj-y += env_common.o #others -ifdef CONFIG_DDR_SPD -SPD := y -endif -ifdef CONFIG_SPD_EEPROM -SPD := y -endif -obj-$(SPD) += ddr_spd.o +obj-$(CONFIG_DDR_SPD) += ddr_spd.o +obj-$(CONFIG_SPD_EEPROM) += ddr_spd.o obj-$(CONFIG_HWCONFIG) += hwconfig.o obj-$(CONFIG_BOUNCE_BUFFER) += bouncebuf.o obj-y += console.o @@ -264,4 +259,10 @@ obj-$(CONFIG_IO_TRACE) += iotrace.o obj-y += memsize.o obj-y += stdio.o +# This option is not just y/n - it can have a numeric value +ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV +obj-y += aboot.o +obj-y += fb_mmc.o +endif + CFLAGS_env_embedded.o := -Wa,--no-warn -DENV_CRC=$(shell tools/envcrc 2>/dev/null) diff --git a/common/aboot.c b/common/aboot.c new file mode 100644 index 0000000..d5c464b --- /dev/null +++ b/common/aboot.c @@ -0,0 +1,243 @@ +/* + * Copyright (c) 2009, Google Inc. + * All rights reserved. + * + * Copyright (c) 2009-2014, The Linux Foundation. All rights reserved. + * Portions Copyright 2014 Broadcom Corporation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of The Linux Foundation nor + * the names of its contributors may be used to endorse or promote + * products derived from this software without specific prior written + * permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * NOTE: + * Although it is very similar, this license text is not identical + * to the "BSD-3-Clause", therefore, DO NOT MODIFY THIS LICENSE TEXT! + */ + +#include +#include +#include +#include +#include +#include + +void write_sparse_image(block_dev_desc_t *dev_desc, + disk_partition_t *info, const char *part_name, + void *data, unsigned sz) +{ + lbaint_t blk; + lbaint_t blkcnt; + lbaint_t blks; + uint32_t bytes_written = 0; + unsigned int chunk; + unsigned int chunk_data_sz; + uint32_t *fill_buf = NULL; + uint32_t fill_val; + sparse_header_t *sparse_header; + chunk_header_t *chunk_header; + uint32_t total_blocks = 0; + int i; + + /* Read and skip over sparse image header */ + sparse_header = (sparse_header_t *) data; + + data += sparse_header->file_hdr_sz; + if (sparse_header->file_hdr_sz > sizeof(sparse_header_t)) + { + /* + * Skip the remaining bytes in a header that is longer than + * we expected. + */ + data += (sparse_header->file_hdr_sz - sizeof(sparse_header_t)); + } + + debug("=== Sparse Image Header ===\n"); + debug("magic: 0x%x\n", sparse_header->magic); + debug("major_version: 0x%x\n", sparse_header->major_version); + debug("minor_version: 0x%x\n", sparse_header->minor_version); + debug("file_hdr_sz: %d\n", sparse_header->file_hdr_sz); + debug("chunk_hdr_sz: %d\n", sparse_header->chunk_hdr_sz); + debug("blk_sz: %d\n", sparse_header->blk_sz); + debug("total_blks: %d\n", sparse_header->total_blks); + debug("total_chunks: %d\n", sparse_header->total_chunks); + + /* verify sparse_header->blk_sz is an exact multiple of info->blksz */ + if (sparse_header->blk_sz != + (sparse_header->blk_sz & ~(info->blksz - 1))) { + printf("%s: Sparse image block size issue [%u]\n", + __func__, sparse_header->blk_sz); + fastboot_fail("sparse image block size issue"); + return; + } + + puts("Flashing Sparse Image\n"); + + /* Start processing chunks */ + blk = info->start; + for (chunk=0; chunktotal_chunks; chunk++) + { + /* Read and skip over chunk header */ + chunk_header = (chunk_header_t *) data; + data += sizeof(chunk_header_t); + + if (chunk_header->chunk_type != CHUNK_TYPE_RAW) { + debug("=== Chunk Header ===\n"); + debug("chunk_type: 0x%x\n", chunk_header->chunk_type); + debug("chunk_data_sz: 0x%x\n", chunk_header->chunk_sz); + debug("total_size: 0x%x\n", chunk_header->total_sz); + } + + if (sparse_header->chunk_hdr_sz > sizeof(chunk_header_t)) + { + /* + * Skip the remaining bytes in a header that is longer + * than we expected. + */ + data += (sparse_header->chunk_hdr_sz - + sizeof(chunk_header_t)); + } + + chunk_data_sz = sparse_header->blk_sz * chunk_header->chunk_sz; + blkcnt = chunk_data_sz / info->blksz; + switch (chunk_header->chunk_type) + { + case CHUNK_TYPE_RAW: + if (chunk_header->total_sz != + (sparse_header->chunk_hdr_sz + chunk_data_sz)) + { + fastboot_fail( + "Bogus chunk size for chunk type Raw"); + return; + } + + if (blk + blkcnt > info->start + info->size) { + printf( + "%s: Request would exceed partition size!\n", + __func__); + fastboot_fail( + "Request would exceed partition size!"); + return; + } + + blks = dev_desc->block_write(dev_desc->dev, blk, blkcnt, + data); + if (blks != blkcnt) { + printf("%s: Write failed " LBAFU "\n", + __func__, blks); + fastboot_fail("flash write failure"); + return; + } + blk += blkcnt; + bytes_written += blkcnt * info->blksz; + total_blocks += chunk_header->chunk_sz; + data += chunk_data_sz; + break; + + case CHUNK_TYPE_FILL: + if (chunk_header->total_sz != + (sparse_header->chunk_hdr_sz + sizeof(uint32_t))) + { + fastboot_fail( + "Bogus chunk size for chunk type FILL"); + return; + } + + fill_buf = (uint32_t *) + memalign(ARCH_DMA_MINALIGN, + ROUNDUP(info->blksz, + ARCH_DMA_MINALIGN)); + if (!fill_buf) + { + fastboot_fail( + "Malloc failed for: CHUNK_TYPE_FILL"); + return; + } + + fill_val = *(uint32_t *)data; + data = (char *) data + sizeof(uint32_t); + + for (i = 0; i < (info->blksz / sizeof(fill_val)); i++) + fill_buf[i] = fill_val; + + if (blk + blkcnt > info->start + info->size) { + printf( + "%s: Request would exceed partition size!\n", + __func__); + fastboot_fail( + "Request would exceed partition size!"); + return; + } + + for (i = 0; i < blkcnt; i++) { + blks = dev_desc->block_write(dev_desc->dev, + blk, 1, fill_buf); + if (blks != 1) { + printf( + "%s: Write failed, block # " LBAFU "\n", + __func__, blkcnt); + fastboot_fail("flash write failure"); + free(fill_buf); + return; + } + blk++; + } + bytes_written += blkcnt * info->blksz; + total_blocks += chunk_data_sz / sparse_header->blk_sz; + + free(fill_buf); + break; + + case CHUNK_TYPE_DONT_CARE: + total_blocks += chunk_header->chunk_sz; + break; + + case CHUNK_TYPE_CRC32: + if (chunk_header->total_sz != + sparse_header->chunk_hdr_sz) + { + fastboot_fail( + "Bogus chunk size for chunk type Dont Care"); + return; + } + total_blocks += chunk_header->chunk_sz; + data += chunk_data_sz; + break; + + default: + printf("%s: Unknown chunk type: %x\n", __func__, + chunk_header->chunk_type); + fastboot_fail("Unknown chunk type"); + return; + } + } + + debug("Wrote %d blocks, expected to write %d blocks\n", + total_blocks, sparse_header->total_blks); + printf("........ wrote %u bytes to '%s'\n", bytes_written, part_name); + + if (total_blocks != sparse_header->total_blks) + fastboot_fail("sparse image write failure"); + + fastboot_okay(""); + return; +} diff --git a/common/board_f.c b/common/board_f.c index 4ece2b6..e6aa298 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -34,7 +34,7 @@ #ifdef CONFIG_MPC5xxx #include #endif -#if (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) +#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) #include #endif @@ -341,21 +341,23 @@ static int setup_ram_buf(void) static int setup_fdt(void) { -#ifdef CONFIG_OF_EMBED +#ifdef CONFIG_OF_CONTROL +# ifdef CONFIG_OF_EMBED /* Get a pointer to the FDT */ gd->fdt_blob = __dtb_dt_begin; -#elif defined CONFIG_OF_SEPARATE +# elif defined CONFIG_OF_SEPARATE /* FDT is at end of image */ gd->fdt_blob = (ulong *)&_end; -#elif defined(CONFIG_OF_HOSTFILE) +# elif defined(CONFIG_OF_HOSTFILE) if (read_fdt_from_file()) { puts("Failed to read control FDT\n"); return -1; } -#endif +# endif /* Allow the early environment to override the fdt address */ gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, (uintptr_t)gd->fdt_blob); +#endif return 0; } @@ -392,7 +394,7 @@ static int setup_dest_addr(void) gd->ram_top = board_get_usable_ram_top(gd->mon_len); gd->relocaddr = gd->ram_top; debug("Ram top: %08lX\n", (ulong)gd->ram_top); -#if (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) +#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) /* * We need to make sure the location we intend to put secondary core * boot code is reserved and not used by any part of u-boot @@ -831,6 +833,8 @@ static init_fnc_t init_sequence_f[] = { #ifdef CONFIG_OF_CONTROL fdtdec_check_fdt, #endif + initf_malloc, + initf_dm, #if defined(CONFIG_BOARD_EARLY_INIT_F) board_early_init_f, #endif @@ -866,8 +870,6 @@ static init_fnc_t init_sequence_f[] = { sdram_adjust_866, init_timebase, #endif - initf_malloc, - initf_dm, init_baud_rate, /* initialze baudrate settings */ serial_init, /* serial communications setup */ console_init_f, /* stage 1 init of console */ diff --git a/common/board_r.c b/common/board_r.c index f9647e1..231c6d6 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -715,6 +715,15 @@ init_fnc_t init_sequence_r[] = { /* TODO: could x86/PPC have this also perhaps? */ #ifdef CONFIG_ARM initr_caches, +#endif + initr_reloc_global_data, + initr_barrier, + initr_malloc, + bootstage_relocate, +#ifdef CONFIG_DM + initr_dm, +#endif +#ifdef CONFIG_ARM board_init, /* Setup chipselects */ #endif /* @@ -726,7 +735,7 @@ init_fnc_t init_sequence_r[] = { #ifdef CONFIG_CLOCKS set_cpu_clk_info, /* Setup clock information */ #endif - initr_reloc_global_data, + stdio_init_tables, initr_serial, initr_announce, INIT_FUNC_WATCHDOG_RESET @@ -763,12 +772,6 @@ init_fnc_t init_sequence_r[] = { #ifdef CONFIG_WINBOND_83C553 initr_w83c553f, #endif - initr_barrier, - initr_malloc, - bootstage_relocate, -#ifdef CONFIG_DM - initr_dm, -#endif #ifdef CONFIG_ARCH_EARLY_INIT_R arch_early_init_r, #endif @@ -818,7 +821,7 @@ init_fnc_t init_sequence_r[] = { */ initr_pci, #endif - stdio_init, + stdio_add_devices, initr_jumptable, #ifdef CONFIG_API initr_api, @@ -912,7 +915,7 @@ void board_init_r(gd_t *new_gd, ulong dest_addr) int i; #endif -#ifndef CONFIG_X86 +#if !defined(CONFIG_X86) && !defined(CONFIG_ARM) && !defined(CONFIG_ARM64) gd = new_gd; #endif diff --git a/common/bouncebuf.c b/common/bouncebuf.c index 9eece6d..054d9e0 100644 --- a/common/bouncebuf.c +++ b/common/bouncebuf.c @@ -23,7 +23,7 @@ static int addr_aligned(struct bounce_buffer *state) /* Check if length is aligned */ if (state->len != state->len_aligned) { - debug("Unaligned buffer length %d\n", state->len); + debug("Unaligned buffer length %zu\n", state->len); return 0; } diff --git a/common/cmd_boot.c b/common/cmd_boot.c index 8f2e070..630563a 100644 --- a/common/cmd_boot.c +++ b/common/cmd_boot.c @@ -38,6 +38,7 @@ static int do_go(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) * pass address parameter as argv[0] (aka command name), * and all remaining args */ + cleanup_before_linux(); rc = do_go_exec ((void *)addr, argc - 1, argv + 1); if (rc != 0) rcode = 1; diff --git a/common/cmd_fastboot.c b/common/cmd_fastboot.c index 83fa7bd..909616d 100644 --- a/common/cmd_fastboot.c +++ b/common/cmd_fastboot.c @@ -30,7 +30,8 @@ static int do_fastboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) } U_BOOT_CMD( - fastboot, 1, 1, do_fastboot, - "fastboot - enter USB Fastboot protocol", - "" + fastboot, 1, 0, do_fastboot, + "use USB Fastboot protocol", + "\n" + " - run as a fastboot usb device" ); diff --git a/common/cmd_mem.c b/common/cmd_mem.c index 1febddb..bfca59e 100644 --- a/common/cmd_mem.c +++ b/common/cmd_mem.c @@ -215,7 +215,7 @@ static int do_mem_mw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) } #ifdef CONFIG_MX_CYCLIC -int do_mem_mdc ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +static int do_mem_mdc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int i; ulong count; @@ -242,7 +242,7 @@ int do_mem_mdc ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 0; } -int do_mem_mwc ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +static int do_mem_mwc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { int i; ulong count; @@ -595,7 +595,8 @@ static int do_mem_loop(cmd_tbl_t *cmdtp, int flag, int argc, } #ifdef CONFIG_LOOPW -int do_mem_loopw (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) +static int do_mem_loopw(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) { ulong addr, length, i, bytes; int size; diff --git a/common/cmd_mtdparts.c b/common/cmd_mtdparts.c index 3cb0571..422c069 100644 --- a/common/cmd_mtdparts.c +++ b/common/cmd_mtdparts.c @@ -862,7 +862,7 @@ static int device_parse(const char *const mtd_dev, const char **ret, struct mtd_ debug("dev type = %d (%s), dev num = %d, mtd-id = %s\n", id->type, MTD_DEV_TYPE(id->type), id->num, id->mtd_id); - debug("parsing partitions %.*s\n", (pend ? pend - p : strlen(p)), p); + debug("parsing partitions %.*s\n", (int)(pend ? pend - p : strlen(p)), p); /* parse partitions */ @@ -1007,7 +1007,7 @@ static struct mtdids* id_find_by_mtd_id(const char *mtd_id, unsigned int mtd_id_ list_for_each(entry, &mtdids) { id = list_entry(entry, struct mtdids, link); - debug("entry: '%s' (len = %d)\n", + debug("entry: '%s' (len = %zu)\n", id->mtd_id, strlen(id->mtd_id)); if (mtd_id_len != strlen(id->mtd_id)) diff --git a/common/cmd_nand.c b/common/cmd_nand.c index f9ced9d..7f962dc 100644 --- a/common/cmd_nand.c +++ b/common/cmd_nand.c @@ -647,8 +647,6 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) read = strncmp(cmd, "read", 4) == 0; /* 1 = read, 0 = write */ printf("\nNAND %s: ", read ? "read" : "write"); - nand = &nand_info[dev]; - s = strchr(cmd, '.'); if (s && !strcmp(s, ".raw")) { @@ -657,6 +655,8 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) if (arg_off(argv[3], &dev, &off, &size, &maxsize)) return 1; + nand = &nand_info[dev]; + if (argc > 4 && !str2long(argv[4], &pagecount)) { printf("'%s' is not a number\n", argv[4]); return 1; @@ -679,6 +679,8 @@ static int do_nand(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) rwsize = size; } + nand = &nand_info[dev]; + if (!s || !strcmp(s, ".jffs2") || !strcmp(s, ".e") || !strcmp(s, ".i")) { if (read) diff --git a/common/cmd_sf.c b/common/cmd_sf.c index b4ceb71..c60e8d1 100644 --- a/common/cmd_sf.c +++ b/common/cmd_sf.c @@ -13,19 +13,6 @@ #include -#ifndef CONFIG_SF_DEFAULT_SPEED -# define CONFIG_SF_DEFAULT_SPEED 1000000 -#endif -#ifndef CONFIG_SF_DEFAULT_MODE -# define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 -#endif -#ifndef CONFIG_SF_DEFAULT_CS -# define CONFIG_SF_DEFAULT_CS 0 -#endif -#ifndef CONFIG_SF_DEFAULT_BUS -# define CONFIG_SF_DEFAULT_BUS 0 -#endif - static struct spi_flash *flash; diff --git a/common/cmd_spi.c b/common/cmd_spi.c index 3c8e913..be5709c 100644 --- a/common/cmd_spi.c +++ b/common/cmd_spi.c @@ -11,6 +11,7 @@ #include #include +#include #include /*----------------------------------------------------------------------- @@ -38,6 +39,35 @@ static int bitlen; static uchar dout[MAX_SPI_BYTES]; static uchar din[MAX_SPI_BYTES]; +static int do_spi_xfer(int bus, int cs) +{ + struct spi_slave *slave; + int rcode = 0; + + slave = spi_setup_slave(bus, cs, 1000000, mode); + if (!slave) { + printf("Invalid device %d:%d\n", bus, cs); + return -EINVAL; + } + + spi_claim_bus(slave); + if (spi_xfer(slave, bitlen, dout, din, + SPI_XFER_BEGIN | SPI_XFER_END) != 0) { + printf("Error during SPI transaction\n"); + rcode = -EIO; + } else { + int j; + + for (j = 0; j < ((bitlen + 7) / 8); j++) + printf("%02X", din[j]); + printf("\n"); + } + spi_release_bus(slave); + spi_free_slave(slave); + + return rcode; +} + /* * SPI read/write * @@ -51,11 +81,9 @@ static uchar din[MAX_SPI_BYTES]; int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { - struct spi_slave *slave; char *cp = 0; uchar tmp; int j; - int rcode = 0; /* * We use the last specified parameters, unless new ones are @@ -103,27 +131,10 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) return 1; } - slave = spi_setup_slave(bus, cs, 1000000, mode); - if (!slave) { - printf("Invalid device %d:%d\n", bus, cs); + if (do_spi_xfer(bus, cs)) return 1; - } - - spi_claim_bus(slave); - if(spi_xfer(slave, bitlen, dout, din, - SPI_XFER_BEGIN | SPI_XFER_END) != 0) { - printf("Error during SPI transaction\n"); - rcode = 1; - } else { - for(j = 0; j < ((bitlen + 7) / 8); j++) { - printf("%02X", din[j]); - } - printf("\n"); - } - spi_release_bus(slave); - spi_free_slave(slave); - return rcode; + return 0; } /***************************************************/ diff --git a/common/cmd_unzip.c b/common/cmd_unzip.c index b02c69e..0686be6 100644 --- a/common/cmd_unzip.c +++ b/common/cmd_unzip.c @@ -39,3 +39,50 @@ U_BOOT_CMD( "unzip a memory region", "srcaddr dstaddr [dstsize]" ); + +static int do_gzwrite(cmd_tbl_t *cmdtp, int flag, + int argc, char * const argv[]) +{ + block_dev_desc_t *bdev; + int ret; + unsigned char *addr; + unsigned long length; + unsigned long writebuf = 1<<20; + u64 startoffs = 0; + u64 szexpected = 0; + + if (argc < 5) + return CMD_RET_USAGE; + ret = get_device(argv[1], argv[2], &bdev); + if (ret < 0) + return CMD_RET_FAILURE; + + addr = (unsigned char *)simple_strtoul(argv[3], NULL, 16); + length = simple_strtoul(argv[4], NULL, 16); + + if (5 < argc) { + writebuf = simple_strtoul(argv[5], NULL, 16); + if (6 < argc) { + startoffs = simple_strtoull(argv[6], NULL, 16); + if (7 < argc) + szexpected = simple_strtoull(argv[7], + NULL, 16); + } + } + + ret = gzwrite(addr, length, bdev, writebuf, startoffs, szexpected); + + return ret ? CMD_RET_FAILURE : CMD_RET_SUCCESS; +} + +U_BOOT_CMD( + gzwrite, 8, 0, do_gzwrite, + "unzip and write memory to block device", + " length [wbuf=1M [offs=0 [outsize=0]]]\n" + "\twbuf is the size in bytes (hex) of write buffer\n" + "\t\tand should be padded to erase size for SSDs\n" + "\toffs is the output start offset in bytes (hex)\n" + "\toutsize is the size of the expected output (hex bytes)\n" + "\t\tand is required for files with uncompressed lengths\n" + "\t\t4 GiB or larger\n" +); diff --git a/common/console.c b/common/console.c index 898da39..5a2f411 100644 --- a/common/console.c +++ b/common/console.c @@ -524,6 +524,7 @@ static int ctrlc_disabled = 0; /* see disable_ctrl() */ static int ctrlc_was_pressed = 0; int ctrlc(void) { +#ifndef CONFIG_SANDBOX if (!ctrlc_disabled && gd->have_console) { if (tstc()) { switch (getc()) { @@ -535,6 +536,8 @@ int ctrlc(void) } } } +#endif + return 0; } /* Reads user's confirmation. diff --git a/common/fb_mmc.c b/common/fb_mmc.c new file mode 100644 index 0000000..fb06d8a --- /dev/null +++ b/common/fb_mmc.c @@ -0,0 +1,92 @@ +/* + * Copyright 2014 Broadcom Corporation. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include + +/* The 64 defined bytes plus the '\0' */ +#define RESPONSE_LEN (64 + 1) + +static char *response_str; + +void fastboot_fail(const char *s) +{ + strncpy(response_str, "FAIL", 4); + strncat(response_str, s, RESPONSE_LEN - 4 - 1); +} + +void fastboot_okay(const char *s) +{ + strncpy(response_str, "OKAY", 4); + strncat(response_str, s, RESPONSE_LEN - 4 - 1); +} + +static void write_raw_image(block_dev_desc_t *dev_desc, disk_partition_t *info, + const char *part_name, void *buffer, + unsigned int download_bytes) +{ + lbaint_t blkcnt; + lbaint_t blks; + + /* determine number of blocks to write */ + blkcnt = ((download_bytes + (info->blksz - 1)) & ~(info->blksz - 1)); + blkcnt = blkcnt / info->blksz; + + if (blkcnt > info->size) { + error("too large for partition: '%s'\n", part_name); + fastboot_fail("too large for partition"); + return; + } + + puts("Flashing Raw Image\n"); + + blks = dev_desc->block_write(dev_desc->dev, info->start, blkcnt, + buffer); + if (blks != blkcnt) { + error("failed writing to device %d\n", dev_desc->dev); + fastboot_fail("failed writing to device"); + return; + } + + printf("........ wrote " LBAFU " bytes to '%s'\n", blkcnt * info->blksz, + part_name); + fastboot_okay(""); +} + +void fb_mmc_flash_write(const char *cmd, void *download_buffer, + unsigned int download_bytes, char *response) +{ + int ret; + block_dev_desc_t *dev_desc; + disk_partition_t info; + + /* initialize the response buffer */ + response_str = response; + + dev_desc = get_dev("mmc", CONFIG_FASTBOOT_FLASH_MMC_DEV); + if (!dev_desc || dev_desc->type == DEV_TYPE_UNKNOWN) { + error("invalid mmc device\n"); + fastboot_fail("invalid mmc device"); + return; + } + + ret = get_partition_info_efi_by_name(dev_desc, cmd, &info); + if (ret) { + error("cannot find partition: '%s'\n", cmd); + fastboot_fail("cannot find partition"); + return; + } + + if (is_sparse_image(download_buffer)) + write_sparse_image(dev_desc, &info, cmd, download_buffer, + download_bytes); + else + write_raw_image(dev_desc, &info, cmd, download_buffer, + download_bytes); +} diff --git a/common/fdt_support.c b/common/fdt_support.c index 784a570..3f64156 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -930,15 +930,6 @@ void fdt_del_node_and_alias(void *blob, const char *alias) fdt_delprop(blob, off, alias); } -/* Helper to read a big number; size is in cells (not bytes) */ -static inline u64 of_read_number(const fdt32_t *cell, int size) -{ - u64 r = 0; - while (size--) - r = (r << 32) | fdt32_to_cpu(*(cell++)); - return r; -} - #define PRu64 "%llx" /* Max address size we deal with */ @@ -972,7 +963,7 @@ struct of_bus { }; /* Default translator (generic bus) */ -static void of_bus_default_count_cells(void *blob, int parentoffset, +void of_bus_default_count_cells(void *blob, int parentoffset, int *addrc, int *sizec) { const fdt32_t *prop; diff --git a/common/kgdb.c b/common/kgdb.c index 8a621ad..d357463 100644 --- a/common/kgdb.c +++ b/common/kgdb.c @@ -103,7 +103,7 @@ static char remcomOutBuffer[BUFMAX]; static char remcomRegBuffer[BUFMAX]; static int initialized = 0; -static int kgdb_active = 0, first_entry = 1; +static int kgdb_active; static struct pt_regs entry_regs; static long error_jmp_buf[BUFMAX/2]; static int longjmp_on_fault = 0; @@ -348,16 +348,7 @@ handle_exception (struct pt_regs *regs) kgdb_enter(regs, &kd); - if (first_entry) { - /* - * the first time we enter kgdb, we save the processor - * state so that we can return to the monitor if the - * remote end quits gdb (or at least, tells us to quit - * with the 'k' packet) - */ - entry_regs = *regs; - first_entry = 0; - } + entry_regs = *regs; ptr = remcomOutBuffer; @@ -459,7 +450,6 @@ handle_exception (struct pt_regs *regs) case 'k': /* kill the program, actually return to monitor */ kd.extype = KGDBEXIT_KILL; *regs = entry_regs; - first_entry = 1; goto doexit; case 'C': /* CSS continue with signal SS */ diff --git a/common/spl/spl.c b/common/spl/spl.c index 774fdad..b16664f 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -86,7 +86,7 @@ void spl_parse_image_header(const struct image_header *header) spl_image.os = image_get_os(header); spl_image.name = image_get_name(header); debug("spl: payload image: %.*s load addr: 0x%x size: %d\n", - sizeof(spl_image.name), spl_image.name, + (int)sizeof(spl_image.name), spl_image.name, spl_image.load_addr, spl_image.size); } else { /* Signature not found - assume u-boot.bin */ diff --git a/common/stdio.c b/common/stdio.c index 692ca7f..523d859 100644 --- a/common/stdio.c +++ b/common/stdio.c @@ -36,39 +36,39 @@ char *stdio_names[MAX_FILES] = { "stdin", "stdout", "stderr" }; #ifdef CONFIG_SYS_DEVICE_NULLDEV -void nulldev_putc(struct stdio_dev *dev, const char c) +static void nulldev_putc(struct stdio_dev *dev, const char c) { /* nulldev is empty! */ } -void nulldev_puts(struct stdio_dev *dev, const char *s) +static void nulldev_puts(struct stdio_dev *dev, const char *s) { /* nulldev is empty! */ } -int nulldev_input(struct stdio_dev *dev) +static int nulldev_input(struct stdio_dev *dev) { /* nulldev is empty! */ return 0; } #endif -void stdio_serial_putc(struct stdio_dev *dev, const char c) +static void stdio_serial_putc(struct stdio_dev *dev, const char c) { serial_putc(c); } -void stdio_serial_puts(struct stdio_dev *dev, const char *s) +static void stdio_serial_puts(struct stdio_dev *dev, const char *s) { serial_puts(s); } -int stdio_serial_getc(struct stdio_dev *dev) +static int stdio_serial_getc(struct stdio_dev *dev) { return serial_getc(); } -int stdio_serial_tstc(struct stdio_dev *dev) +static int stdio_serial_tstc(struct stdio_dev *dev) { return serial_tstc(); } @@ -215,7 +215,7 @@ int stdio_deregister(const char *devname) } #endif /* CONFIG_SYS_STDIO_DEREGISTER */ -int stdio_init (void) +int stdio_init_tables(void) { #if defined(CONFIG_NEEDS_MANUAL_RELOC) /* already relocated for current ARM implementation */ @@ -232,6 +232,11 @@ int stdio_init (void) /* Initialize the list */ INIT_LIST_HEAD(&(devs.list)); + return 0; +} + +int stdio_add_devices(void) +{ #ifdef CONFIG_SYS_I2C i2c_init_all(); #else @@ -265,5 +270,14 @@ int stdio_init (void) #ifdef CONFIG_CBMEM_CONSOLE cbmemc_init(); #endif - return (0); + + return 0; +} + +int stdio_init(void) +{ + stdio_init_tables(); + stdio_add_devices(); + + return 0; } diff --git a/config.mk b/config.mk index b4bf6f9..2157537 100644 --- a/config.mk +++ b/config.mk @@ -53,6 +53,10 @@ ifdef BOARD sinclude $(srctree)/board/$(BOARDDIR)/config.mk # include board specific rules endif +ifdef FTRACE +PLATFORM_CPPFLAGS += -finstrument-functions -DFTRACE +endif + ######################################################################### RELFLAGS := $(PLATFORM_RELFLAGS) diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig index b93ae7d..f992293 100644 --- a/configs/A10-OLinuXino-Lime_defconfig +++ b/configs/A10-OLinuXino-Lime_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="A10_OLINUXINO_L,SPL,AXP209_POWER,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPC(3),USB_EHCI" -CONFIG_FTDFILE="sun4i-a10-olinuxino-lime.dtb" +CONFIG_SYS_EXTRA_OPTIONS="A10_OLINUXINO_L,AXP209_POWER,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPC(3),USB_EHCI" +CONFIG_FDTFILE="sun4i-a10-olinuxino-lime.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN4I=y diff --git a/configs/A10s-OLinuXino-M_defconfig b/configs/A10s-OLinuXino-M_defconfig index f206970..a578c06 100644 --- a/configs/A10s-OLinuXino-M_defconfig +++ b/configs/A10s-OLinuXino-M_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="A10S_OLINUXINO_M,SPL,AXP152_POWER,SUNXI_EMAC,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPB(10)" -CONFIG_FTDFILE="sun5i-a10s-olinuxino-micro.dtb" +CONFIG_SYS_EXTRA_OPTIONS="A10S_OLINUXINO_M,AXP152_POWER,SUNXI_EMAC,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPB(10)" +CONFIG_FDTFILE="sun5i-a10s-olinuxino-micro.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN5I=y diff --git a/configs/A13-OLinuXinoM_defconfig b/configs/A13-OLinuXinoM_defconfig index 8529dbe..9ae7b12 100644 --- a/configs/A13-OLinuXinoM_defconfig +++ b/configs/A13-OLinuXinoM_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="A13_OLINUXINOM,SPL,CONS_INDEX=2,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPG(11)" -CONFIG_FTDFILE="sun5i-a13-olinuxino-micro.dtb" +CONFIG_SYS_EXTRA_OPTIONS="A13_OLINUXINOM,CONS_INDEX=2,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPG(11)" +CONFIG_FDTFILE="sun5i-a13-olinuxino-micro.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN5I=y diff --git a/configs/A13-OLinuXino_defconfig b/configs/A13-OLinuXino_defconfig index c3a12cc..2c726f3 100644 --- a/configs/A13-OLinuXino_defconfig +++ b/configs/A13-OLinuXino_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="A13_OLINUXINO,SPL,CONS_INDEX=2,AXP209_POWER,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPG(11)" -CONFIG_FTDFILE="sun5i-a13-olinuxino.dtb" +CONFIG_SYS_EXTRA_OPTIONS="A13_OLINUXINO,CONS_INDEX=2,AXP209_POWER,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPG(11)" +CONFIG_FDTFILE="sun5i-a13-olinuxino.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN5I=y diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig new file mode 100644 index 0000000..ca79fd5 --- /dev/null +++ b/configs/A20-OLinuXino-Lime_defconfig @@ -0,0 +1,5 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="A20_OLINUXINO_L,AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPC(3),USB_EHCI" +CONFIG_FDTFILE="sun7i-a20-olinuxino-lime.dtb" ++S:CONFIG_ARM=y ++S:CONFIG_TARGET_SUN7I=y diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig index c91319d..20a947c 100644 --- a/configs/A20-OLinuXino_MICRO_defconfig +++ b/configs/A20-OLinuXino_MICRO_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="A20_OLINUXINO_M,SPL,AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8),USB_EHCI" -CONFIG_FTDFILE="sun7i-a20-olinuxino-micro.dtb" +CONFIG_SYS_EXTRA_OPTIONS="A20_OLINUXINO_M,AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8),USB_EHCI" +CONFIG_FDTFILE="sun7i-a20-olinuxino-micro.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN7I=y diff --git a/configs/Auxtek-T004_defconfig b/configs/Auxtek-T004_defconfig index 193019c..ed06f57 100644 --- a/configs/Auxtek-T004_defconfig +++ b/configs/Auxtek-T004_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="AUXTEK_T004,SPL,AXP152_POWER,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPG(13)" -CONFIG_FTDFILE="sun5i-a10s-auxtek-t004.dtb" +CONFIG_SYS_EXTRA_OPTIONS="AUXTEK_T004,AXP152_POWER,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPG(13)" +CONFIG_FDTFILE="sun5i-a10s-auxtek-t004.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN5I=y diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig index dc68469..d59cf72 100644 --- a/configs/Bananapi_defconfig +++ b/configs/Bananapi_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="BANANAPI,SPL,AXP209_POWER,SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI,USB_EHCI" -CONFIG_FTDFILE="sun7i-a20-bananapi.dtb" +CONFIG_SYS_EXTRA_OPTIONS="BANANAPI,AXP209_POWER,SUNXI_GMAC,RGMII,MACPWR=SUNXI_GPH(23),AHCI,USB_EHCI" +CONFIG_FDTFILE="sun7i-a20-bananapi.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN7I=y diff --git a/configs/Cubieboard2_FEL_defconfig b/configs/Cubieboard2_FEL_defconfig index ae5e25a..353b04a 100644 --- a/configs/Cubieboard2_FEL_defconfig +++ b/configs/Cubieboard2_FEL_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CUBIEBOARD2,SPL_FEL,AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8),USB_EHCI" -CONFIG_FTDFILE="sun7i-a20-cubieboard2.dtb" +CONFIG_FDTFILE="sun7i-a20-cubieboard2.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN7I=y diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig index df87edc..11a0c5f 100644 --- a/configs/Cubieboard2_defconfig +++ b/configs/Cubieboard2_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="CUBIEBOARD2,SPL,AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8),USB_EHCI" -CONFIG_FTDFILE="sun7i-a20-cubieboard2.dtb" +CONFIG_SYS_EXTRA_OPTIONS="CUBIEBOARD2,AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPB(8),USB_EHCI" +CONFIG_FDTFILE="sun7i-a20-cubieboard2.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN7I=y diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig index 57bf045..8c1ff95 100644 --- a/configs/Cubieboard_defconfig +++ b/configs/Cubieboard_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="CUBIEBOARD,SPL,AXP209_POWER,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPB(8),USB_EHCI" -CONFIG_FTDFILE="sun4i-a10-cubieboard.dtb" +CONFIG_SYS_EXTRA_OPTIONS="CUBIEBOARD,AXP209_POWER,SUNXI_EMAC,AHCI,SATAPWR=SUNXI_GPB(8),USB_EHCI" +CONFIG_FDTFILE="sun4i-a10-cubieboard.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN4I=y diff --git a/configs/Cubietruck_FEL_defconfig b/configs/Cubietruck_FEL_defconfig index 790125a..23c5efb 100644 --- a/configs/Cubietruck_FEL_defconfig +++ b/configs/Cubietruck_FEL_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CUBIETRUCK,SPL_FEL,AXP209_POWER,SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPH(12),USB_EHCI" -CONFIG_FTDFILE="sun7i-a20-cubietruck.dtb" +CONFIG_FDTFILE="sun7i-a20-cubietruck.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN7I=y diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig index 4ad82e3..1389f21 100644 --- a/configs/Cubietruck_defconfig +++ b/configs/Cubietruck_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="CUBIETRUCK,SPL,AXP209_POWER,SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPH(12),USB_EHCI" -CONFIG_FTDFILE="sun7i-a20-cubietruck.dtb" +CONFIG_SYS_EXTRA_OPTIONS="CUBIETRUCK,AXP209_POWER,SUNXI_GMAC,RGMII,AHCI,SATAPWR=SUNXI_GPH(12),USB_EHCI" +CONFIG_FDTFILE="sun7i-a20-cubietruck.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN7I=y diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig index 22d0446..efc5301 100644 --- a/configs/Linksprite_pcDuino3_defconfig +++ b/configs/Linksprite_pcDuino3_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="PCDUINO3,SPL,AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPH(2),USB_EHCI" -CONFIG_FTDFILE="sun7i-a20-pcduino3.dtb" +CONFIG_SYS_EXTRA_OPTIONS="PCDUINO3,AXP209_POWER,SUNXI_GMAC,AHCI,SATAPWR=SUNXI_GPH(2),USB_EHCI" +CONFIG_FDTFILE="sun7i-a20-pcduino3.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN7I=y diff --git a/configs/Mele_A1000G_defconfig b/configs/Mele_A1000G_defconfig index fa47fae..06c4cac 100644 --- a/configs/Mele_A1000G_defconfig +++ b/configs/Mele_A1000G_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="MELE_A1000G,SPL,AXP209_POWER,SUNXI_EMAC,MACPWR=SUNXI_GPH(15),AHCI,USB_EHCI" -CONFIG_FTDFILE="sun4i-a10-a1000.dtb" +CONFIG_SYS_EXTRA_OPTIONS="MELE_A1000G,AXP209_POWER,SUNXI_EMAC,MACPWR=SUNXI_GPH(15),AHCI,USB_EHCI" +CONFIG_FDTFILE="sun4i-a10-a1000.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN4I=y diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig index d7c156d..d386c79 100644 --- a/configs/Mele_A1000_defconfig +++ b/configs/Mele_A1000_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="MELE_A1000,SPL,AXP209_POWER,SUNXI_EMAC,MACPWR=SUNXI_GPH(15),AHCI,USB_EHCI" -CONFIG_FTDFILE="sun4i-a10-a1000.dtb" +CONFIG_SYS_EXTRA_OPTIONS="MELE_A1000,AXP209_POWER,SUNXI_EMAC,MACPWR=SUNXI_GPH(15),AHCI,USB_EHCI" +CONFIG_FDTFILE="sun4i-a10-a1000.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN4I=y diff --git a/configs/Mini-X-1Gb_defconfig b/configs/Mini-X-1Gb_defconfig index af0b800..5db4aa3 100644 --- a/configs/Mini-X-1Gb_defconfig +++ b/configs/Mini-X-1Gb_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="MINI_X_1GB,SPL,AXP209_POWER,USB_EHCI" -CONFIG_FTDFILE="sun4i-a10-mini-xplus.dtb" +CONFIG_SYS_EXTRA_OPTIONS="MINI_X_1GB,AXP209_POWER,USB_EHCI" +CONFIG_FDTFILE="sun4i-a10-mini-xplus.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN4I=y diff --git a/configs/Mini-X_defconfig b/configs/Mini-X_defconfig index ea0c786..6718dcb 100644 --- a/configs/Mini-X_defconfig +++ b/configs/Mini-X_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="MINI_X,SPL,AXP209_POWER,USB_EHCI" -CONFIG_FTDFILE="sun4i-a10-mini-xplus.dtb" +CONFIG_SYS_EXTRA_OPTIONS="MINI_X,AXP209_POWER,USB_EHCI" +CONFIG_FDTFILE="sun4i-a10-mini-xplus.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN4I=y diff --git a/configs/T1042RDB_defconfig b/configs/T1042RDB_defconfig new file mode 100644 index 0000000..85eceb9 --- /dev/null +++ b/configs/T1042RDB_defconfig @@ -0,0 +1,4 @@ +CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB" +CONFIG_PPC=y +CONFIG_MPC85xx=y +CONFIG_TARGET_T104XRDB=y diff --git a/configs/a_defconfig b/configs/a_defconfig new file mode 100644 index 0000000..da4e4bb --- /dev/null +++ b/configs/a_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nit6xlite/nit6xlite.cfg,MX6S,DDR_MB=512,DEFCONFIG=\"a\"" +CONFIG_ARM=y +CONFIG_TARGET_A=y diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index 00317c4..e257143 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -2,3 +2,5 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,EMMC_BOOT,ENABLE_VBOOT" +S:CONFIG_ARM=y +S:CONFIG_TARGET_AM335X_EVM=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack" diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig index 7ea5c0d..fc30508 100644 --- a/configs/arndale_defconfig +++ b/configs/arndale_defconfig @@ -2,3 +2,4 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_ARCH_EXYNOS=y +S:CONFIG_TARGET_ARNDALE=y +CONFIG_DEFAULT_DEVICE_TREE="exynos5250-arndale" diff --git a/configs/ba10_tv_box_defconfig b/configs/ba10_tv_box_defconfig index c9961bd..6f64875 100644 --- a/configs/ba10_tv_box_defconfig +++ b/configs/ba10_tv_box_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="BA10_TV_BOX,SPL,AXP209_POWER,SUNXI_EMAC,USB_EHCI,SUNXI_USB_VBUS1_GPIO=SUNXI_GPH(12)" -CONFIG_FTDFILE="sun4i-a10-ba10-tvbox.dtb" +CONFIG_SYS_EXTRA_OPTIONS="BA10_TV_BOX,AXP209_POWER,SUNXI_EMAC,USB_EHCI,SUNXI_USB_VBUS1_GPIO=SUNXI_GPH(12)" +CONFIG_FDTFILE="sun4i-a10-ba10-tvbox.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN4I=y diff --git a/configs/bct-brettl2_defconfig b/configs/bct-brettl2_defconfig index 3676306..26b145d 100644 --- a/configs/bct-brettl2_defconfig +++ b/configs/bct-brettl2_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BCT_BRETTL2=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index 7c9d94b..ab615a8 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -2,3 +2,4 @@ +S:CONFIG_TEGRA=y +S:CONFIG_TEGRA30=y +S:CONFIG_TARGET_BEAVER=y +CONFIG_DEFAULT_DEVICE_TREE="tegra30-beaver" diff --git a/configs/bf506f-ezkit_defconfig b/configs/bf506f-ezkit_defconfig index f81f412..f164e06 100644 --- a/configs/bf506f-ezkit_defconfig +++ b/configs/bf506f-ezkit_defconfig @@ -1,2 +1,5 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF506F_EZKIT=y +# CONFIG_CMD_BOOTM is not set +# CONFIG_CMD_EXPORTENV is not set +# CONFIG_CMD_IMPORTENV is not set diff --git a/configs/bf518f-ezbrd_defconfig b/configs/bf518f-ezbrd_defconfig index a93eed0..fb35ad0 100644 --- a/configs/bf518f-ezbrd_defconfig +++ b/configs/bf518f-ezbrd_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF518F_EZBRD=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf526-ezbrd_defconfig b/configs/bf526-ezbrd_defconfig index 4a45223..da06d3a 100644 --- a/configs/bf526-ezbrd_defconfig +++ b/configs/bf526-ezbrd_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF526_EZBRD=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf527-ad7160-eval_defconfig b/configs/bf527-ad7160-eval_defconfig index d9db715..47f53c9 100644 --- a/configs/bf527-ad7160-eval_defconfig +++ b/configs/bf527-ad7160-eval_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF527_AD7160_EVAL=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf527-ezkit-v2_defconfig b/configs/bf527-ezkit-v2_defconfig index aedbb96..e250e10 100644 --- a/configs/bf527-ezkit-v2_defconfig +++ b/configs/bf527-ezkit-v2_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="BF527_EZKIT_REV_2_1" CONFIG_BLACKFIN=y CONFIG_TARGET_BF527_EZKIT=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf527-ezkit_defconfig b/configs/bf527-ezkit_defconfig index 3ed77a6..69f6ef7 100644 --- a/configs/bf527-ezkit_defconfig +++ b/configs/bf527-ezkit_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF527_EZKIT=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf527-sdp_defconfig b/configs/bf527-sdp_defconfig index 0f8c28c..57f47e9 100644 --- a/configs/bf527-sdp_defconfig +++ b/configs/bf527-sdp_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF527_SDP=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf533-ezkit_defconfig b/configs/bf533-ezkit_defconfig index 217d4c3..57f8da1 100644 --- a/configs/bf533-ezkit_defconfig +++ b/configs/bf533-ezkit_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF533_EZKIT=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf533-stamp_defconfig b/configs/bf533-stamp_defconfig index a99b3c7..1bcf3d3 100644 --- a/configs/bf533-stamp_defconfig +++ b/configs/bf533-stamp_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF533_STAMP=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf537-stamp_defconfig b/configs/bf537-stamp_defconfig index d9daf7e..9b9a92f 100644 --- a/configs/bf537-stamp_defconfig +++ b/configs/bf537-stamp_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF537_STAMP=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf538f-ezkit_defconfig b/configs/bf538f-ezkit_defconfig index 0507cb2..1892151 100644 --- a/configs/bf538f-ezkit_defconfig +++ b/configs/bf538f-ezkit_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF538F_EZKIT=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf548-ezkit_defconfig b/configs/bf548-ezkit_defconfig index 7bb4064..5236984 100644 --- a/configs/bf548-ezkit_defconfig +++ b/configs/bf548-ezkit_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF548_EZKIT=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf561-acvilon_defconfig b/configs/bf561-acvilon_defconfig index ba8a418..098f31f 100644 --- a/configs/bf561-acvilon_defconfig +++ b/configs/bf561-acvilon_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF561_ACVILON=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bf561-ezkit_defconfig b/configs/bf561-ezkit_defconfig index 7ceb1d9..5665288 100644 --- a/configs/bf561-ezkit_defconfig +++ b/configs/bf561-ezkit_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BF561_EZKIT=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/br4_defconfig b/configs/br4_defconfig index 9d91933..5655d54 100644 --- a/configs/br4_defconfig +++ b/configs/br4_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_BR4=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/bt2g_defconfig b/configs/bt2g_defconfig new file mode 100644 index 0000000..1af08df --- /dev/null +++ b/configs/bt2g_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/bt/bt2g.cfg,MX6Q,DDR_MB=2048,DEFCONFIG=\"bt2g\"" +CONFIG_ARM=y +CONFIG_TARGET_BT=y diff --git a/configs/bt4g_defconfig b/configs/bt4g_defconfig new file mode 100644 index 0000000..69b08cd --- /dev/null +++ b/configs/bt4g_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/bt/bt4g.cfg,MX6Q,DDR_MB=3840,DEFCONFIG=\"bt4g\"" +CONFIG_ARM=y +CONFIG_TARGET_BT=y diff --git a/configs/cad_defconfig b/configs/cad_defconfig new file mode 100644 index 0000000..436b62d --- /dev/null +++ b/configs/cad_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/cad/cad.cfg,MX6S,DDR_MB=1024,DEFCONFIG=\"cad\"" +CONFIG_ARM=y +CONFIG_TARGET_CAD=y diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig index bb042b4..4466e98 100644 --- a/configs/cardhu_defconfig +++ b/configs/cardhu_defconfig @@ -2,3 +2,4 @@ +S:CONFIG_TEGRA=y +S:CONFIG_TEGRA30=y +S:CONFIG_TARGET_CARDHU=y +CONFIG_DEFAULT_DEVICE_TREE="tegra30-cardhu" diff --git a/configs/cm-bf527_defconfig b/configs/cm-bf527_defconfig index cb5110c..a6830b5 100644 --- a/configs/cm-bf527_defconfig +++ b/configs/cm-bf527_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_CM_BF527=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/cm-bf533_defconfig b/configs/cm-bf533_defconfig index aa38d0e..b9508ae 100644 --- a/configs/cm-bf533_defconfig +++ b/configs/cm-bf533_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_CM_BF533=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/cm-bf537e_defconfig b/configs/cm-bf537e_defconfig index b9deaae..a44eab7 100644 --- a/configs/cm-bf537e_defconfig +++ b/configs/cm-bf537e_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_CM_BF537E=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/cm-bf537u_defconfig b/configs/cm-bf537u_defconfig index 16f7ae1..29c33b9 100644 --- a/configs/cm-bf537u_defconfig +++ b/configs/cm-bf537u_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_CM_BF537U=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/cm-bf548_defconfig b/configs/cm-bf548_defconfig index e60306a..525f2e7 100644 --- a/configs/cm-bf548_defconfig +++ b/configs/cm-bf548_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_CM_BF548=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/cm-bf561_defconfig b/configs/cm-bf561_defconfig index 1b9301c..062bfeb 100644 --- a/configs/cm-bf561_defconfig +++ b/configs/cm-bf561_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_CM_BF561=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/cm_fx6_defconfig b/configs/cm_fx6_defconfig new file mode 100644 index 0000000..50c06f7 --- /dev/null +++ b/configs/cm_fx6_defconfig @@ -0,0 +1,4 @@ +CONFIG_SPL=y +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/compulab/cm_fx6/imximage.cfg,MX6QDL,SPL" ++S:CONFIG_ARM=y ++S:CONFIG_TARGET_CM_FX6=y diff --git a/configs/cob_defconfig b/configs/cob_defconfig new file mode 100644 index 0000000..4810fc2 --- /dev/null +++ b/configs/cob_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/cob/cob.cfg,MX6Q,DDR_MB=1024,DEFCONFIG=\"cob\"" +CONFIG_ARM=y +CONFIG_TARGET_COB=y diff --git a/configs/colibri_t20_iris_defconfig b/configs/colibri_t20_iris_defconfig index b2a21e1..b76f78b 100644 --- a/configs/colibri_t20_iris_defconfig +++ b/configs/colibri_t20_iris_defconfig @@ -2,3 +2,4 @@ +S:CONFIG_TEGRA=y +S:CONFIG_TEGRA20=y +S:CONFIG_TARGET_COLIBRI_T20_IRIS=y +CONFIG_DEFAULT_DEVICE_TREE="tegra20-colibri_t20_iris" diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig index abb41f3..b955303 100644 --- a/configs/colibri_t30_defconfig +++ b/configs/colibri_t30_defconfig @@ -2,3 +2,4 @@ +S:CONFIG_TEGRA=y +S:CONFIG_TEGRA30=y +S:CONFIG_TARGET_COLIBRI_T30=y +CONFIG_DEFAULT_DEVICE_TREE="tegra30-colibri" diff --git a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig index be1a371..c8695ab 100644 --- a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig +++ b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig @@ -2,3 +2,4 @@ CONFIG_SYS_EXTRA_OPTIONS="TRAILBLAZER,SPIFLASH,DEVELOP" CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_CONTROLCENTERD=y +# CONFIG_CMD_BOOTM is not set diff --git a/configs/controlcenterd_TRAILBLAZER_defconfig b/configs/controlcenterd_TRAILBLAZER_defconfig index ab548a6..730b96e 100644 --- a/configs/controlcenterd_TRAILBLAZER_defconfig +++ b/configs/controlcenterd_TRAILBLAZER_defconfig @@ -2,3 +2,4 @@ CONFIG_SYS_EXTRA_OPTIONS="TRAILBLAZER,SPIFLASH" CONFIG_PPC=y CONFIG_MPC85xx=y CONFIG_TARGET_CONTROLCENTERD=y +# CONFIG_CMD_BOOTM is not set diff --git a/configs/coreboot-x86_defconfig b/configs/coreboot-x86_defconfig index a06c527..6249db7 100644 --- a/configs/coreboot-x86_defconfig +++ b/configs/coreboot-x86_defconfig @@ -1,3 +1,5 @@ CONFIG_SYS_EXTRA_OPTIONS="SYS_TEXT_BASE=0x01110000" CONFIG_X86=y CONFIG_TARGET_COREBOOT=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="link" diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index 70677aa..f704c75 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -2,3 +2,4 @@ +S:CONFIG_TEGRA=y +S:CONFIG_TEGRA114=y +S:CONFIG_TARGET_DALMORE=y +CONFIG_DEFAULT_DEVICE_TREE="tegra114-dalmore" diff --git a/configs/dash_defconfig b/configs/dash_defconfig new file mode 100644 index 0000000..89cdc21 --- /dev/null +++ b/configs/dash_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,DEFCONFIG=\"dash\"" +CONFIG_ARM=y +CONFIG_TARGET_DASH=y diff --git a/configs/eo_defconfig b/configs/eo_defconfig new file mode 100644 index 0000000..6d57b2f --- /dev/null +++ b/configs/eo_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/eo/eo.cfg,MX6QDL,DDR_MB=1024,DEFCONFIG=\"eo\"" +CONFIG_ARM=y +CONFIG_TARGET_EO=y diff --git a/configs/gwventana_defconfig b/configs/gwventana_defconfig index 11aaab5..f185329 100644 --- a/configs/gwventana_defconfig +++ b/configs/gwventana_defconfig @@ -1,4 +1,4 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6QDL,SPL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/gateworks/gw_ventana/gw_ventana.cfg,MX6QDL" +S:CONFIG_ARM=y +S:CONFIG_TARGET_GW_VENTANA=y diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index a52231b..d99b429 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -2,3 +2,4 @@ +S:CONFIG_TEGRA=y +S:CONFIG_TEGRA20=y +S:CONFIG_TARGET_HARMONY=y +CONFIG_DEFAULT_DEVICE_TREE="tegra20-harmony" diff --git a/configs/hquad2g_defconfig b/configs/hquad2g_defconfig new file mode 100644 index 0000000..5021cec --- /dev/null +++ b/configs/hquad2g_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/h/hquad2g.cfg,MX6Q,DDR_MB=2048,DEFCONFIG=\"hquad2g\"" +CONFIG_ARM=y +CONFIG_TARGET_H=y diff --git a/configs/hsolo1g_defconfig b/configs/hsolo1g_defconfig new file mode 100644 index 0000000..f1aa4c0 --- /dev/null +++ b/configs/hsolo1g_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/h/hsolo1g.cfg,MX6S,DDR_MB=1024,DEFCONFIG=\"hsolo1g\"" +CONFIG_ARM=y +CONFIG_TARGET_H=y diff --git a/configs/i12-tvbox_defconfig b/configs/i12-tvbox_defconfig index b267312..2ef0f91 100644 --- a/configs/i12-tvbox_defconfig +++ b/configs/i12-tvbox_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="I12_TVBOX,SPL,AXP209_POWER,SUNXI_GMAC,MACPWR=SUNXI_GPH(21),USB_EHCI" -CONFIG_FTDFILE="sun7i-a20-i12-tvbox.dtb" +CONFIG_SYS_EXTRA_OPTIONS="I12_TVBOX,AXP209_POWER,SUNXI_GMAC,MACPWR=SUNXI_GPH(21),USB_EHCI" +CONFIG_FDTFILE="sun7i-a20-i12-tvbox.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN7I=y diff --git a/configs/insp_defconfig b/configs/insp_defconfig new file mode 100644 index 0000000..59a60b1 --- /dev/null +++ b/configs/insp_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/insp/insp2g.cfg,MX6Q,DDR_MB=2048,DEFCONFIG=\"insp\"" +CONFIG_ARM=y +CONFIG_TARGET_INSP=y diff --git a/configs/ioc_defconfig b/configs/ioc_defconfig new file mode 100644 index 0000000..05332ea --- /dev/null +++ b/configs/ioc_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/ioc/ioc.cfg,MX6Q,DDR_MB=1024,DEFCONFIG=\"ioc\"" +CONFIG_ARM=y +CONFIG_TARGET_IOC=y diff --git a/configs/ip04_defconfig b/configs/ip04_defconfig index 4f9895a..ba737ae 100644 --- a/configs/ip04_defconfig +++ b/configs/ip04_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_IP04=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index 00eac92..ef1d41c 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -2,3 +2,4 @@ +S:CONFIG_TEGRA=y +S:CONFIG_TEGRA124=y +S:CONFIG_TARGET_JETSON_TK1=y +CONFIG_DEFAULT_DEVICE_TREE="tegra124-jetson-tk1" diff --git a/configs/kwb_defconfig b/configs/kwb_defconfig index 5082ff7..106a24f 100644 --- a/configs/kwb_defconfig +++ b/configs/kwb_defconfig @@ -2,3 +2,4 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1" +S:CONFIG_ARM=y +S:CONFIG_TARGET_KWB=y +# CONFIG_CMD_CRC32 is not set diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig new file mode 100644 index 0000000..3c57481 --- /dev/null +++ b/configs/ls1021aqds_ddr4_nor_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="SYS_FSL_DDR4" +CONFIG_ARM=y +CONFIG_TARGET_LS1021AQDS=y diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig new file mode 100644 index 0000000..9e42d61 --- /dev/null +++ b/configs/ls1021aqds_nor_defconfig @@ -0,0 +1,2 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1021AQDS=y diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig new file mode 100644 index 0000000..5f465d3 --- /dev/null +++ b/configs/ls1021atwr_nor_defconfig @@ -0,0 +1,2 @@ +CONFIG_ARM=y +CONFIG_TARGET_LS1021ATWR=y diff --git a/configs/ls2085a_emu_D4_defconfig b/configs/ls2085a_emu_D4_defconfig index f2f6882..0bc36ed 100644 --- a/configs/ls2085a_emu_D4_defconfig +++ b/configs/ls2085a_emu_D4_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="ARM64,EMU,SYS_FSL_DDR4" +CONFIG_SYS_EXTRA_OPTIONS="EMU,SYS_FSL_DDR4" CONFIG_ARM=y CONFIG_TARGET_LS2085A_EMU=y diff --git a/configs/ls2085a_emu_defconfig b/configs/ls2085a_emu_defconfig index 51ffa56..a2efec3 100644 --- a/configs/ls2085a_emu_defconfig +++ b/configs/ls2085a_emu_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="ARM64,EMU" +CONFIG_SYS_EXTRA_OPTIONS="EMU" CONFIG_ARM=y CONFIG_TARGET_LS2085A_EMU=y diff --git a/configs/ls2085a_simu_defconfig b/configs/ls2085a_simu_defconfig index efa8e74..7563a75 100644 --- a/configs/ls2085a_simu_defconfig +++ b/configs/ls2085a_simu_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="ARM64,SIMU" +CONFIG_SYS_EXTRA_OPTIONS="SIMU" CONFIG_ARM=y CONFIG_TARGET_LS2085A_SIMU=y diff --git a/configs/ls_defconfig b/configs/ls_defconfig new file mode 100644 index 0000000..fb84e1a --- /dev/null +++ b/configs/ls_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/ls/ls2g.cfg,MX6Q,DDR_MB=2048,DEFCONFIG=\"ls\"" +CONFIG_ARM=y +CONFIG_TARGET_LS=y diff --git a/configs/mcsquad_defconfig b/configs/mcsquad_defconfig new file mode 100644 index 0000000..0be4910 --- /dev/null +++ b/configs/mcsquad_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/mcs/mcsquad.cfg,MX6Q,DDR_MB=2048,DEFCONFIG=\"mcsquad\"" +CONFIG_ARM=y +CONFIG_TARGET_MCS=y diff --git a/configs/mcssolo1g_64bit_defconfig b/configs/mcssolo1g_64bit_defconfig new file mode 100644 index 0000000..65c4468 --- /dev/null +++ b/configs/mcssolo1g_64bit_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/mcs/mcssolo1g_64bit.cfg,MX6S,DDR_MB=1024,DEFCONFIG=\"mcssolo1g_64bit\"" +CONFIG_ARM=y +CONFIG_TARGET_MCS=y diff --git a/configs/mcssolo_defconfig b/configs/mcssolo_defconfig new file mode 100644 index 0000000..1262727 --- /dev/null +++ b/configs/mcssolo_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/mcs/mcssolo.cfg,MX6S,DDR_MB=1024,DEFCONFIG=\"mcssolo\"" +CONFIG_ARM=y +CONFIG_TARGET_MCS=y diff --git a/configs/med_defconfig b/configs/med_defconfig new file mode 100644 index 0000000..2275ab5 --- /dev/null +++ b/configs/med_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,DEFCONFIG=\"med\"" +CONFIG_ARM=y +CONFIG_TARGET_MED=y diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig index e9a3930..35963e9 100644 --- a/configs/medcom-wide_defconfig +++ b/configs/medcom-wide_defconfig @@ -2,3 +2,4 @@ +S:CONFIG_TEGRA=y +S:CONFIG_TEGRA20=y +S:CONFIG_TARGET_MEDCOM_WIDE=y +CONFIG_DEFAULT_DEVICE_TREE="tegra20-medcom-wide" diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 7f23786..5cfd596 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -1,3 +1,6 @@ CONFIG_SPL=y +S:CONFIG_MICROBLAZE=y +S:CONFIG_TARGET_MICROBLAZE_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_OF_EMBED=y +CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic" diff --git a/configs/mtp_defconfig b/configs/mtp_defconfig new file mode 100644 index 0000000..ce57331 --- /dev/null +++ b/configs/mtp_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/mtp/mtp.cfg,MX6Q,DDR_MB=1024,DEFCONFIG=\"mtp\"" +CONFIG_ARM=y +CONFIG_TARGET_MTP=y diff --git a/configs/mx6_r_defconfig b/configs/mx6_r_defconfig new file mode 100644 index 0000000..ac6276c --- /dev/null +++ b/configs/mx6_r_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048,DEFCONFIG=\"mx6_r\"" +CONFIG_ARM=y +CONFIG_TARGET_MX6_R=y diff --git a/configs/mx6dlsabresd_defconfig b/configs/mx6dlsabresd_defconfig index 9ce960e..7f6cdff 100644 --- a/configs/mx6dlsabresd_defconfig +++ b/configs/mx6dlsabresd_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6sabresd/mx6dlsabresd.cfg,MX6DL" CONFIG_ARM=y CONFIG_TARGET_MX6SABRESD=y diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig index dfa9c2e..7ce64f7 100644 --- a/configs/mx6qsabrelite_defconfig +++ b/configs/mx6qsabrelite_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,SABRELITE" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,SABRELITE,DEFCONFIG=\"mx6qsabrelite\"" CONFIG_ARM=y CONFIG_TARGET_NITROGEN6X=y diff --git a/configs/nit6xlite1g_defconfig b/configs/nit6xlite1g_defconfig new file mode 100644 index 0000000..9a94e25 --- /dev/null +++ b/configs/nit6xlite1g_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nit6xlite/nit6xlite1g.cfg,MX6S,DDR_MB=1024,DEFCONFIG=\"nit6xlite1g\"" +CONFIG_ARM=y +CONFIG_TARGET_NIT6XLITE=y diff --git a/configs/nit6xlite_defconfig b/configs/nit6xlite_defconfig new file mode 100644 index 0000000..f1f3a9d --- /dev/null +++ b/configs/nit6xlite_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nit6xlite/nit6xlite.cfg,MX6S,DDR_MB=512,DEFCONFIG=\"nit6xlite\"" +CONFIG_ARM=y +CONFIG_TARGET_NIT6XLITE=y diff --git a/configs/nitrogen6_lum_dl_defconfig b/configs/nitrogen6_lum_dl_defconfig new file mode 100644 index 0000000..843d895 --- /dev/null +++ b/configs/nitrogen6_lum_dl_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024,BOARD_NAME=\"Nit6_LUM_DL\",BOARD_TYPE=\"nitrogen6x\",DEFCONFIG=\"nitrogen6_lum_dl\"" +CONFIG_ARM=y +CONFIG_TARGET_NITROGEN6X=y diff --git a/configs/nitrogen6_max_defconfig b/configs/nitrogen6_max_defconfig new file mode 100644 index 0000000..6d7d0f7 --- /dev/null +++ b/configs/nitrogen6_max_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6_max/nitrogen6_max4g.cfg,MX6QDL,DDR_MB=3840,DEFCONFIG=\"nitrogen6_max\"" +CONFIG_ARM=y +CONFIG_TARGET_NITROGEN6_MAX=y diff --git a/configs/nitrogen6_vm1g_defconfig b/configs/nitrogen6_vm1g_defconfig new file mode 100644 index 0000000..b7da7aa --- /dev/null +++ b/configs/nitrogen6_vm1g_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6_vm/nitrogen6_vm1g.cfg,MX6S,DDR_MB=1024,DEFCONFIG=\"nitrogen6_vm1g\"" +CONFIG_ARM=y +CONFIG_TARGET_NITROGEN6_VM=y diff --git a/configs/nitrogen6_vm_defconfig b/configs/nitrogen6_vm_defconfig new file mode 100644 index 0000000..b579679 --- /dev/null +++ b/configs/nitrogen6_vm_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6_vm/nitrogen6_vm.cfg,MX6S,DDR_MB=512,DEFCONFIG=\"nitrogen6_vm\"" +CONFIG_ARM=y +CONFIG_TARGET_NITROGEN6_VM=y diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig index ce9343a..4768151 100644 --- a/configs/nitrogen6dl2g_defconfig +++ b/configs/nitrogen6dl2g_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg,MX6DL,DDR_MB=2048" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl2g.cfg,MX6DL,DDR_MB=2048,DEFCONFIG=\"nitrogen6dl2g\"" CONFIG_ARM=y CONFIG_TARGET_NITROGEN6X=y diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig index 15dd549..3626c35 100644 --- a/configs/nitrogen6dl_defconfig +++ b/configs/nitrogen6dl_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6dl.cfg,MX6DL,DDR_MB=1024,DEFCONFIG=\"nitrogen6dl\"" CONFIG_ARM=y CONFIG_TARGET_NITROGEN6X=y diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig index 12d9516..bbd4563 100644 --- a/configs/nitrogen6q2g_defconfig +++ b/configs/nitrogen6q2g_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048,DEFCONFIG=\"nitrogen6q2g\"" CONFIG_ARM=y CONFIG_TARGET_NITROGEN6X=y diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig index b282dc3..aa78638 100644 --- a/configs/nitrogen6q_defconfig +++ b/configs/nitrogen6q_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,DEFCONFIG=\"nitrogen6q\"" CONFIG_ARM=y CONFIG_TARGET_NITROGEN6X=y diff --git a/configs/nitrogen6q_fl_defconfig b/configs/nitrogen6q_fl_defconfig new file mode 100644 index 0000000..1746ed5 --- /dev/null +++ b/configs/nitrogen6q_fl_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,NITROGEN6X_FL,DEFCONFIG=\"nitrogen6q_fl\"" +CONFIG_ARM=y +CONFIG_TARGET_NITROGEN6X=y diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig index d1a4f15..3cc8a24 100644 --- a/configs/nitrogen6s1g_defconfig +++ b/configs/nitrogen6s1g_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s1g.cfg,MX6S,DDR_MB=1024,DEFCONFIG=\"nitrogen6s1g\"" CONFIG_ARM=y CONFIG_TARGET_NITROGEN6X=y diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig index 73a206f..6023a3a 100644 --- a/configs/nitrogen6s_defconfig +++ b/configs/nitrogen6s_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6s.cfg,MX6S,DDR_MB=512,DEFCONFIG=\"nitrogen6s\"" CONFIG_ARM=y CONFIG_TARGET_NITROGEN6X=y diff --git a/configs/nw2_defconfig b/configs/nw2_defconfig new file mode 100644 index 0000000..7be894b --- /dev/null +++ b/configs/nw2_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nw/nw.cfg,MX6Q,DDR_MB=1024,REV2,DEFCONFIG=\"nw2\"" +CONFIG_ARM=y +CONFIG_TARGET_NW=y diff --git a/configs/nw_defconfig b/configs/nw_defconfig new file mode 100644 index 0000000..3012593 --- /dev/null +++ b/configs/nw_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nw/nw.cfg,MX6Q,DDR_MB=1024,DEFCONFIG=\"nw\"" +CONFIG_ARM=y +CONFIG_TARGET_NW=y diff --git a/configs/ocquad_defconfig b/configs/ocquad_defconfig new file mode 100644 index 0000000..99b4eb2 --- /dev/null +++ b/configs/ocquad_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/oc/ocquad.cfg,MX6Q,DDR_MB=1024,DEFCONFIG=\"ocquad\"" +CONFIG_ARM=y +CONFIG_TARGET_OC=y diff --git a/configs/ocsolo1g_defconfig b/configs/ocsolo1g_defconfig new file mode 100644 index 0000000..86daa25 --- /dev/null +++ b/configs/ocsolo1g_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/oc/ocsolo1g.cfg,MX6S,DDR_MB=1024,DEFCONFIG=\"ocsolo1g\"" +CONFIG_ARM=y +CONFIG_TARGET_OC=y diff --git a/configs/ocsolo_defconfig b/configs/ocsolo_defconfig new file mode 100644 index 0000000..e036a82 --- /dev/null +++ b/configs/ocsolo_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/oc/ocsolo.cfg,MX6S,DDR_MB=512,DEFCONFIG=\"ocsolo\"" +CONFIG_ARM=y +CONFIG_TARGET_OC=y diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig new file mode 100644 index 0000000..a842837 --- /dev/null +++ b/configs/odroid_defconfig @@ -0,0 +1,5 @@ +CONFIG_ARM=y +CONFIG_ARCH_EXYNOS=y +CONFIG_TARGET_ODROID=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="exynos4412-odroid" diff --git a/configs/origen_defconfig b/configs/origen_defconfig index aa92381..2a7f83b 100644 --- a/configs/origen_defconfig +++ b/configs/origen_defconfig @@ -2,3 +2,5 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_ARCH_EXYNOS=y +S:CONFIG_TARGET_ORIGEN=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="exynos4210-origen" diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig index 05974eb..d2d36a5 100644 --- a/configs/paz00_defconfig +++ b/configs/paz00_defconfig @@ -2,3 +2,4 @@ +S:CONFIG_TEGRA=y +S:CONFIG_TEGRA20=y +S:CONFIG_TARGET_PAZ00=y +CONFIG_DEFAULT_DEVICE_TREE="tegra20-paz00" diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index 797d5e0..b944b3b 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -2,3 +2,4 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_ARCH_EXYNOS=y +S:CONFIG_TARGET_PEACH_PIT=y +CONFIG_DEFAULT_DEVICE_TREE="exynos5420-peach-pit" diff --git a/configs/per_defconfig b/configs/per_defconfig new file mode 100644 index 0000000..5bfc845 --- /dev/null +++ b/configs/per_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/per/per.cfg,MX6Q,DDR_MB=2048,DEFCONFIG=\"per\"" +CONFIG_ARM=y +CONFIG_TARGET_PER=y diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig index 60e80ff..d2743b8 100644 --- a/configs/plutux_defconfig +++ b/configs/plutux_defconfig @@ -2,3 +2,4 @@ +S:CONFIG_TEGRA=y +S:CONFIG_TEGRA20=y +S:CONFIG_TARGET_PLUTUX=y +CONFIG_DEFAULT_DEVICE_TREE="tegra20-plutux" diff --git a/configs/pr1_defconfig b/configs/pr1_defconfig index a8784c1..793a4e8 100644 --- a/configs/pr1_defconfig +++ b/configs/pr1_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_PR1=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/qt840a_defconfig b/configs/qt840a_defconfig index 7360212..a8d4bb8 100644 --- a/configs/qt840a_defconfig +++ b/configs/qt840a_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="QT840A,SPL,AXP209_POWER,SUNXI_GMAC,MACPWR=SUNXI_GPH(21),USB_EHCI" -CONFIG_FTDFILE="sun7i-a20-i12-tvbox.dtb" +CONFIG_SYS_EXTRA_OPTIONS="QT840A,AXP209_POWER,SUNXI_GMAC,MACPWR=SUNXI_GPH(21),USB_EHCI" +CONFIG_FDTFILE="sun7i-a20-i12-tvbox.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN7I=y diff --git a/configs/r7-tv-dongle_defconfig b/configs/r7-tv-dongle_defconfig index 35b66f0..6aba942 100644 --- a/configs/r7-tv-dongle_defconfig +++ b/configs/r7-tv-dongle_defconfig @@ -1,5 +1,5 @@ CONFIG_SPL=y -CONFIG_SYS_EXTRA_OPTIONS="R7DONGLE,SPL,AXP152_POWER,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPG(13)" -CONFIG_FTDFILE="sun5i-a10s-r7-tv-dongle.dtb" +CONFIG_SYS_EXTRA_OPTIONS="R7DONGLE,AXP152_POWER,USB_EHCI,SUNXI_USB_VBUS0_GPIO=SUNXI_GPG(13)" +CONFIG_FDTFILE="sun5i-a10s-r7-tv-dongle.dtb" +S:CONFIG_ARM=y +S:CONFIG_TARGET_SUN5I=y diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig index a9a3446..cdce39f 100644 --- a/configs/s5pc210_universal_defconfig +++ b/configs/s5pc210_universal_defconfig @@ -1,3 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_S5PC210_UNIVERSAL=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="exynos4210-universal_c210" diff --git a/configs/s_defconfig b/configs/s_defconfig new file mode 100644 index 0000000..c95e1c2 --- /dev/null +++ b/configs/s_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q2g.cfg,MX6Q,DDR_MB=2048,DEFCONFIG=\"s\"" +CONFIG_ARM=y +CONFIG_TARGET_S=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index e69de29..47d8400 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -0,0 +1,3 @@ +CONFIG_OF_CONTROL=y +CONFIG_OF_HOSTFILE=y +CONFIG_DEFAULT_DEVICE_TREE="sandbox" diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig index 516e760..ddf2cd6 100644 --- a/configs/seaboard_defconfig +++ b/configs/seaboard_defconfig @@ -2,3 +2,4 @@ +S:CONFIG_TEGRA=y +S:CONFIG_TEGRA20=y +S:CONFIG_TARGET_SEABOARD=y +CONFIG_DEFAULT_DEVICE_TREE="tegra20-seaboard" diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index 465a75a..9b76d0d 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -2,3 +2,4 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_ARCH_EXYNOS=y +S:CONFIG_TARGET_SMDK5250=y +CONFIG_DEFAULT_DEVICE_TREE="exynos5250-smdk5250" diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index 9dc43f2..8cf673d 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -2,3 +2,4 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_ARCH_EXYNOS=y +S:CONFIG_TARGET_SMDK5420=y +CONFIG_DEFAULT_DEVICE_TREE="exynos5420-smdk5420" diff --git a/configs/snap_defconfig b/configs/snap_defconfig new file mode 100644 index 0000000..00f7493 --- /dev/null +++ b/configs/snap_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/snap/snap2g.cfg,MX6Q,DDR_MB=2048,DEFCONFIG=\"snap\"" +CONFIG_ARM=y +CONFIG_TARGET_SNAP=y diff --git a/configs/snow_defconfig b/configs/snow_defconfig index 2d59046..14ed793 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -2,3 +2,4 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_ARCH_EXYNOS=y +S:CONFIG_TARGET_SNOW=y +CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow" diff --git a/configs/sp_defconfig b/configs/sp_defconfig new file mode 100644 index 0000000..feb6c2b --- /dev/null +++ b/configs/sp_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nit6xlite/nit6xlite.cfg,MX6S,DDR_MB=512,DEFCONFIG=\"sp\"" +CONFIG_ARM=y +CONFIG_TARGET_SP=y diff --git a/configs/ta_defconfig b/configs/ta_defconfig new file mode 100644 index 0000000..504ad8f --- /dev/null +++ b/configs/ta_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/ta/ta1g.cfg,MX6Q,DDR_MB=1024,DEFCONFIG=\"ta\"" +CONFIG_ARM=y +CONFIG_TARGET_TA=y diff --git a/configs/tcm-bf518_defconfig b/configs/tcm-bf518_defconfig index a9d5da0..0c9ae4d 100644 --- a/configs/tcm-bf518_defconfig +++ b/configs/tcm-bf518_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_TCM_BF518=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/tcm-bf537_defconfig b/configs/tcm-bf537_defconfig index fe9de13..6d604b6 100644 --- a/configs/tcm-bf537_defconfig +++ b/configs/tcm-bf537_defconfig @@ -1,2 +1,3 @@ CONFIG_BLACKFIN=y CONFIG_TARGET_TCM_BF537=y +CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED=y diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index e4a31cc..fabd34a 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -2,3 +2,4 @@ +S:CONFIG_TEGRA=y +S:CONFIG_TEGRA30=y +S:CONFIG_TARGET_TEC_NG=y +CONFIG_DEFAULT_DEVICE_TREE="tegra30-tec-ng" diff --git a/configs/tec_defconfig b/configs/tec_defconfig index 62a9542..d3cafa7 100644 --- a/configs/tec_defconfig +++ b/configs/tec_defconfig @@ -2,3 +2,4 @@ +S:CONFIG_TEGRA=y +S:CONFIG_TEGRA20=y +S:CONFIG_TARGET_TEC=y +CONFIG_DEFAULT_DEVICE_TREE="tegra20-tec" diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig index fa82724..1b98b73 100644 --- a/configs/trats2_defconfig +++ b/configs/trats2_defconfig @@ -1,3 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_TRATS2=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="exynos4412-trats2" diff --git a/configs/trats_defconfig b/configs/trats_defconfig index f888a51..901a014 100644 --- a/configs/trats_defconfig +++ b/configs/trats_defconfig @@ -1,3 +1,5 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_TARGET_TRATS=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="exynos4210-trats" diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index 94f23e3..0b2a6d0 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -2,3 +2,4 @@ +S:CONFIG_TEGRA=y +S:CONFIG_TEGRA20=y +S:CONFIG_TARGET_TRIMSLICE=y +CONFIG_DEFAULT_DEVICE_TREE="tegra20-trimslice" diff --git a/configs/tseries_mmc_defconfig b/configs/tseries_mmc_defconfig index ea70705..6eda869 100644 --- a/configs/tseries_mmc_defconfig +++ b/configs/tseries_mmc_defconfig @@ -2,3 +2,4 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,EMMC_BOOT" +S:CONFIG_ARM=y +S:CONFIG_TARGET_TSERIES=y +# CONFIG_CMD_CRC32 is not set diff --git a/configs/tseries_nand_defconfig b/configs/tseries_nand_defconfig index 599d52c..bd06d83 100644 --- a/configs/tseries_nand_defconfig +++ b/configs/tseries_nand_defconfig @@ -2,3 +2,4 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,NAND" +S:CONFIG_ARM=y +S:CONFIG_TARGET_TSERIES=y +# CONFIG_CMD_CRC32 is not set diff --git a/configs/tseries_spi_defconfig b/configs/tseries_spi_defconfig index 7e57020..32ccc4e 100644 --- a/configs/tseries_spi_defconfig +++ b/configs/tseries_spi_defconfig @@ -2,3 +2,4 @@ CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="SERIAL1,CONS_INDEX=1,SPI_BOOT,EMMC_BOOT" +S:CONFIG_ARM=y +S:CONFIG_TARGET_TSERIES=y +# CONFIG_CMD_CRC32 is not set diff --git a/configs/utc_defconfig b/configs/utc_defconfig new file mode 100644 index 0000000..c6d774f --- /dev/null +++ b/configs/utc_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/nitrogen6x/nitrogen6q.cfg,MX6Q,DDR_MB=1024,DEFCONFIG=\"utc\"" +CONFIG_ARM=y +CONFIG_TARGET_UTC=y diff --git a/configs/vct_platinum_onenand_small_defconfig b/configs/vct_platinum_onenand_small_defconfig index f7b3a91..58c7995 100644 --- a/configs/vct_platinum_onenand_small_defconfig +++ b/configs/vct_platinum_onenand_small_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="VCT_PLATINUM,VCT_ONENAND,VCT_SMALL_IMAGE" CONFIG_MIPS=y CONFIG_TARGET_VCT=y +# CONFIG_CMD_CRC32 is not set diff --git a/configs/vct_platinum_small_defconfig b/configs/vct_platinum_small_defconfig index 15eef48..f4f56c4 100644 --- a/configs/vct_platinum_small_defconfig +++ b/configs/vct_platinum_small_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="VCT_PLATINUM,VCT_SMALL_IMAGE" CONFIG_MIPS=y CONFIG_TARGET_VCT=y +# CONFIG_CMD_CRC32 is not set diff --git a/configs/vct_platinumavc_onenand_small_defconfig b/configs/vct_platinumavc_onenand_small_defconfig index e0e8e44..31b4c9a 100644 --- a/configs/vct_platinumavc_onenand_small_defconfig +++ b/configs/vct_platinumavc_onenand_small_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="VCT_PLATINUMAVC,VCT_ONENAND,VCT_SMALL_IMAGE" CONFIG_MIPS=y CONFIG_TARGET_VCT=y +# CONFIG_CMD_CRC32 is not set diff --git a/configs/vct_platinumavc_small_defconfig b/configs/vct_platinumavc_small_defconfig index d8209d1..23f6561 100644 --- a/configs/vct_platinumavc_small_defconfig +++ b/configs/vct_platinumavc_small_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="VCT_PLATINUMAVC,VCT_SMALL_IMAGE" CONFIG_MIPS=y CONFIG_TARGET_VCT=y +# CONFIG_CMD_CRC32 is not set diff --git a/configs/vct_premium_onenand_small_defconfig b/configs/vct_premium_onenand_small_defconfig index 220f875..354793e 100644 --- a/configs/vct_premium_onenand_small_defconfig +++ b/configs/vct_premium_onenand_small_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="VCT_PREMIUM,VCT_ONENAND,VCT_SMALL_IMAGE" CONFIG_MIPS=y CONFIG_TARGET_VCT=y +# CONFIG_CMD_CRC32 is not set diff --git a/configs/vct_premium_small_defconfig b/configs/vct_premium_small_defconfig index 5335472..a23ddb7 100644 --- a/configs/vct_premium_small_defconfig +++ b/configs/vct_premium_small_defconfig @@ -1,3 +1,4 @@ CONFIG_SYS_EXTRA_OPTIONS="VCT_PREMIUM,VCT_SMALL_IMAGE" CONFIG_MIPS=y CONFIG_TARGET_VCT=y +# CONFIG_CMD_CRC32 is not set diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index dfc5407..c12dae9 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -2,3 +2,4 @@ +S:CONFIG_TEGRA=y +S:CONFIG_TEGRA124=y +S:CONFIG_TARGET_VENICE2=y +CONFIG_DEFAULT_DEVICE_TREE="tegra124-venice2" diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig index 845e241..f62ab6b 100644 --- a/configs/ventana_defconfig +++ b/configs/ventana_defconfig @@ -2,3 +2,4 @@ +S:CONFIG_TEGRA=y +S:CONFIG_TEGRA20=y +S:CONFIG_TARGET_VENTANA=y +CONFIG_DEFAULT_DEVICE_TREE="tegra20-ventana" diff --git a/configs/vexpress_aemv8a_defconfig b/configs/vexpress_aemv8a_defconfig index a335abc..b463a33 100644 --- a/configs/vexpress_aemv8a_defconfig +++ b/configs/vexpress_aemv8a_defconfig @@ -1,3 +1,3 @@ -CONFIG_SYS_EXTRA_OPTIONS="ARM64" CONFIG_ARM=y CONFIG_TARGET_VEXPRESS_AEMV8A=y +CONFIG_DEFAULT_DEVICE_TREE="vexpress64" diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index e6dd8e7..0035ccd 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -1,3 +1,4 @@ -CONFIG_SYS_EXTRA_OPTIONS="ARM64,SEMIHOSTING,BASE_FVP" +CONFIG_SYS_EXTRA_OPTIONS="SEMIHOSTING,BASE_FVP" CONFIG_ARM=y -CONFIG_TARGET_VEXPRESS_AEMV8A_SEMI=y +CONFIG_TARGET_VEXPRESS_AEMV8A=y +CONFIG_DEFAULT_DEVICE_TREE="vexpress64" diff --git a/configs/vp_defconfig b/configs/vp_defconfig new file mode 100644 index 0000000..5550657 --- /dev/null +++ b/configs/vp_defconfig @@ -0,0 +1,3 @@ +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/boundary/vp/vp2g.cfg,MX6Q,DDR_MB=2048,DEFCONFIG=\"vp\"" +CONFIG_ARM=y +CONFIG_TARGET_VP=y diff --git a/configs/whistler_defconfig b/configs/whistler_defconfig index 8c07c18..9553eb8 100644 --- a/configs/whistler_defconfig +++ b/configs/whistler_defconfig @@ -2,3 +2,4 @@ +S:CONFIG_TEGRA=y +S:CONFIG_TEGRA20=y +S:CONFIG_TARGET_WHISTLER=y +CONFIG_DEFAULT_DEVICE_TREE="tegra20-whistler" diff --git a/configs/zynq_microzed_defconfig b/configs/zynq_microzed_defconfig index 3aedb35..9588849 100644 --- a/configs/zynq_microzed_defconfig +++ b/configs/zynq_microzed_defconfig @@ -2,3 +2,5 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_ZYNQ=y +S:CONFIG_TARGET_ZYNQ_MICROZED=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-microzed" diff --git a/configs/zynq_zc70x_defconfig b/configs/zynq_zc70x_defconfig index 04c8def..cf50730 100644 --- a/configs/zynq_zc70x_defconfig +++ b/configs/zynq_zc70x_defconfig @@ -2,3 +2,5 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_ZYNQ=y +S:CONFIG_TARGET_ZYNQ_ZC70X=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-zc702" diff --git a/configs/zynq_zc770_xm010_defconfig b/configs/zynq_zc770_xm010_defconfig index 1178b40..8bb405d 100644 --- a/configs/zynq_zc770_xm010_defconfig +++ b/configs/zynq_zc770_xm010_defconfig @@ -3,3 +3,5 @@ CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM010" +S:CONFIG_ARM=y +S:CONFIG_ZYNQ=y +S:CONFIG_TARGET_ZYNQ_ZC770=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm010" diff --git a/configs/zynq_zc770_xm012_defconfig b/configs/zynq_zc770_xm012_defconfig index 52c2121..0ba5da5 100644 --- a/configs/zynq_zc770_xm012_defconfig +++ b/configs/zynq_zc770_xm012_defconfig @@ -3,3 +3,5 @@ CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM012" +S:CONFIG_ARM=y +S:CONFIG_ZYNQ=y +S:CONFIG_TARGET_ZYNQ_ZC770=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm012" diff --git a/configs/zynq_zc770_xm013_defconfig b/configs/zynq_zc770_xm013_defconfig index 836809a..13f8112 100644 --- a/configs/zynq_zc770_xm013_defconfig +++ b/configs/zynq_zc770_xm013_defconfig @@ -3,3 +3,5 @@ CONFIG_SYS_EXTRA_OPTIONS="ZC770_XM013" +S:CONFIG_ARM=y +S:CONFIG_ZYNQ=y +S:CONFIG_TARGET_ZYNQ_ZC770=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm013" diff --git a/configs/zynq_zed_defconfig b/configs/zynq_zed_defconfig index 2337906..eb057fa 100644 --- a/configs/zynq_zed_defconfig +++ b/configs/zynq_zed_defconfig @@ -2,3 +2,5 @@ CONFIG_SPL=y +S:CONFIG_ARM=y +S:CONFIG_ZYNQ=y +S:CONFIG_TARGET_ZYNQ_ZED=y +CONFIG_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="zynq-zed" diff --git a/disk/part.c b/disk/part.c index ecc5e7e..cfd77b0 100644 --- a/disk/part.c +++ b/disk/part.c @@ -133,7 +133,7 @@ typedef lbaint_t lba512_t; * Overflowless variant of (block_count * mul_by / div_by) * when div_by > mul_by */ -static lba512_t lba512_muldiv (lba512_t block_count, lba512_t mul_by, lba512_t div_by) +static lba512_t lba512_muldiv(lba512_t block_count, lba512_t mul_by, lba512_t div_by) { lba512_t bc_quot, bc_rem; @@ -215,7 +215,8 @@ void dev_print (block_dev_desc_t *dev_desc) lba512 = (lba * (dev_desc->blksz/512)); /* round to 1 digit */ - mb = lba512_muldiv(lba512, 10, 2048); /* 2048 = (1024 * 1024) / 512 MB */ + /* 2048 = (1024 * 1024) / 512 MB */ + mb = lba512_muldiv(lba512, 10, 2048); mb_quot = mb / 10; mb_rem = mb - (10 * mb_quot); @@ -248,7 +249,7 @@ void dev_print (block_dev_desc_t *dev_desc) #ifdef HAVE_BLOCK_DEVICE -void init_part (block_dev_desc_t * dev_desc) +void init_part(block_dev_desc_t *dev_desc) { #ifdef CONFIG_ISO_PARTITION if (test_part_iso(dev_desc) == 0) { @@ -295,7 +296,7 @@ void init_part (block_dev_desc_t * dev_desc) defined(CONFIG_AMIGA_PARTITION) || \ defined(CONFIG_EFI_PARTITION) -static void print_part_header (const char *type, block_dev_desc_t * dev_desc) +static void print_part_header(const char *type, block_dev_desc_t *dev_desc) { puts ("\nPartition Map for "); switch (dev_desc->if_type) { diff --git a/doc/README.android-fastboot b/doc/README.android-fastboot index 4045727..1677609 100644 --- a/doc/README.android-fastboot +++ b/doc/README.android-fastboot @@ -6,8 +6,9 @@ Overview The protocol that is used over USB is described in README.android-fastboot-protocol in same directory. -The current implementation does not yet support the flash and erase -commands. +The current implementation does not yet support the erase command or the +"oem format" command, and there is minimal support for the flash command; +it only supports eMMC devices. Client installation =================== diff --git a/doc/README.clang b/doc/README.clang new file mode 100644 index 0000000..52495d3 --- /dev/null +++ b/doc/README.clang @@ -0,0 +1,56 @@ +The biggest problem when trying to compile U-boot with clang is that +almost all archs rely on storing gd in a global register and clang user +manual states: "clang does not support global register variables; this +is unlikely to be implemented soon because it requires additional LLVM +backend support." + +Since version 3.4 the ARM backend can be instructed to leave r9 alone. +Global registers themselves are not supported so some inline assembly is +used to get its value. This does lead to larger code then strictly +necessary, but at least works. + +NOTE: target compilation only work for _some_ ARM boards at the moment. +Also Aarch64 is not supported: Most notably boards which aren't using +the generic board will fail to compile, but since those are expected +to be converted this will solve itself. Boards which reassign gd in c +will also fail to compile, but there is in no strict reason to do so +in the ARM world, since crt0.S takes care of this. These assignments +can be avoided by changing the init calls but this is not in mainline yet. + +NOTE: without the -mllvm -arm-use-movt=0 flags u-boot will compile +fine, but llvm might hardcode addresses in movw / movt pairs, which +cannot be relocated and u-boot will fail at runtime. + +Debian (based) +-------------- +Binary packages can be installed as usual, e.g.: +sudo apt-get install clang + +To compile U-Boot with clang on linux without IAS use e.g.: +export TRIPLET=arm-linux-gnueabi && export CROSS_COMPILE="$TRIPLET-" +make HOSTCC=clang CC="clang -target $TRIPLET -mllvm -arm-use-movt=0 -no-integrated-as" rpi_b_defconfig +make HOSTCC=clang CC="clang -target $TRIPLET -mllvm -arm-use-movt=0 -no-integrated-as" all V=1 -j8 + +FreeBSD 11 (Current): +-------------------- +Since llvm 3.4 is currently in the base system, the integrated as is +incapable of building U-Boot. Therefore gas from devel/arm-gnueabi-binutils +is used instead. It needs a symlinks to be picked up correctly though: + +ln -s /usr/local/bin/arm-gnueabi-freebsd-as /usr/bin/arm-freebsd-eabi-as + +# The following commands compile U-Boot using the clang xdev toolchain. +# NOTE: CROSS_COMPILE and target differ on purpose! +export CROSS_COMPILE=arm-gnueabi-freebsd- +gmake CC="clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd -no-integrated-as -mllvm -arm-use-movt=0" rpi_b_defconfig +gmake CC="clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd -no-integrated-as -mllvm -arm-use-movt=0" -j8 + +Given that u-boot will default to gcc, above commands can be +simplified with a simple wrapper script, listed below. + +/usr/local/bin/arm-gnueabi-freebsd-gcc +--- +#!/bin/sh + +exec clang -target arm-freebsd-eabi --sysroot /usr/arm-freebsd -no-integrated-as -mllvm -arm-use-movt=0 "$@" + diff --git a/doc/README.fsl-esdhc b/doc/README.fsl-esdhc new file mode 100644 index 0000000..b70f271 --- /dev/null +++ b/doc/README.fsl-esdhc @@ -0,0 +1,5 @@ +CONFIG_SYS_FSL_ESDHC_LE means ESDHC IP is in little-endian mode. +CONFIG_SYS_FSL_ESDHC_BE means ESDHC IP is in big-endian mode. + +Accessing ESDHC registers can be determined by ESDHC IP's endian +mode or processor's endian mode. diff --git a/doc/README.imximage b/doc/README.imximage index dcda200..27d3354 100644 --- a/doc/README.imximage +++ b/doc/README.imximage @@ -120,7 +120,7 @@ Configuration command line syntax: DATA 4 0x73FA88a0 0x200 The processor support up to 60 register programming commands for IMXIMAGE_VERSION 1 -and 121 register programming commands for IMXIMAGE_VERSION 2. +and 220 register programming commands for IMXIMAGE_VERSION 2. An error is generated if more commands are found in the configuration file. 3. All commands are optional to program. diff --git a/doc/README.nand b/doc/README.nand index e29188f..320d752 100644 --- a/doc/README.nand +++ b/doc/README.nand @@ -215,6 +215,12 @@ Configuration Options: Platform specific options ========================= + CONFIG_NAND_DENALI + Enables the denali.c driver. + + CONFIG_SYS_NAND_DENALI_64BIT + Indicates that the Denali NAND controller is the 64-bit variant. + CONFIG_NAND_OMAP_GPMC Enables omap_gpmc.c driver for OMAPx and AMxxxx platforms. GPMC controller is used for parallel NAND flash devices, and can diff --git a/doc/README.odroid b/doc/README.odroid new file mode 100644 index 0000000..528bb95 --- /dev/null +++ b/doc/README.odroid @@ -0,0 +1,143 @@ + U-boot for Odroid X2/U3 +======================== + +1. Summary +========== +This is a quick instruction for setup Odroid boards based on Exynos4412. +Board config: odroid_config + +2. Supported devices +==================== +This U-BOOT config can be used on two boards: +- Odroid U3 +- Odroid X2 +with CPU Exynos 4412 rev 2.0 and 2GB of RAM + +3. Boot sequence +================ +iROM->BL1->(BL2 + TrustZone)->U-BOOT + +This version of U-BOOT doesn't implement SPL but it is required(BL2) +and can be found in "boot.tar.gz" from here: +http://dev.odroid.com/projects/4412boot/wiki/FrontPage?action=download&value=boot.tar.gz +or here: +http://odroid.in/guides/ubuntu-lfs/boot.tar.gz + +4. Boot media layout +==================== +The table below shows SD/eMMC cards layout for U-boot. +The block offset is starting from 0 and the block size is 512B. + ------------------------------------- +| Binary | Block offset| part type | +| name | SD | eMMC |(eMMC only)| + ------------------------------------- +| Bl1 | 1 | 0 | 1 (boot) | +| Bl2 | 31 | 30 | 1 (boot) | +| U-boot | 63 | 62 | 1 (boot) | +| Tzsw | 2111 | 2110 | 1 (boot) | +| Uboot Env | 2500 | 2500 | 0 (user) | + ------------------------------------- + +5. Prepare the SD boot card - with SD card reader +================================================= +To prepare bootable media you need boot binaries provided by hardkernel. +File "boot.tar.gz" (link in point 3.) contains: +- E4412_S.bl1.HardKernel.bin +- E4412_S.tzsw.signed.bin +- bl2.signed.bin +- sd_fusing.sh +- u-boot.bin + +This is all you need to boot this board. But if you want to use your custom +u-boot then you need to change u-boot.bin with your own u-boot binary* +and run the script "sd_fusing.sh" - this script is valid only for SD card. + +*note: +The proper binary file of current U-boot is u-boot-dtb.bin. + +quick steps for Linux: +- extract boot.tar.gz +- put any SD card into the SD reader +- check the device with "dmesg" +- run ./sd_fusing.sh /dev/sdX - where X is SD card device (but not a partition) +Check if Hardkernel U-boot is booting, and next do the same with your U-boot. + +6. Prepare the eMMC boot card + with a eMMC card reader (boot from eMMC card slot) +===================================================== +To boot the device from the eMMC slot you should use a special card reader +which supports eMMC partiion switch. All of the boot binaries are stored +on the eMMC boot partition which is normally hidden. + +The "sd_fusing.sh" script can be used after updating offsets of binaries +according to the table from point 4. Be sure that you are working on the right +eMMC partition - its size is usually very small, about 1-4 MiB. + +7. Prepare the eMMC boot card + with a SD card reader (boot from SD card slot) +================================================= +If you have an eMMC->microSD adapter you can prepare the card as in point 5. +But then the device can boot only from the SD card slot. + +8. Prepare the boot media using Hardkernel U-boot +================================================= +You can update the U-boot to the custom one if you have an working bootloader +delivered with the board on a eMMC/SD card. Then follow the steps: +- install the android fastboot tool +- connect a micro usb cable to the board +- on the U-boot prompt, run command: fastboot (as a root) +- on the host, run command: "fastboot flash bootloader u-boot-dtb.bin" +- the custom U-boot should start after the board resets. + +9. Partition layout +==================== +Default U-boot environment is setup for fixed partiion layout. + +Partition table: MSDOS. Disk layout and files as listed in the table below. + ----- ------ ------ ------ -------- --------------------------------- +| Num | Name | FS | Size | Offset | Reguired files | +| | | Type | MiB | MiB | | + ----- ------ ------ ------ -------- --------------------------------- +| 1 | BOOT | fat | 100 | 2 | kernel, fdt** | +| 2 | ROOT | ext4 | - | | any Linux system | + ----- ------ ------ ------ -------- --------------------------------- + +**note: +Supported fdt files are: +- exynos4412-odroidx2.dtb +- exynos4412-odroidu3.dtb + +Supported kernel files are: +- Image.itb +- zImage +- uImage + +The default environmental variable "dfu_alt_info" is set* for above layout. +Each partition size is just an example, dfu_alt_info tries init two partitions. +The size of each is not important. + +*note: +$dfu_alt_info is set on a boot time and it is concatenated using two variables: +- $dfu_alt_boot(set dynamically) +- $dfu_alt_system(from current env). + +To add any changes to dfu_alt_info - please modify $dfu_alt_system only. +Changes are visible after board reset. + +10. The environment and booting the kernel +========================================== +There are three macros defined in config for various boot options: +Two for both, kernel with device tree support and also without it: +- boot_uimg - load uImage +- boot_zimg - load zImage +If proper fdt file exists then it will be automatically loaded, +so for old kernel types, please remove fdt file from boot partition. + +The third boot option for multi image support (more info: doc/uImage.FIT/) +- boot_fit - for binary file: "Image.itb" + +Default boot command: "autoboot" +And the boot sequence is: +- boot_fit - if "Image.itb" exists +- boot_zimg - if "zImage" exists +- boot_uimg - if "uImage" exists diff --git a/doc/README.scrapyard b/doc/README.scrapyard index 7ef5a22..2f5034f 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -12,12 +12,14 @@ The list should be sorted in reverse chronological order. Board Arch CPU Commit Removed Last known maintainer/contact ================================================================================================= -flagadm powerpc mpc8xx - - Kári Davíðsson -gen860t powerpc mpc8xx - - Keith Outwater -sixnet powerpc mpc8xx - - Dave Ellis -svm_sc8xx powerpc mpc8xx - - John Zhan -stxxtc powerpc mpc8xx - - Dan Malek -omap5912osk arm arm926ejs - - Rishi Bhattacharya +PK1C20 nios2 - 70fbc461 2014-08-24 Scott McNutt +PCI5441 nios2 - 70fbc461 2014-08-24 Scott McNutt +flagadm powerpc mpc8xx aec6f8c5 2014-08-22 Kári Davíðsson +gen860t powerpc mpc8xx 6bde1ec1 2014-08-22 Keith Outwater +sixnet powerpc mpc8xx 4723ce49 2014-08-22 Dave Ellis +svm_sc8xx powerpc mpc8xx d1a4aafd 2014-08-22 John Zhan +stxxtc powerpc mpc8xx 0ace4d9d 2014-08-22 Dan Malek +omap5912osk arm arm926ejs 62d636aa 2014-08-22 Rishi Bhattacharya p1023rds powerpc mpc85xx d0bc5140 2014-07-22 Roy Zang spc1920 powerpc mpc8xx 98ad54be 2014-07-07 v37 powerpc mpc8xx b8c1438a 2014-07-07 diff --git a/doc/device-tree-bindings/serial/ns16550.txt b/doc/device-tree-bindings/serial/ns16550.txt new file mode 100644 index 0000000..ef0b9ae --- /dev/null +++ b/doc/device-tree-bindings/serial/ns16550.txt @@ -0,0 +1,10 @@ +NS16550 UART + +This UART driver supports many chip variants and is used in mamy SoCs. + +Required properties: +- compatible: "ns16550" or "nvidia,tegra20-uart" +- reg: start address and size of registers +- reg-shift: shift value indicating register size: 0=byte, 1=16bit,2=32bit etc. +- clock-frequency: input clock frequency for the UART (used to calculate the + baud rate divisor) diff --git a/doc/device-tree-bindings/serial/sandbox-serial.txt b/doc/device-tree-bindings/serial/sandbox-serial.txt new file mode 100644 index 0000000..f429c90 --- /dev/null +++ b/doc/device-tree-bindings/serial/sandbox-serial.txt @@ -0,0 +1,13 @@ +Sandbox serial + +The sandbox serial device is an emulated device which displays its output +on the host machine's console, and accepts input from its keyboard. + +Required properties: + compatible: "sandbox,serial" + +Optional properties: + sandbox,text-colour: If present, this is the colour of the console text. + Supported values are: + "black", "red", "green", "yellow", "blue", "megenta", "cyan", + "white" diff --git a/doc/device-tree-bindings/video/exynos-fb.txt b/doc/device-tree-bindings/video/exynos-fb.txt index bb7441c..dc4e44f 100644 --- a/doc/device-tree-bindings/video/exynos-fb.txt +++ b/doc/device-tree-bindings/video/exynos-fb.txt @@ -55,6 +55,12 @@ Board(panel specific): samsung,pclk-name: parent clock identifier: 1(MPLL), 2(EPLL), 3(VPLL) samsung,sclk-div: parent_clock/source_clock ratio samsung,dual-lcd-enabled: 1 if you support two LCD, else 0 + samsung,disable-sysmmu: Define this if you want to disable FIMD sysmmu. + (needed for Exynos5420 and newer versions) + Add the required FIMD sysmmu nodes to be + disabled with compatible string + "samsung,sysmmu-v3.3", with a "reg" property + holding the register address of FIMD sysmmu. Example: SOC specific part: diff --git a/drivers/Kconfig b/drivers/Kconfig new file mode 100644 index 0000000..128736d --- /dev/null +++ b/drivers/Kconfig @@ -0,0 +1,51 @@ +menu "Device Drivers" + +source "drivers/core/Kconfig" + +source "drivers/pci/Kconfig" + +source "drivers/pcmcia/Kconfig" + +source "drivers/mtd/Kconfig" + +source "drivers/block/Kconfig" + +source "drivers/misc/Kconfig" + +source "drivers/net/Kconfig" + +source "drivers/input/Kconfig" + +source "drivers/serial/Kconfig" + +source "drivers/tpm/Kconfig" + +source "drivers/i2c/Kconfig" + +source "drivers/spi/Kconfig" + +source "drivers/gpio/Kconfig" + +source "drivers/power/Kconfig" + +source "drivers/hwmon/Kconfig" + +source "drivers/watchdog/Kconfig" + +source "drivers/video/Kconfig" + +source "drivers/sound/Kconfig" + +source "drivers/usb/Kconfig" + +source "drivers/dfu/Kconfig" + +source "drivers/mmc/Kconfig" + +source "drivers/rtc/Kconfig" + +source "drivers/dma/Kconfig" + +source "drivers/crypto/Kconfig" + +endmenu diff --git a/drivers/Makefile b/drivers/Makefile index b22b109..d8361d9 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -1,3 +1,5 @@ +obj-$(CONFIG_DM) += core/ +obj-$(CONFIG_DM_DEMO) += demo/ obj-$(CONFIG_BIOSEMU) += bios_emulator/ obj-y += block/ obj-$(CONFIG_BOOTCOUNT_LIMIT) += bootcount/ @@ -16,3 +18,4 @@ obj-y += watchdog/ obj-$(CONFIG_QE) += qe/ obj-y += memory/ obj-y += pwm/ +obj-y += input/ diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/block/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/block/dwc_ahsata.c b/drivers/block/dwc_ahsata.c index 15d65d7..be29926 100644 --- a/drivers/block/dwc_ahsata.c +++ b/drivers/block/dwc_ahsata.c @@ -481,7 +481,7 @@ static int ahci_port_start(struct ahci_probe_ent *probe_ent, (struct sata_port_regs *)pp->port_mmio; u32 port_status; u32 mem; - int timeout = 10000000; + int timeout = 20000000; debug("Enter start port: %d\n", port); port_status = readl(&(port_mmio->ssts)); @@ -864,6 +864,23 @@ u32 ata_low_level_rw_lba28(int dev, u32 blknr, lbaint_t blkcnt, return blkcnt; } +int sata_port_status(int dev, int port) +{ + struct sata_port_regs *port_mmio; + struct ahci_probe_ent *probe_ent = NULL; + + if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) + return -EINVAL; + + if (sata_dev_desc[dev].priv == NULL) + return -ENODEV; + + probe_ent = (struct ahci_probe_ent *)sata_dev_desc[dev].priv; + port_mmio = (struct sata_port_regs *)probe_ent->port[port].port_mmio; + + return readl(&(port_mmio->ssts)) && SATA_PORT_SSTS_DET_MASK; +} + /* * SATA interface between low level driver and command layer */ diff --git a/drivers/core/Kconfig b/drivers/core/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/core/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/core/Makefile b/drivers/core/Makefile index 90b2a7f..c7905b1 100644 --- a/drivers/core/Makefile +++ b/drivers/core/Makefile @@ -4,4 +4,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_DM) := device.o lists.o root.o uclass.o util.o +obj-y := device.o lists.o root.o uclass.o util.o diff --git a/drivers/core/device.c b/drivers/core/device.c index 166b073..32e80e8 100644 --- a/drivers/core/device.c +++ b/drivers/core/device.c @@ -106,13 +106,18 @@ int device_bind(struct udevice *parent, struct driver *drv, const char *name, * a 'requested' sequence, and will be resolved (and ->seq updated) * when the device is probed. */ - dev->req_seq = fdtdec_get_int(gd->fdt_blob, of_offset, "reg", -1); dev->seq = -1; +#ifdef CONFIG_OF_CONTROL + dev->req_seq = fdtdec_get_int(gd->fdt_blob, of_offset, "reg", -1); + if (!IS_ERR_VALUE(dev->req_seq)) + dev->req_seq &= INT_MAX; if (uc->uc_drv->name && of_offset != -1) { fdtdec_get_alias_seq(gd->fdt_blob, uc->uc_drv->name, of_offset, &dev->req_seq); } - +#else + dev->req_seq = -1; +#endif if (!dev->platdata && drv->platdata_auto_alloc_size) dev->flags |= DM_FLAG_ALLOC_PDATA; diff --git a/drivers/core/lists.c b/drivers/core/lists.c index 0f08bfd..699f94b 100644 --- a/drivers/core/lists.c +++ b/drivers/core/lists.c @@ -118,7 +118,8 @@ static int driver_check_compatible(const void *blob, int offset, return -ENOENT; } -int lists_bind_fdt(struct udevice *parent, const void *blob, int offset) +int lists_bind_fdt(struct udevice *parent, const void *blob, int offset, + struct udevice **devp) { struct driver *driver = ll_entry_start(struct driver, driver); const int n_ents = ll_entry_count(struct driver, driver); @@ -130,6 +131,8 @@ int lists_bind_fdt(struct udevice *parent, const void *blob, int offset) int ret = 0; dm_dbg("bind node %s\n", fdt_get_name(blob, offset, NULL)); + if (devp) + *devp = NULL; for (entry = driver; entry != driver + n_ents; entry++) { ret = driver_check_compatible(blob, offset, entry->of_match); name = fdt_get_name(blob, offset, NULL); @@ -149,10 +152,11 @@ int lists_bind_fdt(struct udevice *parent, const void *blob, int offset) ret = device_bind(parent, entry, name, NULL, offset, &dev); if (ret) { dm_warn("Error binding driver '%s'\n", entry->name); - if (!result || ret != -ENOENT) - result = ret; + return ret; } else { found = true; + if (devp) + *devp = dev; } break; } diff --git a/drivers/core/root.c b/drivers/core/root.c index 393dd98..a328a48 100644 --- a/drivers/core/root.c +++ b/drivers/core/root.c @@ -91,7 +91,7 @@ int dm_scan_fdt_node(struct udevice *parent, const void *blob, int offset, if (pre_reloc_only && !fdt_getprop(blob, offset, "u-boot,dm-pre-reloc", NULL)) continue; - err = lists_bind_fdt(parent, blob, offset); + err = lists_bind_fdt(parent, blob, offset, NULL); if (err && !ret) ret = err; } diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/crypto/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/ddr/fsl/arm_ddr_gen3.c b/drivers/ddr/fsl/arm_ddr_gen3.c index d4ed9ae..59f2fd6 100644 --- a/drivers/ddr/fsl/arm_ddr_gen3.c +++ b/drivers/ddr/fsl/arm_ddr_gen3.c @@ -194,7 +194,7 @@ step2: * For example, 2GB on 666MT/s 64-bit bus takes about 402ms * Let's wait for 800ms */ - bus_width = 3 - ((ddr->sdram_cfg & SDRAM_CFG_DBW_MASK) + bus_width = 3 - ((ddr_in32(&ddr->sdram_cfg) & SDRAM_CFG_DBW_MASK) >> SDRAM_CFG_DBW_SHIFT); timeout = ((total_gb_size_per_controller << (6 - bus_width)) * 100 / (get_ddr_freq(0) >> 20)) << 1; diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index 04e4178..9a156bf 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -297,10 +297,13 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr, unsigned char taxpd_mclk = 0; /* Mode register set cycle time (tMRD). */ unsigned char tmrd_mclk; +#if defined(CONFIG_SYS_FSL_DDR4) || defined(CONFIG_SYS_FSL_DDR3) + const unsigned int mclk_ps = get_memory_clk_period_ps(); +#endif #ifdef CONFIG_SYS_FSL_DDR4 /* tXP=max(4nCK, 6ns) */ - int txp = max((get_memory_clk_period_ps() * 4), 6000); /* unit=ps */ + int txp = max(mclk_ps * 4, 6000); /* unit=ps */ trwt_mclk = 2; twrt_mclk = 1; act_pd_exit_mclk = picos_to_mclk(txp); @@ -311,16 +314,19 @@ static void set_timing_cfg_0(fsl_ddr_cfg_regs_t *ddr, */ tmrd_mclk = max(24, picos_to_mclk(15000)); #elif defined(CONFIG_SYS_FSL_DDR3) + unsigned int data_rate = get_ddr_freq(0); + int txp; /* * (tXARD and tXARDS). Empirical? * The DDR3 spec has not tXARD, * we use the tXP instead of it. - * tXP=max(3nCK, 7.5ns) for DDR3. + * tXP=max(3nCK, 7.5ns) for DDR3-800, 1066 + * max(3nCK, 6ns) for DDR3-1333, 1600, 1866, 2133 * spec has not the tAXPD, we use * tAXPD=1, need design to confirm. */ - int txp = max((get_memory_clk_period_ps() * 3), 7500); /* unit=ps */ - unsigned int data_rate = get_ddr_freq(0); + txp = max(mclk_ps * 3, (mclk_ps > 1540 ? 7500 : 6000)); + tmrd_mclk = 4; /* set the turnaround time */ @@ -578,6 +584,9 @@ static void set_timing_cfg_2(fsl_ddr_cfg_regs_t *ddr, unsigned char cke_pls; /* Window for four activates (tFAW) */ unsigned short four_act; +#ifdef CONFIG_SYS_FSL_DDR3 + const unsigned int mclk_ps = get_memory_clk_period_ps(); +#endif /* FIXME add check that this must be less than acttorw_mclk */ add_lat_mclk = additive_latency; @@ -619,10 +628,17 @@ static void set_timing_cfg_2(fsl_ddr_cfg_regs_t *ddr, #ifdef CONFIG_SYS_FSL_DDR4 cpo = 0; cke_pls = max(3, picos_to_mclk(5000)); +#elif defined(CONFIG_SYS_FSL_DDR3) + /* + * cke pulse = max(3nCK, 7.5ns) for DDR3-800 + * max(3nCK, 5.625ns) for DDR3-1066, 1333 + * max(3nCK, 5ns) for DDR3-1600, 1866, 2133 + */ + cke_pls = max(3, picos_to_mclk(mclk_ps > 1870 ? 7500 : + (mclk_ps > 1245 ? 5625 : 5000))); #else - cke_pls = picos_to_mclk(popts->tcke_clock_pulse_width_ps); + cke_pls = FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR; #endif - four_act = picos_to_mclk(popts->tfaw_window_four_activates_ps); ddr->timing_cfg_2 = (0 @@ -693,6 +709,7 @@ static void set_ddr_sdram_cfg(fsl_ddr_cfg_regs_t *ddr, unsigned int x32_en = 0; /* x32 enable */ unsigned int pchb8 = 0; /* precharge bit 8 enable */ unsigned int hse; /* Global half strength override */ + unsigned int acc_ecc_en = 0; /* Accumulated ECC enable */ unsigned int mem_halt = 0; /* memory controller halt */ unsigned int bi = 0; /* Bypass initialization */ @@ -736,6 +753,9 @@ static void set_ddr_sdram_cfg(fsl_ddr_cfg_regs_t *ddr, ba_intlv_ctl = popts->ba_intlv_ctl; hse = popts->half_strength_driver_enable; + /* set when ddr bus width < 64 */ + acc_ecc_en = (dbw != 0 && ecc_en == 1) ? 1 : 0; + ddr->ddr_sdram_cfg = (0 | ((mem_en & 0x1) << 31) | ((sren & 0x1) << 30) @@ -752,6 +772,7 @@ static void set_ddr_sdram_cfg(fsl_ddr_cfg_regs_t *ddr, | ((x32_en & 0x1) << 5) | ((pchb8 & 0x1) << 4) | ((hse & 0x1) << 3) + | ((acc_ecc_en & 0x1) << 2) | ((mem_halt & 0x1) << 1) | ((bi & 0x1) << 0) ); @@ -1881,9 +1902,12 @@ static void set_timing_cfg_9(fsl_ddr_cfg_regs_t *ddr) debug("FSLDDR: timing_cfg_9 = 0x%08x\n", ddr->timing_cfg_9); } +/* This function needs to be called after set_ddr_sdram_cfg() is called */ static void set_ddr_dq_mapping(fsl_ddr_cfg_regs_t *ddr, const dimm_params_t *dimm_params) { + unsigned int acc_ecc_en = (ddr->ddr_sdram_cfg >> 2) & 0x1; + ddr->dq_map_0 = ((dimm_params->dq_mapping[0] & 0x3F) << 26) | ((dimm_params->dq_mapping[1] & 0x3F) << 20) | ((dimm_params->dq_mapping[2] & 0x3F) << 14) | @@ -1902,9 +1926,11 @@ static void set_ddr_dq_mapping(fsl_ddr_cfg_regs_t *ddr, ((dimm_params->dq_mapping[15] & 0x3F) << 8) | ((dimm_params->dq_mapping[16] & 0x3F) << 2); + /* dq_map for ECC[4:7] is set to 0 if accumulated ECC is enabled */ ddr->dq_map_3 = ((dimm_params->dq_mapping[17] & 0x3F) << 26) | ((dimm_params->dq_mapping[8] & 0x3F) << 20) | - ((dimm_params->dq_mapping[9] & 0x3F) << 14) | + (acc_ecc_en ? 0 : + (dimm_params->dq_mapping[9] & 0x3F) << 14) | dimm_params->dq_mapping_ors; debug("FSLDDR: dq_map_0 = 0x%08x\n", ddr->dq_map_0); @@ -2271,6 +2297,9 @@ compute_fsl_memctl_config_regs(const memctl_options_t *popts, if (ip_rev > 0x40400) unq_mrs_en = 1; + if ((ip_rev > 0x40700) && (popts->cswl_override != 0)) + ddr->debug[18] = popts->cswl_override; + set_ddr_sdram_cfg_2(ddr, popts, unq_mrs_en); set_ddr_sdram_mode(ddr, popts, common_dimm, cas_latency, additive_latency, unq_mrs_en); diff --git a/drivers/ddr/fsl/ddr4_dimm_params.c b/drivers/ddr/fsl/ddr4_dimm_params.c index 4745b7f..2418dca 100644 --- a/drivers/ddr/fsl/ddr4_dimm_params.c +++ b/drivers/ddr/fsl/ddr4_dimm_params.c @@ -113,7 +113,7 @@ compute_ranksize(const struct ddr4_spd_eeprom_s *spd) #define spd_to_ps(mtb, ftb) \ (mtb * pdimm->mtb_ps + (ftb * pdimm->ftb_10th_ps) / 10) /* - * ddr_compute_dimm_parameters for DDR3 SPD + * ddr_compute_dimm_parameters for DDR4 SPD * * Compute DIMM parameters based upon the SPD information in spd. * Writes the results to the dimm_params_t structure pointed by pdimm. @@ -165,17 +165,17 @@ ddr_compute_dimm_parameters(const generic_spd_eeprom_t *spd, + pdimm->ec_sdram_width; pdimm->device_width = 1 << ((spd->organization & 0x7) + 2); - /* These are the types defined by the JEDEC DDR3 SPD spec */ + /* These are the types defined by the JEDEC SPD spec */ pdimm->mirrored_dimm = 0; pdimm->registered_dimm = 0; - switch (spd->module_type & DDR3_SPD_MODULETYPE_MASK) { - case DDR3_SPD_MODULETYPE_RDIMM: + switch (spd->module_type & DDR4_SPD_MODULETYPE_MASK) { + case DDR4_SPD_MODULETYPE_RDIMM: /* Registered/buffered DIMMs */ pdimm->registered_dimm = 1; break; - case DDR3_SPD_MODULETYPE_UDIMM: - case DDR3_SPD_MODULETYPE_SO_DIMM: + case DDR4_SPD_MODULETYPE_UDIMM: + case DDR4_SPD_MODULETYPE_SO_DIMM: /* Unbuffered DIMMs */ if (spd->mod_section.unbuffered.addr_mapping & 0x1) pdimm->mirrored_dimm = 1; diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c index bfc76b3..e024db9 100644 --- a/drivers/ddr/fsl/fsl_ddr_gen4.c +++ b/drivers/ddr/fsl/fsl_ddr_gen4.c @@ -216,7 +216,7 @@ step2: * For example, 2GB on 666MT/s 64-bit bus takes about 402ms * Let's wait for 800ms */ - bus_width = 3 - ((ddr->sdram_cfg & SDRAM_CFG_DBW_MASK) + bus_width = 3 - ((ddr_in32(&ddr->sdram_cfg) & SDRAM_CFG_DBW_MASK) >> SDRAM_CFG_DBW_SHIFT); timeout = ((total_gb_size_per_controller << (6 - bus_width)) * 100 / (get_ddr_freq(0) >> 20)) << 2; @@ -233,5 +233,4 @@ step2: if (timeout <= 0) printf("Waiting for D_INIT timeout. Memory may not work.\n"); - } diff --git a/drivers/ddr/fsl/interactive.c b/drivers/ddr/fsl/interactive.c index 7fb4187..32ba6d8 100644 --- a/drivers/ddr/fsl/interactive.c +++ b/drivers/ddr/fsl/interactive.c @@ -511,12 +511,12 @@ static void fsl_ddr_options_edit(fsl_ddr_info_t *pinfo, CTRL_OPTIONS(wrlvl_override), CTRL_OPTIONS(wrlvl_sample), CTRL_OPTIONS(wrlvl_start), + CTRL_OPTIONS(cswl_override), CTRL_OPTIONS(rcw_override), CTRL_OPTIONS(rcw_1), CTRL_OPTIONS(rcw_2), CTRL_OPTIONS(ddr_cdr1), CTRL_OPTIONS(ddr_cdr2), - CTRL_OPTIONS(tcke_clock_pulse_width_ps), CTRL_OPTIONS(tfaw_window_four_activates_ps), CTRL_OPTIONS(trwt_override), CTRL_OPTIONS(trwt), @@ -801,12 +801,12 @@ static void print_memctl_options(const memctl_options_t *popts) CTRL_OPTIONS(wrlvl_override), CTRL_OPTIONS(wrlvl_sample), CTRL_OPTIONS(wrlvl_start), + CTRL_OPTIONS_HEX(cswl_override), CTRL_OPTIONS(rcw_override), CTRL_OPTIONS(rcw_1), CTRL_OPTIONS(rcw_2), CTRL_OPTIONS_HEX(ddr_cdr1), CTRL_OPTIONS_HEX(ddr_cdr2), - CTRL_OPTIONS(tcke_clock_pulse_width_ps), CTRL_OPTIONS(tfaw_window_four_activates_ps), CTRL_OPTIONS(trwt_override), CTRL_OPTIONS(trwt), diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c index 5e001fc..b43b669 100644 --- a/drivers/ddr/fsl/main.c +++ b/drivers/ddr/fsl/main.c @@ -135,7 +135,7 @@ __attribute__((weak, alias("__get_spd"))) void get_spd(generic_spd_eeprom_t *spd, u8 i2c_address); void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd, - unsigned int ctrl_num) + unsigned int ctrl_num, unsigned int dimm_slots_per_ctrl) { unsigned int i; unsigned int i2c_address = 0; @@ -145,14 +145,14 @@ void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd, return; } - for (i = 0; i < CONFIG_DIMM_SLOTS_PER_CTLR; i++) { + for (i = 0; i < dimm_slots_per_ctrl; i++) { i2c_address = spd_i2c_addr[ctrl_num][i]; get_spd(&(ctrl_dimms_spd[i]), i2c_address); } } #else void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd, - unsigned int ctrl_num) + unsigned int ctrl_num, unsigned int dimm_slots_per_ctrl) { } #endif /* SPD_EEPROM_ADDRESSx */ @@ -231,9 +231,11 @@ const char * step_to_string(unsigned int step) { static unsigned long long __step_assign_addresses(fsl_ddr_info_t *pinfo, unsigned int dbw_cap_adj[]) { - int i, j; + unsigned int i, j; unsigned long long total_mem, current_mem_base, total_ctlr_mem; unsigned long long rank_density, ctlr_density = 0; + unsigned int first_ctrl = pinfo->first_ctrl; + unsigned int last_ctrl = first_ctrl + pinfo->num_ctrls - 1; /* * If a reduced data width is requested, but the SPD @@ -241,7 +243,7 @@ static unsigned long long __step_assign_addresses(fsl_ddr_info_t *pinfo, * computed dimm capacities accordingly before * assigning addresses. */ - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { + for (i = first_ctrl; i <= last_ctrl; i++) { unsigned int found = 0; switch (pinfo->memctl_opts[i].data_bus_width) { @@ -295,12 +297,12 @@ static unsigned long long __step_assign_addresses(fsl_ddr_info_t *pinfo, debug("dbw_cap_adj[%d]=%d\n", i, dbw_cap_adj[i]); } - current_mem_base = CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY; + current_mem_base = pinfo->mem_base; total_mem = 0; - if (pinfo->memctl_opts[0].memctl_interleaving) { - rank_density = pinfo->dimm_params[0][0].rank_density >> - dbw_cap_adj[0]; - switch (pinfo->memctl_opts[0].ba_intlv_ctl & + if (pinfo->memctl_opts[first_ctrl].memctl_interleaving) { + rank_density = pinfo->dimm_params[first_ctrl][0].rank_density >> + dbw_cap_adj[first_ctrl]; + switch (pinfo->memctl_opts[first_ctrl].ba_intlv_ctl & FSL_DDR_CS0_CS1_CS2_CS3) { case FSL_DDR_CS0_CS1_CS2_CS3: ctlr_density = 4 * rank_density; @@ -316,7 +318,7 @@ static unsigned long long __step_assign_addresses(fsl_ddr_info_t *pinfo, } debug("rank density is 0x%llx, ctlr density is 0x%llx\n", rank_density, ctlr_density); - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { + for (i = first_ctrl; i <= last_ctrl; i++) { if (pinfo->memctl_opts[i].memctl_interleaving) { switch (pinfo->memctl_opts[i].memctl_interleaving_mode) { case FSL_DDR_256B_INTERLEAVING: @@ -372,7 +374,7 @@ static unsigned long long __step_assign_addresses(fsl_ddr_info_t *pinfo, * Simple linear assignment if memory * controllers are not interleaved. */ - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { + for (i = first_ctrl; i <= last_ctrl; i++) { total_ctlr_mem = 0; pinfo->common_timing_params[i].base_address = current_mem_base; @@ -408,18 +410,23 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, { unsigned int i, j; unsigned long long total_mem = 0; - int assert_reset; + int assert_reset = 0; + unsigned int first_ctrl = pinfo->first_ctrl; + unsigned int last_ctrl = first_ctrl + pinfo->num_ctrls - 1; + __maybe_unused int retval; + __maybe_unused bool goodspd = false; + __maybe_unused int dimm_slots_per_ctrl = pinfo->dimm_slots_per_ctrl; fsl_ddr_cfg_regs_t *ddr_reg = pinfo->fsl_ddr_config_reg; common_timing_params_t *timing_params = pinfo->common_timing_params; - assert_reset = board_need_mem_reset(); + if (pinfo->board_need_mem_reset) + assert_reset = pinfo->board_need_mem_reset(); /* data bus width capacity adjust shift amount */ unsigned int dbw_capacity_adjust[CONFIG_NUM_DDR_CONTROLLERS]; - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { + for (i = first_ctrl; i <= last_ctrl; i++) dbw_capacity_adjust[i] = 0; - } debug("starting at step %u (%s)\n", start_step, step_to_string(start_step)); @@ -428,28 +435,28 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, case STEP_GET_SPD: #if defined(CONFIG_DDR_SPD) || defined(CONFIG_SPD_EEPROM) /* STEP 1: Gather all DIMM SPD data */ - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { - fsl_ddr_get_spd(pinfo->spd_installed_dimms[i], i); + for (i = first_ctrl; i <= last_ctrl; i++) { + fsl_ddr_get_spd(pinfo->spd_installed_dimms[i], i, + dimm_slots_per_ctrl); } case STEP_COMPUTE_DIMM_PARMS: /* STEP 2: Compute DIMM parameters from SPD data */ - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { + for (i = first_ctrl; i <= last_ctrl; i++) { for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) { - unsigned int retval; generic_spd_eeprom_t *spd = &(pinfo->spd_installed_dimms[i][j]); dimm_params_t *pdimm = &(pinfo->dimm_params[i][j]); - retval = compute_dimm_parameters(spd, pdimm, i); #ifdef CONFIG_SYS_DDR_RAW_TIMING if (!i && !j && retval) { printf("SPD error on controller %d! " "Trying fallback to raw timing " "calculation\n", i); - fsl_ddr_get_dimm_params(pdimm, i, j); + retval = fsl_ddr_get_dimm_params(pdimm, + i, j); } #else if (retval == 2) { @@ -463,13 +470,26 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, debug("Warning: compute_dimm_parameters" " non-zero return value for memctl=%u " "dimm=%u\n", i, j); + } else { + goodspd = true; } } } + if (!goodspd) { + /* + * No valid SPD found + * Throw an error if this is for main memory, i.e. + * first_ctrl == 0. Otherwise, siliently return 0 + * as the memory size. + */ + if (first_ctrl == 0) + printf("Error: No valid SPD detected.\n"); + return 0; + } #elif defined(CONFIG_SYS_DDR_RAW_TIMING) case STEP_COMPUTE_DIMM_PARMS: - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { + for (i = first_ctrl; i <= last_ctrl; i++) { for (j = 0; j < CONFIG_DIMM_SLOTS_PER_CTLR; j++) { dimm_params_t *pdimm = &(pinfo->dimm_params[i][j]); @@ -483,7 +503,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, * STEP 3: Compute a common set of timing parameters * suitable for all of the DIMMs on each memory controller */ - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { + for (i = first_ctrl; i <= last_ctrl; i++) { debug("Computing lowest common DIMM" " parameters for memctl=%u\n", i); compute_lowest_common_dimm_parameters( @@ -494,7 +514,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, case STEP_GATHER_OPTS: /* STEP 4: Gather configuration requirements from user */ - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { + for (i = first_ctrl; i <= last_ctrl; i++) { debug("Reloading memory controller " "configuration options for memctl=%u\n", i); /* @@ -516,9 +536,13 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, if (timing_params[i].all_dimms_registered) assert_reset = 1; } - if (assert_reset) { - debug("Asserting mem reset\n"); - board_assert_mem_reset(); + if (assert_reset && !size_only) { + if (pinfo->board_mem_reset) { + debug("Asserting mem reset\n"); + pinfo->board_mem_reset(); + } else { + debug("Asserting mem reset missing\n"); + } } case STEP_ASSIGN_ADDRESSES: @@ -530,7 +554,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, case STEP_COMPUTE_REGS: /* STEP 6: compute controller register values */ debug("FSL Memory ctrl register computation\n"); - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { + for (i = first_ctrl; i <= last_ctrl; i++) { if (timing_params[i].ndimms_present == 0) { memset(&ddr_reg[i], 0, sizeof(fsl_ddr_cfg_regs_t)); @@ -558,7 +582,7 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, */ unsigned int max_end = 0; - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { + for (i = first_ctrl; i <= last_ctrl; i++) { for (j = 0; j < CONFIG_CHIP_SELECTS_PER_CTRL; j++) { fsl_ddr_cfg_regs_t *reg = &ddr_reg[i]; if (reg->cs[j].config & 0x80000000) { @@ -578,53 +602,45 @@ fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, } total_mem = 1 + (((unsigned long long)max_end << 24ULL) | - 0xFFFFFFULL) - CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY; + 0xFFFFFFULL) - pinfo->mem_base; } return total_mem; } -/* - * fsl_ddr_sdram() -- this is the main function to be called by - * initdram() in the board file. - * - * It returns amount of memory configured in bytes. - */ -phys_size_t fsl_ddr_sdram(void) +phys_size_t __fsl_ddr_sdram(fsl_ddr_info_t *pinfo) { - unsigned int i; + unsigned int i, first_ctrl, last_ctrl; #ifdef CONFIG_PPC unsigned int law_memctl = LAW_TRGT_IF_DDR_1; #endif unsigned long long total_memory; - fsl_ddr_info_t info; - int deassert_reset; + int deassert_reset = 0; - /* Reset info structure. */ - memset(&info, 0, sizeof(fsl_ddr_info_t)); + first_ctrl = pinfo->first_ctrl; + last_ctrl = first_ctrl + pinfo->num_ctrls - 1; /* Compute it once normally. */ #ifdef CONFIG_FSL_DDR_INTERACTIVE if (tstc() && (getc() == 'd')) { /* we got a key press of 'd' */ - total_memory = fsl_ddr_interactive(&info, 0); + total_memory = fsl_ddr_interactive(pinfo, 0); } else if (fsl_ddr_interactive_env_var_exists()) { - total_memory = fsl_ddr_interactive(&info, 1); + total_memory = fsl_ddr_interactive(pinfo, 1); } else #endif - total_memory = fsl_ddr_compute(&info, STEP_GET_SPD, 0); + total_memory = fsl_ddr_compute(pinfo, STEP_GET_SPD, 0); /* setup 3-way interleaving before enabling DDRC */ - if (info.memctl_opts[0].memctl_interleaving) { - switch (info.memctl_opts[0].memctl_interleaving_mode) { - case FSL_DDR_3WAY_1KB_INTERLEAVING: - case FSL_DDR_3WAY_4KB_INTERLEAVING: - case FSL_DDR_3WAY_8KB_INTERLEAVING: - fsl_ddr_set_intl3r( - info.memctl_opts[0].memctl_interleaving_mode); - break; - default: - break; - } + switch (pinfo->memctl_opts[first_ctrl].memctl_interleaving_mode) { + case FSL_DDR_3WAY_1KB_INTERLEAVING: + case FSL_DDR_3WAY_4KB_INTERLEAVING: + case FSL_DDR_3WAY_8KB_INTERLEAVING: + fsl_ddr_set_intl3r( + pinfo->memctl_opts[first_ctrl]. + memctl_interleaving_mode); + break; + default: + break; } /* @@ -637,14 +653,15 @@ phys_size_t fsl_ddr_sdram(void) * For non-registered DIMMs, initialization can go through but it is * also OK to follow the same flow. */ - deassert_reset = board_need_mem_reset(); - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { - if (info.common_timing_params[i].all_dimms_registered) + if (pinfo->board_need_mem_reset) + deassert_reset = pinfo->board_need_mem_reset(); + for (i = first_ctrl; i <= last_ctrl; i++) { + if (pinfo->common_timing_params[i].all_dimms_registered) deassert_reset = 1; } - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { + for (i = first_ctrl; i <= last_ctrl; i++) { debug("Programming controller %u\n", i); - if (info.common_timing_params[i].ndimms_present == 0) { + if (pinfo->common_timing_params[i].ndimms_present == 0) { debug("No dimms present on controller %u; " "skipping programming\n", i); continue; @@ -653,45 +670,58 @@ phys_size_t fsl_ddr_sdram(void) * The following call with step = 1 returns before enabling * the controller. It has to finish with step = 2 later. */ - fsl_ddr_set_memctl_regs(&(info.fsl_ddr_config_reg[i]), i, + fsl_ddr_set_memctl_regs(&(pinfo->fsl_ddr_config_reg[i]), i, deassert_reset ? 1 : 0); } if (deassert_reset) { /* Use board FPGA or GPIO to deassert reset signal */ - debug("Deasserting mem reset\n"); - board_deassert_mem_reset(); - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { + if (pinfo->board_mem_de_reset) { + debug("Deasserting mem reset\n"); + pinfo->board_mem_de_reset(); + } else { + debug("Deasserting mem reset missing\n"); + } + for (i = first_ctrl; i <= last_ctrl; i++) { /* Call with step = 2 to continue initialization */ - fsl_ddr_set_memctl_regs(&(info.fsl_ddr_config_reg[i]), + fsl_ddr_set_memctl_regs(&(pinfo->fsl_ddr_config_reg[i]), i, 2); } } #ifdef CONFIG_PPC /* program LAWs */ - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { - if (info.memctl_opts[i].memctl_interleaving) { - switch (info.memctl_opts[i].memctl_interleaving_mode) { + for (i = first_ctrl; i <= last_ctrl; i++) { + if (pinfo->memctl_opts[i].memctl_interleaving) { + switch (pinfo->memctl_opts[i]. + memctl_interleaving_mode) { case FSL_DDR_CACHE_LINE_INTERLEAVING: case FSL_DDR_PAGE_INTERLEAVING: case FSL_DDR_BANK_INTERLEAVING: case FSL_DDR_SUPERBANK_INTERLEAVING: + if (i % 2) + break; if (i == 0) { law_memctl = LAW_TRGT_IF_DDR_INTRLV; - fsl_ddr_set_lawbar(&info.common_timing_params[i], + fsl_ddr_set_lawbar( + &pinfo->common_timing_params[i], law_memctl, i); - } else if (i == 2) { + } +#if CONFIG_NUM_DDR_CONTROLLERS > 3 + else if (i == 2) { law_memctl = LAW_TRGT_IF_DDR_INTLV_34; - fsl_ddr_set_lawbar(&info.common_timing_params[i], + fsl_ddr_set_lawbar( + &pinfo->common_timing_params[i], law_memctl, i); } +#endif break; case FSL_DDR_3WAY_1KB_INTERLEAVING: case FSL_DDR_3WAY_4KB_INTERLEAVING: case FSL_DDR_3WAY_8KB_INTERLEAVING: law_memctl = LAW_TRGT_IF_DDR_INTLV_123; if (i == 0) { - fsl_ddr_set_lawbar(&info.common_timing_params[i], + fsl_ddr_set_lawbar( + &pinfo->common_timing_params[i], law_memctl, i); } break; @@ -700,7 +730,8 @@ phys_size_t fsl_ddr_sdram(void) case FSL_DDR_4WAY_8KB_INTERLEAVING: law_memctl = LAW_TRGT_IF_DDR_INTLV_1234; if (i == 0) - fsl_ddr_set_lawbar(&info.common_timing_params[i], + fsl_ddr_set_lawbar( + &pinfo->common_timing_params[i], law_memctl, i); /* place holder for future 4-way interleaving */ break; @@ -724,8 +755,8 @@ phys_size_t fsl_ddr_sdram(void) default: break; } - fsl_ddr_set_lawbar(&info.common_timing_params[i], - law_memctl, i); + fsl_ddr_set_lawbar(&pinfo->common_timing_params[i], + law_memctl, i); } } #endif @@ -734,7 +765,7 @@ phys_size_t fsl_ddr_sdram(void) #if !defined(CONFIG_PHYS_64BIT) /* Check for 4G or more. Bad. */ - if (total_memory >= (1ull << 32)) { + if ((first_ctrl == 0) && (total_memory >= (1ull << 32))) { puts("Detected "); print_size(total_memory, " of memory\n"); printf(" This U-Boot only supports < 4G of DDR\n"); @@ -748,8 +779,56 @@ phys_size_t fsl_ddr_sdram(void) } /* - * fsl_ddr_sdram_size() - This function only returns the size of the total - * memory without setting ddr control registers. + * fsl_ddr_sdram(void) -- this is the main function to be + * called by initdram() in the board file. + * + * It returns amount of memory configured in bytes. + */ +phys_size_t fsl_ddr_sdram(void) +{ + fsl_ddr_info_t info; + + /* Reset info structure. */ + memset(&info, 0, sizeof(fsl_ddr_info_t)); + info.mem_base = CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY; + info.first_ctrl = 0; + info.num_ctrls = CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS; + info.dimm_slots_per_ctrl = CONFIG_DIMM_SLOTS_PER_CTLR; + info.board_need_mem_reset = board_need_mem_reset; + info.board_mem_reset = board_assert_mem_reset; + info.board_mem_de_reset = board_deassert_mem_reset; + + return __fsl_ddr_sdram(&info); +} + +#ifdef CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS +phys_size_t fsl_other_ddr_sdram(unsigned long long base, + unsigned int first_ctrl, + unsigned int num_ctrls, + unsigned int dimm_slots_per_ctrl, + int (*board_need_reset)(void), + void (*board_reset)(void), + void (*board_de_reset)(void)) +{ + fsl_ddr_info_t info; + + /* Reset info structure. */ + memset(&info, 0, sizeof(fsl_ddr_info_t)); + info.mem_base = base; + info.first_ctrl = first_ctrl; + info.num_ctrls = num_ctrls; + info.dimm_slots_per_ctrl = dimm_slots_per_ctrl; + info.board_need_mem_reset = board_need_reset; + info.board_mem_reset = board_reset; + info.board_mem_de_reset = board_de_reset; + + return __fsl_ddr_sdram(&info); +} +#endif + +/* + * fsl_ddr_sdram_size(first_ctrl, last_intlv) - This function only returns the + * size of the total memory without setting ddr control registers. */ phys_size_t fsl_ddr_sdram_size(void) @@ -758,6 +837,11 @@ fsl_ddr_sdram_size(void) unsigned long long total_memory = 0; memset(&info, 0 , sizeof(fsl_ddr_info_t)); + info.mem_base = CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY; + info.first_ctrl = 0; + info.num_ctrls = CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS; + info.dimm_slots_per_ctrl = CONFIG_DIMM_SLOTS_PER_CTLR; + info.board_need_mem_reset = NULL; /* Compute it once normally. */ total_memory = fsl_ddr_compute(&info, STEP_GET_SPD, 1); diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c index 5986e1a..6d098d1 100644 --- a/drivers/ddr/fsl/options.c +++ b/drivers/ddr/fsl/options.c @@ -777,10 +777,6 @@ unsigned int populate_memctl_options(int all_dimms_registered, */ popts->bstopre = 0x100; - /* Minimum CKE pulse width -- tCKE(MIN) */ - popts->tcke_clock_pulse_width_ps - = mclk_to_picos(FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR); - /* * Window for four activates -- tFAW * @@ -1065,18 +1061,21 @@ void check_interleaving_options(fsl_ddr_info_t *pinfo) unsigned int check_intlv, check_n_row_addr, check_n_col_addr; unsigned long long check_rank_density; struct dimm_params_s *dimm; + int first_ctrl = pinfo->first_ctrl; + int last_ctrl = first_ctrl + pinfo->num_ctrls - 1; + /* * Check if all controllers are configured for memory * controller interleaving. Identical dimms are recommended. At least * the size, row and col address should be checked. */ j = 0; - check_n_ranks = pinfo->dimm_params[0][0].n_ranks; - check_rank_density = pinfo->dimm_params[0][0].rank_density; - check_n_row_addr = pinfo->dimm_params[0][0].n_row_addr; - check_n_col_addr = pinfo->dimm_params[0][0].n_col_addr; - check_intlv = pinfo->memctl_opts[0].memctl_interleaving_mode; - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) { + check_n_ranks = pinfo->dimm_params[first_ctrl][0].n_ranks; + check_rank_density = pinfo->dimm_params[first_ctrl][0].rank_density; + check_n_row_addr = pinfo->dimm_params[first_ctrl][0].n_row_addr; + check_n_col_addr = pinfo->dimm_params[first_ctrl][0].n_col_addr; + check_intlv = pinfo->memctl_opts[first_ctrl].memctl_interleaving_mode; + for (i = first_ctrl; i <= last_ctrl; i++) { dimm = &pinfo->dimm_params[i][0]; if (!pinfo->memctl_opts[i].memctl_interleaving) { continue; @@ -1094,7 +1093,7 @@ void check_interleaving_options(fsl_ddr_info_t *pinfo) } if (intlv_invalid) { - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) + for (i = first_ctrl; i <= last_ctrl; i++) pinfo->memctl_opts[i].memctl_interleaving = 0; printf("Not all DIMMs are identical. " "Memory controller interleaving disabled.\n"); @@ -1123,10 +1122,10 @@ void check_interleaving_options(fsl_ddr_info_t *pinfo) } debug("%d of %d controllers are interleaving.\n", j, k); if (j && (j != k)) { - for (i = 0; i < CONFIG_NUM_DDR_CONTROLLERS; i++) + for (i = first_ctrl; i <= last_ctrl; i++) pinfo->memctl_opts[i].memctl_interleaving = 0; - printf("Not all controllers have compatible " - "interleaving mode. All disabled.\n"); + if ((last_ctrl - first_ctrl) > 1) + puts("Not all controllers have compatible interleaving mode. All disabled.\n"); } } debug("Checking interleaving options completed\n"); diff --git a/drivers/ddr/fsl/util.c b/drivers/ddr/fsl/util.c index 7a22aa3..58b519b 100644 --- a/drivers/ddr/fsl/util.c +++ b/drivers/ddr/fsl/util.c @@ -149,7 +149,7 @@ u32 fsl_ddr_get_intl3r(void) return val; } -void board_add_ram_info(int use_default) +void print_ddr_info(unsigned int start_ctrl) { struct ccsr_ddr __iomem *ddr = (struct ccsr_ddr __iomem *)(CONFIG_SYS_FSL_DDR_ADDR); @@ -164,17 +164,25 @@ void board_add_ram_info(int use_default) int cas_lat; #if CONFIG_NUM_DDR_CONTROLLERS >= 2 - if (!(sdram_cfg & SDRAM_CFG_MEM_EN)) { + if ((!(sdram_cfg & SDRAM_CFG_MEM_EN)) || + (start_ctrl == 1)) { ddr = (void __iomem *)CONFIG_SYS_FSL_DDR2_ADDR; sdram_cfg = ddr_in32(&ddr->sdram_cfg); } #endif #if CONFIG_NUM_DDR_CONTROLLERS >= 3 - if (!(sdram_cfg & SDRAM_CFG_MEM_EN)) { + if ((!(sdram_cfg & SDRAM_CFG_MEM_EN)) || + (start_ctrl == 2)) { ddr = (void __iomem *)CONFIG_SYS_FSL_DDR3_ADDR; sdram_cfg = ddr_in32(&ddr->sdram_cfg); } #endif + + if (!(sdram_cfg & SDRAM_CFG_MEM_EN)) { + puts(" (DDR not enabled)\n"); + return; + } + puts(" (DDR"); switch ((sdram_cfg & SDRAM_CFG_SDRAM_TYPE_MASK) >> SDRAM_CFG_SDRAM_TYPE_SHIFT) { @@ -241,7 +249,7 @@ void board_add_ram_info(int use_default) #endif #endif #if (CONFIG_NUM_DDR_CONTROLLERS >= 2) - if (cs0_config & 0x20000000) { + if ((cs0_config & 0x20000000) && (start_ctrl == 0)) { puts("\n"); puts(" DDR Controller Interleaving Mode: "); @@ -290,3 +298,13 @@ void board_add_ram_info(int use_default) } } } + +void __weak detail_board_ddr_info(void) +{ + print_ddr_info(0); +} + +void board_add_ram_info(int use_default) +{ + detail_board_ddr_info(); +} diff --git a/drivers/demo/Makefile b/drivers/demo/Makefile index baaa2ba..171ddf3 100644 --- a/drivers/demo/Makefile +++ b/drivers/demo/Makefile @@ -4,6 +4,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_DM_DEMO) += demo-uclass.o demo-pdata.o +obj-y += demo-uclass.o demo-pdata.o obj-$(CONFIG_DM_DEMO_SIMPLE) += demo-simple.o obj-$(CONFIG_DM_DEMO_SHAPE) += demo-shape.o diff --git a/drivers/dfu/Kconfig b/drivers/dfu/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/dfu/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/dma/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/dma/fsl_dma.c b/drivers/dma/fsl_dma.c index 45e49c7..7ef7f12 100644 --- a/drivers/dma/fsl_dma.c +++ b/drivers/dma/fsl_dma.c @@ -96,7 +96,7 @@ int dmacpy(phys_addr_t dest, phys_addr_t src, phys_size_t count) { uint xfer_size; while (count) { - xfer_size = MIN(FSL_DMA_MAX_SIZE, count); + xfer_size = min(FSL_DMA_MAX_SIZE, count); out_dma32(&dma->dar, (u32) (dest & 0xFFFFFFFF)); out_dma32(&dma->sar, (u32) (src & 0xFFFFFFFF)); diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/gpio/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/gpio/tegra_gpio.c b/drivers/gpio/tegra_gpio.c index fea9d17..1cc4abb 100644 --- a/drivers/gpio/tegra_gpio.c +++ b/drivers/gpio/tegra_gpio.c @@ -12,10 +12,17 @@ */ #include +#include +#include +#include +#include #include #include #include #include +#include + +DECLARE_GLOBAL_DATA_PTR; enum { TEGRA_CMD_INFO, @@ -24,14 +31,18 @@ enum { TEGRA_CMD_INPUT, }; -static struct gpio_names { - char name[GPIO_NAME_SIZE]; -} gpio_names[MAX_NUM_GPIOS]; +struct tegra_gpio_platdata { + struct gpio_ctlr_bank *bank; + const char *port_name; /* Name of port, e.g. "B" */ + int base_gpio; /* Port number for this port (0, 1,.., n-1) */ +}; -static char *get_name(int i) -{ - return *gpio_names[i].name ? gpio_names[i].name : "UNKNOWN"; -} +/* Information about each port at run-time */ +struct tegra_port_info { + char label[TEGRA_GPIOS_PER_PORT][GPIO_NAME_SIZE]; + struct gpio_ctlr_bank *bank; + int base_gpio; /* Port number for this port (0, 1,.., n-1) */ +}; /* Return config of pin 'gpio' as GPIO (1) or SFPIO (0) */ static int get_config(unsigned gpio) @@ -121,38 +132,72 @@ static void set_level(unsigned gpio, int high) writel(u, &bank->gpio_out[GPIO_PORT(gpio)]); } +static int check_reserved(struct udevice *dev, unsigned offset, + const char *func) +{ + struct tegra_port_info *state = dev_get_priv(dev); + struct gpio_dev_priv *uc_priv = dev->uclass_priv; + + if (!*state->label[offset]) { + printf("tegra_gpio: %s: error: gpio %s%d not reserved\n", + func, uc_priv->bank_name, offset); + return -EBUSY; + } + + return 0; +} + +/* set GPIO pin 'gpio' as an output, with polarity 'value' */ +int tegra_spl_gpio_direction_output(int gpio, int value) +{ + /* Configure as a GPIO */ + set_config(gpio, 1); + + /* Configure GPIO output value. */ + set_level(gpio, value); + + /* Configure GPIO direction as output. */ + set_direction(gpio, 1); + + return 0; +} + /* * Generic_GPIO primitives. */ -int gpio_request(unsigned gpio, const char *label) +static int tegra_gpio_request(struct udevice *dev, unsigned offset, + const char *label) { - if (gpio >= MAX_NUM_GPIOS) - return -1; + struct tegra_port_info *state = dev_get_priv(dev); - if (label != NULL) { - strncpy(gpio_names[gpio].name, label, GPIO_NAME_SIZE); - gpio_names[gpio].name[GPIO_NAME_SIZE - 1] = '\0'; - } + if (*state->label[offset]) + return -EBUSY; + + strncpy(state->label[offset], label, GPIO_NAME_SIZE); + state->label[offset][GPIO_NAME_SIZE - 1] = '\0'; /* Configure as a GPIO */ - set_config(gpio, 1); + set_config(state->base_gpio + offset, 1); return 0; } -int gpio_free(unsigned gpio) +static int tegra_gpio_free(struct udevice *dev, unsigned offset) { - if (gpio >= MAX_NUM_GPIOS) - return -1; + struct tegra_port_info *state = dev_get_priv(dev); + int ret; + + ret = check_reserved(dev, offset, __func__); + if (ret) + return ret; + state->label[offset][0] = '\0'; - gpio_names[gpio].name[0] = '\0'; - /* Do not configure as input or change pin mux here */ return 0; } /* read GPIO OUT value of pin 'gpio' */ -static int gpio_get_output_value(unsigned gpio) +static int tegra_gpio_get_output_value(unsigned gpio) { struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; @@ -166,24 +211,34 @@ static int gpio_get_output_value(unsigned gpio) return (val >> GPIO_BIT(gpio)) & 1; } + /* set GPIO pin 'gpio' as an input */ -int gpio_direction_input(unsigned gpio) +static int tegra_gpio_direction_input(struct udevice *dev, unsigned offset) { - debug("gpio_direction_input: pin = %d (port %d:bit %d)\n", - gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio)); + struct tegra_port_info *state = dev_get_priv(dev); + int ret; + + ret = check_reserved(dev, offset, __func__); + if (ret) + return ret; /* Configure GPIO direction as input. */ - set_direction(gpio, 0); + set_direction(state->base_gpio + offset, 0); return 0; } /* set GPIO pin 'gpio' as an output, with polarity 'value' */ -int gpio_direction_output(unsigned gpio, int value) +static int tegra_gpio_direction_output(struct udevice *dev, unsigned offset, + int value) { - debug("gpio_direction_output: pin = %d (port %d:bit %d) = %s\n", - gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), - value ? "HIGH" : "LOW"); + struct tegra_port_info *state = dev_get_priv(dev); + int gpio = state->base_gpio + offset; + int ret; + + ret = check_reserved(dev, offset, __func__); + if (ret) + return ret; /* Configure GPIO output value. */ set_level(gpio, value); @@ -195,25 +250,38 @@ int gpio_direction_output(unsigned gpio, int value) } /* read GPIO IN value of pin 'gpio' */ -int gpio_get_value(unsigned gpio) +static int tegra_gpio_get_value(struct udevice *dev, unsigned offset) { - struct gpio_ctlr *ctlr = (struct gpio_ctlr *)NV_PA_GPIO_BASE; - struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; + struct tegra_port_info *state = dev_get_priv(dev); + int gpio = state->base_gpio + offset; + int ret; int val; - debug("gpio_get_value: pin = %d (port %d:bit %d)\n", - gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio)); + ret = check_reserved(dev, offset, __func__); + if (ret) + return ret; + + debug("%s: pin = %d (port %d:bit %d)\n", __func__, + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio)); - val = readl(&bank->gpio_in[GPIO_PORT(gpio)]); + val = readl(&state->bank->gpio_in[GPIO_PORT(gpio)]); return (val >> GPIO_BIT(gpio)) & 1; } /* write GPIO OUT value to pin 'gpio' */ -int gpio_set_value(unsigned gpio, int value) +static int tegra_gpio_set_value(struct udevice *dev, unsigned offset, int value) { + struct tegra_port_info *state = dev_get_priv(dev); + int gpio = state->base_gpio + offset; + int ret; + + ret = check_reserved(dev, offset, __func__); + if (ret) + return ret; + debug("gpio_set_value: pin = %d (port %d:bit %d), value = %d\n", - gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), value); + gpio, GPIO_FULLPORT(gpio), GPIO_BIT(gpio), value); /* Configure GPIO output value. */ set_level(gpio, value); @@ -241,26 +309,175 @@ void gpio_config_table(const struct tegra_gpio_config *config, int len) } } -/* - * Display Tegra GPIO information +static int tegra_gpio_get_function(struct udevice *dev, unsigned offset) +{ + struct tegra_port_info *state = dev_get_priv(dev); + int gpio = state->base_gpio + offset; + + if (!*state->label[offset]) + return GPIOF_UNUSED; + if (!get_config(gpio)) + return GPIOF_FUNC; + else if (get_direction(gpio)) + return GPIOF_OUTPUT; + else + return GPIOF_INPUT; +} + +static int tegra_gpio_get_state(struct udevice *dev, unsigned int offset, + char *buf, int bufsize) +{ + struct gpio_dev_priv *uc_priv = dev->uclass_priv; + struct tegra_port_info *state = dev_get_priv(dev); + int gpio = state->base_gpio + offset; + const char *label; + int is_output; + int is_gpio; + int size; + + label = state->label[offset]; + is_gpio = get_config(gpio); /* GPIO, not SFPIO */ + size = snprintf(buf, bufsize, "%s%d: ", + uc_priv->bank_name ? uc_priv->bank_name : "", offset); + buf += size; + bufsize -= size; + if (is_gpio) { + is_output = get_direction(gpio); + + snprintf(buf, bufsize, "%s: %d [%c]%s%s", + is_output ? "out" : " in", + is_output ? + tegra_gpio_get_output_value(gpio) : + tegra_gpio_get_value(dev, offset), + *label ? 'x' : ' ', + *label ? " " : "", + label); + } else { + snprintf(buf, bufsize, "sfpio"); + } + + return 0; +} + +static const struct dm_gpio_ops gpio_tegra_ops = { + .request = tegra_gpio_request, + .free = tegra_gpio_free, + .direction_input = tegra_gpio_direction_input, + .direction_output = tegra_gpio_direction_output, + .get_value = tegra_gpio_get_value, + .set_value = tegra_gpio_set_value, + .get_function = tegra_gpio_get_function, + .get_state = tegra_gpio_get_state, +}; + +/** + * Returns the name of a GPIO port + * + * GPIOs are named A, B, C, ..., Z, AA, BB, CC, ... + * + * @base_port: Base port number (0, 1..n-1) + * @return allocated string containing the name */ -void gpio_info(void) +static char *gpio_port_name(int base_port) { - unsigned c; - int type; + char *name, *s; + + name = malloc(3); + if (name) { + s = name; + *s++ = 'A' + (base_port % 26); + if (base_port >= 26) + *s++ = *name; + *s = '\0'; + } - for (c = 0; c < MAX_NUM_GPIOS; c++) { - type = get_config(c); /* GPIO, not SFPIO */ - if (type) { - printf("GPIO_%d:\t%s is an %s, ", c, - get_name(c), - get_direction(c) ? "OUTPUT" : "INPUT"); - if (get_direction(c)) - printf("value = %d", gpio_get_output_value(c)); - else - printf("value = %d", gpio_get_value(c)); - printf("\n"); - } else - continue; + return name; +} + +static const struct udevice_id tegra_gpio_ids[] = { + { .compatible = "nvidia,tegra30-gpio" }, + { .compatible = "nvidia,tegra20-gpio" }, + { } +}; + +static int gpio_tegra_probe(struct udevice *dev) +{ + struct gpio_dev_priv *uc_priv = dev->uclass_priv; + struct tegra_port_info *priv = dev->priv; + struct tegra_gpio_platdata *plat = dev->platdata; + + /* Only child devices have ports */ + if (!plat) + return 0; + + priv->bank = plat->bank; + priv->base_gpio = plat->base_gpio; + + uc_priv->gpio_count = TEGRA_GPIOS_PER_PORT; + uc_priv->bank_name = plat->port_name; + + return 0; +} + +/** + * We have a top-level GPIO device with no actual GPIOs. It has a child + * device for each Tegra port. + */ +static int gpio_tegra_bind(struct udevice *parent) +{ + struct tegra_gpio_platdata *plat = parent->platdata; + struct gpio_ctlr *ctlr; + int bank_count; + int bank; + int ret; + int len; + + /* If this is a child device, there is nothing to do here */ + if (plat) + return 0; + + /* + * This driver does not make use of interrupts, other than to figure + * out the number of GPIO banks + */ + if (!fdt_getprop(gd->fdt_blob, parent->of_offset, "interrupts", &len)) + return -EINVAL; + bank_count = len / 3 / sizeof(u32); + ctlr = (struct gpio_ctlr *)fdtdec_get_addr(gd->fdt_blob, + parent->of_offset, "reg"); + for (bank = 0; bank < bank_count; bank++) { + int port; + + for (port = 0; port < TEGRA_PORTS_PER_BANK; port++) { + struct tegra_gpio_platdata *plat; + struct udevice *dev; + int base_port; + + plat = calloc(1, sizeof(*plat)); + if (!plat) + return -ENOMEM; + plat->bank = &ctlr->gpio_bank[bank]; + base_port = bank * TEGRA_PORTS_PER_BANK + port; + plat->base_gpio = TEGRA_GPIOS_PER_PORT * base_port; + plat->port_name = gpio_port_name(base_port); + + ret = device_bind(parent, parent->driver, + plat->port_name, plat, -1, &dev); + if (ret) + return ret; + dev->of_offset = parent->of_offset; + } } + + return 0; } + +U_BOOT_DRIVER(gpio_tegra) = { + .name = "gpio_tegra", + .id = UCLASS_GPIO, + .of_match = tegra_gpio_ids, + .bind = gpio_tegra_bind, + .probe = gpio_tegra_probe, + .priv_auto_alloc_size = sizeof(struct tegra_port_info), + .ops = &gpio_tegra_ops, +}; diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/hwmon/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/i2c/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/i2c/ihs_i2c.c b/drivers/i2c/ihs_i2c.c index fe66ce2..19fbe59 100644 --- a/drivers/i2c/ihs_i2c.c +++ b/drivers/i2c/ihs_i2c.c @@ -84,7 +84,7 @@ static int ihs_i2c_address(uchar chip, uint addr, int alen, bool hold_bus) int shift = (alen-1) * 8; while (alen) { - int transfer = MIN(alen, 2); + int transfer = min(alen, 2); uchar buf[2]; bool is_last = alen <= transfer; @@ -113,7 +113,7 @@ static int ihs_i2c_access(struct i2c_adapter *adap, uchar chip, uint addr, return 1; while (len) { - int transfer = MIN(len, 2); + int transfer = min(len, 2); if (ihs_i2c_transfer(chip, buffer, transfer, read, len <= transfer)) diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index c14797c..021b2fe 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -423,7 +423,7 @@ static void * const i2c_bases[] = { (void *)IMX_I2C2_BASE #elif defined(CONFIG_MX31) || defined(CONFIG_MX35) || \ defined(CONFIG_MX51) || defined(CONFIG_MX53) || \ - defined(CONFIG_MX6) + defined(CONFIG_MX6) || defined(CONFIG_LS102XA) (void *)I2C1_BASE_ADDR, (void *)I2C2_BASE_ADDR, (void *)I2C3_BASE_ADDR @@ -545,7 +545,7 @@ U_BOOT_I2C_ADAP_COMPLETE(mxc1, mxc_i2c_init, mxc_i2c_probe, CONFIG_SYS_MXC_I2C2_SLAVE, 1) #if defined(CONFIG_MX31) || defined(CONFIG_MX35) ||\ defined(CONFIG_MX51) || defined(CONFIG_MX53) ||\ - defined(CONFIG_MX6) + defined(CONFIG_MX6) || defined(CONFIG_LS102XA) U_BOOT_I2C_ADAP_COMPLETE(mxc2, mxc_i2c_init, mxc_i2c_probe, mxc_i2c_read, mxc_i2c_write, mxc_i2c_set_bus_speed, diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/input/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/misc/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/mmc/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 5541613..8a1a461 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -96,7 +96,7 @@ static uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data) else if (cmd->resp_type & MMC_RSP_PRESENT) xfertyp |= XFERTYP_RSPTYP_48; -#if defined(CONFIG_MX53) || defined(CONFIG_PPC_T4240) +#if defined(CONFIG_MX53) || defined(CONFIG_PPC_T4240) || defined(CONFIG_LS102XA) if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) xfertyp |= XFERTYP_CMDTYP_ABORT; #endif @@ -561,7 +561,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) memset(&cfg->cfg, 0, sizeof(cfg->cfg)); voltage_caps = 0; - caps = regs->hostcapblt; + caps = esdhc_read32(®s->hostcapblt); #ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135 caps = caps & ~(ESDHC_HOSTCAPBLT_SRS | @@ -610,7 +610,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) #endif cfg->cfg.f_min = 400000; - cfg->cfg.f_max = MIN(gd->arch.sdhc_clk, 52000000); + cfg->cfg.f_max = min(cfg->sdhc_clk, 52000000); cfg->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index a26f3ce..4895cb4 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -384,16 +384,21 @@ static int mmc_send_op_cond(struct mmc *mmc) mmc_go_idle(mmc); /* Asking to the card its capabilities */ - mmc->op_cond_pending = 1; for (i = 0; i < 2; i++) { err = mmc_send_op_cond_iter(mmc, &cmd, i != 0); if (err) return err; /* exit if not busy (flag seems to be inverted) */ - if (mmc->op_cond_response & OCR_BUSY) + if (cmd.response[0] & OCR_BUSY) { + mmc->version = MMC_VERSION_UNKNOWN; + mmc->ocr = cmd.response[0]; + mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); + mmc->rca = 1; return 0; + } } + mmc->op_cond_pending = 1; return IN_PROGRESS; } diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/mtd/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/mtd/mtdconcat.c b/drivers/mtd/mtdconcat.c index 39daeab..3e36918 100644 --- a/drivers/mtd/mtdconcat.c +++ b/drivers/mtd/mtdconcat.c @@ -10,7 +10,6 @@ * */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c index 6ad0357..cb27ff2 100644 --- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c @@ -9,7 +9,6 @@ * */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include @@ -804,7 +803,7 @@ void mtd_get_len_incl_bad(struct mtd_info *mtd, uint64_t offset, *truncated = 0; *len_incl_bad = 0; - if (!mtd->block_isbad) { + if (!mtd->_block_isbad) { *len_incl_bad = length; return; } @@ -820,7 +819,7 @@ void mtd_get_len_incl_bad(struct mtd_info *mtd, uint64_t offset, block_len = mtd->erasesize - (offset & (mtd->erasesize - 1)); - if (!mtd->block_isbad(mtd, offset & ~(mtd->erasesize - 1))) + if (!mtd->_block_isbad(mtd, offset & ~(mtd->erasesize - 1))) len_excl_bad += block_len; *len_incl_bad += block_len; diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c index 2f20b92..cfbaa3d 100644 --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c @@ -9,7 +9,6 @@ * */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index bf1312a..f298f84 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -42,6 +42,7 @@ obj-$(CONFIG_NAND_ECC_BCH) += nand_bch.o obj-$(CONFIG_NAND_ATMEL) += atmel_nand.o obj-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o obj-$(CONFIG_NAND_DAVINCI) += davinci_nand.o +obj-$(CONFIG_NAND_DENALI) += denali.o obj-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_nand.o obj-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o diff --git a/drivers/mtd/nand/am335x_spl_bch.c b/drivers/mtd/nand/am335x_spl_bch.c index ce65d8e..bf8b2ee 100644 --- a/drivers/mtd/nand/am335x_spl_bch.c +++ b/drivers/mtd/nand/am335x_spl_bch.c @@ -64,14 +64,18 @@ static int nand_command(int block, int page, uint32_t offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */ hwctrl(&nand_info[0], (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */ /* Row address */ - hwctrl(&nand_info[0], (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */ - hwctrl(&nand_info[0], ((page_addr >> 8) & 0xff), + if (cmd != NAND_CMD_RNDOUT) { + hwctrl(&nand_info[0], (page_addr & 0xff), + NAND_CTRL_ALE); /* A[19:12] */ + hwctrl(&nand_info[0], ((page_addr >> 8) & 0xff), NAND_CTRL_ALE); /* A[27:20] */ #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE - /* One more address cycle for devices > 128MiB */ - hwctrl(&nand_info[0], (page_addr >> 16) & 0x0f, + /* One more address cycle for devices > 128MiB */ + hwctrl(&nand_info[0], (page_addr >> 16) & 0x0f, NAND_CTRL_ALE); /* A[31:28] */ #endif + } + hwctrl(&nand_info[0], NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); if (cmd == NAND_CMD_READ0) { diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index e73834d..9114a86 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -164,7 +164,7 @@ static void pmecc_gen_syndrome(struct mtd_info *mtd, int sector) /* Fill odd syndromes */ for (i = 0; i < host->pmecc_corr_cap; i++) { - value = readl(&host->pmecc->rem_port[sector].rem[i / 2]); + value = pmecc_readl(host->pmecc, rem_port[sector].rem[i / 2]); if (i & 1) value >>= 16; value &= 0xffff; @@ -392,10 +392,11 @@ static int pmecc_err_location(struct mtd_info *mtd) int16_t *smu = host->pmecc_smu; int timeout = PMECC_MAX_TIMEOUT_US; - writel(PMERRLOC_DISABLE, &host->pmerrloc->eldis); + pmecc_writel(host->pmerrloc, eldis, PMERRLOC_DISABLE); for (i = 0; i <= host->pmecc_lmu[cap + 1] >> 1; i++) { - writel(smu[(cap + 1) * num + i], &host->pmerrloc->sigma[i]); + pmecc_writel(host->pmerrloc, sigma[i], + smu[(cap + 1) * num + i]); err_nbr++; } @@ -403,12 +404,12 @@ static int pmecc_err_location(struct mtd_info *mtd) if (sector_size == 1024) val |= PMERRLOC_ELCFG_SECTOR_1024; - writel(val, &host->pmerrloc->elcfg); - writel(sector_size * 8 + host->pmecc_degree * cap, - &host->pmerrloc->elen); + pmecc_writel(host->pmerrloc, elcfg, val); + pmecc_writel(host->pmerrloc, elen, + sector_size * 8 + host->pmecc_degree * cap); while (--timeout) { - if (readl(&host->pmerrloc->elisr) & PMERRLOC_CALC_DONE) + if (pmecc_readl(host->pmerrloc, elisr) & PMERRLOC_CALC_DONE) break; WATCHDOG_RESET(); udelay(1); @@ -419,7 +420,7 @@ static int pmecc_err_location(struct mtd_info *mtd) return -1; } - roots_nbr = (readl(&host->pmerrloc->elisr) & PMERRLOC_ERR_NUM_MASK) + roots_nbr = (pmecc_readl(host->pmerrloc, elisr) & PMERRLOC_ERR_NUM_MASK) >> 8; /* Number of roots == degree of smu hence <= cap */ if (roots_nbr == host->pmecc_lmu[cap + 1] >> 1) @@ -443,7 +444,7 @@ static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc, sector_size = host->pmecc_sector_size; while (err_nbr) { - tmp = readl(&host->pmerrloc->el[i]) - 1; + tmp = pmecc_readl(host->pmerrloc, el[i]) - 1; byte_pos = tmp / 8; bit_pos = tmp % 8; @@ -597,7 +598,7 @@ static int atmel_nand_pmecc_write_page(struct mtd_info *mtd, pos = i * host->pmecc_bytes_per_sector + j; chip->oob_poi[eccpos[pos]] = - readb(&host->pmecc->ecc_port[i].ecc[j]); + pmecc_readb(host->pmecc, ecc_port[i].ecc[j]); } } chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); @@ -881,6 +882,7 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand, return -ENOMEM; } + nand->options |= NAND_NO_SUBPAGE_WRITE; nand->ecc.read_page = atmel_nand_pmecc_read_page; nand->ecc.write_page = atmel_nand_pmecc_write_page; nand->ecc.strength = cap; diff --git a/drivers/mtd/nand/atmel_nand_ecc.h b/drivers/mtd/nand/atmel_nand_ecc.h index 55d7711..92d4ec5 100644 --- a/drivers/mtd/nand/atmel_nand_ecc.h +++ b/drivers/mtd/nand/atmel_nand_ecc.h @@ -34,6 +34,9 @@ #define pmecc_readl(addr, reg) \ readl(&addr->reg) +#define pmecc_readb(addr, reg) \ + readb(&addr->reg) + #define pmecc_writel(addr, reg, value) \ writel((value), &addr->reg) diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index a079b1e..41689b5 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c @@ -306,8 +306,8 @@ static struct nand_ecclayout nand_davinci_4bit_layout_oobfirst = { }; #if defined CONFIG_KEYSTONE_RBL_NAND -#if defined(CONFIG_SYS_NAND_PAGE_2K) static struct nand_ecclayout nand_keystone_rbl_4bit_layout_oobfirst = { +#if defined(CONFIG_SYS_NAND_PAGE_2K) .eccbytes = 40, .eccpos = { 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, @@ -363,6 +363,7 @@ static struct nand_ecclayout nand_keystone_rbl_4bit_layout_oobfirst = { * @raw: use _raw version of write_page */ static int nand_davinci_write_page(struct mtd_info *mtd, struct nand_chip *chip, + uint32_t offset, int data_len, const uint8_t *buf, int oob_required, int page, int cached, int raw) { diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c new file mode 100644 index 0000000..ba3de1a --- /dev/null +++ b/drivers/mtd/nand/denali.c @@ -0,0 +1,1205 @@ +/* + * Copyright (C) 2014 Panasonic Corporation + * Copyright (C) 2013-2014, Altera Corporation + * Copyright (C) 2009-2010, Intel Corporation and its suppliers. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include + +#include "denali.h" + +#define NAND_DEFAULT_TIMINGS -1 + +static int onfi_timing_mode = NAND_DEFAULT_TIMINGS; + +/* We define a macro here that combines all interrupts this driver uses into + * a single constant value, for convenience. */ +#define DENALI_IRQ_ALL (INTR_STATUS__DMA_CMD_COMP | \ + INTR_STATUS__ECC_TRANSACTION_DONE | \ + INTR_STATUS__ECC_ERR | \ + INTR_STATUS__PROGRAM_FAIL | \ + INTR_STATUS__LOAD_COMP | \ + INTR_STATUS__PROGRAM_COMP | \ + INTR_STATUS__TIME_OUT | \ + INTR_STATUS__ERASE_FAIL | \ + INTR_STATUS__RST_COMP | \ + INTR_STATUS__ERASE_COMP | \ + INTR_STATUS__ECC_UNCOR_ERR | \ + INTR_STATUS__INT_ACT | \ + INTR_STATUS__LOCKED_BLK) + +/* indicates whether or not the internal value for the flash bank is + * valid or not */ +#define CHIP_SELECT_INVALID -1 + +#define SUPPORT_8BITECC 1 + +/* + * this macro allows us to convert from an MTD structure to our own + * device context (denali) structure. + */ +#define mtd_to_denali(m) (((struct nand_chip *)mtd->priv)->priv) + +/* These constants are defined by the driver to enable common driver + * configuration options. */ +#define SPARE_ACCESS 0x41 +#define MAIN_ACCESS 0x42 +#define MAIN_SPARE_ACCESS 0x43 + +#define DENALI_UNLOCK_START 0x10 +#define DENALI_UNLOCK_END 0x11 +#define DENALI_LOCK 0x21 +#define DENALI_LOCK_TIGHT 0x31 +#define DENALI_BUFFER_LOAD 0x60 +#define DENALI_BUFFER_WRITE 0x62 + +#define DENALI_READ 0 +#define DENALI_WRITE 0x100 + +/* types of device accesses. We can issue commands and get status */ +#define COMMAND_CYCLE 0 +#define ADDR_CYCLE 1 +#define STATUS_CYCLE 2 + +/* this is a helper macro that allows us to + * format the bank into the proper bits for the controller */ +#define BANK(x) ((x) << 24) + +/* Interrupts are cleared by writing a 1 to the appropriate status bit */ +static inline void clear_interrupt(struct denali_nand_info *denali, + uint32_t irq_mask) +{ + uint32_t intr_status_reg; + + intr_status_reg = INTR_STATUS(denali->flash_bank); + + writel(irq_mask, denali->flash_reg + intr_status_reg); +} + +static uint32_t read_interrupt_status(struct denali_nand_info *denali) +{ + uint32_t intr_status_reg; + + intr_status_reg = INTR_STATUS(denali->flash_bank); + + return readl(denali->flash_reg + intr_status_reg); +} + +static void clear_interrupts(struct denali_nand_info *denali) +{ + uint32_t status; + + status = read_interrupt_status(denali); + clear_interrupt(denali, status); + + denali->irq_status = 0; +} + +static void denali_irq_enable(struct denali_nand_info *denali, + uint32_t int_mask) +{ + int i; + + for (i = 0; i < denali->max_banks; ++i) + writel(int_mask, denali->flash_reg + INTR_EN(i)); +} + +static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) +{ + unsigned long timeout = 1000000; + uint32_t intr_status; + + do { + intr_status = read_interrupt_status(denali) & DENALI_IRQ_ALL; + if (intr_status & irq_mask) { + denali->irq_status &= ~irq_mask; + /* our interrupt was detected */ + break; + } + udelay(1); + timeout--; + } while (timeout != 0); + + if (timeout == 0) { + /* timeout */ + printf("Denali timeout with interrupt status %08x\n", + read_interrupt_status(denali)); + intr_status = 0; + } + return intr_status; +} + +/* + * Certain operations for the denali NAND controller use an indexed mode to + * read/write data. The operation is performed by writing the address value + * of the command to the device memory followed by the data. This function + * abstracts this common operation. +*/ +static void index_addr(struct denali_nand_info *denali, + uint32_t address, uint32_t data) +{ + writel(address, denali->flash_mem + INDEX_CTRL_REG); + writel(data, denali->flash_mem + INDEX_DATA_REG); +} + +/* Perform an indexed read of the device */ +static void index_addr_read_data(struct denali_nand_info *denali, + uint32_t address, uint32_t *pdata) +{ + writel(address, denali->flash_mem + INDEX_CTRL_REG); + *pdata = readl(denali->flash_mem + INDEX_DATA_REG); +} + +/* We need to buffer some data for some of the NAND core routines. + * The operations manage buffering that data. */ +static void reset_buf(struct denali_nand_info *denali) +{ + denali->buf.head = 0; + denali->buf.tail = 0; +} + +static void write_byte_to_buf(struct denali_nand_info *denali, uint8_t byte) +{ + denali->buf.buf[denali->buf.tail++] = byte; +} + +/* resets a specific device connected to the core */ +static void reset_bank(struct denali_nand_info *denali) +{ + uint32_t irq_status; + uint32_t irq_mask = INTR_STATUS__RST_COMP | + INTR_STATUS__TIME_OUT; + + clear_interrupts(denali); + + writel(1 << denali->flash_bank, denali->flash_reg + DEVICE_RESET); + + irq_status = wait_for_irq(denali, irq_mask); + if (irq_status & INTR_STATUS__TIME_OUT) + debug("reset bank failed.\n"); +} + +/* Reset the flash controller */ +static uint32_t denali_nand_reset(struct denali_nand_info *denali) +{ + uint32_t i; + + for (i = 0; i < denali->max_banks; i++) + writel(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT, + denali->flash_reg + INTR_STATUS(i)); + + for (i = 0; i < denali->max_banks; i++) { + writel(1 << i, denali->flash_reg + DEVICE_RESET); + while (!(readl(denali->flash_reg + INTR_STATUS(i)) & + (INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT))) + if (readl(denali->flash_reg + INTR_STATUS(i)) & + INTR_STATUS__TIME_OUT) + debug("NAND Reset operation timed out on bank" + " %d\n", i); + } + + for (i = 0; i < denali->max_banks; i++) + writel(INTR_STATUS__RST_COMP | INTR_STATUS__TIME_OUT, + denali->flash_reg + INTR_STATUS(i)); + + return 0; +} + +/* + * this routine calculates the ONFI timing values for a given mode and + * programs the clocking register accordingly. The mode is determined by + * the get_onfi_nand_para routine. + */ +static void nand_onfi_timing_set(struct denali_nand_info *denali, + uint16_t mode) +{ + uint32_t trea[6] = {40, 30, 25, 20, 20, 16}; + uint32_t trp[6] = {50, 25, 17, 15, 12, 10}; + uint32_t treh[6] = {30, 15, 15, 10, 10, 7}; + uint32_t trc[6] = {100, 50, 35, 30, 25, 20}; + uint32_t trhoh[6] = {0, 15, 15, 15, 15, 15}; + uint32_t trloh[6] = {0, 0, 0, 0, 5, 5}; + uint32_t tcea[6] = {100, 45, 30, 25, 25, 25}; + uint32_t tadl[6] = {200, 100, 100, 100, 70, 70}; + uint32_t trhw[6] = {200, 100, 100, 100, 100, 100}; + uint32_t trhz[6] = {200, 100, 100, 100, 100, 100}; + uint32_t twhr[6] = {120, 80, 80, 60, 60, 60}; + uint32_t tcs[6] = {70, 35, 25, 25, 20, 15}; + + uint32_t tclsrising = 1; + uint32_t data_invalid_rhoh, data_invalid_rloh, data_invalid; + uint32_t dv_window = 0; + uint32_t en_lo, en_hi; + uint32_t acc_clks; + uint32_t addr_2_data, re_2_we, re_2_re, we_2_re, cs_cnt; + + en_lo = DIV_ROUND_UP(trp[mode], CLK_X); + en_hi = DIV_ROUND_UP(treh[mode], CLK_X); + if ((en_hi * CLK_X) < (treh[mode] + 2)) + en_hi++; + + if ((en_lo + en_hi) * CLK_X < trc[mode]) + en_lo += DIV_ROUND_UP((trc[mode] - (en_lo + en_hi) * CLK_X), + CLK_X); + + if ((en_lo + en_hi) < CLK_MULTI) + en_lo += CLK_MULTI - en_lo - en_hi; + + while (dv_window < 8) { + data_invalid_rhoh = en_lo * CLK_X + trhoh[mode]; + + data_invalid_rloh = (en_lo + en_hi) * CLK_X + trloh[mode]; + + data_invalid = + data_invalid_rhoh < + data_invalid_rloh ? data_invalid_rhoh : data_invalid_rloh; + + dv_window = data_invalid - trea[mode]; + + if (dv_window < 8) + en_lo++; + } + + acc_clks = DIV_ROUND_UP(trea[mode], CLK_X); + + while (((acc_clks * CLK_X) - trea[mode]) < 3) + acc_clks++; + + if ((data_invalid - acc_clks * CLK_X) < 2) + debug("%s, Line %d: Warning!\n", __FILE__, __LINE__); + + addr_2_data = DIV_ROUND_UP(tadl[mode], CLK_X); + re_2_we = DIV_ROUND_UP(trhw[mode], CLK_X); + re_2_re = DIV_ROUND_UP(trhz[mode], CLK_X); + we_2_re = DIV_ROUND_UP(twhr[mode], CLK_X); + cs_cnt = DIV_ROUND_UP((tcs[mode] - trp[mode]), CLK_X); + if (!tclsrising) + cs_cnt = DIV_ROUND_UP(tcs[mode], CLK_X); + if (cs_cnt == 0) + cs_cnt = 1; + + if (tcea[mode]) { + while (((cs_cnt * CLK_X) + trea[mode]) < tcea[mode]) + cs_cnt++; + } + + /* Sighting 3462430: Temporary hack for MT29F128G08CJABAWP:B */ + if ((readl(denali->flash_reg + MANUFACTURER_ID) == 0) && + (readl(denali->flash_reg + DEVICE_ID) == 0x88)) + acc_clks = 6; + + writel(acc_clks, denali->flash_reg + ACC_CLKS); + writel(re_2_we, denali->flash_reg + RE_2_WE); + writel(re_2_re, denali->flash_reg + RE_2_RE); + writel(we_2_re, denali->flash_reg + WE_2_RE); + writel(addr_2_data, denali->flash_reg + ADDR_2_DATA); + writel(en_lo, denali->flash_reg + RDWR_EN_LO_CNT); + writel(en_hi, denali->flash_reg + RDWR_EN_HI_CNT); + writel(cs_cnt, denali->flash_reg + CS_SETUP_CNT); +} + +/* queries the NAND device to see what ONFI modes it supports. */ +static uint32_t get_onfi_nand_para(struct denali_nand_info *denali) +{ + int i; + /* + * we needn't to do a reset here because driver has already + * reset all the banks before + */ + if (!(readl(denali->flash_reg + ONFI_TIMING_MODE) & + ONFI_TIMING_MODE__VALUE)) + return -EIO; + + for (i = 5; i > 0; i--) { + if (readl(denali->flash_reg + ONFI_TIMING_MODE) & + (0x01 << i)) + break; + } + + nand_onfi_timing_set(denali, i); + + /* By now, all the ONFI devices we know support the page cache */ + /* rw feature. So here we enable the pipeline_rw_ahead feature */ + return 0; +} + +static void get_samsung_nand_para(struct denali_nand_info *denali, + uint8_t device_id) +{ + if (device_id == 0xd3) { /* Samsung K9WAG08U1A */ + /* Set timing register values according to datasheet */ + writel(5, denali->flash_reg + ACC_CLKS); + writel(20, denali->flash_reg + RE_2_WE); + writel(12, denali->flash_reg + WE_2_RE); + writel(14, denali->flash_reg + ADDR_2_DATA); + writel(3, denali->flash_reg + RDWR_EN_LO_CNT); + writel(2, denali->flash_reg + RDWR_EN_HI_CNT); + writel(2, denali->flash_reg + CS_SETUP_CNT); + } +} + +static void get_toshiba_nand_para(struct denali_nand_info *denali) +{ + uint32_t tmp; + + /* Workaround to fix a controller bug which reports a wrong */ + /* spare area size for some kind of Toshiba NAND device */ + if ((readl(denali->flash_reg + DEVICE_MAIN_AREA_SIZE) == 4096) && + (readl(denali->flash_reg + DEVICE_SPARE_AREA_SIZE) == 64)) { + writel(216, denali->flash_reg + DEVICE_SPARE_AREA_SIZE); + tmp = readl(denali->flash_reg + DEVICES_CONNECTED) * + readl(denali->flash_reg + DEVICE_SPARE_AREA_SIZE); + writel(tmp, denali->flash_reg + LOGICAL_PAGE_SPARE_SIZE); + } +} + +static void get_hynix_nand_para(struct denali_nand_info *denali, + uint8_t device_id) +{ + uint32_t main_size, spare_size; + + switch (device_id) { + case 0xD5: /* Hynix H27UAG8T2A, H27UBG8U5A or H27UCG8VFA */ + case 0xD7: /* Hynix H27UDG8VEM, H27UCG8UDM or H27UCG8V5A */ + writel(128, denali->flash_reg + PAGES_PER_BLOCK); + writel(4096, denali->flash_reg + DEVICE_MAIN_AREA_SIZE); + writel(224, denali->flash_reg + DEVICE_SPARE_AREA_SIZE); + main_size = 4096 * + readl(denali->flash_reg + DEVICES_CONNECTED); + spare_size = 224 * + readl(denali->flash_reg + DEVICES_CONNECTED); + writel(main_size, denali->flash_reg + LOGICAL_PAGE_DATA_SIZE); + writel(spare_size, denali->flash_reg + LOGICAL_PAGE_SPARE_SIZE); + writel(0, denali->flash_reg + DEVICE_WIDTH); + break; + default: + debug("Spectra: Unknown Hynix NAND (Device ID: 0x%x)." + "Will use default parameter values instead.\n", + device_id); + } +} + +/* + * determines how many NAND chips are connected to the controller. Note for + * Intel CE4100 devices we don't support more than one device. + */ +static void find_valid_banks(struct denali_nand_info *denali) +{ + uint32_t id[denali->max_banks]; + int i; + + denali->total_used_banks = 1; + for (i = 0; i < denali->max_banks; i++) { + index_addr(denali, (uint32_t)(MODE_11 | (i << 24) | 0), 0x90); + index_addr(denali, (uint32_t)(MODE_11 | (i << 24) | 1), 0); + index_addr_read_data(denali, + (uint32_t)(MODE_11 | (i << 24) | 2), + &id[i]); + + if (i == 0) { + if (!(id[i] & 0x0ff)) + break; + } else { + if ((id[i] & 0x0ff) == (id[0] & 0x0ff)) + denali->total_used_banks++; + else + break; + } + } +} + +/* + * Use the configuration feature register to determine the maximum number of + * banks that the hardware supports. + */ +static void detect_max_banks(struct denali_nand_info *denali) +{ + uint32_t features = readl(denali->flash_reg + FEATURES); + denali->max_banks = 2 << (features & FEATURES__N_BANKS); +} + +static void detect_partition_feature(struct denali_nand_info *denali) +{ + /* + * For MRST platform, denali->fwblks represent the + * number of blocks firmware is taken, + * FW is in protect partition and MTD driver has no + * permission to access it. So let driver know how many + * blocks it can't touch. + */ + if (readl(denali->flash_reg + FEATURES) & FEATURES__PARTITION) { + if ((readl(denali->flash_reg + PERM_SRC_ID(1)) & + PERM_SRC_ID__SRCID) == SPECTRA_PARTITION_ID) { + denali->fwblks = + ((readl(denali->flash_reg + MIN_MAX_BANK(1)) & + MIN_MAX_BANK__MIN_VALUE) * + denali->blksperchip) + + + (readl(denali->flash_reg + MIN_BLK_ADDR(1)) & + MIN_BLK_ADDR__VALUE); + } else { + denali->fwblks = SPECTRA_START_BLOCK; + } + } else { + denali->fwblks = SPECTRA_START_BLOCK; + } +} + +static uint32_t denali_nand_timing_set(struct denali_nand_info *denali) +{ + uint32_t id_bytes[5], addr; + uint8_t i, maf_id, device_id; + + /* Use read id method to get device ID and other + * params. For some NAND chips, controller can't + * report the correct device ID by reading from + * DEVICE_ID register + * */ + addr = (uint32_t)MODE_11 | BANK(denali->flash_bank); + index_addr(denali, (uint32_t)addr | 0, 0x90); + index_addr(denali, (uint32_t)addr | 1, 0); + for (i = 0; i < 5; i++) + index_addr_read_data(denali, addr | 2, &id_bytes[i]); + maf_id = id_bytes[0]; + device_id = id_bytes[1]; + + if (readl(denali->flash_reg + ONFI_DEVICE_NO_OF_LUNS) & + ONFI_DEVICE_NO_OF_LUNS__ONFI_DEVICE) { /* ONFI 1.0 NAND */ + if (get_onfi_nand_para(denali)) + return -EIO; + } else if (maf_id == 0xEC) { /* Samsung NAND */ + get_samsung_nand_para(denali, device_id); + } else if (maf_id == 0x98) { /* Toshiba NAND */ + get_toshiba_nand_para(denali); + } else if (maf_id == 0xAD) { /* Hynix NAND */ + get_hynix_nand_para(denali, device_id); + } + + find_valid_banks(denali); + + detect_partition_feature(denali); + + /* If the user specified to override the default timings + * with a specific ONFI mode, we apply those changes here. + */ + if (onfi_timing_mode != NAND_DEFAULT_TIMINGS) + nand_onfi_timing_set(denali, onfi_timing_mode); + + return 0; +} + +/* validation function to verify that the controlling software is making + * a valid request + */ +static inline bool is_flash_bank_valid(int flash_bank) +{ + return flash_bank >= 0 && flash_bank < 4; +} + +static void denali_irq_init(struct denali_nand_info *denali) +{ + uint32_t int_mask = 0; + int i; + + /* Disable global interrupts */ + writel(0, denali->flash_reg + GLOBAL_INT_ENABLE); + + int_mask = DENALI_IRQ_ALL; + + /* Clear all status bits */ + for (i = 0; i < denali->max_banks; ++i) + writel(0xFFFF, denali->flash_reg + INTR_STATUS(i)); + + denali_irq_enable(denali, int_mask); +} + +/* This helper function setups the registers for ECC and whether or not + * the spare area will be transferred. */ +static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en, + bool transfer_spare) +{ + int ecc_en_flag = 0, transfer_spare_flag = 0; + + /* set ECC, transfer spare bits if needed */ + ecc_en_flag = ecc_en ? ECC_ENABLE__FLAG : 0; + transfer_spare_flag = transfer_spare ? TRANSFER_SPARE_REG__FLAG : 0; + + /* Enable spare area/ECC per user's request. */ + writel(ecc_en_flag, denali->flash_reg + ECC_ENABLE); + /* applicable for MAP01 only */ + writel(transfer_spare_flag, denali->flash_reg + TRANSFER_SPARE_REG); +} + +/* sends a pipeline command operation to the controller. See the Denali NAND + * controller's user guide for more information (section 4.2.3.6). + */ +static int denali_send_pipeline_cmd(struct denali_nand_info *denali, + bool ecc_en, bool transfer_spare, + int access_type, int op) +{ + uint32_t addr, cmd, irq_status; + static uint32_t page_count = 1; + + setup_ecc_for_xfer(denali, ecc_en, transfer_spare); + + /* clear interrupts */ + clear_interrupts(denali); + + addr = BANK(denali->flash_bank) | denali->page; + + /* setup the acccess type */ + cmd = MODE_10 | addr; + index_addr(denali, cmd, access_type); + + /* setup the pipeline command */ + index_addr(denali, cmd, 0x2000 | op | page_count); + + cmd = MODE_01 | addr; + writel(cmd, denali->flash_mem + INDEX_CTRL_REG); + + if (op == DENALI_READ) { + /* wait for command to be accepted */ + irq_status = wait_for_irq(denali, INTR_STATUS__LOAD_COMP); + + if (irq_status == 0) + return -EIO; + } + + return 0; +} + +/* helper function that simply writes a buffer to the flash */ +static int write_data_to_flash_mem(struct denali_nand_info *denali, + const uint8_t *buf, int len) +{ + uint32_t i = 0, *buf32; + + /* verify that the len is a multiple of 4. see comment in + * read_data_from_flash_mem() */ + BUG_ON((len % 4) != 0); + + /* write the data to the flash memory */ + buf32 = (uint32_t *)buf; + for (i = 0; i < len / 4; i++) + writel(*buf32++, denali->flash_mem + INDEX_DATA_REG); + return i * 4; /* intent is to return the number of bytes read */ +} + +/* helper function that simply reads a buffer from the flash */ +static int read_data_from_flash_mem(struct denali_nand_info *denali, + uint8_t *buf, int len) +{ + uint32_t i, *buf32; + + /* + * we assume that len will be a multiple of 4, if not + * it would be nice to know about it ASAP rather than + * have random failures... + * This assumption is based on the fact that this + * function is designed to be used to read flash pages, + * which are typically multiples of 4... + */ + + BUG_ON((len % 4) != 0); + + /* transfer the data from the flash */ + buf32 = (uint32_t *)buf; + for (i = 0; i < len / 4; i++) + *buf32++ = readl(denali->flash_mem + INDEX_DATA_REG); + + return i * 4; /* intent is to return the number of bytes read */ +} + +static void denali_mode_main_access(struct denali_nand_info *denali) +{ + uint32_t addr, cmd; + + addr = BANK(denali->flash_bank) | denali->page; + cmd = MODE_10 | addr; + index_addr(denali, cmd, MAIN_ACCESS); +} + +static void denali_mode_main_spare_access(struct denali_nand_info *denali) +{ + uint32_t addr, cmd; + + addr = BANK(denali->flash_bank) | denali->page; + cmd = MODE_10 | addr; + index_addr(denali, cmd, MAIN_SPARE_ACCESS); +} + +/* writes OOB data to the device */ +static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) +{ + struct denali_nand_info *denali = mtd_to_denali(mtd); + uint32_t irq_status; + uint32_t irq_mask = INTR_STATUS__PROGRAM_COMP | + INTR_STATUS__PROGRAM_FAIL; + int status = 0; + + denali->page = page; + + if (denali_send_pipeline_cmd(denali, false, true, SPARE_ACCESS, + DENALI_WRITE) == 0) { + write_data_to_flash_mem(denali, buf, mtd->oobsize); + + /* wait for operation to complete */ + irq_status = wait_for_irq(denali, irq_mask); + + if (irq_status == 0) { + dev_err(denali->dev, "OOB write failed\n"); + status = -EIO; + } + } else { + printf("unable to send pipeline command\n"); + status = -EIO; + } + return status; +} + +/* reads OOB data from the device */ +static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) +{ + struct denali_nand_info *denali = mtd_to_denali(mtd); + uint32_t irq_mask = INTR_STATUS__LOAD_COMP, + irq_status = 0, addr = 0x0, cmd = 0x0; + + denali->page = page; + + if (denali_send_pipeline_cmd(denali, false, true, SPARE_ACCESS, + DENALI_READ) == 0) { + read_data_from_flash_mem(denali, buf, mtd->oobsize); + + /* wait for command to be accepted + * can always use status0 bit as the mask is identical for each + * bank. */ + irq_status = wait_for_irq(denali, irq_mask); + + if (irq_status == 0) + printf("page on OOB timeout %d\n", denali->page); + + /* We set the device back to MAIN_ACCESS here as I observed + * instability with the controller if you do a block erase + * and the last transaction was a SPARE_ACCESS. Block erase + * is reliable (according to the MTD test infrastructure) + * if you are in MAIN_ACCESS. + */ + addr = BANK(denali->flash_bank) | denali->page; + cmd = MODE_10 | addr; + index_addr(denali, cmd, MAIN_ACCESS); + } +} + +/* this function examines buffers to see if they contain data that + * indicate that the buffer is part of an erased region of flash. + */ +static bool is_erased(uint8_t *buf, int len) +{ + int i = 0; + for (i = 0; i < len; i++) + if (buf[i] != 0xFF) + return false; + return true; +} + +/* programs the controller to either enable/disable DMA transfers */ +static void denali_enable_dma(struct denali_nand_info *denali, bool en) +{ + uint32_t reg_val = 0x0; + + if (en) + reg_val = DMA_ENABLE__FLAG; + + writel(reg_val, denali->flash_reg + DMA_ENABLE); + readl(denali->flash_reg + DMA_ENABLE); +} + +/* setups the HW to perform the data DMA */ +static void denali_setup_dma(struct denali_nand_info *denali, int op) +{ + uint32_t mode; + const int page_count = 1; + uint32_t addr = (uint32_t)denali->buf.dma_buf; + + flush_dcache_range(addr, addr + sizeof(denali->buf.dma_buf)); + +/* For Denali controller that is 64 bit bus IP core */ +#ifdef CONFIG_SYS_NAND_DENALI_64BIT + mode = MODE_10 | BANK(denali->flash_bank) | denali->page; + + /* DMA is a three step process */ + + /* 1. setup transfer type, interrupt when complete, + burst len = 64 bytes, the number of pages */ + index_addr(denali, mode, 0x01002000 | (64 << 16) | op | page_count); + + /* 2. set memory low address bits 31:0 */ + index_addr(denali, mode, addr); + + /* 3. set memory high address bits 64:32 */ + index_addr(denali, mode, 0); +#else + mode = MODE_10 | BANK(denali->flash_bank); + + /* DMA is a four step process */ + + /* 1. setup transfer type and # of pages */ + index_addr(denali, mode | denali->page, 0x2000 | op | page_count); + + /* 2. set memory high address bits 23:8 */ + index_addr(denali, mode | ((uint32_t)(addr >> 16) << 8), 0x2200); + + /* 3. set memory low address bits 23:8 */ + index_addr(denali, mode | ((uint32_t)addr << 8), 0x2300); + + /* 4. interrupt when complete, burst len = 64 bytes*/ + index_addr(denali, mode | 0x14000, 0x2400); +#endif +} + +/* Common DMA function */ +static uint32_t denali_dma_configuration(struct denali_nand_info *denali, + uint32_t ops, bool raw_xfer, + uint32_t irq_mask, int oob_required) +{ + uint32_t irq_status = 0; + /* setup_ecc_for_xfer(bool ecc_en, bool transfer_spare) */ + setup_ecc_for_xfer(denali, !raw_xfer, oob_required); + + /* clear any previous interrupt flags */ + clear_interrupts(denali); + + /* enable the DMA */ + denali_enable_dma(denali, true); + + /* setup the DMA */ + denali_setup_dma(denali, ops); + + /* wait for operation to complete */ + irq_status = wait_for_irq(denali, irq_mask); + + /* if ECC fault happen, seems we need delay before turning off DMA. + * If not, the controller will go into non responsive condition */ + if (irq_status & INTR_STATUS__ECC_UNCOR_ERR) + udelay(100); + + /* disable the DMA */ + denali_enable_dma(denali, false); + + return irq_status; +} + +static int write_page(struct mtd_info *mtd, struct nand_chip *chip, + const uint8_t *buf, bool raw_xfer, int oob_required) +{ + struct denali_nand_info *denali = mtd_to_denali(mtd); + + uint32_t irq_status = 0; + uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP; + + denali->status = 0; + + /* copy buffer into DMA buffer */ + memcpy(denali->buf.dma_buf, buf, mtd->writesize); + + /* need extra memcpy for raw transfer */ + if (raw_xfer) + memcpy(denali->buf.dma_buf + mtd->writesize, + chip->oob_poi, mtd->oobsize); + + /* setting up DMA */ + irq_status = denali_dma_configuration(denali, DENALI_WRITE, raw_xfer, + irq_mask, oob_required); + + /* if timeout happen, error out */ + if (!(irq_status & INTR_STATUS__DMA_CMD_COMP)) { + debug("DMA timeout for denali write_page\n"); + denali->status = NAND_STATUS_FAIL; + return -EIO; + } + + if (irq_status & INTR_STATUS__LOCKED_BLK) { + debug("Failed as write to locked block\n"); + denali->status = NAND_STATUS_FAIL; + return -EIO; + } + return 0; +} + +/* NAND core entry points */ + +/* + * this is the callback that the NAND core calls to write a page. Since + * writing a page with ECC or without is similar, all the work is done + * by write_page above. + */ +static int denali_write_page(struct mtd_info *mtd, struct nand_chip *chip, + const uint8_t *buf, int oob_required) +{ + struct denali_nand_info *denali = mtd_to_denali(mtd); + + /* + * for regular page writes, we let HW handle all the ECC + * data written to the device. + */ + if (oob_required) + /* switch to main + spare access */ + denali_mode_main_spare_access(denali); + else + /* switch to main access only */ + denali_mode_main_access(denali); + + return write_page(mtd, chip, buf, false, oob_required); +} + +/* + * This is the callback that the NAND core calls to write a page without ECC. + * raw access is similar to ECC page writes, so all the work is done in the + * write_page() function above. + */ +static int denali_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, + const uint8_t *buf, int oob_required) +{ + struct denali_nand_info *denali = mtd_to_denali(mtd); + + /* + * for raw page writes, we want to disable ECC and simply write + * whatever data is in the buffer. + */ + + if (oob_required) + /* switch to main + spare access */ + denali_mode_main_spare_access(denali); + else + /* switch to main access only */ + denali_mode_main_access(denali); + + return write_page(mtd, chip, buf, true, oob_required); +} + +static int denali_write_oob(struct mtd_info *mtd, struct nand_chip *chip, + int page) +{ + return write_oob_data(mtd, chip->oob_poi, page); +} + +/* raw include ECC value and all the spare area */ +static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, + uint8_t *buf, int oob_required, int page) +{ + struct denali_nand_info *denali = mtd_to_denali(mtd); + + uint32_t irq_status, irq_mask = INTR_STATUS__DMA_CMD_COMP; + + if (denali->page != page) { + debug("Missing NAND_CMD_READ0 command\n"); + return -EIO; + } + + if (oob_required) + /* switch to main + spare access */ + denali_mode_main_spare_access(denali); + else + /* switch to main access only */ + denali_mode_main_access(denali); + + /* setting up the DMA where ecc_enable is false */ + irq_status = denali_dma_configuration(denali, DENALI_READ, true, + irq_mask, oob_required); + + /* if timeout happen, error out */ + if (!(irq_status & INTR_STATUS__DMA_CMD_COMP)) { + debug("DMA timeout for denali_read_page_raw\n"); + return -EIO; + } + + /* splitting the content to destination buffer holder */ + memcpy(chip->oob_poi, (denali->buf.dma_buf + mtd->writesize), + mtd->oobsize); + memcpy(buf, denali->buf.dma_buf, mtd->writesize); + + return 0; +} + +static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip, + uint8_t *buf, int oob_required, int page) +{ + struct denali_nand_info *denali = mtd_to_denali(mtd); + uint32_t irq_status, irq_mask = INTR_STATUS__DMA_CMD_COMP; + + if (denali->page != page) { + debug("Missing NAND_CMD_READ0 command\n"); + return -EIO; + } + + if (oob_required) + /* switch to main + spare access */ + denali_mode_main_spare_access(denali); + else + /* switch to main access only */ + denali_mode_main_access(denali); + + /* setting up the DMA where ecc_enable is true */ + irq_status = denali_dma_configuration(denali, DENALI_READ, false, + irq_mask, oob_required); + + memcpy(buf, denali->buf.dma_buf, mtd->writesize); + + /* check whether any ECC error */ + if (irq_status & INTR_STATUS__ECC_UNCOR_ERR) { + /* is the ECC cause by erase page, check using read_page_raw */ + debug(" Uncorrected ECC detected\n"); + denali_read_page_raw(mtd, chip, buf, oob_required, + denali->page); + + if (is_erased(buf, mtd->writesize) == true && + is_erased(chip->oob_poi, mtd->oobsize) == true) { + debug(" ECC error cause by erased block\n"); + /* false alarm, return the 0xFF */ + } else { + return -EIO; + } + } + memcpy(buf, denali->buf.dma_buf, mtd->writesize); + return 0; +} + +static int denali_read_oob(struct mtd_info *mtd, struct nand_chip *chip, + int page) +{ + read_oob_data(mtd, chip->oob_poi, page); + + return 0; +} + +static uint8_t denali_read_byte(struct mtd_info *mtd) +{ + struct denali_nand_info *denali = mtd_to_denali(mtd); + uint32_t addr, result; + + addr = (uint32_t)MODE_11 | BANK(denali->flash_bank); + index_addr_read_data(denali, addr | 2, &result); + return (uint8_t)result & 0xFF; +} + +static void denali_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) +{ + struct denali_nand_info *denali = mtd_to_denali(mtd); + uint32_t i, addr, result; + + /* delay for tR (data transfer from Flash array to data register) */ + udelay(25); + + /* ensure device completed else additional delay and polling */ + wait_for_irq(denali, INTR_STATUS__INT_ACT); + + addr = (uint32_t)MODE_11 | BANK(denali->flash_bank); + for (i = 0; i < len; i++) { + index_addr_read_data(denali, (uint32_t)addr | 2, &result); + write_byte_to_buf(denali, result); + } + memcpy(buf, denali->buf.buf, len); +} + +static void denali_select_chip(struct mtd_info *mtd, int chip) +{ + struct denali_nand_info *denali = mtd_to_denali(mtd); + + denali->flash_bank = chip; +} + +static int denali_waitfunc(struct mtd_info *mtd, struct nand_chip *chip) +{ + struct denali_nand_info *denali = mtd_to_denali(mtd); + int status = denali->status; + denali->status = 0; + + return status; +} + +static void denali_erase(struct mtd_info *mtd, int page) +{ + struct denali_nand_info *denali = mtd_to_denali(mtd); + uint32_t cmd, irq_status; + + /* clear interrupts */ + clear_interrupts(denali); + + /* setup page read request for access type */ + cmd = MODE_10 | BANK(denali->flash_bank) | page; + index_addr(denali, cmd, 0x1); + + /* wait for erase to complete or failure to occur */ + irq_status = wait_for_irq(denali, INTR_STATUS__ERASE_COMP | + INTR_STATUS__ERASE_FAIL); + + if (irq_status & INTR_STATUS__ERASE_FAIL || + irq_status & INTR_STATUS__LOCKED_BLK) + denali->status = NAND_STATUS_FAIL; + else + denali->status = 0; +} + +static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, + int page) +{ + struct denali_nand_info *denali = mtd_to_denali(mtd); + uint32_t addr; + + switch (cmd) { + case NAND_CMD_PAGEPROG: + break; + case NAND_CMD_STATUS: + addr = MODE_11 | BANK(denali->flash_bank); + index_addr(denali, addr | 0, cmd); + break; + case NAND_CMD_PARAM: + clear_interrupts(denali); + case NAND_CMD_READID: + reset_buf(denali); + /* sometimes ManufactureId read from register is not right + * e.g. some of Micron MT29F32G08QAA MLC NAND chips + * So here we send READID cmd to NAND insteand + * */ + addr = MODE_11 | BANK(denali->flash_bank); + index_addr(denali, addr | 0, cmd); + index_addr(denali, addr | 1, col & 0xFF); + break; + case NAND_CMD_READ0: + case NAND_CMD_SEQIN: + denali->page = page; + break; + case NAND_CMD_RESET: + reset_bank(denali); + break; + case NAND_CMD_READOOB: + /* TODO: Read OOB data */ + break; + case NAND_CMD_ERASE1: + /* + * supporting block erase only, not multiblock erase as + * it will cross plane and software need complex calculation + * to identify the block count for the cross plane + */ + denali_erase(mtd, page); + break; + case NAND_CMD_ERASE2: + /* nothing to do here as it was done during NAND_CMD_ERASE1 */ + break; + case NAND_CMD_UNLOCK1: + addr = MODE_10 | BANK(denali->flash_bank) | page; + index_addr(denali, addr | 0, DENALI_UNLOCK_START); + break; + case NAND_CMD_UNLOCK2: + addr = MODE_10 | BANK(denali->flash_bank) | page; + index_addr(denali, addr | 0, DENALI_UNLOCK_END); + break; + case NAND_CMD_LOCK: + addr = MODE_10 | BANK(denali->flash_bank); + index_addr(denali, addr | 0, DENALI_LOCK); + break; + default: + printf(": unsupported command received 0x%x\n", cmd); + break; + } +} +/* end NAND core entry points */ + +/* Initialization code to bring the device up to a known good state */ +static void denali_hw_init(struct denali_nand_info *denali) +{ + /* + * tell driver how many bit controller will skip before writing + * ECC code in OOB. This is normally used for bad block marker + */ + writel(CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES, + denali->flash_reg + SPARE_AREA_SKIP_BYTES); + detect_max_banks(denali); + denali_nand_reset(denali); + writel(0x0F, denali->flash_reg + RB_PIN_ENABLED); + writel(CHIP_EN_DONT_CARE__FLAG, + denali->flash_reg + CHIP_ENABLE_DONT_CARE); + writel(0xffff, denali->flash_reg + SPARE_AREA_MARKER); + + /* Should set value for these registers when init */ + writel(0, denali->flash_reg + TWO_ROW_ADDR_CYCLES); + writel(1, denali->flash_reg + ECC_ENABLE); + denali_nand_timing_set(denali); + denali_irq_init(denali); +} + +static struct nand_ecclayout nand_oob; + +static int denali_nand_init(struct nand_chip *nand) +{ + struct denali_nand_info *denali; + + denali = malloc(sizeof(*denali)); + if (!denali) + return -ENOMEM; + + nand->priv = denali; + + denali->flash_reg = (void __iomem *)CONFIG_SYS_NAND_REGS_BASE; + denali->flash_mem = (void __iomem *)CONFIG_SYS_NAND_DATA_BASE; + +#ifdef CONFIG_SYS_NAND_USE_FLASH_BBT + /* check whether flash got BBT table (located at end of flash). As we + * use NAND_BBT_NO_OOB, the BBT page will start with + * bbt_pattern. We will have mirror pattern too */ + nand->bbt_options |= NAND_BBT_USE_FLASH; + /* + * We are using main + spare with ECC support. As BBT need ECC support, + * we need to ensure BBT code don't write to OOB for the BBT pattern. + * All BBT info will be stored into data area with ECC support. + */ + nand->bbt_options |= NAND_BBT_NO_OOB; +#endif + + nand->ecc.mode = NAND_ECC_HW; + nand->ecc.size = CONFIG_NAND_DENALI_ECC_SIZE; + nand->ecc.read_oob = denali_read_oob; + nand->ecc.write_oob = denali_write_oob; + nand->ecc.read_page = denali_read_page; + nand->ecc.read_page_raw = denali_read_page_raw; + nand->ecc.write_page = denali_write_page; + nand->ecc.write_page_raw = denali_write_page_raw; + /* + * Tell driver the ecc strength. This register may be already set + * correctly. So we read this value out. + */ + nand->ecc.strength = readl(denali->flash_reg + ECC_CORRECTION); + switch (nand->ecc.size) { + case 512: + nand->ecc.bytes = (nand->ecc.strength * 13 + 15) / 16 * 2; + break; + case 1024: + nand->ecc.bytes = (nand->ecc.strength * 14 + 15) / 16 * 2; + break; + default: + pr_err("Unsupported ECC size\n"); + return -EINVAL; + } + nand_oob.eccbytes = nand->ecc.bytes; + nand->ecc.layout = &nand_oob; + + /* Set address of hardware control function */ + nand->cmdfunc = denali_cmdfunc; + nand->read_byte = denali_read_byte; + nand->read_buf = denali_read_buf; + nand->select_chip = denali_select_chip; + nand->waitfunc = denali_waitfunc; + denali_hw_init(denali); + return 0; +} + +int board_nand_init(struct nand_chip *chip) +{ + return denali_nand_init(chip); +} diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h new file mode 100644 index 0000000..3277da7 --- /dev/null +++ b/drivers/mtd/nand/denali.h @@ -0,0 +1,467 @@ +/* + * Copyright (C) 2013-2014 Altera Corporation + * Copyright (C) 2009-2010, Intel Corporation and its suppliers. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include + +#define DEVICE_RESET 0x0 +#define DEVICE_RESET__BANK0 0x0001 +#define DEVICE_RESET__BANK1 0x0002 +#define DEVICE_RESET__BANK2 0x0004 +#define DEVICE_RESET__BANK3 0x0008 + +#define TRANSFER_SPARE_REG 0x10 +#define TRANSFER_SPARE_REG__FLAG 0x0001 + +#define LOAD_WAIT_CNT 0x20 +#define LOAD_WAIT_CNT__VALUE 0xffff + +#define PROGRAM_WAIT_CNT 0x30 +#define PROGRAM_WAIT_CNT__VALUE 0xffff + +#define ERASE_WAIT_CNT 0x40 +#define ERASE_WAIT_CNT__VALUE 0xffff + +#define INT_MON_CYCCNT 0x50 +#define INT_MON_CYCCNT__VALUE 0xffff + +#define RB_PIN_ENABLED 0x60 +#define RB_PIN_ENABLED__BANK0 0x0001 +#define RB_PIN_ENABLED__BANK1 0x0002 +#define RB_PIN_ENABLED__BANK2 0x0004 +#define RB_PIN_ENABLED__BANK3 0x0008 + +#define MULTIPLANE_OPERATION 0x70 +#define MULTIPLANE_OPERATION__FLAG 0x0001 + +#define MULTIPLANE_READ_ENABLE 0x80 +#define MULTIPLANE_READ_ENABLE__FLAG 0x0001 + +#define COPYBACK_DISABLE 0x90 +#define COPYBACK_DISABLE__FLAG 0x0001 + +#define CACHE_WRITE_ENABLE 0xa0 +#define CACHE_WRITE_ENABLE__FLAG 0x0001 + +#define CACHE_READ_ENABLE 0xb0 +#define CACHE_READ_ENABLE__FLAG 0x0001 + +#define PREFETCH_MODE 0xc0 +#define PREFETCH_MODE__PREFETCH_EN 0x0001 +#define PREFETCH_MODE__PREFETCH_BURST_LENGTH 0xfff0 + +#define CHIP_ENABLE_DONT_CARE 0xd0 +#define CHIP_EN_DONT_CARE__FLAG 0x01 + +#define ECC_ENABLE 0xe0 +#define ECC_ENABLE__FLAG 0x0001 + +#define GLOBAL_INT_ENABLE 0xf0 +#define GLOBAL_INT_EN_FLAG 0x01 + +#define WE_2_RE 0x100 +#define WE_2_RE__VALUE 0x003f + +#define ADDR_2_DATA 0x110 +#define ADDR_2_DATA__VALUE 0x003f + +#define RE_2_WE 0x120 +#define RE_2_WE__VALUE 0x003f + +#define ACC_CLKS 0x130 +#define ACC_CLKS__VALUE 0x000f + +#define NUMBER_OF_PLANES 0x140 +#define NUMBER_OF_PLANES__VALUE 0x0007 + +#define PAGES_PER_BLOCK 0x150 +#define PAGES_PER_BLOCK__VALUE 0xffff + +#define DEVICE_WIDTH 0x160 +#define DEVICE_WIDTH__VALUE 0x0003 + +#define DEVICE_MAIN_AREA_SIZE 0x170 +#define DEVICE_MAIN_AREA_SIZE__VALUE 0xffff + +#define DEVICE_SPARE_AREA_SIZE 0x180 +#define DEVICE_SPARE_AREA_SIZE__VALUE 0xffff + +#define TWO_ROW_ADDR_CYCLES 0x190 +#define TWO_ROW_ADDR_CYCLES__FLAG 0x0001 + +#define MULTIPLANE_ADDR_RESTRICT 0x1a0 +#define MULTIPLANE_ADDR_RESTRICT__FLAG 0x0001 + +#define ECC_CORRECTION 0x1b0 +#define ECC_CORRECTION__VALUE 0x001f + +#define READ_MODE 0x1c0 +#define READ_MODE__VALUE 0x000f + +#define WRITE_MODE 0x1d0 +#define WRITE_MODE__VALUE 0x000f + +#define COPYBACK_MODE 0x1e0 +#define COPYBACK_MODE__VALUE 0x000f + +#define RDWR_EN_LO_CNT 0x1f0 +#define RDWR_EN_LO_CNT__VALUE 0x001f + +#define RDWR_EN_HI_CNT 0x200 +#define RDWR_EN_HI_CNT__VALUE 0x001f + +#define MAX_RD_DELAY 0x210 +#define MAX_RD_DELAY__VALUE 0x000f + +#define CS_SETUP_CNT 0x220 +#define CS_SETUP_CNT__VALUE 0x001f + +#define SPARE_AREA_SKIP_BYTES 0x230 +#define SPARE_AREA_SKIP_BYTES__VALUE 0x003f + +#define SPARE_AREA_MARKER 0x240 +#define SPARE_AREA_MARKER__VALUE 0xffff + +#define DEVICES_CONNECTED 0x250 +#define DEVICES_CONNECTED__VALUE 0x0007 + +#define DIE_MASK 0x260 +#define DIE_MASK__VALUE 0x00ff + +#define FIRST_BLOCK_OF_NEXT_PLANE 0x270 +#define FIRST_BLOCK_OF_NEXT_PLANE__VALUE 0xffff + +#define WRITE_PROTECT 0x280 +#define WRITE_PROTECT__FLAG 0x0001 + +#define RE_2_RE 0x290 +#define RE_2_RE__VALUE 0x003f + +#define MANUFACTURER_ID 0x300 +#define MANUFACTURER_ID__VALUE 0x00ff + +#define DEVICE_ID 0x310 +#define DEVICE_ID__VALUE 0x00ff + +#define DEVICE_PARAM_0 0x320 +#define DEVICE_PARAM_0__VALUE 0x00ff + +#define DEVICE_PARAM_1 0x330 +#define DEVICE_PARAM_1__VALUE 0x00ff + +#define DEVICE_PARAM_2 0x340 +#define DEVICE_PARAM_2__VALUE 0x00ff + +#define LOGICAL_PAGE_DATA_SIZE 0x350 +#define LOGICAL_PAGE_DATA_SIZE__VALUE 0xffff + +#define LOGICAL_PAGE_SPARE_SIZE 0x360 +#define LOGICAL_PAGE_SPARE_SIZE__VALUE 0xffff + +#define REVISION 0x370 +#define REVISION__VALUE 0xffff + +#define ONFI_DEVICE_FEATURES 0x380 +#define ONFI_DEVICE_FEATURES__VALUE 0x003f + +#define ONFI_OPTIONAL_COMMANDS 0x390 +#define ONFI_OPTIONAL_COMMANDS__VALUE 0x003f + +#define ONFI_TIMING_MODE 0x3a0 +#define ONFI_TIMING_MODE__VALUE 0x003f + +#define ONFI_PGM_CACHE_TIMING_MODE 0x3b0 +#define ONFI_PGM_CACHE_TIMING_MODE__VALUE 0x003f + +#define ONFI_DEVICE_NO_OF_LUNS 0x3c0 +#define ONFI_DEVICE_NO_OF_LUNS__NO_OF_LUNS 0x00ff +#define ONFI_DEVICE_NO_OF_LUNS__ONFI_DEVICE 0x0100 + +#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L 0x3d0 +#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L__VALUE 0xffff + +#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U 0x3e0 +#define ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U__VALUE 0xffff + +#define FEATURES 0x3f0 +#define FEATURES__N_BANKS 0x0003 +#define FEATURES__ECC_MAX_ERR 0x003c +#define FEATURES__DMA 0x0040 +#define FEATURES__CMD_DMA 0x0080 +#define FEATURES__PARTITION 0x0100 +#define FEATURES__XDMA_SIDEBAND 0x0200 +#define FEATURES__GPREG 0x0400 +#define FEATURES__INDEX_ADDR 0x0800 + +#define TRANSFER_MODE 0x400 +#define TRANSFER_MODE__VALUE 0x0003 + +#define INTR_STATUS(__bank) (0x410 + ((__bank) * 0x50)) +#define INTR_EN(__bank) (0x420 + ((__bank) * 0x50)) + +/* + * Some versions of the IP have the ECC fixup handled in hardware. In this + * configuration we only get interrupted when the error is uncorrectable. + * Unfortunately this bit replaces INTR_STATUS__ECC_TRANSACTION_DONE from the + * old IP. + */ +#define INTR_STATUS__ECC_UNCOR_ERR 0x0001 +#define INTR_STATUS__ECC_TRANSACTION_DONE 0x0001 +#define INTR_STATUS__ECC_ERR 0x0002 +#define INTR_STATUS__DMA_CMD_COMP 0x0004 +#define INTR_STATUS__TIME_OUT 0x0008 +#define INTR_STATUS__PROGRAM_FAIL 0x0010 +#define INTR_STATUS__ERASE_FAIL 0x0020 +#define INTR_STATUS__LOAD_COMP 0x0040 +#define INTR_STATUS__PROGRAM_COMP 0x0080 +#define INTR_STATUS__ERASE_COMP 0x0100 +#define INTR_STATUS__PIPE_CPYBCK_CMD_COMP 0x0200 +#define INTR_STATUS__LOCKED_BLK 0x0400 +#define INTR_STATUS__UNSUP_CMD 0x0800 +#define INTR_STATUS__INT_ACT 0x1000 +#define INTR_STATUS__RST_COMP 0x2000 +#define INTR_STATUS__PIPE_CMD_ERR 0x4000 +#define INTR_STATUS__PAGE_XFER_INC 0x8000 + +#define INTR_EN__ECC_TRANSACTION_DONE 0x0001 +#define INTR_EN__ECC_ERR 0x0002 +#define INTR_EN__DMA_CMD_COMP 0x0004 +#define INTR_EN__TIME_OUT 0x0008 +#define INTR_EN__PROGRAM_FAIL 0x0010 +#define INTR_EN__ERASE_FAIL 0x0020 +#define INTR_EN__LOAD_COMP 0x0040 +#define INTR_EN__PROGRAM_COMP 0x0080 +#define INTR_EN__ERASE_COMP 0x0100 +#define INTR_EN__PIPE_CPYBCK_CMD_COMP 0x0200 +#define INTR_EN__LOCKED_BLK 0x0400 +#define INTR_EN__UNSUP_CMD 0x0800 +#define INTR_EN__INT_ACT 0x1000 +#define INTR_EN__RST_COMP 0x2000 +#define INTR_EN__PIPE_CMD_ERR 0x4000 +#define INTR_EN__PAGE_XFER_INC 0x8000 + +#define PAGE_CNT(__bank) (0x430 + ((__bank) * 0x50)) +#define ERR_PAGE_ADDR(__bank) (0x440 + ((__bank) * 0x50)) +#define ERR_BLOCK_ADDR(__bank) (0x450 + ((__bank) * 0x50)) + +#define DATA_INTR 0x550 +#define DATA_INTR__WRITE_SPACE_AV 0x0001 +#define DATA_INTR__READ_DATA_AV 0x0002 + +#define DATA_INTR_EN 0x560 +#define DATA_INTR_EN__WRITE_SPACE_AV 0x0001 +#define DATA_INTR_EN__READ_DATA_AV 0x0002 + +#define GPREG_0 0x570 +#define GPREG_0__VALUE 0xffff + +#define GPREG_1 0x580 +#define GPREG_1__VALUE 0xffff + +#define GPREG_2 0x590 +#define GPREG_2__VALUE 0xffff + +#define GPREG_3 0x5a0 +#define GPREG_3__VALUE 0xffff + +#define ECC_THRESHOLD 0x600 +#define ECC_THRESHOLD__VALUE 0x03ff + +#define ECC_ERROR_BLOCK_ADDRESS 0x610 +#define ECC_ERROR_BLOCK_ADDRESS__VALUE 0xffff + +#define ECC_ERROR_PAGE_ADDRESS 0x620 +#define ECC_ERROR_PAGE_ADDRESS__VALUE 0x0fff +#define ECC_ERROR_PAGE_ADDRESS__BANK 0xf000 + +#define ECC_ERROR_ADDRESS 0x630 +#define ECC_ERROR_ADDRESS__OFFSET 0x0fff +#define ECC_ERROR_ADDRESS__SECTOR_NR 0xf000 + +#define ERR_CORRECTION_INFO 0x640 +#define ERR_CORRECTION_INFO__BYTEMASK 0x00ff +#define ERR_CORRECTION_INFO__DEVICE_NR 0x0f00 +#define ERR_CORRECTION_INFO__ERROR_TYPE 0x4000 +#define ERR_CORRECTION_INFO__LAST_ERR_INFO 0x8000 + +#define DMA_ENABLE 0x700 +#define DMA_ENABLE__FLAG 0x0001 + +#define IGNORE_ECC_DONE 0x710 +#define IGNORE_ECC_DONE__FLAG 0x0001 + +#define DMA_INTR 0x720 +#define DMA_INTR__TARGET_ERROR 0x0001 +#define DMA_INTR__DESC_COMP_CHANNEL0 0x0002 +#define DMA_INTR__DESC_COMP_CHANNEL1 0x0004 +#define DMA_INTR__DESC_COMP_CHANNEL2 0x0008 +#define DMA_INTR__DESC_COMP_CHANNEL3 0x0010 +#define DMA_INTR__MEMCOPY_DESC_COMP 0x0020 + +#define DMA_INTR_EN 0x730 +#define DMA_INTR_EN__TARGET_ERROR 0x0001 +#define DMA_INTR_EN__DESC_COMP_CHANNEL0 0x0002 +#define DMA_INTR_EN__DESC_COMP_CHANNEL1 0x0004 +#define DMA_INTR_EN__DESC_COMP_CHANNEL2 0x0008 +#define DMA_INTR_EN__DESC_COMP_CHANNEL3 0x0010 +#define DMA_INTR_EN__MEMCOPY_DESC_COMP 0x0020 + +#define TARGET_ERR_ADDR_LO 0x740 +#define TARGET_ERR_ADDR_LO__VALUE 0xffff + +#define TARGET_ERR_ADDR_HI 0x750 +#define TARGET_ERR_ADDR_HI__VALUE 0xffff + +#define CHNL_ACTIVE 0x760 +#define CHNL_ACTIVE__CHANNEL0 0x0001 +#define CHNL_ACTIVE__CHANNEL1 0x0002 +#define CHNL_ACTIVE__CHANNEL2 0x0004 +#define CHNL_ACTIVE__CHANNEL3 0x0008 + +#define ACTIVE_SRC_ID 0x800 +#define ACTIVE_SRC_ID__VALUE 0x00ff + +#define PTN_INTR 0x810 +#define PTN_INTR__CONFIG_ERROR 0x0001 +#define PTN_INTR__ACCESS_ERROR_BANK0 0x0002 +#define PTN_INTR__ACCESS_ERROR_BANK1 0x0004 +#define PTN_INTR__ACCESS_ERROR_BANK2 0x0008 +#define PTN_INTR__ACCESS_ERROR_BANK3 0x0010 +#define PTN_INTR__REG_ACCESS_ERROR 0x0020 + +#define PTN_INTR_EN 0x820 +#define PTN_INTR_EN__CONFIG_ERROR 0x0001 +#define PTN_INTR_EN__ACCESS_ERROR_BANK0 0x0002 +#define PTN_INTR_EN__ACCESS_ERROR_BANK1 0x0004 +#define PTN_INTR_EN__ACCESS_ERROR_BANK2 0x0008 +#define PTN_INTR_EN__ACCESS_ERROR_BANK3 0x0010 +#define PTN_INTR_EN__REG_ACCESS_ERROR 0x0020 + +#define PERM_SRC_ID(__bank) (0x830 + ((__bank) * 0x40)) +#define PERM_SRC_ID__SRCID 0x00ff +#define PERM_SRC_ID__DIRECT_ACCESS_ACTIVE 0x0800 +#define PERM_SRC_ID__WRITE_ACTIVE 0x2000 +#define PERM_SRC_ID__READ_ACTIVE 0x4000 +#define PERM_SRC_ID__PARTITION_VALID 0x8000 + +#define MIN_BLK_ADDR(__bank) (0x840 + ((__bank) * 0x40)) +#define MIN_BLK_ADDR__VALUE 0xffff + +#define MAX_BLK_ADDR(__bank) (0x850 + ((__bank) * 0x40)) +#define MAX_BLK_ADDR__VALUE 0xffff + +#define MIN_MAX_BANK(__bank) (0x860 + ((__bank) * 0x40)) +#define MIN_MAX_BANK__MIN_VALUE 0x0003 +#define MIN_MAX_BANK__MAX_VALUE 0x000c + +/* lld.h */ +#define GOOD_BLOCK 0 +#define DEFECTIVE_BLOCK 1 +#define READ_ERROR 2 + +#define CLK_X 5 +#define CLK_MULTI 4 + +/* spectraswconfig.h */ +#define CMD_DMA 0 + +#define SPECTRA_PARTITION_ID 0 +/**** Block Table and Reserved Block Parameters *****/ +#define SPECTRA_START_BLOCK 3 +#define NUM_FREE_BLOCKS_GATE 30 + +/* KBV - Updated to LNW scratch register address */ +#define SCRATCH_REG_ADDR CONFIG_MTD_NAND_DENALI_SCRATCH_REG_ADDR +#define SCRATCH_REG_SIZE 64 + +#define GLOB_HWCTL_DEFAULT_BLKS 2048 + +#define CUSTOM_CONF_PARAMS 0 + +#ifndef _LLD_NAND_ +#define _LLD_NAND_ + +#define INDEX_CTRL_REG 0x0 +#define INDEX_DATA_REG 0x10 + +#define MODE_00 0x00000000 +#define MODE_01 0x04000000 +#define MODE_10 0x08000000 +#define MODE_11 0x0C000000 + + +#define DATA_TRANSFER_MODE 0 +#define PROTECTION_PER_BLOCK 1 +#define LOAD_WAIT_COUNT 2 +#define PROGRAM_WAIT_COUNT 3 +#define ERASE_WAIT_COUNT 4 +#define INT_MONITOR_CYCLE_COUNT 5 +#define READ_BUSY_PIN_ENABLED 6 +#define MULTIPLANE_OPERATION_SUPPORT 7 +#define PRE_FETCH_MODE 8 +#define CE_DONT_CARE_SUPPORT 9 +#define COPYBACK_SUPPORT 10 +#define CACHE_WRITE_SUPPORT 11 +#define CACHE_READ_SUPPORT 12 +#define NUM_PAGES_IN_BLOCK 13 +#define ECC_ENABLE_SELECT 14 +#define WRITE_ENABLE_2_READ_ENABLE 15 +#define ADDRESS_2_DATA 16 +#define READ_ENABLE_2_WRITE_ENABLE 17 +#define TWO_ROW_ADDRESS_CYCLES 18 +#define MULTIPLANE_ADDRESS_RESTRICT 19 +#define ACC_CLOCKS 20 +#define READ_WRITE_ENABLE_LOW_COUNT 21 +#define READ_WRITE_ENABLE_HIGH_COUNT 22 + +#define ECC_SECTOR_SIZE 512 + +#define DENALI_BUF_SIZE (NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE) + +struct nand_buf { + int head; + int tail; + /* seprating dma_buf as buf can be used for status read purpose */ + uint8_t dma_buf[DENALI_BUF_SIZE] __aligned(64); + uint8_t buf[DENALI_BUF_SIZE]; +}; + +#define INTEL_CE4100 1 +#define INTEL_MRST 2 +#define DT 3 + +struct denali_nand_info { + struct mtd_info mtd; + struct nand_chip *nand; + + int flash_bank; /* currently selected chip */ + int status; + int platform; + struct nand_buf buf; + struct device *dev; + int total_used_banks; + uint32_t block; /* stored for future use */ + uint32_t page; + void __iomem *flash_reg; /* Mapped io reg base address */ + void __iomem *flash_mem; /* Mapped io reg base address */ + + /* elements used by ISR */ + /*struct completion complete;*/ + + uint32_t irq_status; + int irq_debug_array[32]; + int idx; + int irq; + + uint32_t devnum; /* represent how many nands connected */ + uint32_t fwblks; /* represent how many blocks FW used */ + uint32_t totalblks; + uint32_t blksperchip; + uint32_t bbtskipbytes; + uint32_t max_banks; +}; + +#endif /*_LLD_NAND_*/ diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index 7e1e6ec..3372b64 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c @@ -37,7 +37,6 @@ #define MAX_BANKS 8 #define ERR_BYTE 0xFF /* Value returned for read bytes when read failed */ -#define FCM_TIMEOUT_MSECS 10 /* Maximum number of mSecs to wait for FCM */ #define LTESR_NAND_MASK (LTESR_FCT | LTESR_PAR | LTESR_CC) @@ -199,7 +198,8 @@ static int fsl_elbc_run_command(struct mtd_info *mtd) struct fsl_elbc_mtd *priv = chip->priv; struct fsl_elbc_ctrl *ctrl = priv->ctrl; fsl_lbc_t *lbc = ctrl->regs; - long long end_tick; + u32 timeo = (CONFIG_SYS_HZ * 10) / 1000; + u32 time_start; u32 ltesr; /* Setup the FMR[OP] to execute without write protection */ @@ -218,10 +218,10 @@ static int fsl_elbc_run_command(struct mtd_info *mtd) out_be32(&lbc->lsor, priv->bank); /* wait for FCM complete flag or timeout */ - end_tick = usec2ticks(FCM_TIMEOUT_MSECS * 1000) + get_ticks(); + time_start = get_timer(0); ltesr = 0; - while (end_tick > get_ticks()) { + while (get_timer(time_start) < timeo) { ltesr = in_be32(&lbc->ltesr); if (ltesr & LTESR_CC) break; diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c index 2f04c69..81b5070 100644 --- a/drivers/mtd/nand/fsl_ifc_nand.c +++ b/drivers/mtd/nand/fsl_ifc_nand.c @@ -26,8 +26,6 @@ #define MAX_BANKS CONFIG_SYS_FSL_IFC_BANK_COUNT #define ERR_BYTE 0xFF /* Value returned for read bytes when read failed */ -#define IFC_TIMEOUT_MSECS 10 /* Maximum number of mSecs to wait for IFC - NAND Machine */ struct fsl_ifc_ctrl; @@ -292,7 +290,8 @@ static int fsl_ifc_run_command(struct mtd_info *mtd) struct fsl_ifc_mtd *priv = chip->priv; struct fsl_ifc_ctrl *ctrl = priv->ctrl; struct fsl_ifc *ifc = ctrl->regs; - long long end_tick; + u32 timeo = (CONFIG_SYS_HZ * 10) / 1000; + u32 time_start; u32 eccstat[4]; int i; @@ -304,9 +303,9 @@ static int fsl_ifc_run_command(struct mtd_info *mtd) IFC_NAND_SEQ_STRT_FIR_STRT); /* wait for NAND Machine complete flag or timeout */ - end_tick = usec2ticks(IFC_TIMEOUT_MSECS * 1000) + get_ticks(); + time_start = get_timer(0); - while (end_tick > get_ticks()) { + while (get_timer(time_start) < timeo) { ctrl->status = ifc_in32(&ifc->ifc_nand.nand_evter_stat); if (ctrl->status & IFC_NAND_EVTER_STAT_OPC) @@ -812,15 +811,16 @@ static int fsl_ifc_sram_init(uint32_t ver) struct fsl_ifc *ifc = ifc_ctrl->regs; uint32_t cs = 0, csor = 0, csor_8k = 0, csor_ext = 0; uint32_t ncfgr = 0; - long long end_tick; + u32 timeo = (CONFIG_SYS_HZ * 10) / 1000; + u32 time_start; if (ver > FSL_IFC_V1_1_0) { ncfgr = ifc_in32(&ifc->ifc_nand.ncfgr); ifc_out32(&ifc->ifc_nand.ncfgr, ncfgr | IFC_NAND_SRAM_INIT_EN); /* wait for SRAM_INIT bit to be clear or timeout */ - end_tick = usec2ticks(IFC_TIMEOUT_MSECS * 1000) + get_ticks(); - while (end_tick > get_ticks()) { + time_start = get_timer(0); + while (get_timer(time_start) < timeo) { ifc_ctrl->status = ifc_in32(&ifc->ifc_nand.nand_evter_stat); @@ -863,10 +863,9 @@ static int fsl_ifc_sram_init(uint32_t ver) /* start read seq */ ifc_out32(&ifc->ifc_nand.nandseq_strt, IFC_NAND_SEQ_STRT_FIR_STRT); - /* wait for NAND Machine complete flag or timeout */ - end_tick = usec2ticks(IFC_TIMEOUT_MSECS * 1000) + get_ticks(); + time_start = get_timer(0); - while (end_tick > get_ticks()) { + while (get_timer(time_start) < timeo) { ifc_ctrl->status = ifc_in32(&ifc->ifc_nand.nand_evter_stat); if (ifc_ctrl->status & IFC_NAND_EVTER_STAT_OPC) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 085b154..0b6e7ee 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -29,7 +29,6 @@ * */ -#define __UBOOT__ #ifndef __UBOOT__ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt @@ -309,8 +308,7 @@ static void ioread16_rep(void *addr, void *buf, int len) { int i; u16 *p = (u16 *) buf; - len >>= 1; - + for (i = 0; i < len; i++) p[i] = readw(addr); } @@ -319,7 +317,6 @@ static void iowrite16_rep(void *addr, void *buf, int len) { int i; u16 *p = (u16 *) buf; - len >>= 1; for (i = 0; i < len; i++) writew(p[i], addr); diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c index c8f28c7..cf4a82d 100644 --- a/drivers/mtd/nand/nand_bbt.c +++ b/drivers/mtd/nand/nand_bbt.c @@ -59,7 +59,6 @@ * */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c index 54f9f13..9ed0577 100644 --- a/drivers/mtd/nand/nand_ids.c +++ b/drivers/mtd/nand/nand_ids.c @@ -8,7 +8,6 @@ * published by the Free Software Foundation. * */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index 1acf06b..db1599e 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -27,10 +27,22 @@ static u8 bch8_polynomial[] = {0xef, 0x51, 0x2e, 0x09, 0xed, 0x93, 0x9a, 0xc2, 0x97, 0x79, 0xe5, 0x24, 0xb5}; #endif -static uint8_t cs; +static uint8_t cs_next; static __maybe_unused struct nand_ecclayout omap_ecclayout; /* + * Driver configurations + */ +struct omap_nand_info { + struct bch_control *control; + enum omap_ecc ecc_scheme; + int cs; +}; + +/* We are wasting a bit of memory but al least we are safe */ +static struct omap_nand_info omap_nand_info[GPMC_MAX_CS]; + +/* * omap_nand_hwcontrol - Set the address pointers corretly for the * following address/data/command operation */ @@ -38,6 +50,8 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd, uint32_t ctrl) { register struct nand_chip *this = mtd->priv; + struct omap_nand_info *info = this->priv; + int cs = info->cs; /* * Point the IO_ADDR to DATA and ADDRESS registers instead @@ -148,24 +162,6 @@ static int __maybe_unused omap_correct_data(struct mtd_info *mtd, uint8_t *dat, } /* - * Driver configurations - */ -struct omap_nand_info { - struct bch_control *control; - enum omap_ecc ecc_scheme; -}; - -/* - * This can be a single instance cause all current users have only one NAND - * with nearly the same setup (BCH8, some with ELM and others with sw BCH - * library). - * When some users with other BCH strength will exists this have to change! - */ -static __maybe_unused struct omap_nand_info omap_nand_info = { - .control = NULL -}; - -/* * omap_reverse_list - re-orders list elements in reverse order [internal] * @list: pointer to start of list * @length: length of list @@ -198,6 +194,7 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode) unsigned int eccsize1 = 0x00, eccsize0 = 0x00, bch_wrapmode = 0x00; u32 ecc_size_config_val = 0; u32 ecc_config_val = 0; + int cs = info->cs; /* configure GPMC for specific ecc-scheme */ switch (info->ecc_scheme) { @@ -478,11 +475,11 @@ static int omap_read_page_bch(struct mtd_info *mtd, struct nand_chip *chip, oob += eccbytes) { chip->ecc.hwctl(mtd, NAND_ECC_READ); /* read data */ - chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_pos, page); + chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_pos, -1); chip->read_buf(mtd, p, eccsize); /* read respective ecc from oob area */ - chip->cmdfunc(mtd, NAND_CMD_RNDOUT, oob_pos, page); + chip->cmdfunc(mtd, NAND_CMD_RNDOUT, oob_pos, -1); chip->read_buf(mtd, oob, eccbytes); /* read syndrome */ chip->ecc.calculate(mtd, p, &ecc_calc[i]); @@ -826,7 +823,7 @@ int __maybe_unused omap_nand_switch_ecc(uint32_t hardware, uint32_t eccstrength) int board_nand_init(struct nand_chip *nand) { int32_t gpmc_config = 0; - cs = 0; + int cs = cs_next++; int err = 0; /* * xloader/Uboot's gpmc configuration would have configured GPMC for @@ -856,7 +853,9 @@ int board_nand_init(struct nand_chip *nand) nand->IO_ADDR_R = (void __iomem *)&gpmc_cfg->cs[cs].nand_dat; nand->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_cmd; - nand->priv = &omap_nand_info; + omap_nand_info[cs].control = NULL; + omap_nand_info[cs].cs = cs; + nand->priv = &omap_nand_info[cs]; nand->cmd_ctrl = omap_nand_hwcontrol; nand->options |= NAND_NO_PADDING | NAND_CACHEPRG; nand->chip_delay = 100; @@ -890,6 +889,5 @@ int board_nand_init(struct nand_chip *nand) nand->read_buf = nand_read_buf; nand->dev_ready = omap_spl_dev_ready; #endif - return 0; } diff --git a/drivers/mtd/spi/sandbox.c b/drivers/mtd/spi/sandbox.c index a62ef4c..98e0a34 100644 --- a/drivers/mtd/spi/sandbox.c +++ b/drivers/mtd/spi/sandbox.c @@ -51,46 +51,7 @@ static const char *sandbox_sf_state_name(enum sandbox_sf_state state) /* Assume all SPI flashes have 3 byte addresses since they do atm */ #define SF_ADDR_LEN 3 -struct sandbox_spi_flash_erase_commands { - u8 cmd; - u32 size; -}; -#define IDCODE_LEN 5 -#define MAX_ERASE_CMDS 3 -struct sandbox_spi_flash_data { - const char *name; - u8 idcode[IDCODE_LEN]; - u32 size; - const struct sandbox_spi_flash_erase_commands - erase_cmds[MAX_ERASE_CMDS]; -}; - -/* Structure describing all the flashes we know how to emulate */ -static const struct sandbox_spi_flash_data sandbox_sf_flashes[] = { - { - "M25P16", { 0x20, 0x20, 0x15 }, (2 << 20), - { /* erase commands */ - { 0xd8, (64 << 10), }, /* sector */ - { 0xc7, (2 << 20), }, /* bulk */ - }, - }, - { - "W25Q32", { 0xef, 0x40, 0x16 }, (4 << 20), - { /* erase commands */ - { 0x20, (4 << 10), }, /* 4KB */ - { 0xd8, (64 << 10), }, /* sector */ - { 0xc7, (4 << 20), }, /* bulk */ - }, - }, - { - "W25Q128", { 0xef, 0x40, 0x18 }, (16 << 20), - { /* erase commands */ - { 0x20, (4 << 10), }, /* 4KB */ - { 0xd8, (64 << 10), }, /* sector */ - { 0xc7, (16 << 20), }, /* bulk */ - }, - }, -}; +#define IDCODE_LEN 3 /* Used to quickly bulk erase backing store */ static u8 sandbox_sf_0xff[0x1000]; @@ -109,7 +70,8 @@ struct sandbox_spi_flash { */ enum sandbox_sf_state state; uint cmd; - const void *cmd_data; + /* Erase size of current erase command */ + uint erase_size; /* Current position in the flash; used when reading/writing/etc... */ uint off; /* How many address bytes we've consumed */ @@ -117,7 +79,7 @@ struct sandbox_spi_flash { /* The current flash status (see STAT_XXX defines above) */ u16 status; /* Data describing the flash we're emulating */ - const struct sandbox_spi_flash_data *data; + const struct spi_flash_params *data; /* The file on disk to serv up data from */ int fd; }; @@ -127,8 +89,8 @@ static int sandbox_sf_setup(void **priv, const char *spec) /* spec = idcode:file */ struct sandbox_spi_flash *sbsf; const char *file; - size_t i, len, idname_len; - const struct sandbox_spi_flash_data *data; + size_t len, idname_len; + const struct spi_flash_params *data; file = strchr(spec, ':'); if (!file) { @@ -138,15 +100,14 @@ static int sandbox_sf_setup(void **priv, const char *spec) idname_len = file - spec; ++file; - for (i = 0; i < ARRAY_SIZE(sandbox_sf_flashes); ++i) { - data = &sandbox_sf_flashes[i]; + for (data = spi_flash_params_table; data->name; data++) { len = strlen(data->name); if (idname_len != len) continue; if (!memcmp(spec, data->name, len)) break; } - if (i == ARRAY_SIZE(sandbox_sf_flashes)) { + if (!data->name) { printf("sandbox_sf: unknown flash '%*s'\n", (int)idname_len, spec); goto error; @@ -223,7 +184,6 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx, sbsf->pad_addr_bytes = 1; case CMD_READ_ARRAY_SLOW: case CMD_PAGE_PROGRAM: - state_addr: sbsf->state = SF_ADDR; break; case CMD_WRITE_DISABLE: @@ -241,24 +201,25 @@ static int sandbox_sf_process_cmd(struct sandbox_spi_flash *sbsf, const u8 *rx, sbsf->status |= STAT_WEL; break; default: { - size_t i; - - /* handle erase commands first */ - for (i = 0; i < MAX_ERASE_CMDS; ++i) { - const struct sandbox_spi_flash_erase_commands * - erase_cmd = &sbsf->data->erase_cmds[i]; - - if (erase_cmd->cmd == 0x00) - continue; - if (sbsf->cmd != erase_cmd->cmd) - continue; - - sbsf->cmd_data = erase_cmd; - goto state_addr; + int flags = sbsf->data->flags; + + /* we only support erase here */ + if (sbsf->cmd == CMD_ERASE_CHIP) { + sbsf->erase_size = sbsf->data->sector_size * + sbsf->data->nr_sectors; + } else if (sbsf->cmd == CMD_ERASE_4K && (flags & SECT_4K)) { + sbsf->erase_size = 4 << 10; + } else if (sbsf->cmd == CMD_ERASE_32K && (flags & SECT_32K)) { + sbsf->erase_size = 32 << 10; + } else if (sbsf->cmd == CMD_ERASE_64K && + !(flags & (SECT_4K | SECT_32K))) { + sbsf->erase_size = 64 << 10; + } else { + debug(" cmd unknown: %#x\n", sbsf->cmd); + return 1; } - - debug(" cmd unknown: %#x\n", sbsf->cmd); - return 1; + sbsf->state = SF_ADDR; + break; } } @@ -309,11 +270,14 @@ static int sandbox_sf_xfer(void *priv, const u8 *rx, u8 *tx, u8 id; debug(" id: off:%u tx:", sbsf->off); - if (sbsf->off < IDCODE_LEN) - id = sbsf->data->idcode[sbsf->off]; - else + if (sbsf->off < IDCODE_LEN) { + /* Extract correct byte from ID 0x00aabbcc */ + id = sbsf->data->jedec >> + (8 * (IDCODE_LEN - 1 - sbsf->off)); + } else { id = 0; - debug("%02x\n", id); + } + debug("%d %02x\n", sbsf->off, id); tx[pos++] = id; ++sbsf->off; break; @@ -406,24 +370,22 @@ static int sandbox_sf_xfer(void *priv, const u8 *rx, u8 *tx, break; case SF_ERASE: case_sf_erase: { - const struct sandbox_spi_flash_erase_commands * - erase_cmd = sbsf->cmd_data; - if (!(sbsf->status & STAT_WEL)) { puts("sandbox_sf: write enable not set before erase\n"); goto done; } /* verify address is aligned */ - if (sbsf->off & (erase_cmd->size - 1)) { + if (sbsf->off & (sbsf->erase_size - 1)) { debug(" sector erase: cmd:%#x needs align:%#x, but we got %#x\n", - erase_cmd->cmd, erase_cmd->size, + sbsf->cmd, sbsf->erase_size, sbsf->off); sbsf->status &= ~STAT_WEL; goto done; } - debug(" sector erase addr: %u\n", sbsf->off); + debug(" sector erase addr: %u, size: %u\n", sbsf->off, + sbsf->erase_size); cnt = bytes - pos; sandbox_spi_tristate(&tx[pos], cnt); @@ -433,7 +395,7 @@ static int sandbox_sf_xfer(void *priv, const u8 *rx, u8 *tx, * TODO(vapier@gentoo.org): latch WIP in status, and * delay before clearing it ? */ - ret = sandbox_erase_part(sbsf, erase_cmd->size); + ret = sandbox_erase_part(sbsf, sbsf->erase_size); sbsf->status &= ~STAT_WEL; if (ret) { debug("sandbox_sf: Erase failed\n"); diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index ac886fd..453edf0 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -68,9 +68,12 @@ const struct spi_flash_params spi_flash_params_table[] = { {"M25P40", 0x202013, 0x0, 64 * 1024, 8, 0, 0}, {"M25P80", 0x202014, 0x0, 64 * 1024, 16, 0, 0}, {"M25P16", 0x202015, 0x0, 64 * 1024, 32, 0, 0}, + {"M25PE16", 0x208015, 0x1000, 64 * 1024, 32, 0, 0}, + {"M25PX16", 0x207115, 0x1000, 64 * 1024, 32, RD_EXTN, 0}, {"M25P32", 0x202016, 0x0, 64 * 1024, 64, 0, 0}, {"M25P64", 0x202017, 0x0, 64 * 1024, 128, 0, 0}, {"M25P128", 0x202018, 0x0, 256 * 1024, 64, 0, 0}, + {"M25PX64", 0x207117, 0x0, 64 * 1024, 128, 0, SECT_4K}, {"N25Q32", 0x20ba16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, {"N25Q32A", 0x20bb16, 0x0, 64 * 1024, 64, RD_FULL, WR_QPP | SECT_4K}, {"N25Q64", 0x20ba17, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K}, @@ -116,6 +119,7 @@ const struct spi_flash_params spi_flash_params_table[] = { {"W25Q64DW", 0xef6017, 0x0, 64 * 1024, 128, RD_FULL, WR_QPP | SECT_4K}, {"W25Q128FW", 0xef6018, 0x0, 64 * 1024, 256, RD_FULL, WR_QPP | SECT_4K}, #endif + {}, /* Empty entry to terminate the list */ /* * Note: * Below paired flash devices has similar spi_flash params. diff --git a/drivers/mtd/spi/spi_spl_load.c b/drivers/mtd/spi/spi_spl_load.c index 1954b7e..59cca0f 100644 --- a/drivers/mtd/spi/spi_spl_load.c +++ b/drivers/mtd/spi/spi_spl_load.c @@ -56,8 +56,10 @@ void spl_spi_load_image(void) * Load U-Boot image from SPI flash into RAM */ - flash = spi_flash_probe(CONFIG_SPL_SPI_BUS, CONFIG_SPL_SPI_CS, - CONFIG_SF_DEFAULT_SPEED, SPI_MODE_3); + flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS, + CONFIG_SF_DEFAULT_CS, + CONFIG_SF_DEFAULT_SPEED, + CONFIG_SF_DEFAULT_MODE); if (!flash) { puts("SPI probe failed.\n"); hang(); diff --git a/drivers/mtd/ubi/attach.c b/drivers/mtd/ubi/attach.c index 9fce02e..1bdbfa7 100644 --- a/drivers/mtd/ubi/attach.c +++ b/drivers/mtd/ubi/attach.c @@ -70,7 +70,6 @@ * o Otherwise this is corruption type 2. */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c index ff8bf0c..584cf5f 100644 --- a/drivers/mtd/ubi/build.c +++ b/drivers/mtd/ubi/build.c @@ -17,7 +17,6 @@ * later using the "UBI control device". */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/mtd/ubi/crc32.c b/drivers/mtd/ubi/crc32.c index 0d65bf4..9c54ea4 100644 --- a/drivers/mtd/ubi/crc32.c +++ b/drivers/mtd/ubi/crc32.c @@ -20,7 +20,6 @@ * Version 2. See the file COPYING for more details. */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/mtd/ubi/debug.c b/drivers/mtd/ubi/debug.c index af254da..6dcc4e4 100644 --- a/drivers/mtd/ubi/debug.c +++ b/drivers/mtd/ubi/debug.c @@ -8,7 +8,6 @@ #include #include "ubi.h" -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/mtd/ubi/debug.h b/drivers/mtd/ubi/debug.h index 980eb11..bfa9dfb 100644 --- a/drivers/mtd/ubi/debug.h +++ b/drivers/mtd/ubi/debug.h @@ -13,7 +13,6 @@ void ubi_dump_flash(struct ubi_device *ubi, int pnum, int offset, int len); void ubi_dump_ec_hdr(const struct ubi_ec_hdr *ec_hdr); void ubi_dump_vid_hdr(const struct ubi_vid_hdr *vid_hdr); -#define __UBOOT__ #ifndef __UBOOT__ #include #endif diff --git a/drivers/mtd/ubi/eba.c b/drivers/mtd/ubi/eba.c index 3c2a7e6..fce0ff8 100644 --- a/drivers/mtd/ubi/eba.c +++ b/drivers/mtd/ubi/eba.c @@ -29,7 +29,6 @@ * 64 bits is enough to never overflow. */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/mtd/ubi/fastmap.c b/drivers/mtd/ubi/fastmap.c index 787522f..a2166e4 100644 --- a/drivers/mtd/ubi/fastmap.c +++ b/drivers/mtd/ubi/fastmap.c @@ -6,7 +6,6 @@ * */ -#define __UBOOT__ #ifndef __UBOOT__ #include #else diff --git a/drivers/mtd/ubi/io.c b/drivers/mtd/ubi/io.c index 41d7eb7..0e2e933 100644 --- a/drivers/mtd/ubi/io.c +++ b/drivers/mtd/ubi/io.c @@ -73,7 +73,6 @@ * back and writes the whole sub-page. */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/mtd/ubi/kapi.c b/drivers/mtd/ubi/kapi.c index 0183c93..fd2bbd6 100644 --- a/drivers/mtd/ubi/kapi.c +++ b/drivers/mtd/ubi/kapi.c @@ -8,7 +8,6 @@ /* This file mostly implements UBI kernel API functions */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/mtd/ubi/ubi.h b/drivers/mtd/ubi/ubi.h index 20fd704..754b337 100644 --- a/drivers/mtd/ubi/ubi.h +++ b/drivers/mtd/ubi/ubi.h @@ -10,7 +10,6 @@ #ifndef __UBI_UBI_H__ #define __UBI_UBI_H__ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/mtd/ubi/upd.c b/drivers/mtd/ubi/upd.c index 220c120..c52c9ce 100644 --- a/drivers/mtd/ubi/upd.c +++ b/drivers/mtd/ubi/upd.c @@ -26,7 +26,6 @@ * transaction with a roll-back capability. */ -#define __UBOOT__ #ifndef __UBOOT__ #include #else diff --git a/drivers/mtd/ubi/vmt.c b/drivers/mtd/ubi/vmt.c index d9665a4..f4392f5 100644 --- a/drivers/mtd/ubi/vmt.c +++ b/drivers/mtd/ubi/vmt.c @@ -11,7 +11,6 @@ * resizing. */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/mtd/ubi/vtbl.c b/drivers/mtd/ubi/vtbl.c index e6c8f5b..ae8ea38 100644 --- a/drivers/mtd/ubi/vtbl.c +++ b/drivers/mtd/ubi/vtbl.c @@ -43,7 +43,6 @@ * damaged. */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/mtd/ubi/wl.c b/drivers/mtd/ubi/wl.c index 1023090..6886f89 100644 --- a/drivers/mtd/ubi/wl.c +++ b/drivers/mtd/ubi/wl.c @@ -86,7 +86,6 @@ * room for future re-works of the WL sub-system. */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/net/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c index 0eba57c..6e8765c 100644 --- a/drivers/net/e1000.c +++ b/drivers/net/e1000.c @@ -5362,7 +5362,9 @@ e1000_initialize(bd_t * bis) hw->autoneg_failed = 0; hw->autoneg = 1; hw->get_link_status = true; +#ifndef CONFIG_E1000_NO_NVM hw->eeprom_semaphore_present = true; +#endif hw->hw_addr = pci_map_bar(devno, PCI_BASE_ADDRESS_0, PCI_REGION_MEM); hw->mac_type = e1000_undefined; diff --git a/drivers/net/ethoc.c b/drivers/net/ethoc.c index af06d4f..46c82bb 100644 --- a/drivers/net/ethoc.c +++ b/drivers/net/ethoc.c @@ -189,12 +189,12 @@ struct ethoc_bd { u32 addr; }; -static inline u32 ethoc_read(struct eth_device *dev, loff_t offset) +static inline u32 ethoc_read(struct eth_device *dev, size_t offset) { return readl(dev->iobase + offset); } -static inline void ethoc_write(struct eth_device *dev, loff_t offset, u32 data) +static inline void ethoc_write(struct eth_device *dev, size_t offset, u32 data) { writel(data, dev->iobase + offset); } @@ -202,7 +202,7 @@ static inline void ethoc_write(struct eth_device *dev, loff_t offset, u32 data) static inline void ethoc_read_bd(struct eth_device *dev, int index, struct ethoc_bd *bd) { - loff_t offset = ETHOC_BD_BASE + (index * sizeof(struct ethoc_bd)); + size_t offset = ETHOC_BD_BASE + (index * sizeof(struct ethoc_bd)); bd->stat = ethoc_read(dev, offset + 0); bd->addr = ethoc_read(dev, offset + 4); } @@ -210,7 +210,7 @@ static inline void ethoc_read_bd(struct eth_device *dev, int index, static inline void ethoc_write_bd(struct eth_device *dev, int index, const struct ethoc_bd *bd) { - loff_t offset = ETHOC_BD_BASE + (index * sizeof(struct ethoc_bd)); + size_t offset = ETHOC_BD_BASE + (index * sizeof(struct ethoc_bd)); ethoc_write(dev, offset + 0, bd->stat); ethoc_write(dev, offset + 4, bd->addr); } diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 4cefda4..e92a054 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -28,6 +28,14 @@ DECLARE_GLOBAL_DATA_PTR; */ #define FEC_XFER_TIMEOUT 5000 +/* + * The standard 32-byte DMA alignment does not work on mx6solox, which requires + * 64-byte alignment in the DMA RX FEC buffer. + * Introduce the FEC_DMA_RX_MINALIGN which can cover mx6solox needs and also + * satisfies the alignment on other SoCs (32-bytes) + */ +#define FEC_DMA_RX_MINALIGN 64 + #ifndef CONFIG_MII #error "CONFIG_MII has to be defined!" #endif @@ -711,13 +719,37 @@ static int fec_send(struct eth_device *dev, void *packet, int length) break; } - if (!timeout) + if (!timeout) { ret = -EINVAL; + goto out; + } - invalidate_dcache_range(addr, addr + size); - if (readw(&fec->tbd_base[fec->tbd_index].status) & FEC_TBD_READY) + /* + * The TDAR bit is cleared when the descriptors are all out from TX + * but on mx6solox we noticed that the READY bit is still not cleared + * right after TDAR. + * These are two distinct signals, and in IC simulation, we found that + * TDAR always gets cleared prior than the READY bit of last BD becomes + * cleared. + * In mx6solox, we use a later version of FEC IP. It looks like that + * this intrinsic behaviour of TDAR bit has changed in this newer FEC + * version. + * + * Fix this by polling the READY bit of BD after the TDAR polling, + * which covers the mx6solox case and does not harm the other SoCs. + */ + timeout = FEC_XFER_TIMEOUT; + while (--timeout) { + invalidate_dcache_range(addr, addr + size); + if (!(readw(&fec->tbd_base[fec->tbd_index].status) & + FEC_TBD_READY)) + break; + } + + if (!timeout) ret = -EINVAL; +out: debug("fec_send: status 0x%x index %d ret %i\n", readw(&fec->tbd_base[fec->tbd_index].status), fec->tbd_index, ret); @@ -881,9 +913,9 @@ static int fec_alloc_descs(struct fec_priv *fec) /* Allocate RX buffers. */ /* Maximum RX buffer size. */ - size = roundup(FEC_MAX_PKT_SIZE, ARCH_DMA_MINALIGN); + size = roundup(FEC_MAX_PKT_SIZE, FEC_DMA_RX_MINALIGN); for (i = 0; i < FEC_RBD_NUM; i++) { - data = memalign(ARCH_DMA_MINALIGN, size); + data = memalign(FEC_DMA_RX_MINALIGN, size); if (!data) { printf("%s: error allocating rxbuf %d\n", __func__, i); goto err_ring; @@ -1001,10 +1033,12 @@ static int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr, eth_register(edev); if (fec_get_hwaddr(edev, dev_id, ethaddr) == 0) { + char buf[16]; debug("got MAC%d address from fuse: %pM\n", dev_id, ethaddr); memcpy(edev->enetaddr, ethaddr, 6); - if (!getenv("ethaddr")) - eth_setenv_enetaddr("ethaddr", ethaddr); + sprintf(buf, (dev_id > 0) ? "eth%daddr" : "ethaddr", dev_id); + if (!getenv(buf)) + eth_setenv_enetaddr(buf, ethaddr); } return ret; err4: diff --git a/drivers/net/fm/dtsec.c b/drivers/net/fm/dtsec.c index 78bbd43..8d3dc0e 100644 --- a/drivers/net/fm/dtsec.c +++ b/drivers/net/fm/dtsec.c @@ -7,7 +7,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/net/fm/fm.h b/drivers/net/fm/fm.h index 316e06e..a9691c6 100644 --- a/drivers/net/fm/fm.h +++ b/drivers/net/fm/fm.h @@ -8,8 +8,8 @@ #define __FM_H__ #include +#include #include -#include #include /* Port ID */ diff --git a/drivers/net/fm/init.c b/drivers/net/fm/init.c index ff04695..6cf21c6 100644 --- a/drivers/net/fm/init.c +++ b/drivers/net/fm/init.c @@ -6,6 +6,7 @@ #include #include #include +#include #include "fm.h" diff --git a/drivers/net/fm/memac.c b/drivers/net/fm/memac.c index 592a67f..9499290 100644 --- a/drivers/net/fm/memac.c +++ b/drivers/net/fm/memac.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include "fm.h" diff --git a/drivers/net/fm/t1040.c b/drivers/net/fm/t1040.c index bcc871d..4cce46d 100644 --- a/drivers/net/fm/t1040.c +++ b/drivers/net/fm/t1040.c @@ -49,8 +49,6 @@ phy_interface_t fman_port_enet_if(enum fm_port port) else if ((rcwsr13 & FSL_CORENET_RCWSR13_EC2) == FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_MII) return PHY_INTERFACE_MODE_MII; - else - return PHY_INTERFACE_MODE_NONE; } switch (port) { diff --git a/drivers/net/fm/tgec.c b/drivers/net/fm/tgec.c index f450f80..5017123 100644 --- a/drivers/net/fm/tgec.c +++ b/drivers/net/fm/tgec.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include "fm.h" diff --git a/drivers/net/fsl_mdio.c b/drivers/net/fsl_mdio.c index 1d88e65..d6b181b 100644 --- a/drivers/net/fsl_mdio.c +++ b/drivers/net/fsl_mdio.c @@ -11,7 +11,6 @@ #include #include #include -#include void tsec_local_mdio_write(struct tsec_mii_mng __iomem *phyregs, int port_addr, int dev_addr, int regnum, int value) @@ -20,7 +19,8 @@ void tsec_local_mdio_write(struct tsec_mii_mng __iomem *phyregs, int port_addr, out_be32(&phyregs->miimadd, (port_addr << 8) | (regnum & 0x1f)); out_be32(&phyregs->miimcon, value); - asm("sync"); + /* Memory barrier */ + mb(); while ((in_be32(&phyregs->miimind) & MIIMIND_BUSY) && timeout--) ; @@ -38,11 +38,13 @@ int tsec_local_mdio_read(struct tsec_mii_mng __iomem *phyregs, int port_addr, /* Clear the command register, and wait */ out_be32(&phyregs->miimcom, 0); - asm("sync"); + /* Memory barrier */ + mb(); /* Initiate a read command, and wait */ out_be32(&phyregs->miimcom, MIIMCOM_READ_CYCLE); - asm("sync"); + /* Memory barrier */ + mb(); /* Wait for the the indication that the read is done */ while ((in_be32(&phyregs->miimind) & (MIIMIND_NOTVALID | MIIMIND_BUSY)) diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c index f95c928..d22b722 100644 --- a/drivers/net/keystone_net.c +++ b/drivers/net/keystone_net.c @@ -290,13 +290,12 @@ int mac_sl_reset(u32 port) return GMACSL_RET_INVALID_PORT; /* Set the soft reset bit */ - DEVICE_REG32_W(DEVICE_EMACSL_BASE(port) + - CPGMACSL_REG_RESET, CPGMAC_REG_RESET_VAL_RESET); + writel(CPGMAC_REG_RESET_VAL_RESET, + DEVICE_EMACSL_BASE(port) + CPGMACSL_REG_RESET); /* Wait for the bit to clear */ for (i = 0; i < DEVICE_EMACSL_RESET_POLL_COUNT; i++) { - v = DEVICE_REG32_R(DEVICE_EMACSL_BASE(port) + - CPGMACSL_REG_RESET); + v = readl(DEVICE_EMACSL_BASE(port) + CPGMACSL_REG_RESET); if ((v & CPGMAC_REG_RESET_VAL_RESET_MASK) != CPGMAC_REG_RESET_VAL_RESET) return GMACSL_RET_OK; @@ -321,8 +320,7 @@ int mac_sl_config(u_int16_t port, struct mac_sl_cfg *cfg) /* Must wait if the device is undergoing reset */ for (i = 0; i < DEVICE_EMACSL_RESET_POLL_COUNT; i++) { - v = DEVICE_REG32_R(DEVICE_EMACSL_BASE(port) + - CPGMACSL_REG_RESET); + v = readl(DEVICE_EMACSL_BASE(port) + CPGMACSL_REG_RESET); if ((v & CPGMAC_REG_RESET_VAL_RESET_MASK) != CPGMAC_REG_RESET_VAL_RESET) break; @@ -331,11 +329,8 @@ int mac_sl_config(u_int16_t port, struct mac_sl_cfg *cfg) if (i == DEVICE_EMACSL_RESET_POLL_COUNT) return GMACSL_RET_CONFIG_FAIL_RESET_ACTIVE; - DEVICE_REG32_W(DEVICE_EMACSL_BASE(port) + CPGMACSL_REG_MAXLEN, - cfg->max_rx_len); - - DEVICE_REG32_W(DEVICE_EMACSL_BASE(port) + CPGMACSL_REG_CTL, - cfg->ctl); + writel(cfg->max_rx_len, DEVICE_EMACSL_BASE(port) + CPGMACSL_REG_MAXLEN); + writel(cfg->ctl, DEVICE_EMACSL_BASE(port) + CPGMACSL_REG_CTL); return ret; } @@ -345,24 +340,24 @@ int ethss_config(u32 ctl, u32 max_pkt_size) u32 i; /* Max length register */ - DEVICE_REG32_W(DEVICE_CPSW_BASE + CPSW_REG_MAXLEN, max_pkt_size); + writel(max_pkt_size, DEVICE_CPSW_BASE + CPSW_REG_MAXLEN); /* Control register */ - DEVICE_REG32_W(DEVICE_CPSW_BASE + CPSW_REG_CTL, ctl); + writel(ctl, DEVICE_CPSW_BASE + CPSW_REG_CTL); /* All statistics enabled by default */ - DEVICE_REG32_W(DEVICE_CPSW_BASE + CPSW_REG_STAT_PORT_EN, - CPSW_REG_VAL_STAT_ENABLE_ALL); + writel(CPSW_REG_VAL_STAT_ENABLE_ALL, + DEVICE_CPSW_BASE + CPSW_REG_STAT_PORT_EN); /* Reset and enable the ALE */ - DEVICE_REG32_W(DEVICE_CPSW_BASE + CPSW_REG_ALE_CONTROL, - CPSW_REG_VAL_ALE_CTL_RESET_AND_ENABLE | - CPSW_REG_VAL_ALE_CTL_BYPASS); + writel(CPSW_REG_VAL_ALE_CTL_RESET_AND_ENABLE | + CPSW_REG_VAL_ALE_CTL_BYPASS, + DEVICE_CPSW_BASE + CPSW_REG_ALE_CONTROL); /* All ports put into forward mode */ for (i = 0; i < DEVICE_CPSW_NUM_PORTS; i++) - DEVICE_REG32_W(DEVICE_CPSW_BASE + CPSW_REG_ALE_PORTCTL(i), - CPSW_REG_VAL_PORTCTL_FORWARD_MODE); + writel(CPSW_REG_VAL_PORTCTL_FORWARD_MODE, + DEVICE_CPSW_BASE + CPSW_REG_ALE_PORTCTL(i)); return 0; } diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c index d040ab1..c3ce175 100644 --- a/drivers/net/rtl8169.c +++ b/drivers/net/rtl8169.c @@ -469,7 +469,6 @@ static int rtl_recv(struct eth_device *dev) rtl_inval_buffer(tpc->RxBufferRing[cur_rx], length); memcpy(rxdata, tpc->RxBufferRing[cur_rx], length); - NetReceive(rxdata, length); if (cur_rx == NUM_RX_DESC - 1) tpc->RxDescArray[cur_rx].status = @@ -480,6 +479,8 @@ static int rtl_recv(struct eth_device *dev) tpc->RxDescArray[cur_rx].buf_addr = cpu_to_le32(bus_to_phys(tpc->RxBufferRing[cur_rx])); rtl_flush_rx_desc(&tpc->RxDescArray[cur_rx]); + + NetReceive(rxdata, length); } else { puts("Error Rx"); } diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index e9138f0..79d6561 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -20,6 +20,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -270,6 +271,9 @@ void redundant_init(struct eth_device *dev) out_be32(®s->tstat, TSTAT_CLEAR_THALT); out_be32(®s->rstat, RSTAT_CLEAR_RHALT); clrbits_be32(®s->dmactrl, DMACTRL_GRS | DMACTRL_GTS); +#ifdef CONFIG_LS102XA + setbits_be32(®s->dmactrl, DMACTRL_LE); +#endif do { uint16_t status; @@ -366,6 +370,9 @@ static void startup_tsec(struct eth_device *dev) out_be32(®s->tstat, TSTAT_CLEAR_THALT); out_be32(®s->rstat, RSTAT_CLEAR_RHALT); clrbits_be32(®s->dmactrl, DMACTRL_GRS | DMACTRL_GTS); +#ifdef CONFIG_LS102XA + setbits_be32(®s->dmactrl, DMACTRL_LE); +#endif } /* This returns the status bits of the device. The return value diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/pci/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 4fd9c53..28859f3 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -648,6 +648,10 @@ int pci_hose_scan_bus(struct pci_controller *hose, int bus) pci_hose_read_config_word(hose, dev, PCI_DEVICE_ID, &device); pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class); +#ifdef CONFIG_PCI_FIXUP_DEV + board_pci_fixup_dev(hose, dev, vendor, device, class); +#endif + #ifdef CONFIG_PCI_SCAN_SHOW indent++; diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c index a3982c4..fd7e4d4 100644 --- a/drivers/pci/pcie_imx.c +++ b/drivers/pci/pcie_imx.c @@ -23,13 +23,20 @@ #define PCI_ACCESS_READ 0 #define PCI_ACCESS_WRITE 1 +#ifdef CONFIG_MX6SX +#define MX6_DBI_ADDR 0x08ffc000 +#define MX6_IO_ADDR 0x08000000 +#define MX6_MEM_ADDR 0x08100000 +#define MX6_ROOT_ADDR 0x08f00000 +#else #define MX6_DBI_ADDR 0x01ffc000 -#define MX6_DBI_SIZE 0x4000 #define MX6_IO_ADDR 0x01000000 -#define MX6_IO_SIZE 0x100000 #define MX6_MEM_ADDR 0x01100000 -#define MX6_MEM_SIZE 0xe00000 #define MX6_ROOT_ADDR 0x01f00000 +#endif +#define MX6_DBI_SIZE 0x4000 +#define MX6_IO_SIZE 0x100000 +#define MX6_MEM_SIZE 0xe00000 #define MX6_ROOT_SIZE 0xfc000 /* PCIe Port Logic registers (memory-mapped) */ @@ -57,6 +64,8 @@ #define PHY_RX_OVRD_IN_LO_RX_DATA_EN (1 << 5) #define PHY_RX_OVRD_IN_LO_RX_PLL_EN (1 << 3) +#define PCIE_PHY_PUP_REQ (1 << 7) + /* iATU registers */ #define PCIE_ATU_VIEWPORT 0x900 #define PCIE_ATU_REGION_INBOUND (0x1 << 31) @@ -421,9 +430,19 @@ static int imx_pcie_write_config(struct pci_controller *hose, pci_dev_t d, static int imx6_pcie_assert_core_reset(void) { struct iomuxc *iomuxc_regs = (struct iomuxc *)IOMUXC_BASE_ADDR; - +#if defined(CONFIG_MX6SX) + struct gpc *gpc_regs = (struct gpc *)GPC_BASE_ADDR; + + /* SSP_EN is not used on MX6SX anymore */ + setbits_le32(&iomuxc_regs->gpr[12], IOMUXC_GPR12_TEST_POWERDOWN); + /* Force PCIe PHY reset */ + setbits_le32(&iomuxc_regs->gpr[5], IOMUXC_GPR5_PCIE_BTNRST); + /* Power up PCIe PHY */ + setbits_le32(&gpc_regs->cntr, PCIE_PHY_PUP_REQ); +#else setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN); clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN); +#endif return 0; } @@ -441,6 +460,12 @@ static int imx6_pcie_init_phy(void) IOMUXC_GPR12_LOS_LEVEL_MASK, IOMUXC_GPR12_LOS_LEVEL_9); +#ifdef CONFIG_MX6SX + clrsetbits_le32(&iomuxc_regs->gpr[12], + IOMUXC_GPR12_RX_EQ_MASK, + IOMUXC_GPR12_RX_EQ_2); +#endif + writel((0x0 << IOMUXC_GPR8_PCS_TX_DEEMPH_GEN1_OFFSET) | (0x0 << IOMUXC_GPR8_PCS_TX_DEEMPH_GEN2_3P5DB_OFFSET) | (20 << IOMUXC_GPR8_PCS_TX_DEEMPH_GEN2_6DB_OFFSET) | @@ -517,9 +542,16 @@ static int imx6_pcie_deassert_core_reset(void) */ mdelay(50); +#if defined(CONFIG_MX6SX) + /* SSP_EN is not used on MX6SX anymore */ + clrbits_le32(&iomuxc_regs->gpr[12], IOMUXC_GPR12_TEST_POWERDOWN); + /* Clear PCIe PHY reset bit */ + clrbits_le32(&iomuxc_regs->gpr[5], IOMUXC_GPR5_PCIE_BTNRST); +#else /* Enable PCIe */ clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN); setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN); +#endif imx6_pcie_toggle_reset(); diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/pcmcia/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/power/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/pwm/pwm-imx-util.c b/drivers/pwm/pwm-imx-util.c index f1d0b35..6570903 100644 --- a/drivers/pwm/pwm-imx-util.c +++ b/drivers/pwm/pwm-imx-util.c @@ -56,7 +56,7 @@ int pwm_imx_get_parms(int period_ns, int duty_ns, unsigned long *period_c, *prescale = *period_c / 0x10000 + 1; *period_c /= *prescale; - c = (unsigned long long)(*period_c * duty_ns); + c = ((unsigned long long)*period_c) * duty_ns; do_div(c, period_ns); *duty_c = c; diff --git a/drivers/qe/uec.h b/drivers/qe/uec.h index 48a1634..6b559f7 100644 --- a/drivers/qe/uec.h +++ b/drivers/qe/uec.h @@ -13,7 +13,6 @@ #include "qe.h" #include "uccf.h" #include -#include #define MAX_TX_THREADS 8 #define MAX_RX_THREADS 8 diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/rtc/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/serial/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 571c18f..853a8c6 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -5,7 +5,12 @@ # SPDX-License-Identifier: GPL-2.0+ # +ifdef CONFIG_DM_SERIAL +obj-y += serial-uclass.o +else obj-y += serial.o +obj-$(CONFIG_SYS_NS16550_SERIAL) += serial_ns16550.o +endif obj-$(CONFIG_ALTERA_UART) += altera_uart.o obj-$(CONFIG_ALTERA_JTAG_UART) += altera_jtag_uart.o @@ -16,7 +21,6 @@ obj-$(CONFIG_MCFUART) += mcfuart.o obj-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o obj-$(CONFIG_SYS_NS16550) += ns16550.o obj-$(CONFIG_S5P) += serial_s5p.o -obj-$(CONFIG_SYS_NS16550_SERIAL) += serial_ns16550.o obj-$(CONFIG_IMX_SERIAL) += serial_imx.o obj-$(CONFIG_KS8695_SERIAL) += serial_ks8695.o obj-$(CONFIG_MAX3100_SERIAL) += serial_max3100.o @@ -34,6 +38,7 @@ obj-$(CONFIG_BFIN_SERIAL) += serial_bfin.o obj-$(CONFIG_FSL_LPUART) += serial_lpuart.o obj-$(CONFIG_MXS_AUART) += mxs_auart.o obj-$(CONFIG_ARC_SERIAL) += serial_arc.o +obj-$(CONFIG_TEGRA_SERIAL) += serial_tegra.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_USB_TTY) += usbtty.o diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 079f67d..63a9ef6 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -4,18 +4,26 @@ * modified to use CONFIG_SYS_ISA_MEM and new defines */ -#include +#include +#include +#include +#include #include +#include #include #include #include +DECLARE_GLOBAL_DATA_PTR; + #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */ #define UART_MCRVAL (UART_MCR_DTR | \ UART_MCR_RTS) /* RTS/DTR */ #define UART_FCRVAL (UART_FCR_FIFO_EN | \ UART_FCR_RXSR | \ UART_FCR_TXSR) /* Clear & enable FIFOs */ + +#ifndef CONFIG_DM_SERIAL #ifdef CONFIG_SYS_NS16550_PORT_MAPPED #define serial_out(x, y) outb(x, (ulong)y) #define serial_in(y) inb((ulong)y) @@ -29,6 +37,7 @@ #define serial_out(x, y) writeb(x, y) #define serial_in(y) readb(y) #endif +#endif /* !CONFIG_DM_SERIAL */ #if defined(CONFIG_SOC_KEYSTONE) #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0 @@ -45,6 +54,82 @@ #define CONFIG_SYS_NS16550_IER 0x00 #endif /* CONFIG_SYS_NS16550_IER */ +#ifdef CONFIG_DM_SERIAL +static void ns16550_writeb(NS16550_t port, int offset, int value) +{ + struct ns16550_platdata *plat = port->plat; + unsigned char *addr; + + offset *= 1 << plat->reg_shift; + addr = plat->base + offset; + /* + * As far as we know it doesn't make sense to support selection of + * these options at run-time, so use the existing CONFIG options. + */ +#ifdef CONFIG_SYS_NS16550_PORT_MAPPED + outb(value, addr); +#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) + out_le32(addr, value); +#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) + out_be32(addr, value); +#elif defined(CONFIG_SYS_BIG_ENDIAN) + writeb(value, addr + (1 << plat->reg_shift) - 1); +#else + writeb(value, addr); +#endif +} + +static int ns16550_readb(NS16550_t port, int offset) +{ + struct ns16550_platdata *plat = port->plat; + unsigned char *addr; + + offset *= 1 << plat->reg_shift; + addr = plat->base + offset; +#ifdef CONFIG_SYS_NS16550_PORT_MAPPED + return inb(addr); +#elif defined(CONFIG_SYS_NS16550_MEM32) && !defined(CONFIG_SYS_BIG_ENDIAN) + return in_le32(addr); +#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) + return in_be32(addr); +#elif defined(CONFIG_SYS_BIG_ENDIAN) + return readb(addr + (1 << plat->reg_shift) - 1); +#else + return readb(addr); +#endif +} + +/* We can clean these up once everything is moved to driver model */ +#define serial_out(value, addr) \ + ns16550_writeb(com_port, addr - (unsigned char *)com_port, value) +#define serial_in(addr) \ + ns16550_readb(com_port, addr - (unsigned char *)com_port) +#endif + +int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate) +{ + const unsigned int mode_x_div = 16; + +#ifdef CONFIG_OMAP1510 + /* If can't cleanly clock 115200 set div to 1 */ + if ((clock == 12000000) && (baudrate == 115200)) { + port->osc_12m_sel = OSC_12M_SEL; /* enable 6.5 * divisor */ + return 1; /* return 1 for base divisor */ + } + port->osc_12m_sel = 0; /* clear if previsouly set */ +#endif + + return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate); +} + +static void NS16550_setbrg(NS16550_t com_port, int baud_divisor) +{ + serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); + serial_out(baud_divisor & 0xff, &com_port->dll); + serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); + serial_out(UART_LCRVAL, &com_port->lcr); +} + void NS16550_init(NS16550_t com_port, int baud_divisor) { #if (defined(CONFIG_SPL_BUILD) && defined(CONFIG_OMAP34XX)) @@ -55,10 +140,8 @@ void NS16550_init(NS16550_t com_port, int baud_divisor) */ if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE)) == UART_LSR_THRE) { - serial_out(UART_LCR_DLAB, &com_port->lcr); - serial_out(baud_divisor & 0xff, &com_port->dll); - serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); - serial_out(UART_LCRVAL, &com_port->lcr); + if (baud_divisor != -1) + NS16550_setbrg(com_port, baud_divisor); serial_out(0, &com_port->mdr1); } #endif @@ -71,16 +154,11 @@ void NS16550_init(NS16550_t com_port, int baud_divisor) defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ #endif - serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); - serial_out(0, &com_port->dll); - serial_out(0, &com_port->dlm); - serial_out(UART_LCRVAL, &com_port->lcr); + NS16550_setbrg(com_port, 0); serial_out(UART_MCRVAL, &com_port->mcr); serial_out(UART_FCRVAL, &com_port->fcr); - serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); - serial_out(baud_divisor & 0xff, &com_port->dll); - serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); - serial_out(UART_LCRVAL, &com_port->lcr); + if (baud_divisor != -1) + NS16550_setbrg(com_port, baud_divisor); #if defined(CONFIG_OMAP) || \ defined(CONFIG_AM33XX) || defined(CONFIG_SOC_DA8XX) || \ defined(CONFIG_TI81XX) || defined(CONFIG_AM43XX) @@ -97,16 +175,10 @@ void NS16550_init(NS16550_t com_port, int baud_divisor) void NS16550_reinit(NS16550_t com_port, int baud_divisor) { serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier); - serial_out(UART_LCR_BKSE | UART_LCRVAL, &com_port->lcr); - serial_out(0, &com_port->dll); - serial_out(0, &com_port->dlm); - serial_out(UART_LCRVAL, &com_port->lcr); + NS16550_setbrg(com_port, 0); serial_out(UART_MCRVAL, &com_port->mcr); serial_out(UART_FCRVAL, &com_port->fcr); - serial_out(UART_LCR_BKSE, &com_port->lcr); - serial_out(baud_divisor & 0xff, &com_port->dll); - serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); - serial_out(UART_LCRVAL, &com_port->lcr); + NS16550_setbrg(com_port, baud_divisor); } #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ @@ -145,3 +217,92 @@ int NS16550_tstc(NS16550_t com_port) } #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ + +#ifdef CONFIG_DM_SERIAL +static int ns16550_serial_putc(struct udevice *dev, const char ch) +{ + struct NS16550 *const com_port = dev_get_priv(dev); + + if (!(serial_in(&com_port->lsr) & UART_LSR_THRE)) + return -EAGAIN; + serial_out(ch, &com_port->thr); + + /* + * Call watchdog_reset() upon newline. This is done here in putc + * since the environment code uses a single puts() to print the complete + * environment upon "printenv". So we can't put this watchdog call + * in puts(). + */ + if (ch == '\n') + WATCHDOG_RESET(); + + return 0; +} + +static int ns16550_serial_pending(struct udevice *dev, bool input) +{ + struct NS16550 *const com_port = dev_get_priv(dev); + + if (input) + return serial_in(&com_port->lsr) & UART_LSR_DR ? 1 : 0; + else + return serial_in(&com_port->lsr) & UART_LSR_THRE ? 0 : 1; +} + +static int ns16550_serial_getc(struct udevice *dev) +{ + struct NS16550 *const com_port = dev_get_priv(dev); + + if (!serial_in(&com_port->lsr) & UART_LSR_DR) + return -EAGAIN; + + return serial_in(&com_port->rbr); +} + +static int ns16550_serial_setbrg(struct udevice *dev, int baudrate) +{ + struct NS16550 *const com_port = dev_get_priv(dev); + struct ns16550_platdata *plat = com_port->plat; + int clock_divisor; + + clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate); + + NS16550_setbrg(com_port, clock_divisor); + + return 0; +} + +int ns16550_serial_probe(struct udevice *dev) +{ + struct NS16550 *const com_port = dev_get_priv(dev); + + NS16550_init(com_port, -1); + + return 0; +} + +int ns16550_serial_ofdata_to_platdata(struct udevice *dev) +{ + struct NS16550 *const com_port = dev_get_priv(dev); + struct ns16550_platdata *plat = dev->platdata; + fdt_addr_t addr; + + addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg"); + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + plat->base = (unsigned char *)addr; + plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "reg-shift", 1); + com_port->plat = plat; + + return 0; +} + +const struct dm_serial_ops ns16550_serial_ops = { + .putc = ns16550_serial_putc, + .pending = ns16550_serial_pending, + .getc = ns16550_serial_getc, + .setbrg = ns16550_serial_setbrg, +}; +#endif /* CONFIG_DM_SERIAL */ diff --git a/drivers/serial/sandbox.c b/drivers/serial/sandbox.c index 51fd871..cd2f91e 100644 --- a/drivers/serial/sandbox.c +++ b/drivers/serial/sandbox.c @@ -11,12 +11,16 @@ */ #include +#include +#include #include #include #include #include #include +DECLARE_GLOBAL_DATA_PTR; + /* * * serial_buf: A buffer that holds keyboard characters for the @@ -30,27 +34,69 @@ static char serial_buf[16]; static unsigned int serial_buf_write; static unsigned int serial_buf_read; -static int sandbox_serial_init(void) +struct sandbox_serial_platdata { + int colour; /* Text colour to use for output, -1 for none */ +}; + +struct sandbox_serial_priv { + bool start_of_line; +}; + +/** + * output_ansi_colour() - Output an ANSI colour code + * + * @colour: Colour to output (0-7) + */ +static void output_ansi_colour(int colour) +{ + char ansi_code[] = "\x1b[1;3Xm"; + + ansi_code[5] = '0' + colour; + os_write(1, ansi_code, sizeof(ansi_code) - 1); +} + +static void output_ansi_reset(void) +{ + os_write(1, "\x1b[0m", 4); +} + +static int sandbox_serial_probe(struct udevice *dev) { struct sandbox_state *state = state_get_current(); + struct sandbox_serial_priv *priv = dev_get_priv(dev); if (state->term_raw != STATE_TERM_COOKED) os_tty_raw(0, state->term_raw == STATE_TERM_RAW_WITH_SIGS); + priv->start_of_line = 0; + return 0; } -static void sandbox_serial_setbrg(void) +static int sandbox_serial_remove(struct udevice *dev) { + struct sandbox_serial_platdata *plat = dev->platdata; + + if (plat->colour != -1) + output_ansi_reset(); + + return 0; } -static void sandbox_serial_putc(const char ch) +static int sandbox_serial_putc(struct udevice *dev, const char ch) { + struct sandbox_serial_priv *priv = dev_get_priv(dev); + struct sandbox_serial_platdata *plat = dev->platdata; + + if (priv->start_of_line && plat->colour != -1) { + priv->start_of_line = false; + output_ansi_colour(plat->colour); + } + os_write(1, &ch, 1); -} + if (ch == '\n') + priv->start_of_line = true; -static void sandbox_serial_puts(const char *str) -{ - os_write(1, str, strlen(str)); + return 0; } static unsigned int increment_buffer_index(unsigned int index) @@ -58,12 +104,15 @@ static unsigned int increment_buffer_index(unsigned int index) return (index + 1) % ARRAY_SIZE(serial_buf); } -static int sandbox_serial_tstc(void) +static int sandbox_serial_pending(struct udevice *dev, bool input) { const unsigned int next_index = increment_buffer_index(serial_buf_write); ssize_t count; + if (!input) + return 0; + os_usleep(100); #ifdef CONFIG_LCD lcd_sync(); @@ -74,38 +123,77 @@ static int sandbox_serial_tstc(void) count = os_read_no_block(0, &serial_buf[serial_buf_write], 1); if (count == 1) serial_buf_write = next_index; + return serial_buf_write != serial_buf_read; } -static int sandbox_serial_getc(void) +static int sandbox_serial_getc(struct udevice *dev) { int result; - while (!sandbox_serial_tstc()) - ; /* buffer empty */ + if (!sandbox_serial_pending(dev, true)) + return -EAGAIN; /* buffer empty */ result = serial_buf[serial_buf_read]; serial_buf_read = increment_buffer_index(serial_buf_read); return result; } -static struct serial_device sandbox_serial_drv = { - .name = "sandbox_serial", - .start = sandbox_serial_init, - .stop = NULL, - .setbrg = sandbox_serial_setbrg, - .putc = sandbox_serial_putc, - .puts = sandbox_serial_puts, - .getc = sandbox_serial_getc, - .tstc = sandbox_serial_tstc, +static const char * const ansi_colour[] = { + "black", "red", "green", "yellow", "blue", "megenta", "cyan", + "white", }; -void sandbox_serial_initialize(void) +static int sandbox_serial_ofdata_to_platdata(struct udevice *dev) { - serial_register(&sandbox_serial_drv); -} + struct sandbox_serial_platdata *plat = dev->platdata; + const char *colour; + int i; + + plat->colour = -1; + colour = fdt_getprop(gd->fdt_blob, dev->of_offset, + "sandbox,text-colour", NULL); + if (colour) { + for (i = 0; i < ARRAY_SIZE(ansi_colour); i++) { + if (!strcmp(colour, ansi_colour[i])) { + plat->colour = i; + break; + } + } + } -__weak struct serial_device *default_serial_console(void) -{ - return &sandbox_serial_drv; + return 0; } + +static const struct dm_serial_ops sandbox_serial_ops = { + .putc = sandbox_serial_putc, + .pending = sandbox_serial_pending, + .getc = sandbox_serial_getc, +}; + +static const struct udevice_id sandbox_serial_ids[] = { + { .compatible = "sandbox,serial" }, + { } +}; + +U_BOOT_DRIVER(serial_sandbox) = { + .name = "serial_sandbox", + .id = UCLASS_SERIAL, + .of_match = sandbox_serial_ids, + .ofdata_to_platdata = sandbox_serial_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct sandbox_serial_platdata), + .priv_auto_alloc_size = sizeof(struct sandbox_serial_priv), + .probe = sandbox_serial_probe, + .remove = sandbox_serial_remove, + .ops = &sandbox_serial_ops, + .flags = DM_FLAG_PRE_RELOC, +}; + +static const struct sandbox_serial_platdata platdata_non_fdt = { + .colour = -1, +}; + +U_BOOT_DEVICE(serial_sandbox_non_fdt) = { + .name = "serial_sandbox", + .platdata = &platdata_non_fdt, +}; diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c new file mode 100644 index 0000000..1ac943f --- /dev/null +++ b/drivers/serial/serial-uclass.c @@ -0,0 +1,214 @@ +/* + * Copyright (c) 2014 The Chromium OS Authors. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/* The currently-selected console serial device */ +struct udevice *cur_dev __attribute__ ((section(".data"))); + +#ifndef CONFIG_SYS_MALLOC_F_LEN +#error "Serial is required before relocation - define CONFIG_SYS_MALLOC_F_LEN to make this work" +#endif + +static void serial_find_console_or_panic(void) +{ +#ifdef CONFIG_OF_CONTROL + int node; + + /* Check for a chosen console */ + node = fdtdec_get_chosen_node(gd->fdt_blob, "stdout-path"); + if (node < 0) + node = fdtdec_get_alias_node(gd->fdt_blob, "console"); + if (!uclass_get_device_by_of_offset(UCLASS_SERIAL, node, &cur_dev)) + return; + + /* + * If the console is not marked to be bound before relocation, bind + * it anyway. + */ + if (node > 0 && + !lists_bind_fdt(gd->dm_root, gd->fdt_blob, node, &cur_dev)) { + if (!device_probe(cur_dev)) + return; + cur_dev = NULL; + } +#endif + /* + * Failing that, get the device with sequence number 0, or in extremis + * just the first serial device we can find. But we insist on having + * a console (even if it is silent). + */ + if (uclass_get_device_by_seq(UCLASS_SERIAL, 0, &cur_dev) && + (uclass_first_device(UCLASS_SERIAL, &cur_dev) || !cur_dev)) + panic("No serial driver found"); +} + +/* Called prior to relocation */ +int serial_init(void) +{ + serial_find_console_or_panic(); + gd->flags |= GD_FLG_SERIAL_READY; + + return 0; +} + +/* Called after relocation */ +void serial_initialize(void) +{ + serial_find_console_or_panic(); +} + +void serial_putc(char ch) +{ + struct dm_serial_ops *ops = serial_get_ops(cur_dev); + int err; + + do { + err = ops->putc(cur_dev, ch); + } while (err == -EAGAIN); + if (ch == '\n') + serial_putc('\r'); +} + +void serial_setbrg(void) +{ + struct dm_serial_ops *ops = serial_get_ops(cur_dev); + + if (ops->setbrg) + ops->setbrg(cur_dev, gd->baudrate); +} + +void serial_puts(const char *str) +{ + while (*str) + serial_putc(*str++); +} + +int serial_tstc(void) +{ + struct dm_serial_ops *ops = serial_get_ops(cur_dev); + + if (ops->pending) + return ops->pending(cur_dev, true); + + return 1; +} + +int serial_getc(void) +{ + struct dm_serial_ops *ops = serial_get_ops(cur_dev); + int err; + + do { + err = ops->getc(cur_dev); + } while (err == -EAGAIN); + + return err >= 0 ? err : 0; +} + +void serial_stdio_init(void) +{ +} + +void serial_stub_putc(struct stdio_dev *sdev, const char ch) +{ + struct udevice *dev = sdev->priv; + struct dm_serial_ops *ops = serial_get_ops(dev); + + ops->putc(dev, ch); +} + +void serial_stub_puts(struct stdio_dev *sdev, const char *str) +{ + while (*str) + serial_stub_putc(sdev, *str++); +} + +int serial_stub_getc(struct stdio_dev *sdev) +{ + struct udevice *dev = sdev->priv; + struct dm_serial_ops *ops = serial_get_ops(dev); + + int err; + + do { + err = ops->getc(dev); + } while (err == -EAGAIN); + + return err >= 0 ? err : 0; +} + +int serial_stub_tstc(struct stdio_dev *sdev) +{ + struct udevice *dev = sdev->priv; + struct dm_serial_ops *ops = serial_get_ops(dev); + + if (ops->pending) + return ops->pending(dev, true); + + return 1; +} + +static int serial_post_probe(struct udevice *dev) +{ + struct stdio_dev sdev; + struct dm_serial_ops *ops = serial_get_ops(dev); + struct serial_dev_priv *upriv = dev->uclass_priv; + int ret; + + /* Set the baud rate */ + if (ops->setbrg) { + ret = ops->setbrg(dev, gd->baudrate); + if (ret) + return ret; + } + + if (!(gd->flags & GD_FLG_RELOC)) + return 0; + + memset(&sdev, '\0', sizeof(sdev)); + + strncpy(sdev.name, dev->name, sizeof(sdev.name)); + sdev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_INPUT; + sdev.priv = dev; + sdev.putc = serial_stub_putc; + sdev.puts = serial_stub_puts; + sdev.getc = serial_stub_getc; + sdev.tstc = serial_stub_tstc; + stdio_register_dev(&sdev, &upriv->sdev); + + return 0; +} + +static int serial_pre_remove(struct udevice *dev) +{ +#ifdef CONFIG_SYS_STDIO_DEREGISTER + struct serial_dev_priv *upriv = dev->uclass_priv; + + if (stdio_deregister_dev(upriv->sdev)) + return -EPERM; +#endif + + return 0; +} + +UCLASS_DRIVER(serial) = { + .id = UCLASS_SERIAL, + .name = "serial", + .post_probe = serial_post_probe, + .pre_remove = serial_pre_remove, + .per_device_auto_alloc_size = sizeof(struct serial_dev_priv), +}; diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index d2eb752..bbe60af 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -320,6 +320,7 @@ void serial_stdio_init(void) dev.puts = serial_stub_puts; dev.getc = serial_stub_getc; dev.tstc = serial_stub_tstc; + dev.priv = s; stdio_register(&dev); diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c index da5f9a2..63fc388 100644 --- a/drivers/serial/serial_lpuart.c +++ b/drivers/serial/serial_lpuart.c @@ -14,13 +14,42 @@ #define US1_TDRE (1 << 7) #define US1_RDRF (1 << 5) +#define US1_OR (1 << 3) #define UC2_TE (1 << 3) #define UC2_RE (1 << 2) +#define CFIFO_TXFLUSH (1 << 7) +#define CFIFO_RXFLUSH (1 << 6) +#define SFIFO_RXOF (1 << 2) +#define SFIFO_RXUF (1 << 0) + +#define STAT_LBKDIF (1 << 31) +#define STAT_RXEDGIF (1 << 30) +#define STAT_TDRE (1 << 23) +#define STAT_RDRF (1 << 21) +#define STAT_IDLE (1 << 20) +#define STAT_OR (1 << 19) +#define STAT_NF (1 << 18) +#define STAT_FE (1 << 17) +#define STAT_PF (1 << 16) +#define STAT_MA1F (1 << 15) +#define STAT_MA2F (1 << 14) +#define STAT_FLAGS (STAT_LBKDIF | STAT_RXEDGIF | STAT_IDLE | STAT_OR | \ + STAT_NF | STAT_FE | STAT_PF | STAT_MA1F | STAT_MA2F) + +#define CTRL_TE (1 << 19) +#define CTRL_RE (1 << 18) + +#define FIFO_TXFE 0x80 +#define FIFO_RXFE 0x40 + +#define WATER_TXWATER_OFF 1 +#define WATER_RXWATER_OFF 16 DECLARE_GLOBAL_DATA_PTR; struct lpuart_fsl *base = (struct lpuart_fsl *)LPUART_BASE; +#ifndef CONFIG_LPUART_32B_REG static void lpuart_serial_setbrg(void) { u32 clk = mxc_get_clock(MXC_UART_CLK); @@ -38,14 +67,10 @@ static void lpuart_serial_setbrg(void) static int lpuart_serial_getc(void) { - u8 status; - - while (!(__raw_readb(&base->us1) & US1_RDRF)) + while (!(__raw_readb(&base->us1) & (US1_RDRF | US1_OR))) WATCHDOG_RESET(); - status = __raw_readb(&base->us1); - status |= US1_RDRF; - __raw_writeb(status, &base->us1); + barrier(); return __raw_readb(&base->ud); } @@ -88,6 +113,12 @@ static int lpuart_serial_init(void) __raw_writeb(0, &base->umodem); __raw_writeb(0, &base->uc1); + /* Disable FIFO and flush buffer */ + __raw_writeb(0x0, &base->upfifo); + __raw_writeb(0x0, &base->utwfifo); + __raw_writeb(0x1, &base->urwfifo); + __raw_writeb(CFIFO_TXFLUSH | CFIFO_RXFLUSH, &base->ucfifo); + /* provide data bits, parity, stop bit, etc */ serial_setbrg(); @@ -107,13 +138,107 @@ static struct serial_device lpuart_serial_drv = { .getc = lpuart_serial_getc, .tstc = lpuart_serial_tstc, }; +#else +static void lpuart32_serial_setbrg(void) +{ + u32 clk = CONFIG_SYS_CLK_FREQ; + u32 sbr; + + if (!gd->baudrate) + gd->baudrate = CONFIG_BAUDRATE; + + sbr = (clk / (16 * gd->baudrate)); + /* place adjustment later - n/32 BRFA */ + + out_be32(&base->baud, sbr); +} + +static int lpuart32_serial_getc(void) +{ + u32 stat; + + while (((stat = in_be32(&base->stat)) & STAT_RDRF) == 0) { + out_be32(&base->stat, STAT_FLAGS); + WATCHDOG_RESET(); + } + + return in_be32(&base->data) & 0x3ff; +} + +static void lpuart32_serial_putc(const char c) +{ + if (c == '\n') + serial_putc('\r'); + + while (!(in_be32(&base->stat) & STAT_TDRE)) + WATCHDOG_RESET(); + + out_be32(&base->data, c); +} + +/* + * Test whether a character is in the RX buffer + */ +static int lpuart32_serial_tstc(void) +{ + if ((in_be32(&base->water) >> 24) == 0) + return 0; + + return 1; +} + +/* + * Initialise the serial port with the given baudrate. The settings + * are always 8 data bits, no parity, 1 stop bit, no start bits. + */ +static int lpuart32_serial_init(void) +{ + u8 ctrl; + + ctrl = in_be32(&base->ctrl); + ctrl &= ~CTRL_RE; + ctrl &= ~CTRL_TE; + out_be32(&base->ctrl, ctrl); + + out_be32(&base->modir, 0); + out_be32(&base->fifo, ~(FIFO_TXFE | FIFO_RXFE)); + + out_be32(&base->match, 0); + /* provide data bits, parity, stop bit, etc */ + + serial_setbrg(); + + out_be32(&base->ctrl, CTRL_RE | CTRL_TE); + + return 0; +} + +static struct serial_device lpuart32_serial_drv = { + .name = "lpuart32_serial", + .start = lpuart32_serial_init, + .stop = NULL, + .setbrg = lpuart32_serial_setbrg, + .putc = lpuart32_serial_putc, + .puts = default_serial_puts, + .getc = lpuart32_serial_getc, + .tstc = lpuart32_serial_tstc, +}; +#endif void lpuart_serial_initialize(void) { +#ifdef CONFIG_LPUART_32B_REG + serial_register(&lpuart32_serial_drv); +#else serial_register(&lpuart_serial_drv); +#endif } __weak struct serial_device *default_serial_console(void) { +#ifdef CONFIG_LPUART_32B_REG + return &lpuart32_serial_drv; +#else return &lpuart_serial_drv; +#endif } diff --git a/drivers/serial/serial_ns16550.c b/drivers/serial/serial_ns16550.c index dafeed7..632da4c 100644 --- a/drivers/serial/serial_ns16550.c +++ b/drivers/serial/serial_ns16550.c @@ -81,7 +81,8 @@ static NS16550_t serial_ports[6] = { static int eserial##port##_init(void) \ { \ int clock_divisor; \ - clock_divisor = calc_divisor(serial_ports[port-1]); \ + clock_divisor = ns16550_calc_divisor(serial_ports[port-1], \ + CONFIG_SYS_NS16550_CLK, gd->baudrate); \ NS16550_init(serial_ports[port-1], clock_divisor); \ return 0 ; \ } \ @@ -118,14 +119,6 @@ static NS16550_t serial_ports[6] = { .puts = eserial##port##_puts, \ } -static int calc_divisor (NS16550_t port) -{ - const unsigned int mode_x_div = 16; - - return DIV_ROUND_CLOSEST(CONFIG_SYS_NS16550_CLK, - mode_x_div * gd->baudrate); -} - void _serial_putc(const char c,const int port) { @@ -167,7 +160,8 @@ _serial_setbrg (const int port) { int clock_divisor; - clock_divisor = calc_divisor(PORT); + clock_divisor = ns16550_calc_divisor(PORT, CONFIG_SYS_NS16550_CLK, + gd->baudrate); NS16550_reinit(PORT, clock_divisor); } diff --git a/drivers/serial/serial_tegra.c b/drivers/serial/serial_tegra.c new file mode 100644 index 0000000..7eb70e1 --- /dev/null +++ b/drivers/serial/serial_tegra.c @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +static const struct udevice_id tegra_serial_ids[] = { + { .compatible = "nvidia,tegra20-uart" }, + { } +}; + +static int tegra_serial_ofdata_to_platdata(struct udevice *dev) +{ + struct ns16550_platdata *plat = dev_get_platdata(dev); + int ret; + + ret = ns16550_serial_ofdata_to_platdata(dev); + if (ret) + return ret; + plat->clock = V_NS16550_CLK; + + return 0; +} +U_BOOT_DRIVER(serial_ns16550) = { + .name = "serial_tegra20", + .id = UCLASS_SERIAL, + .of_match = tegra_serial_ids, + .ofdata_to_platdata = tegra_serial_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), + .priv_auto_alloc_size = sizeof(struct NS16550), + .probe = ns16550_serial_probe, + .ops = &ns16550_serial_ops, +}; diff --git a/drivers/serial/usbtty.c b/drivers/serial/usbtty.c index b030526..7fb0b92 100644 --- a/drivers/serial/usbtty.c +++ b/drivers/serial/usbtty.c @@ -475,7 +475,7 @@ static void __usbtty_puts (const char *str, int len) if (space) { write_buffer (&usbtty_output); - n = MIN (space, MIN (len, maxlen)); + n = min(space, min(len, maxlen)); buf_push (&usbtty_output, str, n); str += n; @@ -882,7 +882,7 @@ static int write_buffer (circbuf_t * buf) space_avail = current_urb->buffer_length - current_urb->actual_length; - popnum = MIN (space_avail, buf->size); + popnum = min(space_avail, buf->size); if (popnum == 0) break; diff --git a/drivers/sound/Kconfig b/drivers/sound/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/sound/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/spi/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index 942a208..3d58bcc 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -18,7 +18,7 @@ static struct kwspi_registers *spireg = (struct kwspi_registers *)KW_SPI_BASE; -u32 cs_spi_mpp_back[2]; +static u32 cs_spi_mpp_back[2]; struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, unsigned int max_hz, unsigned int mode) @@ -37,7 +37,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, if (!slave) return NULL; - writel(~KWSPI_CSN_ACT | KWSPI_SMEMRDY, &spireg->ctrl); + writel(KWSPI_SMEMRDY, &spireg->ctrl); /* calculate spi clock prescaller using max_hz */ data = ((CONFIG_SYS_TCLK / 2) / max_hz) + 0x10; @@ -46,7 +46,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, /* program spi clock prescaller using max_hz */ writel(KWSPI_ADRLEN_3BYTE | data, &spireg->cfg); - debug("data = 0x%08x \n", data); + debug("data = 0x%08x\n", data); writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause); writel(KWSPI_IRQMASK, &spireg->irq_mask); @@ -100,7 +100,6 @@ int spi_claim_bus(struct spi_slave *slave) /* set new spi mpp and save current mpp config */ kirkwood_mpp_conf(spi_mpp_config, spi_mpp_backup); - #endif return board_spi_claim_bus(slave); @@ -127,7 +126,7 @@ void spi_release_bus(struct spi_slave *slave) */ int spi_cs_is_valid(unsigned int bus, unsigned int cs) { - return (bus == 0 && (cs == 0 || cs == 1)); + return bus == 0 && (cs == 0 || cs == 1); } #endif @@ -137,12 +136,12 @@ void spi_init(void) void spi_cs_activate(struct spi_slave *slave) { - writel(readl(&spireg->ctrl) | KWSPI_IRQUNMASK, &spireg->ctrl); + setbits_le32(&spireg->ctrl, KWSPI_CSN_ACT); } void spi_cs_deactivate(struct spi_slave *slave) { - writel(readl(&spireg->ctrl) & KWSPI_IRQMASK, &spireg->ctrl); + clrbits_le32(&spireg->ctrl, KWSPI_CSN_ACT); } int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, @@ -161,8 +160,7 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, * handle data in 8-bit chunks * TBD: 2byte xfer mode to be enabled */ - writel(((readl(&spireg->cfg) & ~KWSPI_XFERLEN_MASK) | - KWSPI_XFERLEN_1BYTE), &spireg->cfg); + clrsetbits_le32(&spireg->cfg, KWSPI_XFERLEN_MASK, KWSPI_XFERLEN_1BYTE); while (bitlen > 4) { debug("loopstart bitlen %d\n", bitlen); @@ -170,9 +168,9 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, /* Shift data so it's msb-justified */ if (dout) - tmpdout = *(u32 *) dout & 0x0ff; + tmpdout = *(u32 *)dout & 0xff; - writel(~KWSPI_SMEMRDIRQ, &spireg->irq_cause); + clrbits_le32(&spireg->irq_cause, KWSPI_SMEMRDIRQ); writel(tmpdout, &spireg->dout); /* Write the data out */ debug("*** spi_xfer: ... %08x written, bitlen %d\n", tmpdout, bitlen); @@ -186,12 +184,11 @@ int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, if (readl(&spireg->irq_cause) & KWSPI_SMEMRDIRQ) { isread = 1; tmpdin = readl(&spireg->din); - debug - ("spi_xfer: din %p..%08x read\n", - din, tmpdin); + debug("spi_xfer: din %p..%08x read\n", + din, tmpdin); if (din) { - *((u8 *) din) = (u8) tmpdin; + *((u8 *)din) = (u8)tmpdin; din += 1; } if (dout) diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index 2d5f385..523c7af 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -12,6 +12,7 @@ #include #include #include +#include #ifdef CONFIG_MX27 /* i.MX27 has a completely wrong register layout and register definitions in the @@ -25,6 +26,11 @@ static unsigned long spi_bases[] = { MXC_SPI_BASE_ADDRESSES }; +__weak int board_spi_cs_gpio(unsigned bus, unsigned cs) +{ + return -1; +} + #define OUT MXC_GPIO_DIRECTION_OUT #define reg_read readl @@ -163,9 +169,6 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, reg_ctrl = (reg_ctrl & ~MXC_CSPICTRL_POSTDIV(0x0F)) | MXC_CSPICTRL_POSTDIV(post_div); - /* We need to disable SPI before changing registers */ - reg_ctrl &= ~MXC_CSPICTRL_EN; - if (mode & SPI_CS_HIGH) ss_pol = 1; @@ -371,31 +374,30 @@ void spi_init(void) { } -static int decode_cs(struct mxc_spi_slave *mxcs, unsigned int cs) +/* + * Some SPI devices require active chip-select over multiple + * transactions, we achieve this using a GPIO. Still, the SPI + * controller has to be configured to use one of its own chipselects. + * To use this feature you have to implement board_spi_cs_gpio() to assign + * a gpio value for each cs (-1 if cs doesn't need to use gpio). + * You must use some unused on this SPI controller cs between 0 and 3. + */ +static int setup_cs_gpio(struct mxc_spi_slave *mxcs, + unsigned int bus, unsigned int cs) { int ret; - /* - * Some SPI devices require active chip-select over multiple - * transactions, we achieve this using a GPIO. Still, the SPI - * controller has to be configured to use one of its own chipselects. - * To use this feature you have to call spi_setup_slave() with - * cs = internal_cs | (gpio << 8), and you have to use some unused - * on this SPI controller cs between 0 and 3. - */ - if (cs > 3) { - mxcs->gpio = cs >> 8; - cs &= 3; - ret = gpio_direction_output(mxcs->gpio, !(mxcs->ss_pol)); - if (ret) { - printf("mxc_spi: cannot setup gpio %d\n", mxcs->gpio); - return -EINVAL; - } - } else { - mxcs->gpio = -1; + mxcs->gpio = board_spi_cs_gpio(bus, cs); + if (mxcs->gpio == -1) + return 0; + + ret = gpio_direction_output(mxcs->gpio, !(mxcs->ss_pol)); + if (ret) { + printf("mxc_spi: cannot setup gpio %d\n", mxcs->gpio); + return -EINVAL; } - return cs; + return 0; } struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, @@ -415,14 +417,12 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, mxcs->ss_pol = (mode & SPI_CS_HIGH) ? 1 : 0; - ret = decode_cs(mxcs, cs); + ret = setup_cs_gpio(mxcs, bus, cs); if (ret < 0) { free(mxcs); return NULL; } - cs = ret; - mxcs->base = spi_bases[bus]; ret = spi_cfg_mxc(mxcs, cs, max_hz, mode); diff --git a/drivers/tpm/Kconfig b/drivers/tpm/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/tpm/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/usb/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/usb/eth/smsc95xx.c b/drivers/usb/eth/smsc95xx.c index 7a7a676..6bca34d 100644 --- a/drivers/usb/eth/smsc95xx.c +++ b/drivers/usb/eth/smsc95xx.c @@ -1,6 +1,7 @@ /* * Copyright (c) 2011 The Chromium OS Authors. * Copyright (C) 2009 NVIDIA, Corporation + * Copyright (C) 2007-2008 SMSC (Steve Glendinning) * * SPDX-License-Identifier: GPL-2.0+ */ diff --git a/drivers/usb/gadget/ci_udc.c b/drivers/usb/gadget/ci_udc.c index 2572b34..9f2fd15 100644 --- a/drivers/usb/gadget/ci_udc.c +++ b/drivers/usb/gadget/ci_udc.c @@ -777,6 +777,11 @@ static int ci_pullup(struct usb_gadget *gadget, int is_on) /* select DEVICE mode */ writel(USBMODE_DEVICE, &udc->usbmode); +#if !defined(CONFIG_USB_GADGET_DUALSPEED) && defined(CONFIG_MX6) + /* force full-speed mode */ + writel(readl(&udc->portsc)|(1<<24), &udc->portsc); +#endif + writel(0xffffffff, &udc->epflush); /* Turn on the USB connection by enabling the pullup resistor */ diff --git a/drivers/usb/gadget/designware_udc.c b/drivers/usb/gadget/designware_udc.c index b7c1038..3559400 100644 --- a/drivers/usb/gadget/designware_udc.c +++ b/drivers/usb/gadget/designware_udc.c @@ -269,7 +269,7 @@ static void dw_write_noniso_tx_fifo(struct usb_endpoint_instance UDCDBGA("urb->buffer %p, buffer_length %d, actual_length %d", urb->buffer, urb->buffer_length, urb->actual_length); - last = MIN(urb->actual_length - endpoint->sent, + last = min(urb->actual_length - endpoint->sent, endpoint->tx_packetSize); if (last) { @@ -285,7 +285,7 @@ static void dw_write_noniso_tx_fifo(struct usb_endpoint_instance align = ((ulong)cp % sizeof(int)); if (align) - last = MIN(last, sizeof(int) - align); + last = min(last, sizeof(int) - align); UDCDBGA("endpoint->sent %d, tx_packetSize %d, last %d", endpoint->sent, endpoint->tx_packetSize, last); diff --git a/drivers/usb/gadget/ep0.c b/drivers/usb/gadget/ep0.c index b321488..4ba2f3d 100644 --- a/drivers/usb/gadget/ep0.c +++ b/drivers/usb/gadget/ep0.c @@ -315,7 +315,7 @@ static int ep0_get_descriptor (struct usb_device_instance *device, /*copy_config(urb, &report_descriptor->bData[0], report_descriptor->wLength, max); */ if (max - urb->actual_length > 0) { int length = - MIN (report_descriptor->wLength, + min(report_descriptor->wLength, max - urb->actual_length); memcpy (urb->buffer + urb->actual_length, &report_descriptor->bData[0], length); diff --git a/drivers/usb/gadget/f_fastboot.c b/drivers/usb/gadget/f_fastboot.c index 7a1acb9..441f4c2 100644 --- a/drivers/usb/gadget/f_fastboot.c +++ b/drivers/usb/gadget/f_fastboot.c @@ -10,6 +10,7 @@ * * SPDX-License-Identifier: GPL-2.0+ */ +#include #include #include #include @@ -19,6 +20,9 @@ #include #include #include +#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV +#include +#endif #define FASTBOOT_VERSION "0.4" @@ -38,7 +42,7 @@ struct f_fastboot { struct usb_function usb_function; - /* IN/OUT EP's and correspoinding requests */ + /* IN/OUT EP's and corresponding requests */ struct usb_ep *in_ep, *out_ep; struct usb_request *in_req, *out_req; }; @@ -290,7 +294,7 @@ static int fastboot_add(struct usb_configuration *c) } DECLARE_GADGET_BIND_CALLBACK(usb_dnl_fastboot, fastboot_add); -int fastboot_tx_write(const char *buffer, unsigned int buffer_size) +static int fastboot_tx_write(const char *buffer, unsigned int buffer_size) { struct usb_request *in_req = fastboot_func->in_req; int ret; @@ -338,6 +342,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req) strsep(&cmd, ":"); if (!cmd) { + error("missing variable\n"); fastboot_tx_write_str("FAILmissing var"); return; } @@ -346,10 +351,11 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req) strncat(response, FASTBOOT_VERSION, chars_left); } else if (!strcmp_l1("bootloader-version", cmd)) { strncat(response, U_BOOT_VERSION, chars_left); - } else if (!strcmp_l1("downloadsize", cmd)) { + } else if (!strcmp_l1("downloadsize", cmd) + || !strcmp_l1("max-download-size", cmd)) { char str_num[12]; - sprintf(str_num, "%08x", CONFIG_USB_FASTBOOT_BUF_SIZE); + sprintf(str_num, "0x%08x", CONFIG_USB_FASTBOOT_BUF_SIZE); strncat(response, str_num, chars_left); } else if (!strcmp_l1("serialno", cmd)) { s = getenv("serial#"); @@ -358,6 +364,7 @@ static void cb_getvar(struct usb_ep *ep, struct usb_request *req) else strcpy(response, "FAILValue not set"); } else { + error("unknown variable: %s\n", cmd); strcpy(response, "FAILVariable not implemented"); } fastboot_tx_write_str(response); @@ -469,6 +476,28 @@ static void cb_boot(struct usb_ep *ep, struct usb_request *req) fastboot_tx_write_str("OKAY"); } +#ifdef CONFIG_FASTBOOT_FLASH +static void cb_flash(struct usb_ep *ep, struct usb_request *req) +{ + char *cmd = req->buf; + char response[RESPONSE_LEN]; + + strsep(&cmd, ":"); + if (!cmd) { + error("missing partition name\n"); + fastboot_tx_write_str("FAILmissing partition name"); + return; + } + + strcpy(response, "FAILno flash device defined"); +#ifdef CONFIG_FASTBOOT_FLASH_MMC_DEV + fb_mmc_flash_write(cmd, (void *)CONFIG_USB_FASTBOOT_BUF_ADDR, + download_bytes, response); +#endif + fastboot_tx_write_str(response); +} +#endif + struct cmd_dispatch_info { char *cmd; void (*cb)(struct usb_ep *ep, struct usb_request *req); @@ -488,6 +517,12 @@ static const struct cmd_dispatch_info cmd_dispatch_info[] = { .cmd = "boot", .cb = cb_boot, }, +#ifdef CONFIG_FASTBOOT_FLASH + { + .cmd = "flash", + .cb = cb_flash, + }, +#endif }; static void rx_handler_command(struct usb_ep *ep, struct usb_request *req) @@ -503,10 +538,19 @@ static void rx_handler_command(struct usb_ep *ep, struct usb_request *req) } } - if (!func_cb) + if (!func_cb) { + error("unknown command: %s\n", cmdbuf); fastboot_tx_write_str("FAILunknown command"); - else + } else { + if (req->actual < req->length) { + u8 *buf = (u8 *)req->buf; + buf[req->actual] = 0; + func_cb(ep, req); + } else { + error("buffer overflow\n"); + } func_cb(ep, req); + } if (req->status == 0) { *cmdbuf = '\0'; diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c index f274d96..e045957 100644 --- a/drivers/usb/gadget/f_mass_storage.c +++ b/drivers/usb/gadget/f_mass_storage.c @@ -1110,6 +1110,7 @@ static int do_inquiry(struct fsg_common *common, struct fsg_buffhd *bh) memset(buf, 0, 8); buf[0] = TYPE_DISK; + buf[1] = curlun->removable ? 0x80 : 0; buf[2] = 2; /* ANSI SCSI level 2 */ buf[3] = 2; /* SCSI-2 INQUIRY data format */ buf[4] = 31; /* Additional length */ diff --git a/drivers/usb/gadget/mpc8xx_udc.c b/drivers/usb/gadget/mpc8xx_udc.c index 7f72972..b3e178a 100644 --- a/drivers/usb/gadget/mpc8xx_udc.c +++ b/drivers/usb/gadget/mpc8xx_udc.c @@ -897,7 +897,7 @@ static int mpc8xx_udc_ep_tx (struct usb_endpoint_instance *epi) pkt_len = urb->actual_length - epi->sent; if (pkt_len > epi->tx_packetSize || pkt_len > EP_MAX_PKT) { - pkt_len = MIN (epi->tx_packetSize, EP_MAX_PKT); + pkt_len = min(epi->tx_packetSize, EP_MAX_PKT); } for (x = 0; x < pkt_len; x++) { @@ -942,7 +942,7 @@ static int mpc8xx_udc_ep_tx (struct usb_endpoint_instance *epi) /* TX ACK : USB 2.0 8.7.2, Toggle PID, Advance TX */ epi->sent += pkt_len; - epi->last = MIN (urb->actual_length - epi->sent, epi->tx_packetSize); + epi->last = min(urb->actual_length - epi->sent, epi->tx_packetSize); TOGGLE_TX_PID (ep_ref[ep].pid); if (epi->sent >= epi->tx_urb->actual_length) { diff --git a/drivers/usb/gadget/pxa27x_udc.c b/drivers/usb/gadget/pxa27x_udc.c index 733558d..efd5c7f 100644 --- a/drivers/usb/gadget/pxa27x_udc.c +++ b/drivers/usb/gadget/pxa27x_udc.c @@ -65,7 +65,7 @@ static int udc_write_urb(struct usb_endpoint_instance *endpoint) if (!urb || !urb->actual_length) return -1; - n = MIN(urb->actual_length - endpoint->sent, endpoint->tx_packetSize); + n = min(urb->actual_length - endpoint->sent, endpoint->tx_packetSize); if (n <= 0) return -1; diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c index 9ffe501..9a8f004 100644 --- a/drivers/usb/host/ehci-atmel.c +++ b/drivers/usb/host/ehci-atmel.c @@ -40,7 +40,11 @@ int ehci_hcd_init(int index, enum usb_init_type init, } /* Enable USB Host clock */ +#ifdef CPU_HAS_PCR + at91_periph_clk_enable(ATMEL_ID_UHPHS); +#else writel(1 << ATMEL_ID_UHPHS, &pmc->pcer); +#endif *hccr = (struct ehci_hccr *)ATMEL_BASE_EHCI; *hcor = (struct ehci_hcor *)((uint32_t)*hccr + @@ -55,7 +59,11 @@ int ehci_hcd_stop(int index) ulong start_time, tmp_time; /* Disable USB Host Clock */ +#ifdef CPU_HAS_PCR + at91_periph_clk_disable(ATMEL_ID_UHPHS); +#else writel(1 << ATMEL_ID_UHPHS, &pmc->pcdr); +#endif start_time = get_timer(0); /* Disable UTMI PLL */ diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index c24505e..820e2e5 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c @@ -38,8 +38,8 @@ int usb_cpu_init(void) #endif /* Enable USB host clock. */ -#ifdef CONFIG_SAMA5D3 - writel(1 << (ATMEL_ID_UHP - 32), &pmc->pcer1); +#ifdef CPU_HAS_PCR + at91_periph_clk_enable(ATMEL_ID_UHP); #else writel(1 << ATMEL_ID_UHP, &pmc->pcer); #endif @@ -58,8 +58,8 @@ int usb_cpu_stop(void) at91_pmc_t *pmc = (at91_pmc_t *)ATMEL_BASE_PMC; /* Disable USB host clock. */ -#ifdef CONFIG_SAMA5D3 - writel(1 << (ATMEL_ID_UHP - 32), &pmc->pcdr1); +#ifdef CPU_HAS_PCR + at91_periph_clk_disable(ATMEL_ID_UHP); #else writel(1 << ATMEL_ID_UHP, &pmc->pcdr); #endif diff --git a/drivers/usb/musb-new/am35x.c b/drivers/usb/musb-new/am35x.c index 57c9bd3..857d7eb 100644 --- a/drivers/usb/musb-new/am35x.c +++ b/drivers/usb/musb-new/am35x.c @@ -26,7 +26,6 @@ * */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/usb/musb-new/musb_core.c b/drivers/usb/musb-new/musb_core.c index 36681b6..4edd6d7 100644 --- a/drivers/usb/musb-new/musb_core.c +++ b/drivers/usb/musb-new/musb_core.c @@ -89,7 +89,6 @@ * Most of the conditional compilation will (someday) vanish. */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/usb/musb-new/musb_dsps.c b/drivers/usb/musb-new/musb_dsps.c index 9a03917..17ed224 100644 --- a/drivers/usb/musb-new/musb_dsps.c +++ b/drivers/usb/musb-new/musb_dsps.c @@ -29,7 +29,6 @@ * da8xx.c would be merged to this file after testing. */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/usb/musb-new/musb_gadget.c b/drivers/usb/musb-new/musb_gadget.c index d2cb91a..97acf93 100644 --- a/drivers/usb/musb-new/musb_gadget.c +++ b/drivers/usb/musb-new/musb_gadget.c @@ -33,7 +33,6 @@ * */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/usb/musb-new/musb_gadget_ep0.c b/drivers/usb/musb-new/musb_gadget_ep0.c index 8c3b0a1..5a71501 100644 --- a/drivers/usb/musb-new/musb_gadget_ep0.c +++ b/drivers/usb/musb-new/musb_gadget_ep0.c @@ -33,7 +33,6 @@ * */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/usb/musb-new/musb_host.c b/drivers/usb/musb-new/musb_host.c index 9a2cf59..bbcee88 100644 --- a/drivers/usb/musb-new/musb_host.c +++ b/drivers/usb/musb-new/musb_host.c @@ -33,7 +33,6 @@ * */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/usb/musb-new/musb_uboot.c b/drivers/usb/musb-new/musb_uboot.c index 0d7b89f..2676f09 100644 --- a/drivers/usb/musb-new/musb_uboot.c +++ b/drivers/usb/musb-new/musb_uboot.c @@ -4,7 +4,6 @@ #include #include -#define __UBOOT__ #include #include "linux-compat.h" #include "usb-compat.h" diff --git a/drivers/usb/musb-new/omap2430.c b/drivers/usb/musb-new/omap2430.c index b1c4dc7..98f4830 100644 --- a/drivers/usb/musb-new/omap2430.c +++ b/drivers/usb/musb-new/omap2430.c @@ -24,7 +24,6 @@ * Suite 330, Boston, MA 02111-1307 USA * */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/video/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 93a91c3..14a6781 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -15,6 +15,7 @@ obj-$(CONFIG_EXYNOS_MIPI_DSIM) += exynos_mipi_dsi.o exynos_mipi_dsi_common.o \ exynos_mipi_dsi_lowlevel.o obj-$(CONFIG_EXYNOS_PWM_BL) += exynos_pwm_bl.o obj-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o videomodes.o +obj-$(CONFIG_FSL_DCU_FB) += fsl_dcu_fb.o videomodes.o obj-$(CONFIG_L5F31188) += l5f31188.o obj-$(CONFIG_MPC8XX_LCD) += mpc8xx_lcd.o obj-$(CONFIG_PXA_LCD) += pxa_lcd.o @@ -42,3 +43,4 @@ obj-$(CONFIG_VIDEO_TEGRA) += tegra.o obj-$(CONFIG_VIDEO_VCXK) += bus_vcxk.o obj-$(CONFIG_FORMIKE) += formike.o obj-$(CONFIG_AM335X_LCD) += am335x-fb.o +obj-$(CONFIG_VIDEO_PARADE) += parade.o diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c index 9231927..8fa45c2 100644 --- a/drivers/video/cfb_console.c +++ b/drivers/video/cfb_console.c @@ -2223,7 +2223,10 @@ static int video_init(void) debug("Video: Drawing the logo ...\n"); video_console_address = video_logo(); #else - video_console_address = video_fb_address; + if (!board_cfb_skip()){ + video_console_address = video_fb_address; + video_drawstring(VIDEO_FONT_WIDTH, 0, (uchar *)version_string); + } #endif /* Initialize the console */ diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c index e1e0d80..180a3b4 100644 --- a/drivers/video/exynos_fb.c +++ b/drivers/video/exynos_fb.c @@ -27,17 +27,13 @@ DECLARE_GLOBAL_DATA_PTR; static unsigned int panel_width, panel_height; -/* - * board_init_f(arch/arm/lib/board.c) calls lcd_setmem() which needs - * panel_info.vl_col, panel_info.vl_row and panel_info.vl_bpix to reserve - * FB memory at a very early stage, i.e even before exynos_fimd_parse_dt() - * is called. So, we are forced to statically assign it. - */ #ifdef CONFIG_OF_CONTROL vidinfo_t panel_info = { - .vl_col = LCD_XRES, - .vl_row = LCD_YRES, - .vl_bpix = LCD_COLOR16, + /* + * Insert a value here so that we don't end up in the BSS + * Reference: drivers/video/tegra.c + */ + .vl_col = -1, }; #endif @@ -141,7 +137,7 @@ static void lcd_panel_on(vidinfo_t *vid) } #ifdef CONFIG_OF_CONTROL -int exynos_fimd_parse_dt(const void *blob) +int exynos_lcd_early_init(const void *blob) { unsigned int node; node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS_FIMD); @@ -286,8 +282,6 @@ void lcd_ctrl_init(void *lcdbase) set_lcd_clk(); #ifdef CONFIG_OF_CONTROL - if (exynos_fimd_parse_dt(gd->fdt_blob)) - debug("Can't get proper panel info\n"); #ifdef CONFIG_EXYNOS_MIPI_DSIM exynos_init_dsim_platform_data(&panel_info); #endif diff --git a/drivers/video/exynos_fimd.c b/drivers/video/exynos_fimd.c index cebbba7..f67fa81 100644 --- a/drivers/video/exynos_fimd.c +++ b/drivers/video/exynos_fimd.c @@ -251,6 +251,45 @@ void exynos_fimd_window_off(unsigned int win_id) writel(cfg, &fimd_ctrl->winshmap); } +#ifdef CONFIG_OF_CONTROL +/* +* The reset value for FIMD SYSMMU register MMU_CTRL is 3 +* on Exynos5420 and newer versions. +* This means FIMD SYSMMU is on by default on Exynos5420 +* and newer versions. +* Since in u-boot we don't use SYSMMU, we should disable +* those FIMD SYSMMU. +* Note that there are 2 SYSMMU for FIMD: m0 and m1. +* m0 handles windows 0 and 4, and m1 handles windows 1, 2 and 3. +* We disable both of them here. +*/ +void exynos_fimd_disable_sysmmu(void) +{ + u32 *sysmmufimd; + unsigned int node; + int node_list[2]; + int count; + int i; + + count = fdtdec_find_aliases_for_id(gd->fdt_blob, "fimd", + COMPAT_SAMSUNG_EXYNOS_SYSMMU, node_list, 2); + for (i = 0; i < count; i++) { + node = node_list[i]; + if (node <= 0) { + debug("Can't get device node for fimd sysmmu\n"); + return; + } + + sysmmufimd = (u32 *)fdtdec_get_addr(gd->fdt_blob, node, "reg"); + if (!sysmmufimd) { + debug("Can't get base address for sysmmu fimdm0"); + return; + } + + writel(0x0, sysmmufimd); + } +} +#endif void exynos_fimd_lcd_init(vidinfo_t *vid) { @@ -268,6 +307,10 @@ void exynos_fimd_lcd_init(vidinfo_t *vid) node, "reg"); if (fimd_ctrl == NULL) debug("Can't get the FIMD base address\n"); + + if (fdtdec_get_bool(gd->fdt_blob, node, "samsung,disable-sysmmu")) + exynos_fimd_disable_sysmmu(); + #else fimd_ctrl = (struct exynos_fb *)samsung_get_base_fimd(); #endif diff --git a/drivers/video/fsl_dcu_fb.c b/drivers/video/fsl_dcu_fb.c new file mode 100644 index 0000000..d4cd382 --- /dev/null +++ b/drivers/video/fsl_dcu_fb.c @@ -0,0 +1,365 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * FSL DCU Framebuffer driver + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include "videomodes.h" + +/* Convert the X,Y resolution pair into a single number */ +#define RESOLUTION(x, y) (((u32)(x) << 16) | (y)) + +#ifdef CONFIG_SYS_FSL_DCU_LE +#define dcu_read32 in_le32 +#define dcu_write32 out_le32 +#elif defined(CONFIG_SYS_FSL_DCU_BE) +#define dcu_read32 in_be32 +#define dcu_write32 out_be32 +#endif + +#define DCU_MODE_BLEND_ITER(x) ((x) << 20) +#define DCU_MODE_RASTER_EN (1 << 14) +#define DCU_MODE_NORMAL 1 +#define DCU_MODE_COLORBAR 3 +#define DCU_BGND_R(x) ((x) << 16) +#define DCU_BGND_G(x) ((x) << 8) +#define DCU_BGND_B(x) (x) +#define DCU_DISP_SIZE_DELTA_Y(x) ((x) << 16) +#define DCU_DISP_SIZE_DELTA_X(x) (x) +#define DCU_HSYN_PARA_BP(x) ((x) << 22) +#define DCU_HSYN_PARA_PW(x) ((x) << 11) +#define DCU_HSYN_PARA_FP(x) (x) +#define DCU_VSYN_PARA_BP(x) ((x) << 22) +#define DCU_VSYN_PARA_PW(x) ((x) << 11) +#define DCU_VSYN_PARA_FP(x) (x) +#define DCU_SYN_POL_INV_PXCK_FALL (0 << 6) +#define DCU_SYN_POL_NEG_REMAIN (0 << 5) +#define DCU_SYN_POL_INV_VS_LOW (1 << 1) +#define DCU_SYN_POL_INV_HS_LOW (1) +#define DCU_THRESHOLD_LS_BF_VS(x) ((x) << 16) +#define DCU_THRESHOLD_OUT_BUF_HIGH(x) ((x) << 8) +#define DCU_THRESHOLD_OUT_BUF_LOW(x) (x) +#define DCU_UPDATE_MODE_MODE (1 << 31) +#define DCU_UPDATE_MODE_READREG (1 << 30) + +#define DCU_CTRLDESCLN_1_HEIGHT(x) ((x) << 16) +#define DCU_CTRLDESCLN_1_WIDTH(x) (x) +#define DCU_CTRLDESCLN_2_POSY(x) ((x) << 16) +#define DCU_CTRLDESCLN_2_POSX(x) (x) +#define DCU_CTRLDESCLN_4_EN (1 << 31) +#define DCU_CTRLDESCLN_4_TILE_EN (1 << 30) +#define DCU_CTRLDESCLN_4_DATA_SEL_CLUT (1 << 29) +#define DCU_CTRLDESCLN_4_SAFETY_EN (1 << 28) +#define DCU_CTRLDESCLN_4_TRANS(x) ((x) << 20) +#define DCU_CTRLDESCLN_4_BPP(x) ((x) << 16) +#define DCU_CTRLDESCLN_4_RLE_EN (1 << 15) +#define DCU_CTRLDESCLN_4_LUOFFS(x) ((x) << 4) +#define DCU_CTRLDESCLN_4_BB_ON (1 << 2) +#define DCU_CTRLDESCLN_4_AB(x) (x) +#define DCU_CTRLDESCLN_5_CKMAX_R(x) ((x) << 16) +#define DCU_CTRLDESCLN_5_CKMAX_G(x) ((x) << 8) +#define DCU_CTRLDESCLN_5_CKMAX_B(x) (x) +#define DCU_CTRLDESCLN_6_CKMIN_R(x) ((x) << 16) +#define DCU_CTRLDESCLN_6_CKMIN_G(x) ((x) << 8) +#define DCU_CTRLDESCLN_6_CKMIN_B(x) (x) +#define DCU_CTRLDESCLN_7_TILE_VER(x) ((x) << 16) +#define DCU_CTRLDESCLN_7_TILE_HOR(x) (x) +#define DCU_CTRLDESCLN_8_FG_FCOLOR(x) (x) +#define DCU_CTRLDESCLN_9_BG_BCOLOR(x) (x) + +#define BPP_16_RGB565 4 +#define BPP_24_RGB888 5 +#define BPP_32_ARGB8888 6 + +/* + * This setting is used for the TWR_LCD_RGB card + */ +static struct fb_videomode fsl_dcu_mode_480_272 = { + .name = "480x272-60", + .refresh = 60, + .xres = 480, + .yres = 272, + .pixclock = 91996, + .left_margin = 2, + .right_margin = 2, + .upper_margin = 1, + .lower_margin = 1, + .hsync_len = 41, + .vsync_len = 2, + .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, + .vmode = FB_VMODE_NONINTERLACED +}; + +/* + * This setting is used for Siliconimage SiI9022A HDMI + */ +static struct fb_videomode fsl_dcu_mode_640_480 = { + .name = "640x480-60", + .refresh = 60, + .xres = 640, + .yres = 480, + .pixclock = 39722, + .left_margin = 48, + .right_margin = 16, + .upper_margin = 33, + .lower_margin = 10, + .hsync_len = 96, + .vsync_len = 2, + .sync = 0, + .vmode = FB_VMODE_NONINTERLACED, +}; + +/* + * DCU register map + */ +struct dcu_reg { + u32 desc_cursor[4]; + u32 mode; + u32 bgnd; + u32 disp_size; + u32 hsyn_para; + u32 vsyn_para; + u32 synpol; + u32 threshold; + u32 int_status; + u32 int_mask; + u32 colbar[8]; + u32 div_ratio; + u32 sign_calc[2]; + u32 crc_val; + u8 res_064[0x6c-0x64]; + u32 parr_err_status1; + u8 res_070[0x7c-0x70]; + u32 parr_err_status3; + u32 mparr_err_status1; + u8 res_084[0x90-0x84]; + u32 mparr_err_status3; + u32 threshold_inp_buf[2]; + u8 res_09c[0xa0-0x9c]; + u32 luma_comp; + u32 chroma_red; + u32 chroma_green; + u32 chroma_blue; + u32 crc_pos; + u32 lyr_intpol_en; + u32 lyr_luma_comp; + u32 lyr_chrm_red; + u32 lyr_chrm_grn; + u32 lyr_chrm_blue; + u8 res_0c4[0xcc-0xc8]; + u32 update_mode; + u32 underrun; + u8 res_0d4[0x100-0xd4]; + u32 gpr; + u32 slr_l[2]; + u32 slr_disp_size; + u32 slr_hvsync_para; + u32 slr_pol; + u32 slr_l_transp[2]; + u8 res_120[0x200-0x120]; + u32 ctrldescl[DCU_LAYER_MAX_NUM][16]; +}; + +static struct fb_info info; + +static void reset_total_layers(void) +{ + struct dcu_reg *regs = (struct dcu_reg *)CONFIG_SYS_DCU_ADDR; + int i; + + for (i = 0; i < DCU_LAYER_MAX_NUM; i++) { + dcu_write32(®s->ctrldescl[i][0], 0); + dcu_write32(®s->ctrldescl[i][1], 0); + dcu_write32(®s->ctrldescl[i][2], 0); + dcu_write32(®s->ctrldescl[i][3], 0); + dcu_write32(®s->ctrldescl[i][4], 0); + dcu_write32(®s->ctrldescl[i][5], 0); + dcu_write32(®s->ctrldescl[i][6], 0); + dcu_write32(®s->ctrldescl[i][7], 0); + dcu_write32(®s->ctrldescl[i][8], 0); + dcu_write32(®s->ctrldescl[i][9], 0); + dcu_write32(®s->ctrldescl[i][10], 0); + } + + dcu_write32(®s->update_mode, DCU_UPDATE_MODE_READREG); +} + +static int layer_ctrldesc_init(int index, u32 pixel_format) +{ + struct dcu_reg *regs = (struct dcu_reg *)CONFIG_SYS_DCU_ADDR; + unsigned int bpp = BPP_24_RGB888; + + dcu_write32(®s->ctrldescl[index][0], + DCU_CTRLDESCLN_1_HEIGHT(info.var.yres) | + DCU_CTRLDESCLN_1_WIDTH(info.var.xres)); + + dcu_write32(®s->ctrldescl[index][1], + DCU_CTRLDESCLN_2_POSY(0) | + DCU_CTRLDESCLN_2_POSX(0)); + + dcu_write32(®s->ctrldescl[index][2], (unsigned int)info.screen_base); + + switch (pixel_format) { + case 16: + bpp = BPP_16_RGB565; + break; + case 24: + bpp = BPP_24_RGB888; + break; + case 32: + bpp = BPP_32_ARGB8888; + break; + default: + printf("unsupported color depth: %u\n", pixel_format); + } + + dcu_write32(®s->ctrldescl[index][3], + DCU_CTRLDESCLN_4_EN | + DCU_CTRLDESCLN_4_TRANS(0xff) | + DCU_CTRLDESCLN_4_BPP(bpp) | + DCU_CTRLDESCLN_4_AB(0)); + + dcu_write32(®s->ctrldescl[index][4], + DCU_CTRLDESCLN_5_CKMAX_R(0xff) | + DCU_CTRLDESCLN_5_CKMAX_G(0xff) | + DCU_CTRLDESCLN_5_CKMAX_B(0xff)); + dcu_write32(®s->ctrldescl[index][5], + DCU_CTRLDESCLN_6_CKMIN_R(0) | + DCU_CTRLDESCLN_6_CKMIN_G(0) | + DCU_CTRLDESCLN_6_CKMIN_B(0)); + + dcu_write32(®s->ctrldescl[index][6], + DCU_CTRLDESCLN_7_TILE_VER(0) | + DCU_CTRLDESCLN_7_TILE_HOR(0)); + + dcu_write32(®s->ctrldescl[index][7], DCU_CTRLDESCLN_8_FG_FCOLOR(0)); + dcu_write32(®s->ctrldescl[index][8], DCU_CTRLDESCLN_9_BG_BCOLOR(0)); + + dcu_write32(®s->update_mode, DCU_UPDATE_MODE_READREG); + + return 0; +} + +int fsl_dcu_init(unsigned int xres, unsigned int yres, + unsigned int pixel_format) +{ + struct dcu_reg *regs = (struct dcu_reg *)CONFIG_SYS_DCU_ADDR; + unsigned int div, mode; + + /* Memory allocation for framebuffer */ + info.screen_size = + info.var.xres * info.var.yres * (info.var.bits_per_pixel / 8); + info.screen_base = (char *)memalign(ARCH_DMA_MINALIGN, + roundup(info.screen_size, ARCH_DMA_MINALIGN)); + memset(info.screen_base, 0, info.screen_size); + + reset_total_layers(); + div = dcu_set_pixel_clock(info.var.pixclock); + dcu_write32(®s->div_ratio, (div - 1)); + + dcu_write32(®s->disp_size, + DCU_DISP_SIZE_DELTA_Y(info.var.yres) | + DCU_DISP_SIZE_DELTA_X(info.var.xres / 16)); + + dcu_write32(®s->hsyn_para, + DCU_HSYN_PARA_BP(info.var.left_margin) | + DCU_HSYN_PARA_PW(info.var.hsync_len) | + DCU_HSYN_PARA_FP(info.var.right_margin)); + + dcu_write32(®s->vsyn_para, + DCU_VSYN_PARA_BP(info.var.upper_margin) | + DCU_VSYN_PARA_PW(info.var.vsync_len) | + DCU_VSYN_PARA_FP(info.var.lower_margin)); + + dcu_write32(®s->synpol, + DCU_SYN_POL_INV_PXCK_FALL | + DCU_SYN_POL_NEG_REMAIN | + DCU_SYN_POL_INV_VS_LOW | + DCU_SYN_POL_INV_HS_LOW); + + dcu_write32(®s->bgnd, + DCU_BGND_R(0) | DCU_BGND_G(0) | DCU_BGND_B(0)); + + dcu_write32(®s->mode, + DCU_MODE_BLEND_ITER(DCU_LAYER_MAX_NUM) | + DCU_MODE_RASTER_EN); + + dcu_write32(®s->threshold, + DCU_THRESHOLD_LS_BF_VS(0x3) | + DCU_THRESHOLD_OUT_BUF_HIGH(0x78) | + DCU_THRESHOLD_OUT_BUF_LOW(0)); + + mode = dcu_read32(®s->mode); + dcu_write32(®s->mode, mode | DCU_MODE_NORMAL); + + layer_ctrldesc_init(0, pixel_format); + + return 0; +} + +void *video_hw_init(void) +{ + static GraphicDevice ctfb; + const char *options; + unsigned int depth = 0, freq = 0; + struct fb_videomode *fsl_dcu_mode_db = &fsl_dcu_mode_480_272; + + if (!video_get_video_mode(&ctfb.winSizeX, &ctfb.winSizeY, &depth, &freq, + &options)) + return NULL; + + /* Find the monitor port, which is a required option */ + if (!options) + return NULL; + if (strncmp(options, "monitor=", 8) != 0) + return NULL; + + switch (RESOLUTION(ctfb.winSizeX, ctfb.winSizeY)) { + case RESOLUTION(480, 272): + fsl_dcu_mode_db = &fsl_dcu_mode_480_272; + break; + case RESOLUTION(640, 480): + fsl_dcu_mode_db = &fsl_dcu_mode_640_480; + break; + default: + printf("unsupported resolution %ux%u\n", + ctfb.winSizeX, ctfb.winSizeY); + } + + info.var.xres = fsl_dcu_mode_db->xres; + info.var.yres = fsl_dcu_mode_db->yres; + info.var.bits_per_pixel = 32; + info.var.pixclock = fsl_dcu_mode_db->pixclock; + info.var.left_margin = fsl_dcu_mode_db->left_margin; + info.var.right_margin = fsl_dcu_mode_db->right_margin; + info.var.upper_margin = fsl_dcu_mode_db->upper_margin; + info.var.lower_margin = fsl_dcu_mode_db->lower_margin; + info.var.hsync_len = fsl_dcu_mode_db->hsync_len; + info.var.vsync_len = fsl_dcu_mode_db->vsync_len; + info.var.sync = fsl_dcu_mode_db->sync; + info.var.vmode = fsl_dcu_mode_db->vmode; + info.fix.line_length = info.var.xres * info.var.bits_per_pixel / 8; + + if (platform_dcu_init(ctfb.winSizeX, ctfb.winSizeY, + options + 8, fsl_dcu_mode_db) < 0) + return NULL; + + ctfb.frameAdrs = (unsigned int)info.screen_base; + ctfb.plnSizeX = ctfb.winSizeX; + ctfb.plnSizeY = ctfb.winSizeY; + + ctfb.gdfBytesPP = 4; + ctfb.gdfIndex = GDF_32BIT_X888RGB; + + ctfb.memSize = info.screen_size; + + return &ctfb; +} diff --git a/drivers/video/ipu_disp.c b/drivers/video/ipu_disp.c index 948e1fc..175e981 100644 --- a/drivers/video/ipu_disp.c +++ b/drivers/video/ipu_disp.c @@ -55,6 +55,11 @@ extern struct clk *g_pixel_clk[2]; extern unsigned char g_ipu_clk_enabled; extern unsigned char g_dc_di_assignment[]; +void ipu_dmfc_uninit(void) +{ + dmfc_type_setup = 0; +} + void ipu_dmfc_init(int dmfc_type, int first) { u32 dmfc_wr_chan, dmfc_dp_chan; diff --git a/drivers/video/mxc_ipuv3_fb.c b/drivers/video/mxc_ipuv3_fb.c index f75d770..e6b2840 100644 --- a/drivers/video/mxc_ipuv3_fb.c +++ b/drivers/video/mxc_ipuv3_fb.c @@ -28,7 +28,6 @@ DECLARE_GLOBAL_DATA_PTR; static int mxcfb_map_video_memory(struct fb_info *fbi); -static int mxcfb_unmap_video_memory(struct fb_info *fbi); /* graphics setup */ static GraphicDevice panel; @@ -222,9 +221,6 @@ static int mxcfb_set_par(struct fb_info *fbi) mem_len = fbi->var.yres_virtual * fbi->fix.line_length; if (!fbi->fix.smem_start || (mem_len > fbi->fix.smem_len)) { - if (fbi->fix.smem_start) - mxcfb_unmap_video_memory(fbi); - if (mxcfb_map_video_memory(fbi) < 0) return -ENOMEM; } @@ -398,25 +394,38 @@ static int mxcfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) static int mxcfb_map_video_memory(struct fb_info *fbi) { - if (fbi->fix.smem_len < fbi->var.yres_virtual * fbi->fix.line_length) { - fbi->fix.smem_len = fbi->var.yres_virtual * - fbi->fix.line_length; + unsigned smem_len = fbi->var.yres_virtual * fbi->fix.line_length; + unsigned min = 1920 * 1080 * 2; + + fbi->screen_size = smem_len; + if (smem_len < min) + smem_len = min; + smem_len = roundup(smem_len, ARCH_DMA_MINALIGN); + if (fbi->fix.smem_len < smem_len) { + debug("smem_len %d %d, %lx\n", fbi->fix.smem_len, smem_len, fbi->fix.smem_start); + if (fbi->fix.smem_start) { + free((void *)fbi->fix.smem_start); + fbi->fix.smem_start = 0; + fbi->screen_base = NULL; + fbi->fix.smem_len = 0; + } } - fbi->fix.smem_len = roundup(fbi->fix.smem_len, ARCH_DMA_MINALIGN); - fbi->screen_base = (char *)memalign(ARCH_DMA_MINALIGN, - fbi->fix.smem_len); - fbi->fix.smem_start = (unsigned long)fbi->screen_base; - if (fbi->screen_base == 0) { - puts("Unable to allocate framebuffer memory\n"); - fbi->fix.smem_len = 0; - fbi->fix.smem_start = 0; - return -EBUSY; + if (!fbi->fix.smem_start) { + fbi->screen_base = memalign(ARCH_DMA_MINALIGN, smem_len); + fbi->fix.smem_start = (unsigned long)fbi->screen_base; + debug("screen_base = %p\n", fbi->screen_base); + if (!fbi->screen_base) { + puts("Unable to allocate framebuffer memory\n"); + fbi->fix.smem_len = 0; + fbi->fix.smem_start = 0; + return -EBUSY; + } + fbi->fix.smem_len = smem_len; } debug("allocated fb @ paddr=0x%08X, size=%d.\n", (uint32_t) fbi->fix.smem_start, fbi->fix.smem_len); - fbi->screen_size = fbi->fix.smem_len; gd->fb_base = fbi->fix.smem_start; @@ -426,14 +435,6 @@ static int mxcfb_map_video_memory(struct fb_info *fbi) return 0; } -static int mxcfb_unmap_video_memory(struct fb_info *fbi) -{ - fbi->screen_base = 0; - fbi->fix.smem_start = 0; - fbi->fix.smem_len = 0; - return 0; -} - /* * Initializes the framebuffer information pointer. After allocating * sufficient memory for the framebuffer structure, the fields are @@ -449,7 +450,6 @@ static struct fb_info *mxcfb_init_fbinfo(void) #define PADDING (BYTES_PER_LONG - (sizeof(struct fb_info) % BYTES_PER_LONG)) struct fb_info *fbi; struct mxcfb_info *mxcfbi; - char *p; int size = sizeof(struct mxcfb_info) + PADDING + sizeof(struct fb_info); @@ -463,14 +463,12 @@ static struct fb_info *mxcfb_init_fbinfo(void) * Allocate sufficient memory for the fb structure */ - p = malloc(size); - if (!p) + fbi = malloc(size); + if (!fbi) return NULL; + memset(fbi, 0, size); - memset(p, 0, size); - - fbi = (struct fb_info *)p; - fbi->par = p + sizeof(struct fb_info) + PADDING; + fbi->par = ((char *)fbi) + sizeof(struct fb_info) + PADDING; mxcfbi = (struct mxcfb_info *)fbi->par; debug("Framebuffer structures at: fbi=0x%x mxcfbi=0x%x\n", @@ -498,16 +496,34 @@ static int mxcfb_probe(u32 interface_pix_fmt, uint8_t disp, struct fb_info *fbi; struct mxcfb_info *mxcfbi; int ret = 0; + int xres = mode->xres; + int gdfIndex = GDF_16BIT_565RGB; + int bytes_per_pixel = 2; + struct fb_videomode umode; + + if (interface_pix_fmt == IPU_PIX_FMT_UPS051) { + interface_pix_fmt = IPU_PIX_FMT_RGB565; + umode = *mode; + umode.xres = xres * 3 / 2; + mode = &umode; + gdfIndex = GDF_24BIT_888RGB; + bytes_per_pixel = 3; + } /* * Initialize FB structures */ - fbi = mxcfb_init_fbinfo(); + fbi = mxcfb_info[disp]; if (!fbi) { - ret = -ENOMEM; - goto err0; + fbi = mxcfb_init_fbinfo(); + if (!fbi) { + ret = -ENOMEM; + goto err0; + } + mxcfb_info[disp] = fbi; } mxcfbi = (struct mxcfb_info *)fbi->par; + mxcfbi->ipu_di = disp; if (!g_dp_in_use) { mxcfbi->ipu_ch = MEM_BG_SYNC; @@ -517,15 +533,12 @@ static int mxcfb_probe(u32 interface_pix_fmt, uint8_t disp, mxcfbi->blank = FB_BLANK_POWERDOWN; } - mxcfbi->ipu_di = disp; - ipu_disp_set_global_alpha(mxcfbi->ipu_ch, 1, 0x80); ipu_disp_set_color_key(mxcfbi->ipu_ch, 0, 0); strcpy(fbi->fix.id, "DISP3 BG"); g_dp_in_use = 1; - mxcfb_info[mxcfbi->ipu_di] = fbi; /* Need dummy values until real panel is configured */ @@ -533,7 +546,6 @@ static int mxcfb_probe(u32 interface_pix_fmt, uint8_t disp, fb_videomode_to_var(&fbi->var, mode); fbi->var.bits_per_pixel = 16; fbi->fix.line_length = fbi->var.xres * (fbi->var.bits_per_pixel / 8); - fbi->fix.smem_len = fbi->var.yres_virtual * fbi->fix.line_length; mxcfb_check_var(&fbi->var, fbi); @@ -548,16 +560,16 @@ static int mxcfb_probe(u32 interface_pix_fmt, uint8_t disp, mxcfb_set_par(fbi); - panel.winSizeX = mode->xres; + panel.winSizeX = xres; panel.winSizeY = mode->yres; - panel.plnSizeX = mode->xres; + panel.plnSizeX = xres; panel.plnSizeY = mode->yres; panel.frameAdrs = (u32)fbi->screen_base; panel.memSize = fbi->screen_size; - panel.gdfBytesPP = 2; - panel.gdfIndex = GDF_16BIT_565RGB; + panel.gdfBytesPP = bytes_per_pixel; + panel.gdfIndex = gdfIndex; ipu_dump_registers(); @@ -567,6 +579,8 @@ err0: return ret; } +void ipu_dmfc_uninit(void); + void ipuv3_fb_shutdown(void) { int i; @@ -584,6 +598,16 @@ void ipuv3_fb_shutdown(void) __raw_writel(__raw_readl(&stat->int_stat[i]), &stat->int_stat[i]); } + ipu_dmfc_uninit(); + g_dp_in_use = 0; +} + +void *ipuv3_fb_init2(void) +{ + mxcfb_probe(gpixfmt, gdisp, gmode); + + debug("Framebuffer at 0x%x\n", (unsigned int)panel.frameAdrs); + return (void *)&panel; } void *video_hw_init(void) @@ -593,11 +617,7 @@ void *video_hw_init(void) ret = ipu_probe(); if (ret) puts("Error initializing IPU\n"); - - ret = mxcfb_probe(gpixfmt, gdisp, gmode); - debug("Framebuffer at 0x%x\n", (unsigned int)panel.frameAdrs); - - return (void *)&panel; + return ipuv3_fb_init2(); } void video_set_lut(unsigned int index, /* color number */ diff --git a/drivers/video/parade.c b/drivers/video/parade.c new file mode 100644 index 0000000..0f543f6 --- /dev/null +++ b/drivers/video/parade.c @@ -0,0 +1,220 @@ +/* + * Copyright (c) 2014 The Chromium OS Authors. All rights reserved. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/* + * This file is a driver for Parade dP<->LVDS bridges. The original submission + * is for the ps8625 chip. + */ +#include +#include +#include +#include + +/* + * Initialization of the chip is a process of writing certaing values into + * certain registers over i2c bus. The chip in fact responds to a range of + * addresses on the i2c bus, so for each written value three parameters are + * required: i2c address, register address and the actual value. + * + * The base address is derived from the device tree, only address offset is + * stored in the table below. + */ +/** + * struct reg_data() - data for a parade register write + * + * @addr_off offset from the i2c base address for parade + * @reg_addr register address to write + * @value value to be written + */ +struct reg_data { + uint8_t addr_off; + uint8_t reg; + uint8_t value; +} _packed; + +#define END_OF_TABLE 0xff /* Ficticious offset */ + +static const struct reg_data parade_values[] = { + {0x02, 0xa1, 0x01}, /* HPD low */ + /* + * SW setting + * [1:0] SW output 1.2V voltage is lower to 96% + */ + {0x04, 0x14, 0x01}, + /* + * RCO SS setting + * [5:4] = b01 0.5%, b10 1%, b11 1.5% + */ + {0x04, 0xe3, 0x20}, + {0x04, 0xe2, 0x80}, /* [7] RCO SS enable */ + /* + * RPHY Setting + * [3:2] CDR tune wait cycle before + * measure for fine tune b00: 1us, + * 01: 0.5us, 10:2us, 11:4us. + */ + {0x04, 0x8a, 0x0c}, + {0x04, 0x89, 0x08}, /* [3] RFD always on */ + /* + * CTN lock in/out: + * 20000ppm/80000ppm. Lock out 2 + * times. + */ + {0x04, 0x71, 0x2d}, + /* + * 2.7G CDR settings + * NOF=40LSB for HBR CDR setting + */ + {0x04, 0x7d, 0x07}, + {0x04, 0x7b, 0x00}, /* [1:0] Fmin=+4bands */ + {0x04, 0x7a, 0xfd}, /* [7:5] DCO_FTRNG=+-40% */ + /* + * 1.62G CDR settings + * [5:2]NOF=64LSB [1:0]DCO scale is 2/5 + */ + {0x04, 0xc0, 0x12}, + {0x04, 0xc1, 0x92}, /* Gitune=-37% */ + {0x04, 0xc2, 0x1c}, /* Fbstep=100% */ + {0x04, 0x32, 0x80}, /* [7] LOS signal disable */ + /* + * RPIO Setting + * [7:4] LVDS driver bias current : + * 75% (250mV swing) + */ + {0x04, 0x00, 0xb0}, + /* + * [7:6] Right-bar GPIO output strength is 8mA + */ + {0x04, 0x15, 0x40}, + /* EQ Training State Machine Setting */ + {0x04, 0x54, 0x10}, /* RCO calibration start */ + /* [4:0] MAX_LANE_COUNT set to one lane */ + {0x01, 0x02, 0x81}, + /* [4:0] LANE_COUNT_SET set to one lane */ + {0x01, 0x21, 0x81}, + {0x00, 0x52, 0x20}, + {0x00, 0xf1, 0x03}, /* HPD CP toggle enable */ + {0x00, 0x62, 0x41}, + /* Counter number, add 1ms counter delay */ + {0x00, 0xf6, 0x01}, + /* + * [6]PWM function control by + * DPCD0040f[7], default is PWM + * block always works. + */ + {0x00, 0x77, 0x06}, + /* + * 04h Adjust VTotal tolerance to + * fix the 30Hz no display issue + */ + {0x00, 0x4c, 0x04}, + /* DPCD00400='h00, Parade OUI = 'h001cf8 */ + {0x01, 0xc0, 0x00}, + {0x01, 0xc1, 0x1c}, /* DPCD00401='h1c */ + {0x01, 0xc2, 0xf8}, /* DPCD00402='hf8 */ + /* + * DPCD403~408 = ASCII code + * D2SLV5='h4432534c5635 + */ + {0x01, 0xc3, 0x44}, + {0x01, 0xc4, 0x32}, /* DPCD404 */ + {0x01, 0xc5, 0x53}, /* DPCD405 */ + {0x01, 0xc6, 0x4c}, /* DPCD406 */ + {0x01, 0xc7, 0x56}, /* DPCD407 */ + {0x01, 0xc8, 0x35}, /* DPCD408 */ + /* + * DPCD40A, Initial Code major revision + * '01' + */ + {0x01, 0xca, 0x01}, + /* DPCD40B, Initial Code minor revision '05' */ + {0x01, 0xcb, 0x05}, + /* DPCD720, Select internal PWM */ + {0x01, 0xa5, 0xa0}, + /* + * FFh for 100% PWM of brightness, 0h for 0% + * brightness + */ + {0x01, 0xa7, 0xff}, + /* + * Set LVDS output as 6bit-VESA mapping, + * single LVDS channel + */ + {0x01, 0xcc, 0x13}, + /* Enable SSC set by register */ + {0x02, 0xb1, 0x20}, + /* + * Set SSC enabled and +/-1% central + * spreading + */ + {0x04, 0x10, 0x16}, + /* MPU Clock source: LC => RCO */ + {0x04, 0x59, 0x60}, + {0x04, 0x54, 0x14}, /* LC -> RCO */ + {0x02, 0xa1, 0x91}, /* HPD high */ + {END_OF_TABLE} +}; + +/** + * Write values table into the Parade eDP bridge + * + * @return 0 on success, non-0 on failure + */ + +static int parade_write_regs(int base_addr, const struct reg_data *table) +{ + int ret = 0; + + while (!ret && (table->addr_off != END_OF_TABLE)) { + ret = i2c_write(base_addr + table->addr_off, + table->reg, 1, + (uint8_t *)&table->value, + sizeof(table->value)); + table++; + } + return ret; +} + +int parade_init(const void *blob) +{ + int bus, old_bus; + int parent; + int node; + int addr; + int ret; + + node = fdtdec_next_compatible(blob, 0, COMPAT_PARADE_PS8625); + if (node < 0) + return 0; + + parent = fdt_parent_offset(blob, node); + if (parent < 0) { + debug("%s: Could not find parent i2c node\n", __func__); + return -1; + } + addr = fdtdec_get_int(blob, node, "reg", -1); + if (addr < 0) { + debug("%s: Could not find i2c address\n", __func__); + return -1; + } + + bus = i2c_get_bus_num_fdt(parent); + old_bus = i2c_get_bus_num(); + + debug("%s: Using i2c bus %d\n", __func__, bus); + + /* + * TODO(sjg@chromium.org): Hmmm we seem to need some sort of delay + * here. + */ + mdelay(40); + i2c_set_bus_num(bus); + ret = parade_write_regs(addr, parade_values); + + i2c_set_bus_num(old_bus); + + return ret; +} diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/drivers/watchdog/Kconfig @@ -0,0 +1 @@ + diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 0276a10..1dc0f5a 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -7,7 +7,7 @@ obj-$(CONFIG_AT91SAM9_WATCHDOG) += at91sam9_wdt.o obj-$(CONFIG_FTWDT010_WATCHDOG) += ftwdt010_wdt.o -ifneq (,$(filter $(SOC), mx31 mx35 mx5 mx6 vf610)) +ifneq (,$(filter $(SOC), mx31 mx35 mx5 mx6 vf610 ls102xa)) obj-y += imx_watchdog.o endif obj-$(CONFIG_TNETV107X_WATCHDOG) += tnetv107x_wdt.o diff --git a/dts/Kconfig b/dts/Kconfig new file mode 100644 index 0000000..83ba7a6 --- /dev/null +++ b/dts/Kconfig @@ -0,0 +1,55 @@ +# +# Device Tree Control +# +# TODO: +# This feature is not currently supported for SPL, +# but this restriction should be removed in the future. + +config SUPPORT_OF_CONTROL + bool + +menu "Device Tree Control" + depends on !SPL_BUILD + depends on SUPPORT_OF_CONTROL + +config OF_CONTROL + bool "Run-time configuration via Device Tree" + help + This feature provides for run-time configuration of U-Boot + via a flattened device tree. + +choice + prompt "Provider of DTB for DT control" + depends on OF_CONTROL + +config OF_SEPARATE + bool "Separate DTB for DT control" + depends on !SANDBOX + help + If this option is enabled, the device tree will be built and + placed as a separate u-boot.dtb file alongside the U-Boot image. + +config OF_EMBED + bool "Embedded DTB for DT control" + help + If this option is enabled, the device tree will be picked up and + built into the U-Boot image. + +config OF_HOSTFILE + bool "Host filed DTB for DT control" + depends on SANDBOX + help + If this option is enabled, DTB will be read from a file on startup. + This is only useful for Sandbox. Use the -d flag to U-Boot to + specify the file to read. + +endchoice + +config DEFAULT_DEVICE_TREE + string "Default Device Tree for DT control" + help + This option specifies the default Device Tree used for DT control. + It can be overrided from the command line: + $ make DEVICE_TREE= + +endmenu diff --git a/examples/standalone/Makefile b/examples/standalone/Makefile index 2dacba2..0863a8c 100644 --- a/examples/standalone/Makefile +++ b/examples/standalone/Makefile @@ -22,7 +22,7 @@ extra-$(CONFIG_PPC) += sched ELF := $(strip $(extra-y)) extra-y += $(addsuffix .srec,$(extra-y)) $(addsuffix .bin,$(extra-y)) -clean-files := $(extra-) $(addsuffix .srec,$(extra-)) $(addsuffix .bin,$(extra-)) +clean-files := *.srec *.bin COBJS := $(ELF:=.o) diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c index c5c025d..0bf690e 100644 --- a/examples/standalone/stubs.c +++ b/examples/standalone/stubs.c @@ -1,9 +1,6 @@ #include #include - -#ifndef GCC_VERSION -#define GCC_VERSION (__GNUC__ * 1000 + __GNUC_MINOR__) -#endif /* GCC_VERSION */ +#include #if defined(CONFIG_X86) /* @@ -237,7 +234,7 @@ gd_t *global_data; * implementation. On the other hand, asm() statements with * arguments can be used only inside the functions (gcc limitation) */ -#if GCC_VERSION < 3004 +#if GCC_VERSION < 30400 static #endif /* GCC_VERSION */ void __attribute__((unused)) dummy(void) diff --git a/fs/Kconfig b/fs/Kconfig new file mode 100644 index 0000000..41bb0b9 --- /dev/null +++ b/fs/Kconfig @@ -0,0 +1,19 @@ +# +# File system configuration +# + +menu "File systems" + +source "fs/ext4/Kconfig" + +source "fs/reiserfs/Kconfig" + +source "fs/fat/Kconfig" + +source "fs/jffs2/Kconfig" + +source "fs/ubifs/Kconfig" + +source "fs/cramfs/Kconfig" + +endmenu diff --git a/fs/cramfs/Kconfig b/fs/cramfs/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/fs/cramfs/Kconfig @@ -0,0 +1 @@ + diff --git a/fs/ext4/Kconfig b/fs/ext4/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/fs/ext4/Kconfig @@ -0,0 +1 @@ + diff --git a/fs/fat/Kconfig b/fs/fat/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/fs/fat/Kconfig @@ -0,0 +1 @@ + diff --git a/fs/jffs2/Kconfig b/fs/jffs2/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/fs/jffs2/Kconfig @@ -0,0 +1 @@ + diff --git a/fs/reiserfs/Kconfig b/fs/reiserfs/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/fs/reiserfs/Kconfig @@ -0,0 +1 @@ + diff --git a/fs/ubifs/Kconfig b/fs/ubifs/Kconfig new file mode 100644 index 0000000..8b13789 --- /dev/null +++ b/fs/ubifs/Kconfig @@ -0,0 +1 @@ + diff --git a/fs/ubifs/budget.c b/fs/ubifs/budget.c index 9ed4017..c626cbf 100644 --- a/fs/ubifs/budget.c +++ b/fs/ubifs/budget.c @@ -20,7 +20,6 @@ */ #include "ubifs.h" -#define __UBOOT__ #ifndef __UBOOT__ #include #else diff --git a/fs/ubifs/debug.c b/fs/ubifs/debug.c index 2f50a55..6e6f018 100644 --- a/fs/ubifs/debug.c +++ b/fs/ubifs/debug.c @@ -16,7 +16,6 @@ * various local functions of those subsystems. */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/fs/ubifs/debug.h b/fs/ubifs/debug.h index 6d325af..807ce1b 100644 --- a/fs/ubifs/debug.h +++ b/fs/ubifs/debug.h @@ -12,7 +12,6 @@ #ifndef __UBIFS_DEBUG_H__ #define __UBIFS_DEBUG_H__ -#define __UBOOT__ /* Checking helper functions */ typedef int (*dbg_leaf_callback)(struct ubifs_info *c, struct ubifs_zbranch *zbr, void *priv); diff --git a/fs/ubifs/io.c b/fs/ubifs/io.c index f87341e..bdccdc4 100644 --- a/fs/ubifs/io.c +++ b/fs/ubifs/io.c @@ -59,7 +59,6 @@ * they are read from the flash media. */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/fs/ubifs/log.c b/fs/ubifs/log.c index ced0424..0355fe2 100644 --- a/fs/ubifs/log.c +++ b/fs/ubifs/log.c @@ -16,7 +16,6 @@ * journal. */ -#define __UBOOT__ #ifdef __UBOOT__ #include #endif diff --git a/fs/ubifs/lprops.c b/fs/ubifs/lprops.c index fc6686b..a1a814f 100644 --- a/fs/ubifs/lprops.c +++ b/fs/ubifs/lprops.c @@ -17,7 +17,6 @@ * an empty LEB for the journal, or a very dirty LEB for garbage collection. */ -#define __UBOOT__ #ifdef __UBOOT__ #include #endif diff --git a/fs/ubifs/lpt.c b/fs/ubifs/lpt.c index c49d3b0..8489e90 100644 --- a/fs/ubifs/lpt.c +++ b/fs/ubifs/lpt.c @@ -33,7 +33,6 @@ */ #include "ubifs.h" -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/fs/ubifs/lpt_commit.c b/fs/ubifs/lpt_commit.c index cad422e..c818d4c 100644 --- a/fs/ubifs/lpt_commit.c +++ b/fs/ubifs/lpt_commit.c @@ -14,7 +14,6 @@ * subsystem. */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/fs/ubifs/master.c b/fs/ubifs/master.c index 00ca855..761e070 100644 --- a/fs/ubifs/master.c +++ b/fs/ubifs/master.c @@ -11,7 +11,6 @@ /* This file implements reading and writing the master node */ -#define __UBOOT__ #include "ubifs.h" #ifdef __UBOOT__ #include diff --git a/fs/ubifs/misc.h b/fs/ubifs/misc.h index 4316d3c..7cad2be 100644 --- a/fs/ubifs/misc.h +++ b/fs/ubifs/misc.h @@ -16,7 +16,6 @@ #ifndef __UBIFS_MISC_H__ #define __UBIFS_MISC_H__ -#define __UBOOT__ /** * ubifs_zn_dirty - check if znode is dirty. * @znode: znode to check diff --git a/fs/ubifs/recovery.c b/fs/ubifs/recovery.c index f54a440..7637707 100644 --- a/fs/ubifs/recovery.c +++ b/fs/ubifs/recovery.c @@ -36,7 +36,6 @@ * refuses to mount. */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/fs/ubifs/replay.c b/fs/ubifs/replay.c index 6393b15..7268b37 100644 --- a/fs/ubifs/replay.c +++ b/fs/ubifs/replay.c @@ -21,7 +21,6 @@ * larger is the journal, the more memory its index may consume. */ -#define __UBOOT__ #ifdef __UBOOT__ #include #include diff --git a/fs/ubifs/sb.c b/fs/ubifs/sb.c index fc0194a..4983bf6 100644 --- a/fs/ubifs/sb.c +++ b/fs/ubifs/sb.c @@ -16,7 +16,6 @@ */ #include "ubifs.h" -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/fs/ubifs/scan.c b/fs/ubifs/scan.c index 5523d4e..6fc464b 100644 --- a/fs/ubifs/scan.c +++ b/fs/ubifs/scan.c @@ -16,7 +16,6 @@ * debugging functions. */ -#define __UBOOT__ #ifdef __UBOOT__ #include #endif diff --git a/fs/ubifs/super.c b/fs/ubifs/super.c index dd9b668..01d449a 100644 --- a/fs/ubifs/super.c +++ b/fs/ubifs/super.c @@ -15,7 +15,6 @@ * corresponding subsystems, but most of it is here. */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/fs/ubifs/tnc.c b/fs/ubifs/tnc.c index eda5070..95cae54 100644 --- a/fs/ubifs/tnc.c +++ b/fs/ubifs/tnc.c @@ -19,7 +19,6 @@ * the mutex locked. */ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/fs/ubifs/tnc_misc.c b/fs/ubifs/tnc_misc.c index 81bdad9..f808e0b 100644 --- a/fs/ubifs/tnc_misc.c +++ b/fs/ubifs/tnc_misc.c @@ -16,7 +16,6 @@ * putting it all in one file would make that file too big and unreadable. */ -#define __UBOOT__ #ifdef __UBOOT__ #include #endif diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c index b91a6fd..49e6f46 100644 --- a/fs/ubifs/ubifs.c +++ b/fs/ubifs/ubifs.c @@ -26,7 +26,6 @@ #include "ubifs.h" #include -#define __UBOOT__ #include #include diff --git a/fs/ubifs/ubifs.h b/fs/ubifs/ubifs.h index acc6a40..0ce2475 100644 --- a/fs/ubifs/ubifs.h +++ b/fs/ubifs/ubifs.h @@ -15,7 +15,6 @@ #ifndef __UBIFS_H__ #define __UBIFS_H__ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/fs/zfs/zfs.c b/fs/zfs/zfs.c index 099d517..818d3d9 100644 --- a/fs/zfs/zfs.c +++ b/fs/zfs/zfs.c @@ -772,7 +772,7 @@ zap_leaf_array_equal(zap_leaf_phys_t *l, zfs_endian_t endian, while (bseen < array_len) { struct zap_leaf_array *la = &ZAP_LEAF_CHUNK(l, blksft, chunk).l_array; - int toread = MIN(array_len - bseen, ZAP_LEAF_ARRAY_BYTES); + int toread = min(array_len - bseen, ZAP_LEAF_ARRAY_BYTES); if (chunk >= ZAP_LEAF_NUMCHUNKS(blksft)) return 0; @@ -794,7 +794,7 @@ zap_leaf_array_get(zap_leaf_phys_t *l, zfs_endian_t endian, int blksft, while (bseen < array_len) { struct zap_leaf_array *la = &ZAP_LEAF_CHUNK(l, blksft, chunk).l_array; - int toread = MIN(array_len - bseen, ZAP_LEAF_ARRAY_BYTES); + int toread = min(array_len - bseen, ZAP_LEAF_ARRAY_BYTES); if (chunk >= ZAP_LEAF_NUMCHUNKS(blksft)) /* Don't use errno because this error is to be ignored. */ @@ -2118,7 +2118,7 @@ zfs_read(zfs_file_t file, char *buf, uint64_t len) data->file_start = blkid * blksz; data->file_end = data->file_start + blksz; - movesize = MIN(length, data->file_end - (int) file->offset - red); + movesize = min(length, data->file_end - (int)file->offset - red); memmove(buf, data->file_buf + file->offset + red - data->file_start, movesize); diff --git a/include/aboot.h b/include/aboot.h new file mode 100644 index 0000000..30e4d36 --- /dev/null +++ b/include/aboot.h @@ -0,0 +1,28 @@ +/* + * Copyright 2014 Broadcom Corporation. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include + +#define ROUNDUP(x, y) (((x) + ((y) - 1)) & ~((y) - 1)) + +void fastboot_fail(const char *s); +void fastboot_okay(const char *s); + +static inline int is_sparse_image(void *buf) +{ + sparse_header_t *s_header = (sparse_header_t *)buf; + + if ((le32_to_cpu(s_header->magic) == SPARSE_HEADER_MAGIC) && + (le16_to_cpu(s_header->major_version) == 1)) + return 1; + + return 0; +} + +void write_sparse_image(block_dev_desc_t *dev_desc, + disk_partition_t *info, const char *part_name, + void *data, unsigned sz); diff --git a/include/common.h b/include/common.h index c7e51ca..a76bcd6 100644 --- a/include/common.h +++ b/include/common.h @@ -181,9 +181,6 @@ typedef void (interrupt_handler_t)(void *); typeof(Y) __y = (Y); \ (__x > __y) ? __x : __y; }) -#define MIN(x, y) min(x, y) -#define MAX(x, y) max(x, y) - #define min3(X, Y, Z) \ ({ typeof(X) __x = (X); \ typeof(Y) __y = (Y); \ @@ -198,9 +195,6 @@ typedef void (interrupt_handler_t)(void *); __x > __y ? (__x > __z ? __x : __z) : \ (__y > __z ? __y : __z); }) -#define MIN3(x, y, z) min3(x, y, z) -#define MAX3(x, y, z) max3(x, y, z) - /* * Return the absolute value of a number. * @@ -616,6 +610,7 @@ int checkicache (void); int checkdcache (void); void upmconfig (unsigned int, unsigned int *, unsigned int); ulong get_tbclk (void); +void reset_misc (void); void reset_cpu (ulong addr); #if defined (CONFIG_OF_LIBFDT) && defined (CONFIG_OF_BOARD_SETUP) void ft_cpu_setup(void *blob, bd_t *bd); @@ -792,6 +787,45 @@ int gunzip(void *, int, unsigned char *, unsigned long *); int zunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp, int stoponerr, int offset); +/** + * gzwrite progress indicators: defined weak to allow board-specific + * overrides: + * + * gzwrite_progress_init called on startup + * gzwrite_progress called during decompress/write loop + * gzwrite_progress_finish called at end of loop to + * indicate success (retcode=0) or failure + */ +void gzwrite_progress_init(u64 expected_size); + +void gzwrite_progress(int iteration, + u64 bytes_written, + u64 total_bytes); + +void gzwrite_progress_finish(int retcode, + u64 totalwritten, + u64 totalsize, + u32 expected_crc, + u32 calculated_crc); + +/** + * decompress and write gzipped image from memory to block device + * + * @param src compressed image address + * @param len compressed image length in bytes + * @param dev block device descriptor + * @param szwritebuf bytes per write (pad to erase size) + * @param startoffs offset in bytes of first write + * @param szexpected expected uncompressed length + * may be zero to use gzip trailer + * for files under 4GiB + */ +int gzwrite(unsigned char *src, int len, + struct block_dev_desc *dev, + unsigned long szwritebuf, + u64 startoffs, + u64 szexpected); + /* lib/qsort.c */ void qsort(void *base, size_t nmemb, size_t size, int(*compar)(const void *, const void *)); diff --git a/include/compiler.h b/include/compiler.h index 9afc11b..1451916 100644 --- a/include/compiler.h +++ b/include/compiler.h @@ -129,9 +129,6 @@ typedef unsigned long int uintptr_t; #endif /* USE_HOSTCC */ -/* compiler options */ -#define uninitialized_var(x) x = x - #define likely(x) __builtin_expect(!!(x), 1) #define unlikely(x) __builtin_expect(!!(x), 0) diff --git a/include/config_cmd_defaults.h b/include/config_cmd_defaults.h deleted file mode 100644 index a55b268..0000000 --- a/include/config_cmd_defaults.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * config_cmd_defaults.h - sane defaults for everyone - * - * Copyright (c) 2010-2011 Analog Devices Inc. - * - * Licensed under the GPL-2 or later. - */ - -#ifndef _CONFIG_CMD_DEFAULTS_H_ -#define _CONFIG_CMD_DEFAULTS_H_ - -#define CONFIG_CMD_BOOTM 1 -#define CONFIG_CMD_CRC32 1 -#define CONFIG_CMD_EXPORTENV 1 -#define CONFIG_CMD_GO 1 -#define CONFIG_CMD_IMPORTENV 1 - -#endif diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h index 90d9901..be616e8 100644 --- a/include/config_distro_bootcmd.h +++ b/include/config_distro_bootcmd.h @@ -53,10 +53,23 @@ #endif #ifdef CONFIG_CMD_SCSI -#define BOOTENV_SHARED_SCSI BOOTENV_SHARED_BLKDEV(scsi) +#define BOOTENV_RUN_SCSI_INIT "run scsi_init; " +#define BOOTENV_SET_SCSI_NEED_INIT "setenv scsi_need_init; " +#define BOOTENV_SHARED_SCSI \ + "scsi_init=" \ + "if ${scsi_need_init}; then " \ + "setenv scsi_need_init false; " \ + "scsi scan; " \ + "fi\0" \ + \ + "scsi_boot=" \ + BOOTENV_RUN_SCSI_INIT \ + BOOTENV_SHARED_BLKDEV_BODY(scsi) #define BOOTENV_DEV_SCSI BOOTENV_DEV_BLKDEV #define BOOTENV_DEV_NAME_SCSI BOOTENV_DEV_NAME_BLKDEV #else +#define BOOTENV_RUN_SCSI_INIT +#define BOOTENV_SET_SCSI_NEED_INIT #define BOOTENV_SHARED_SCSI #define BOOTENV_DEV_SCSI \ BOOT_TARGET_DEVICES_references_SCSI_without_CONFIG_CMD_SCSI @@ -189,7 +202,7 @@ \ BOOT_TARGET_DEVICES(BOOTENV_DEV) \ \ - "bootcmd=" BOOTENV_SET_USB_NEED_INIT \ + "bootcmd=" BOOTENV_SET_USB_NEED_INIT BOOTENV_SET_SCSI_NEED_INIT \ "for target in ${boot_targets}; do " \ "run bootcmd_${target}; " \ "done\0" diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 953d06b..9063c57 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -227,6 +227,7 @@ unsigned long get_board_ddr_clk(void); #endif /* EEPROM */ +#define CONFIG_ID_EEPROM #define CONFIG_SYS_I2C_EEPROM_NXID #define CONFIG_SYS_EEPROM_BUS_NUM 0 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 @@ -819,9 +820,16 @@ unsigned long get_board_ddr_clk(void); #define __USB_PHY_TYPE ulpi +#ifdef CONFIG_PPC_B4860 +#define HWCONFIG "hwconfig=fsl_ddr:ctlr_intlv=null," \ + "bank_intlv=cs0_cs1;" \ + "en_cpc:cpc2;" +#else +#define HWCONFIG "hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=cs0_cs1;" +#endif + #define CONFIG_EXTRA_ENV_SETTINGS \ - "hwconfig=fsl_ddr:ctlr_intlv=null," \ - "bank_intlv=cs0_cs1;" \ + HWCONFIG \ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 0ee0ff2..5e2c100 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -19,6 +19,9 @@ #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1040_rcw.cfg #endif #ifdef CONFIG_T1042RDB_PI +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_pi_rcw.cfg +#endif +#ifdef CONFIG_T1042RDB #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_rcw.cfg #endif @@ -477,7 +480,7 @@ /* I2C bus multiplexer */ #define I2C_MUX_PCA_ADDR 0x70 -#ifdef CONFIG_T1040RDB +#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) #define I2C_MUX_CH_DEFAULT 0x8 #endif @@ -503,6 +506,7 @@ #define CONFIG_FSL_ESPI #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_BAR #define CONFIG_CMD_SF #define CONFIG_SF_DEFAULT_SPEED 10000000 #define CONFIG_SF_DEFAULT_MODE 0 @@ -633,7 +637,7 @@ #define CONFIG_SYS_DPAA_FMAN #define CONFIG_SYS_DPAA_PME -#ifdef CONFIG_T1040RDB +#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) #define CONFIG_QE #define CONFIG_U_QE #endif @@ -662,7 +666,7 @@ #define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000 #endif -#ifdef CONFIG_T1040RDB +#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) #if defined(CONFIG_SPIFLASH) #define CONFIG_SYS_QE_FW_ADDR 0x130000 #elif defined(CONFIG_SDCARD) @@ -686,7 +690,7 @@ #endif #ifdef CONFIG_FMAN_ENET -#ifdef CONFIG_T1040RDB +#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB) #define CONFIG_SYS_SGMII1_PHY_ADDR 0x03 #endif #define CONFIG_SYS_RGMII1_PHY_ADDR 0x01 @@ -788,13 +792,14 @@ #define CONFIG_BAUDRATE 115200 #define __USB_PHY_TYPE utmi +#define RAMDISKFILE "t104xrdb/ramdisk.uboot" #ifdef CONFIG_T1040RDB #define FDTFILE "t1040rdb/t1040rdb.dtb" -#define RAMDISKFILE "t1040rdb/ramdisk.uboot" -#elif CONFIG_T1042RDB_PI -#define FDTFILE "t1040rdb_pi/t1040rdb_pi.dtb" -#define RAMDISKFILE "t1040rdb_pi/ramdisk.uboot" +#elif defined(CONFIG_T1042RDB_PI) +#define FDTFILE "t1042rdb_pi/t1042rdb_pi.dtb" +#elif defined(CONFIG_T1042RDB) +#define FDTFILE "t1042rdb/t1042rdb.dtb" #endif #ifdef CONFIG_FSL_DIU_FB diff --git a/include/configs/a.h b/include/configs/a.h new file mode 100644 index 0000000..cf8416f --- /dev/null +++ b/include/configs/a.h @@ -0,0 +1,269 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices Nitrogen6X + * and Freescale i.MX6Q Sabre Lite boards. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 0xffffffff + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 1 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_CONSOLE_MUX + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#define BOOTDEVS "usb mmc" + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=" BOOTDEVS "\0" \ + "console=ttymxc1\0" \ + "disable_giga=1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=script=/6x_bootscript; run runscript;" \ + "ums 0 mmc 0;\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "usbnetwork=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1;\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=script=/6x_upgrade; run runscript\0" \ + "disable_giga=1\0" \ + "runscript=disk=0;" \ + "for dtype in ${bootdevs} ; do " \ + "if itest.s ${dtype} == usb ; then " \ + "setexpr otgstat *0x020c9030 \\\\& 0x08000000;" \ + "if itest.l ${otgstat} -eq 0 ; then " \ + "usb start;" \ + "fi ;" \ + "fi;" \ + "load ${dtype} ${disk}:1 " \ + "10008000 $script " \ + "&& source 10008000 ; " \ + "done;" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=run usbnetwork; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-a-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-a-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + "tftpu=run usbnetwork; " \ + "setenv uboot_file \"u-boot.amp\"; " \ + "tftp 12000000 10.0.0.1:$uboot_file && sf probe && " \ + "if sf read 0x12400000 0x400 $filesize ; then " \ + "if cmp.b 0x12000000 0x12400000 $filesize ; then " \ + "echo \"-- U-Boot versions match\" ; exit; " \ + "fi ; " \ + "echo \"----- (re)programming U-Boot\"; " \ + "sf erase 0 0xC0000 ; " \ + "sf write 0x12000000 0x400 $filesize && " \ + "sf read 12400000 0x400 $filesize && " \ + "if cmp.b 0x12000000 0x12400000 $filesize ; then " \ + "echo \"--- U-Boot updated\" ; echo \"cycle power\" ;" \ + "else " \ + "echo \"!! Error programming U-Boot\"; " \ + "fi; " \ + "exit; " \ + "fi; " \ + "echo \"U-Boot file ($uboot_file) not found on server\" \0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_CMD_GPIO +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#endif /* __CONFIG_H */ diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index df1a6fc..e2f7ead 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -23,9 +23,6 @@ # define CONFIG_TIMESTAMP # define CONFIG_LZO # ifdef CONFIG_ENABLE_VBOOT -# define CONFIG_OF_CONTROL -# define CONFIG_OF_SEPARATE -# define CONFIG_DEFAULT_DEVICE_TREE am335x-boneblack # define CONFIG_FIT_SIGNATURE # define CONFIG_RSA # endif @@ -115,6 +112,9 @@ "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \ "ip=dhcp\0" \ "bootenv=uEnv.txt\0" \ + "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ + "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ + "source ${loadaddr}\0" \ "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ "importbootenv=echo Importing environment from mmc ...; " \ "env import -t -r $loadaddr $filesize\0" \ @@ -142,17 +142,21 @@ "mmcboot=mmc dev ${mmcdev}; " \ "if mmc rescan; then " \ "echo SD/MMC found on device ${mmcdev};" \ - "if run loadbootenv; then " \ - "echo Loaded environment from ${bootenv};" \ - "run importbootenv;" \ - "fi;" \ - "if test -n $uenvcmd; then " \ - "echo Running uenvcmd ...;" \ - "run uenvcmd;" \ - "fi;" \ - "if run loadimage; then " \ - "run mmcloados;" \ - "fi;" \ + "if run loadbootscript; then " \ + "run bootscript;" \ + "else " \ + "if run loadbootenv; then " \ + "echo Loaded environment from ${bootenv};" \ + "run importbootenv;" \ + "fi;" \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd ...;" \ + "run uenvcmd;" \ + "fi;" \ + "if run loadimage; then " \ + "run mmcloados;" \ + "fi;" \ + "fi ;" \ "fi;\0" \ "spiboot=echo Booting from spi ...; " \ "run spiargs; " \ @@ -398,8 +402,6 @@ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_LOAD -#define CONFIG_SPL_SPI_BUS 0 -#define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 #define CONFIG_ENV_IS_IN_SPI_FLASH diff --git a/include/configs/am335x_igep0033.h b/include/configs/am335x_igep0033.h index dcded0a..a14310a 100644 --- a/include/configs/am335x_igep0033.h +++ b/include/configs/am335x_igep0033.h @@ -14,11 +14,8 @@ #ifndef __CONFIG_IGEP0033_H #define __CONFIG_IGEP0033_H -#define CONFIG_AM33XX -#define CONFIG_OMAP -#define CONFIG_OMAP_COMMON - -#include +#define CONFIG_NAND +#include /* Mach type */ #define MACH_TYPE_IGEP0033 4521 /* Until the next sync */ @@ -29,166 +26,81 @@ #define V_SCLK (V_OSCK) #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ -#define CONFIG_SYS_MALLOC_LEN (1024 << 10) -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ -#define CONFIG_SYS_PROMPT "U-Boot# " -#define CONFIG_SYS_NO_FLASH - -/* Display cpuinfo */ -#define CONFIG_DISPLAY_CPUINFO - -/* Flattened Device Tree */ -#define CONFIG_OF_LIBFDT - -/* Commands to include */ -#include - -#define CONFIG_CMD_ASKENV -#define CONFIG_CMD_BOOTZ -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_ECHO -#define CONFIG_CMD_EXT4 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_FS_GENERIC -#define CONFIG_CMD_MMC -#define CONFIG_CMD_MTDPARTS -#define CONFIG_CMD_NAND -#define CONFIG_CMD_NET -#define CONFIG_CMD_PING -#define CONFIG_CMD_UBI -#define CONFIG_CMD_UBIFS /* Make the verbose messages from UBI stop printing */ #define CONFIG_UBI_SILENCE_MSG #define CONFIG_UBIFS_SILENCE_MSG -#define CONFIG_BOOTDELAY 1 /* negative for no autoboot */ -#define CONFIG_ENV_VARS_UBOOT_CONFIG #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + +#ifndef CONFIG_SPL_BUILD #define CONFIG_EXTRA_ENV_SETTINGS \ - "loadaddr=0x80F80000\0" \ - "dtbaddr=0x80200000\0" \ + DEFAULT_LINUX_BOOT_ENV \ "bootdir=/boot\0" \ "bootfile=zImage\0" \ "dtbfile=am335x-base0033.dtb\0" \ "console=ttyO0,115200n8\0" \ - "mtdids=" MTDIDS_DEFAULT "\0" \ - "mtdparts=" MTDPARTS_DEFAULT "\0" \ "mmcdev=0\0" \ "mmcroot=/dev/mmcblk0p2 rw\0" \ - "ubiroot=ubi0:filesystem rw ubi.mtd=3,2048\0" \ "mmcrootfstype=ext4 rootwait\0" \ - "ubirootfstype=ubifs rootwait\0" \ "mmcargs=setenv bootargs console=${console} " \ + "${optargs} " \ "root=${mmcroot} " \ "rootfstype=${mmcrootfstype}\0" \ - "ubiargs=setenv bootargs console=${console} " \ - "root=${ubiroot} " \ - "rootfstype=${ubirootfstype}\0" \ - "bootenv=uEnv.txt\0" \ + "bootenv=uEnv.txt\0" \ "loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \ "importbootenv=echo Importing environment from mmc ...; " \ "env import -t ${loadaddr} ${filesize}\0" \ "mmcload=load mmc ${mmcdev}:2 ${loadaddr} ${bootdir}/${bootfile}; " \ - "load mmc ${mmcdev}:2 ${dtbaddr} ${bootdir}/${dtbfile}\0" \ - "ubiload=ubi part filesystem 2048; ubifsmount ubi0; " \ + "load mmc ${mmcdev}:2 ${fdtaddr} ${bootdir}/${dtbfile}\0" \ + "mmcboot=mmc dev ${mmcdev}; " \ + "if mmc rescan; then " \ + "echo SD/MMC found on device ${mmcdev};" \ + "if run loadbootenv; then " \ + "echo Loaded environment from ${bootenv};" \ + "run importbootenv;" \ + "fi;" \ + "if test -n $uenvcmd; then " \ + "echo Running uenvcmd ...;" \ + "run uenvcmd;" \ + "fi;" \ + "if run mmcload; then " \ + "run mmcargs; " \ + "bootz ${loadaddr} - ${fdtaddr};" \ + "fi;" \ + "fi;\0" \ + "mtdids=" MTDIDS_DEFAULT "\0" \ + "mtdparts=" MTDPARTS_DEFAULT "\0" \ + "nandroot=ubi0:filesystem rw ubi.mtd=3,2048\0" \ + "nandrootfstype=ubifs rootwait\0" \ + "nandload=ubi part filesystem 2048; ubifsmount ubi0; " \ "ubifsload ${loadaddr} ${bootdir}/${bootfile}; " \ - "ubifsload ${dtbaddr} ${bootdir}/${dtbfile} \0" \ - "mmcboot=echo Booting from mmc ...; " \ - "run mmcargs; " \ - "bootz ${loadaddr} - ${dtbaddr}\0" \ - "ubiboot=echo Booting from nand (ubifs) ...; " \ - "run ubiargs; run ubiload; " \ - "bootz ${loadaddr} - ${dtbaddr}\0" \ + "ubifsload ${fdtaddr} ${bootdir}/${dtbfile} \0" \ + "nandargs=setenv bootargs console=${console} " \ + "${optargs} " \ + "root=${nandroot} " \ + "rootfstype=${nandrootfstype} \0" \ + "nandboot=echo Booting from nand ...; " \ + "run nandargs; " \ + "run nandload; " \ + "bootz ${loadaddr} - ${fdtaddr} \0" +#endif #define CONFIG_BOOTCOMMAND \ - "mmc dev ${mmcdev}; if mmc rescan; then " \ - "echo SD/MMC found on device ${mmcdev};" \ - "if run loadbootenv; then " \ - "echo Loaded environment from ${bootenv};" \ - "run importbootenv;" \ - "fi;" \ - "if test -n $uenvcmd; then " \ - "echo Running uenvcmd ...;" \ - "run uenvcmd;" \ - "fi;" \ - "if run mmcload; then " \ - "run mmcboot;" \ - "fi;" \ - "else " \ - "run ubiboot;" \ - "fi;" \ - -/* Max number of command args */ -#define CONFIG_SYS_MAXARGS 16 - -/* Console I/O Buffer Size */ -#define CONFIG_SYS_CBSIZE 512 - -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ - + sizeof(CONFIG_SYS_PROMPT) + 16) - -/* Boot Argument Buffer Size */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE -#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ - -/* Physical Memory Map */ -#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ -#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */ - -#define CONFIG_SYS_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ - GENERATED_GBL_DATA_SIZE) -/* Platform/Board specific defs */ -#define CONFIG_SYS_TIMERBASE 0x48040000 /* Use Timer2 */ -#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ + "run mmcboot;" \ + "run nandboot;" /* NS16550 Configuration */ -#define CONFIG_SYS_NS16550 -#define CONFIG_SYS_NS16550_SERIAL -#define CONFIG_SYS_NS16550_REG_SIZE (-4) -#define CONFIG_SYS_NS16550_CLK (48000000) #define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ - #define CONFIG_CONS_INDEX 1 #define CONFIG_BAUDRATE 115200 -/* CPU */ -#define CONFIG_ARCH_CPU_INIT - -#define CONFIG_ENV_OVERWRITE 1 -#define CONFIG_SYS_CONSOLE_INFO_QUIET - -/* MMC support */ -#define CONFIG_MMC -#define CONFIG_GENERIC_MMC -#define CONFIG_OMAP_HSMMC -#define CONFIG_DOS_PARTITION - -/* GPIO support */ -#define CONFIG_OMAP_GPIO - /* Ethernet support */ -#define CONFIG_DRIVER_TI_CPSW -#define CONFIG_MII -#define CONFIG_BOOTP_DNS -#define CONFIG_BOOTP_DNS2 -#define CONFIG_BOOTP_SEND_HOSTNAME -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_SUBNETMASK -#define CONFIG_NET_RETRY_COUNT 10 -#define CONFIG_NET_MULTI #define CONFIG_PHYLIB #define CONFIG_PHY_SMSC /* NAND support */ -#define CONFIG_NAND -#define CONFIG_NAND_OMAP_GPMC #define CONFIG_NAND_OMAP_ELM -#define CONFIG_SYS_NAND_BASE (0x08000000) /* phys address CS0 */ -#define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_ONFI_DETECTION 1 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ #define CONFIG_SYS_REDUNDAND_ENVIRONMENT @@ -210,40 +122,11 @@ /* Unsupported features */ #undef CONFIG_USE_IRQ -/* Defines for SPL */ -#define CONFIG_SPL_FRAMEWORK -/* - * Place the image at the start of the ROM defined image space. - * We limit our size to the ROM-defined downloaded image area, and use the - * rest of the space for stack. - */ -#define CONFIG_SPL_TEXT_BASE 0x402F0400 -#define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE) -#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR - -#define CONFIG_SPL_BSS_START_ADDR 0x80000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ - -#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ -#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ -#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 -#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" -#define CONFIG_SPL_MMC_SUPPORT -#define CONFIG_SPL_FAT_SUPPORT -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBDISK_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_SERIAL_SUPPORT -#define CONFIG_SPL_GPIO_SUPPORT +/* SPL */ +#undef CONFIG_SPL_OS_BOOT /* Not supported by existing map */ #define CONFIG_SPL_YMODEM_SUPPORT #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" -#define CONFIG_SPL_BOARD_INIT -#define CONFIG_SPL_NAND_AM33XX_BCH -#define CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SPL_NAND_BASE -#define CONFIG_SPL_NAND_DRIVERS -#define CONFIG_SPL_NAND_ECC #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ CONFIG_SYS_NAND_PAGE_SIZE) @@ -267,22 +150,4 @@ #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 -/* - * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM - * 64 bytes before this address should be set aside for u-boot.img's - * header. That is 0x800FFFC0--0x80100000 should not be used for any - * other needs. - */ -#define CONFIG_SYS_TEXT_BASE 0x80800000 -#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 - -/* - * Since SPL did pll and ddr initialization for us, - * we don't need to do it twice. - */ -#ifndef CONFIG_SPL_BUILD -#define CONFIG_SKIP_LOWLEVEL_INIT -#endif - #endif /* ! __CONFIG_IGEP0033_H */ diff --git a/include/configs/arndale.h b/include/configs/arndale.h index 75f9933..43077cf 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -22,8 +22,6 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_DISPLAY_BOARDINFO -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE /* Allow tracing to be enabled */ #define CONFIG_TRACE @@ -226,7 +224,6 @@ #define CONFIG_POWER_I2C #define CONFIG_POWER_MAX77686 -#define CONFIG_DEFAULT_DEVICE_TREE exynos5250-arndale #define CONFIG_PREBOOT diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index 9b0e588..f02fce9 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -31,6 +31,7 @@ #define CONFIG_DISPLAY_CPUINFO #define CONFIG_OF_LIBFDT +#define CONFIG_SYS_GENERIC_BOARD /* general purpose I/O */ #define CONFIG_AT91_GPIO diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index 3747098..b8d5dd1 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -34,6 +34,8 @@ #define CONFIG_CMD_BOOTZ #define CONFIG_OF_LIBFDT +#define CONFIG_SYS_GENERIC_BOARD + #define CONFIG_ATMEL_LEGACY #define CONFIG_AT91_GPIO 1 #define CONFIG_AT91_GPIO_PULLUP 1 diff --git a/include/configs/bct-brettl2.h b/include/configs/bct-brettl2.h index c1eda96..d0828d5 100644 --- a/include/configs/bct-brettl2.h +++ b/include/configs/bct-brettl2.h @@ -137,7 +137,6 @@ #define CONFIG_MTD_DEVICE #define CONFIG_MTD_PARTITIONS #define CONFIG_SYS_HUSH_PARSER -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/beaver.h b/include/configs/beaver.h index d8ed717..164b2dd 100644 --- a/include/configs/beaver.h +++ b/include/configs/beaver.h @@ -24,11 +24,6 @@ /* VDD core PMIC */ #define CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 -/* Enable fdt support for Beaver. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra30-beaver -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - /* High-level configuration options */ #define V_PROMPT "Tegra30 (Beaver) # " #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Beaver" diff --git a/include/configs/bf506f-ezkit.h b/include/configs/bf506f-ezkit.h index 5db1819..0b66cdb 100644 --- a/include/configs/bf506f-ezkit.h +++ b/include/configs/bf506f-ezkit.h @@ -85,8 +85,6 @@ */ #define CONFIG_ENV_IS_NOWHERE #define CONFIG_ENV_SIZE 0x400 -#undef CONFIG_CMD_EXPORTENV -#undef CONFIG_CMD_IMPORTENV /* @@ -102,7 +100,6 @@ #define CONFIG_CMD_MEMORY #undef CONFIG_GZIP #undef CONFIG_ZLIB -#undef CONFIG_CMD_BOOTM #undef CONFIG_BOOTM_RTEMS #undef CONFIG_BOOTM_LINUX diff --git a/include/configs/bf518f-ezbrd.h b/include/configs/bf518f-ezbrd.h index 9e374c4..20f6ed1 100644 --- a/include/configs/bf518f-ezbrd.h +++ b/include/configs/bf518f-ezbrd.h @@ -155,7 +155,6 @@ #define CONFIG_MISC_INIT_R #define CONFIG_RTC_BFIN #define CONFIG_UART_CONSOLE 0 -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/bf526-ezbrd.h b/include/configs/bf526-ezbrd.h index 972eca9..c33d035 100644 --- a/include/configs/bf526-ezbrd.h +++ b/include/configs/bf526-ezbrd.h @@ -153,7 +153,6 @@ #define CONFIG_MISC_INIT_R #define CONFIG_RTC_BFIN #define CONFIG_UART_CONSOLE 1 -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* define to enable run status via led */ /* #define CONFIG_STATUS_LED */ diff --git a/include/configs/bf527-ad7160-eval.h b/include/configs/bf527-ad7160-eval.h index c0dfe26..b497f26 100644 --- a/include/configs/bf527-ad7160-eval.h +++ b/include/configs/bf527-ad7160-eval.h @@ -136,7 +136,6 @@ */ #define CONFIG_MISC_INIT_R #define CONFIG_UART_CONSOLE 0 -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/bf527-ezkit.h b/include/configs/bf527-ezkit.h index 92c183e..0bca53f 100644 --- a/include/configs/bf527-ezkit.h +++ b/include/configs/bf527-ezkit.h @@ -179,7 +179,6 @@ #define CONFIG_MISC_INIT_R #define CONFIG_RTC_BFIN #define CONFIG_UART_CONSOLE 1 -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/bf527-sdp.h b/include/configs/bf527-sdp.h index 458868a..9d43b81 100644 --- a/include/configs/bf527-sdp.h +++ b/include/configs/bf527-sdp.h @@ -112,7 +112,6 @@ */ #define CONFIG_MISC_INIT_R #define CONFIG_UART_CONSOLE 0 -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/bf533-ezkit.h b/include/configs/bf533-ezkit.h index b503528..0fda967 100644 --- a/include/configs/bf533-ezkit.h +++ b/include/configs/bf533-ezkit.h @@ -110,7 +110,6 @@ #define CONFIG_MISC_INIT_R #define CONFIG_RTC_BFIN #define CONFIG_UART_CONSOLE 0 -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/bf533-stamp.h b/include/configs/bf533-stamp.h index 3d36d84..ae4d83a 100644 --- a/include/configs/bf533-stamp.h +++ b/include/configs/bf533-stamp.h @@ -186,7 +186,6 @@ */ #define CONFIG_RTC_BFIN #define CONFIG_UART_CONSOLE 0 -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* FLASH/ETHERNET uses the same async bank */ #define SHARED_RESOURCES 1 diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h index a302f83..29f9316 100644 --- a/include/configs/bf537-stamp.h +++ b/include/configs/bf537-stamp.h @@ -254,7 +254,6 @@ #define CONFIG_MISC_INIT_R #define CONFIG_RTC_BFIN #define CONFIG_UART_CONSOLE 0 -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* Define if want to do post memory test */ #undef CONFIG_POST diff --git a/include/configs/bf538f-ezkit.h b/include/configs/bf538f-ezkit.h index 32df5ec..a655282 100644 --- a/include/configs/bf538f-ezkit.h +++ b/include/configs/bf538f-ezkit.h @@ -135,7 +135,6 @@ */ #define CONFIG_RTC_BFIN #define CONFIG_UART_CONSOLE 0 -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/bf548-ezkit.h b/include/configs/bf548-ezkit.h index 1a245a2..da5f029 100644 --- a/include/configs/bf548-ezkit.h +++ b/include/configs/bf548-ezkit.h @@ -181,7 +181,6 @@ #define CONFIG_RTC_BFIN #define CONFIG_UART_CONSOLE 1 #define CONFIG_BFIN_SPI_IMG_SIZE 0x50000 -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED #define CONFIG_ADI_GPIO2 diff --git a/include/configs/bf561-acvilon.h b/include/configs/bf561-acvilon.h index 3db917e..6871d8c 100644 --- a/include/configs/bf561-acvilon.h +++ b/include/configs/bf561-acvilon.h @@ -160,7 +160,6 @@ #define CONFIG_UART_CONSOLE 0 #define CONFIG_BAUDRATE 57600 #define CONFIG_SYS_PROMPT "Acvilon> " -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/bf561-ezkit.h b/include/configs/bf561-ezkit.h index 0a309d9..fb6f948 100644 --- a/include/configs/bf561-ezkit.h +++ b/include/configs/bf561-ezkit.h @@ -102,7 +102,6 @@ * Misc Settings */ #define CONFIG_UART_CONSOLE 0 -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Run core 1 from L1 SRAM start address when init uboot on core 0 diff --git a/include/configs/br4.h b/include/configs/br4.h index f8d3158..3f24008 100644 --- a/include/configs/br4.h +++ b/include/configs/br4.h @@ -135,7 +135,6 @@ #define CONFIG_BOOTCOMMAND "run nandboot" #define CONFIG_BOOTDELAY 2 #define CONFIG_LOADADDR 0x2000000 -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/bt.h b/include/configs/bt.h new file mode 100644 index 0000000..42fecfd --- /dev/null +++ b/include/configs/bt.h @@ -0,0 +1,350 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices bt + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3780 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +/* SPL magic */ +#ifdef CONFIG_SPL +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x00908400 +#define CONFIG_SPL_PAD_TO 0x400 +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7" +#define CONFIG_SPL_STACK 0x0091FFB8 + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_USB +#define CONFIG_SPL_WATCHDOG_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT + +/* SPI flash. */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 + +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SYS_SPL_MALLOC_START 0x00916000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 +#endif + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 3 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + + #define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + +#define CONFIG_BMP_16BPP +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#ifdef CONFIG_USB_STORAGE +#define CONFIG_DRIVE_USB "usb " +#else +#define CONFIG_DRIVE_USB +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_MMC CONFIG_DRIVE_USB + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in ${bootdevs}" \ + "; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ + "for disk in 0 1 2; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "setenv stdin serial,usbkbd\0" \ + "cmd_custom=setenv bootargs $bootargs coherent_pool=32M\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "loadsplash=if sf probe ; then sf read ${splashimage} c2000 ${splashsize} ; fi\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in ${bootdevs}" \ + "; do " \ + "for disk in 0 1 2; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-${board}-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-${board}-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_RESET_CAUSE_ADDR (PHYS_SDRAM + 0x80) + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +/* + * PCI express + */ +/* #define CONFIG_CMD_PCI */ +#ifdef CONFIG_CMD_PCI +#define CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCIE_IMX +#endif + +#define CONFIG_CMD_ELF + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#endif /* __CONFIG_H */ diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 3f889f8..e9d5d01 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -151,7 +151,6 @@ #undef CONFIG_CMD_NFS #undef CONFIG_CMD_SETGETDCR #undef CONFIG_CMD_XIMG -#undef CONFIG_CMD_CRC32 /* define command we need always */ #define CONFIG_CMD_ECHO #define CONFIG_CMD_SOURCE diff --git a/include/configs/cad.h b/include/configs/cad.h new file mode 100644 index 0000000..a72b037 --- /dev/null +++ b/include/configs/cad.h @@ -0,0 +1,295 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices Nitrogen6X + * and Freescale i.MX6Q Sabre Lite boards. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3774 +#define CONFIG_BOARD_NAME "cad" +#define CONFIG_SDHC3_CD -1 +#define CONFIG_SDHC4_CD IMX_GPIO_NR(4, 20) +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE +#define CONFIG_ETHPRIME "usb_ether" + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_MXC_SPI_DISPLAY +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 3 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET + +#define CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + +#define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + +#define CONFIG_BMP_16BPP +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 +#define CONFIG_PREBOOT "if itest.s \"\" != \"$splashsize\" ; then " \ + " sf probe" \ + " && sf read $splashram $splashflash $splashsize" \ + " && bmp d $splashram ;" \ + "fi" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_MMC + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ + "bootargs=console=ttymxc1,115200 enable_wait_mode=off consoleblank=0\0" \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in ${bootdevs}" \ + "; do " \ + "for disk in 0 1 2 ; do ${dtype} dev ${disk} ;" \ + "load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "loadsplash=if sf probe ; then sf read ${splashram} ${splashflash} ${splashsize} ; fi\0" \ + "splashram=0x10008000\0" \ + "splashflash=0xf0000\0" \ + "splashpos=m,m\0" \ + "savesplash=for dtype in mmc ; do " \ + "for disk in 0 1 2; do " \ + "${dtype} dev ${disk} ;" \ + "load ${dtype} ${disk}:1 12800000 /savesplash " \ + "&& source 12800000 ;" \ + "done ;" \ + "done\0" \ + "novideo=1\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in ${bootdevs}" \ + "; do " \ + "for disk in 0 1 2 ; do ${dtype} dev ${disk} ;" \ + "load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done\0" \ + "ethact=usb_ether\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "ipaddr=10.0.0.2\0" \ + "netmask=255.255.255.0\0" \ + "serverip=10.0.0.1\0" \ + "usbrecover=" \ + "tftpboot 10800000 10.0.0.1:uImage-cad-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-cad-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_CMD_ELF + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#endif /* __CONFIG_H */ diff --git a/include/configs/cardhu.h b/include/configs/cardhu.h index 59f429c..09129c7 100644 --- a/include/configs/cardhu.h +++ b/include/configs/cardhu.h @@ -24,11 +24,6 @@ /* VDD core PMIC */ #define CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 -/* Enable fdt support for Cardhu. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra30-cardhu -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - /* High-level configuration options */ #define V_PROMPT "Tegra30 (Cardhu) # " #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Cardhu" diff --git a/include/configs/cm-bf527.h b/include/configs/cm-bf527.h index 8d3ae49..f5351ad 100644 --- a/include/configs/cm-bf527.h +++ b/include/configs/cm-bf527.h @@ -128,7 +128,6 @@ #define FLASHBOOT_ENV_SETTINGS \ "flashboot=flread 20040000 1000000 300000;" \ "bootm 0x1000000\0" -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/cm-bf533.h b/include/configs/cm-bf533.h index 8bd499a..485f01a 100644 --- a/include/configs/cm-bf533.h +++ b/include/configs/cm-bf533.h @@ -97,7 +97,6 @@ #define CONFIG_UART_CONSOLE 0 #define CONFIG_BOOTCOMMAND "run flashboot" #define FLASHBOOT_ENV_SETTINGS "flashboot=bootm 0x20040000\0" -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/cm-bf537e.h b/include/configs/cm-bf537e.h index 47967d7..1729b44 100644 --- a/include/configs/cm-bf537e.h +++ b/include/configs/cm-bf537e.h @@ -146,7 +146,6 @@ "flashboot=flread 20040000 1000000 3c0000;" \ "bootm 0x1000000\0" #define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024)) -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/cm-bf537u.h b/include/configs/cm-bf537u.h index 88c9982..272aa74 100644 --- a/include/configs/cm-bf537u.h +++ b/include/configs/cm-bf537u.h @@ -143,7 +143,6 @@ "flashboot=flread 20040000 1000000 300000;" \ "bootm 0x1000000\0" #define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024)) -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/cm-bf548.h b/include/configs/cm-bf548.h index 346e27f..7f27eda 100644 --- a/include/configs/cm-bf548.h +++ b/include/configs/cm-bf548.h @@ -117,7 +117,6 @@ #define CONFIG_UART_CONSOLE 1 #define CONFIG_BOOTCOMMAND "run flashboot" #define FLASHBOOT_ENV_SETTINGS "flashboot=bootm 0x20040000\0" -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED #define CONFIG_ADI_GPIO2 diff --git a/include/configs/cm-bf561.h b/include/configs/cm-bf561.h index 5265e5f..96910a7 100644 --- a/include/configs/cm-bf561.h +++ b/include/configs/cm-bf561.h @@ -99,7 +99,6 @@ #define CONFIG_UART_CONSOLE 0 #define CONFIG_BOOTCOMMAND "run flashboot" #define FLASHBOOT_ENV_SETTINGS "flashboot=bootm 0x20040000\0" -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h new file mode 100644 index 0000000..10d02b4 --- /dev/null +++ b/include/configs/cm_fx6.h @@ -0,0 +1,290 @@ +/* + * Config file for Compulab CM-FX6 board + * + * Copyright (C) 2014, Compulab Ltd - http://compulab.co.il/ + * + * Author: Nikita Kiryanov + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_CM_FX6_H +#define __CONFIG_CM_FX6_H + +#include +#include +#include "mx6_common.h" + +/* Machine config */ +#define CONFIG_MX6 +#define CONFIG_SYS_LITTLE_ENDIAN +#define CONFIG_MACH_TYPE 4273 +#define CONFIG_SYS_HZ 1000 + +/* Display information on boot */ +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO +#define CONFIG_TIMESTAMP + +/* CMD */ +#include +#define CONFIG_CMD_GREPENV +#undef CONFIG_CMD_FLASH +#undef CONFIG_CMD_LOADB +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_XIMG +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMLS + +/* MMC */ +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR + +/* RAM */ +#define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR +#define PHYS_SDRAM_2 MMDC1_ARB_BASE_ADDR +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_NR_DRAM_BANKS 2 +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* Serial console */ +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART4_BASE +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200} + +/* Shell */ +#define CONFIG_SYS_PROMPT "CM-FX6 # " +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* SPI flash */ +#define CONFIG_SYS_NO_FLASH +#define CONFIG_CMD_SF +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) + +/* Environment */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#define CONFIG_ENV_SIZE (8 * 1024) +#define CONFIG_ENV_OFFSET (768 * 1024) + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel=uImage-cm-fx6\0" \ + "autoload=no\0" \ + "loadaddr=0x10800000\0" \ + "fdtaddr=0x11000000\0" \ + "console=ttymxc3,115200\0" \ + "ethprime=FEC0\0" \ + "bootscr=boot.scr\0" \ + "bootm_low=18000000\0" \ + "video_hdmi=mxcfb0:dev=hdmi,1920x1080M-32@50,if=RGB32\0" \ + "video_dvi=mxcfb0:dev=dvi,1280x800M-32@50,if=RGB32\0" \ + "fdtfile=cm-fx6.dtb\0" \ + "doboot=bootm ${loadaddr}\0" \ + "loadfdt=false\0" \ + "setboottypez=setenv kernel zImage-cm-fx6;" \ + "setenv doboot bootz ${loadaddr} - ${fdtaddr};" \ + "setenv loadfdt true;\0" \ + "setboottypem=setenv kernel uImage-cm-fx6;" \ + "setenv doboot bootm ${loadaddr};" \ + "setenv loadfdt false;\0"\ + "run_eboot=echo Starting EBOOT ...; "\ + "mmc dev ${mmcdev} && " \ + "mmc rescan && mmc read 10042000 a 400 && go 10042000\0" \ + "mmcdev=2\0" \ + "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ + "loadmmcbootscript=load mmc ${mmcdev} ${loadaddr} ${bootscr}\0" \ + "mmcbootscript=echo Running bootscript from mmc ...; "\ + "source ${loadaddr}\0" \ + "mmcargs=setenv bootargs console=${console} " \ + "root=${mmcroot} " \ + "${video}\0" \ + "mmcloadkernel=load mmc ${mmcdev} ${loadaddr} ${kernel}\0" \ + "mmcloadfdt=load mmc ${mmcdev} ${fdtaddr} ${fdtfile}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "run doboot\0" \ + "satadev=0\0" \ + "sataroot=/dev/sda2 rw rootwait\0" \ + "sataargs=setenv bootargs console=${console} " \ + "root=${sataroot} " \ + "${video}\0" \ + "loadsatabootscript=load sata ${satadev} ${loadaddr} ${bootscr}\0" \ + "satabootscript=echo Running bootscript from sata ...; " \ + "source ${loadaddr}\0" \ + "sataloadkernel=load sata ${satadev} ${loadaddr} ${kernel}\0" \ + "sataloadfdt=load sata ${satadev} ${fdtaddr} ${fdtfile}\0" \ + "sataboot=echo Booting from sata ...; "\ + "run sataargs; " \ + "run doboot\0" \ + "nandroot=/dev/mtdblock4 rw\0" \ + "nandrootfstype=ubifs\0" \ + "nandargs=setenv bootargs console=${console} " \ + "root=${nandroot} " \ + "rootfstype=${nandrootfstype} " \ + "${video}\0" \ + "nandloadfdt=nand read ${fdtaddr} 780000 80000;\0" \ + "nandboot=echo Booting from nand ...; " \ + "run nandargs; " \ + "nand read ${loadaddr} 0 780000; " \ + "if ${loadfdt}; then " \ + "run nandloadfdt;" \ + "fi; " \ + "run doboot\0" \ + "boot=mmc dev ${mmcdev}; " \ + "if mmc rescan; then " \ + "if run loadmmcbootscript; then " \ + "run mmcbootscript;" \ + "else " \ + "if run mmcloadkernel; then " \ + "if ${loadfdt}; then " \ + "run mmcloadfdt;" \ + "fi;" \ + "run mmcboot;" \ + "fi;" \ + "fi;" \ + "fi;" \ + "if sata init; then " \ + "if run loadsatabootscript; then " \ + "run satabootscript;" \ + "else "\ + "if run sataloadkernel; then " \ + "if ${loadfdt}; then " \ + "run sataloadfdt; " \ + "fi;" \ + "run sataboot;" \ + "fi;" \ + "fi;" \ + "fi;" \ + "run nandboot\0" + +#define CONFIG_BOOTCOMMAND \ + "run setboottypem; run boot" + +/* SPI */ +#define CONFIG_SPI +#define CONFIG_MXC_SPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_ATMEL +#define CONFIG_SPI_FLASH_EON +#define CONFIG_SPI_FLASH_GIGADEVICE +#define CONFIG_SPI_FLASH_MACRONIX +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_SST +#define CONFIG_SPI_FLASH_WINBOND + +/* NAND */ +#ifndef CONFIG_SPL_BUILD +#define CONFIG_CMD_NAND +#define CONFIG_SYS_NAND_BASE 0x40000000 +#define CONFIG_SYS_NAND_MAX_CHIPS 1 +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_NAND_MXS +#define CONFIG_SYS_NAND_ONFI_DETECTION +/* APBH DMA is required for NAND support */ +#define CONFIG_APBH_DMA +#define CONFIG_APBH_DMA_BURST +#define CONFIG_APBH_DMA_BURST8 +#endif + +/* Ethernet */ +#define CONFIG_FEC_MXC +#define CONFIG_FEC_MXC_PHYADDR 0 +#define CONFIG_FEC_XCV_TYPE RGMII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS +#define CONFIG_MII +#define CONFIG_ETHPRIME "FEC0" +#define CONFIG_ARP_TIMEOUT 200UL +#define CONFIG_NETMASK 255.255.255.0 +#define CONFIG_NET_RETRY_COUNT 5 + +/* USB */ +#define CONFIG_CMD_USB +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ + +/* I2C */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_SYS_MXC_I2C3_SPEED 400000 + +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_I2C_EEPROM_BUS 2 + +/* SATA */ +#define CONFIG_CMD_SATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_LIBATA +#define CONFIG_LBA48 +#define CONFIG_DWC_AHSATA +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR + +/* GPIO */ +#define CONFIG_MXC_GPIO + +/* Boot */ +#define CONFIG_ZERO_BOOTDELAY_CHECK +#define CONFIG_LOADADDR 0x10800000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG +#define CONFIG_SERIAL_TAG + +/* misc */ +#define CONFIG_SYS_GENERIC_BOARD +#define CONFIG_STACKSIZE (128 * 1024) +#define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 800 /* 400 KB */ +#define CONFIG_OF_BOARD_SETUP + +/* SPL */ +#include "imx6_spl.h" +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SPL_MMC_SUPPORT +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 /* offset 64 kb */ +#define CONFIG_SYS_MONITOR_LEN (CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS / 2 * 1024) +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SYS_SPI_U_BOOT_OFFS (64 * 1024) +#define CONFIG_SPL_SPI_LOAD + +#endif /* __CONFIG_CM_FX6_H */ diff --git a/include/configs/cm_t335.h b/include/configs/cm_t335.h index a3e6452..767ef3a 100644 --- a/include/configs/cm_t335.h +++ b/include/configs/cm_t335.h @@ -107,6 +107,7 @@ /* I2C Configuration */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_I2C_EEPROM_BUS 0 /* SPL */ #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 70df1eb..6f4d97f 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -135,6 +135,7 @@ #define CONFIG_SYS_I2C_OMAP34XX #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_I2C_EEPROM_BUS 0 #define CONFIG_I2C_MULTI_BUS /* diff --git a/include/configs/cm_t54.h b/include/configs/cm_t54.h index df93a59..641ab48 100644 --- a/include/configs/cm_t54.h +++ b/include/configs/cm_t54.h @@ -30,6 +30,7 @@ #define CONFIG_SYS_I2C_OMAP34XX #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 +#define CONFIG_SYS_I2C_EEPROM_BUS 0 /* Enable SD/MMC CD and WP GPIOs */ #define OMAP_HSMMC_USE_GPIO diff --git a/include/configs/cob.h b/include/configs/cob.h new file mode 100644 index 0000000..b32c96b --- /dev/null +++ b/include/configs/cob.h @@ -0,0 +1,334 @@ +/* + * Copyright (C) 2015 Boundary Devices, Inc. + * + * Configuration settings for the Boundary Devices cob + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3769 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 1 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_NET +#define CONFIG_ETHPRIME "usbnet" +#define CONFIG_FEC_MAC_FUSE + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_MCS7830 +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_PWM_IMX +#define CONFIG_IMX6_PWM_PER_CLK 66000000 + +#define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + +#define CONFIG_BMP_16BPP +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#ifdef CONFIG_USB_STORAGE +#define CONFIG_DRIVE_USB "usb " +#else +#define CONFIG_DRIVE_USB +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_USB CONFIG_DRIVE_MMC +#define CONFIG_UMSDEVS CONFIG_DRIVE_MMC + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "board=cob\0" \ + "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ + "umsdevs=" CONFIG_UMSDEVS "\0" \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in ${bootdevs}" \ + "; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ + "for disk in 0 ; do ${dtype} dev ${disk} ;" \ + "load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "setenv stdout serial;" \ + "setenv stdin serial,usbkbd;" \ + "for dtype in ${umsdevs} ; do " \ + "initcmd='mmc rescan' ;" \ + "for disk in 0 ; do " \ + "if $initcmd && $dtype dev $disk ; then " \ + "setenv stdout serial,vga; " \ + "echo expose ${dtype} drive ${disk} over USB; " \ + "ums 0 $dtype $disk ;" \ + "fi; " \ + " done; " \ + "done ;" \ + "setenv stdout serial,vga; " \ + "echo no block devices found;" \ + "\0" \ + "dfu_alt_info=u-boot raw 0x0 0xc0000\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "loadsplash=if sf probe ; then sf read ${splashimage} c2000 ${splashsize} ; fi\0" \ + "rundfu=dfu 0 sf 0:0:25000000:0\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in ${bootdevs}" \ + "; do " \ + "for disk in 0 ; do ${dtype} dev ${disk} ;" \ + "load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-${board}-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-${board}-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_RESET_CAUSE_ADDR (PHYS_SDRAM + 0x80) + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + + +#define CONFIG_CMD_ELF + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#define CONFIG_CMD_FASTBOOT +#define CONFIG_ANDROID_BOOT_IMAGE +#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 + +/* USB Device Firmware Update support */ +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_SF +#define CONFIG_CMD_DFU +#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0xc0000 +#define DFU_MANIFEST_POLL_TIMEOUT 25000 + +#endif /* __CONFIG_H */ diff --git a/include/configs/colibri_t20_iris.h b/include/configs/colibri_t20_iris.h index 6f9e08c..2b876fe 100644 --- a/include/configs/colibri_t20_iris.h +++ b/include/configs/colibri_t20_iris.h @@ -9,11 +9,6 @@ #include "tegra20-common.h" -/* Enable FDT support */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra20-colibri_t20_iris -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - /* High-level configuration options */ #define V_PROMPT "Tegra20 (Colibri) # " #define CONFIG_TEGRA_BOARD_STRING "Toradex Colibri T20 on Iris" diff --git a/include/configs/colibri_t30.h b/include/configs/colibri_t30.h index eacff5b7..782b9d1 100644 --- a/include/configs/colibri_t30.h +++ b/include/configs/colibri_t30.h @@ -11,9 +11,6 @@ #include "tegra30-common.h" -#define CONFIG_DEFAULT_DEVICE_TREE tegra30-colibri -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE #define V_PROMPT "Colibri T30 # " #define CONFIG_TEGRA_BOARD_STRING "Toradex Colibri T30" diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index 7eaaf69..bfcfa0c 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -434,7 +434,6 @@ #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_LAST_STAGE_INIT -#undef CONFIG_CMD_BOOTM #endif /* CONFIG_TRAILBLAZER */ diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index a1a63a0..936be14 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -28,9 +28,6 @@ #define CONFIG_LMB #define CONFIG_OF_LIBFDT -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE -#define CONFIG_DEFAULT_DEVICE_TREE link #define CONFIG_BOOTSTAGE #define CONFIG_BOOTSTAGE_REPORT diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 1252d7a..5f85755 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -157,8 +157,6 @@ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_LOAD -#define CONFIG_SPL_SPI_BUS 0 -#define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x30000 #endif @@ -376,8 +374,6 @@ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_LOAD -#define CONFIG_SPL_SPI_BUS 0 -#define CONFIG_SPL_SPI_CS 0 #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_LIBCOMMON_SUPPORT #define CONFIG_SPL_LIBGENERIC_SUPPORT diff --git a/include/configs/dalmore.h b/include/configs/dalmore.h index fd774a3..ff7ec4a 100644 --- a/include/configs/dalmore.h +++ b/include/configs/dalmore.h @@ -21,11 +21,6 @@ #include "tegra114-common.h" -/* Enable fdt support for Dalmore. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra114-dalmore -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - /* High-level configuration options */ #define V_PROMPT "Tegra114 (Dalmore) # " #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Dalmore" diff --git a/include/configs/dash.h b/include/configs/dash.h new file mode 100644 index 0000000..872eecc --- /dev/null +++ b/include/configs/dash.h @@ -0,0 +1,319 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices DASH board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3769 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 1 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#ifdef CONFIG_MX6Q +#define CONFIG_CMD_SATA +#endif + +/* + * SATA Configs + */ +#ifdef CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA +#endif + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_ETHPRIME "usb_ether" + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + + #define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + +#define CONFIG_BMP_16BPP +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_SATA +#define CONFIG_DRIVE_SATA "sata " +#else +#define CONFIG_DRIVE_SATA +#endif + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#ifdef CONFIG_USB_STORAGE +#define CONFIG_DRIVE_USB "usb " +#else +#define CONFIG_DRIVE_USB +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC CONFIG_DRIVE_USB +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in ${bootdevs}" \ + "; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ + "for disk in 0 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "setenv stdin serial,usbkbd\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "loadsplash=if sf probe ; then sf read ${splashimage} c2000 ${splashsize} ; fi\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in ${bootdevs}" \ + "; do " \ + "for disk in 0 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done\0" \ + "initrd_high=0xffffffff\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "ethact=usb_ether\0" \ + "ipaddr=10.0.0.2\0" \ + "netmask=255.255.255.0\0" \ + "serverip=10.0.0.1\0" \ + "usbrecover=setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-dash-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-dash-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_RESET_CAUSE_ADDR (PHYS_SDRAM + 0x80) + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_CMD_ELF + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#endif /* __CONFIG_H */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 4143a4d..2eaabde 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -116,8 +116,6 @@ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_FLASH_SUPPORT -#define CONFIG_SPL_SPI_BUS 0 -#define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 #define CONFIG_SUPPORT_EMMC_BOOT diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index a7fd43b..185edbe 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -102,7 +102,7 @@ #define CONFIG_SPI_FLASH_SST #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_CS (0 | (IMX_GPIO_NR(2, 30) << 8)) +#define CONFIG_SF_DEFAULT_CS 0 #define CONFIG_SF_DEFAULT_SPEED 20000000 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #endif diff --git a/include/configs/eo.h b/include/configs/eo.h new file mode 100644 index 0000000..ee0dd83 --- /dev/null +++ b/include/configs/eo.h @@ -0,0 +1,367 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices eo board + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3778 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +/* SPL magic */ +#ifdef CONFIG_SPL +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x00908400 +#define CONFIG_SPL_PAD_TO 0x400 +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7" +#define CONFIG_SPL_STACK 0x0091FFB8 + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_USB +#define CONFIG_SPL_WATCHDOG_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT + +/* SPI flash. */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 + +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SYS_SPL_MALLOC_START 0x00916000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 +#endif + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + + #define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + +#define CONFIG_BMP_16BPP +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#ifdef CONFIG_USB_STORAGE +#define CONFIG_DRIVE_USB "usb " +#else +#define CONFIG_DRIVE_USB +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_USB CONFIG_DRIVE_MMC + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "disable_fec=1\0" \ + "bootcmd=for dtype in ${bootdevs}" \ + "; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "setenv stdout serial; " \ + "for disk in 1 0 ; do " \ + "if mmc dev ${disk} ; then " \ + "setenv stdout serial,vga; " \ + "echo expose MMC drive ${disk} over USB; " \ + "ums 0 mmc ${disk}; " \ + "fi ;" \ + "done; " \ + "\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "loadsplash=if sf probe ; then sf read ${splashimage} c2000 ${splashsize} ; fi\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in ${bootdevs}" \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-${board}-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-${board}-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_RESET_CAUSE_ADDR (PHYS_SDRAM + 0x80) + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +/* + * PCI express + */ +/* #define CONFIG_CMD_PCI */ +#ifdef CONFIG_CMD_PCI +#define CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCIE_IMX +#endif + +#define CONFIG_CMD_ELF + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#define CONFIG_CMD_FASTBOOT +#define CONFIG_ANDROID_BOOT_IMAGE +#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 + +/* USB Device Firmware Update support */ +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_SF +#define CONFIG_CMD_DFU +#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0xc0000 +#define DFU_MANIFEST_POLL_TIMEOUT 25000 + +#endif /* __CONFIG_H */ diff --git a/include/configs/exynos4-dt.h b/include/configs/exynos4-dt.h index 7dac1a3..99472ac 100644 --- a/include/configs/exynos4-dt.h +++ b/include/configs/exynos4-dt.h @@ -22,10 +22,6 @@ #define CONFIG_BOARD_COMMON #define CONFIG_SYS_GENERIC_BOARD -/* Enable fdt support */ -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - #define CONFIG_SYS_CACHELINE_SIZE 32 /* input clock of PLL: EXYNOS4 boards have 24MHz input clock */ diff --git a/include/configs/exynos5-dt.h b/include/configs/exynos5-dt.h index a7c6292..1dc3002 100644 --- a/include/configs/exynos5-dt.h +++ b/include/configs/exynos5-dt.h @@ -24,10 +24,6 @@ #define CONFIG_ARCH_EARLY_INIT_R #define CONFIG_EXYNOS_SPL -/* Enable fdt support for Exynos5250 */ -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - /* Allow tracing to be enabled */ #define CONFIG_TRACE #define CONFIG_CMD_TRACE diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index 74e72a5..c24984b 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -61,8 +61,6 @@ #ifdef CONFIG_LCD #define CONFIG_EXYNOS_FB #define CONFIG_EXYNOS_DP -#define LCD_XRES 2560 -#define LCD_YRES 1600 #define LCD_BPP LCD_COLOR16 #endif diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index b991b09..620f950 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -61,7 +61,7 @@ #define CONFIG_SPI_FLASH_BAR #define CONFIG_SPI_FLASH_WINBOND #define CONFIG_SF_DEFAULT_BUS 0 - #define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8)) + #define CONFIG_SF_DEFAULT_CS 0 /* GPIO 3-19 (21248) */ #define CONFIG_SF_DEFAULT_SPEED 30000000 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) @@ -141,6 +141,7 @@ #define CONFIG_PCI #define CONFIG_PCI_PNP #define CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCI_FIXUP_DEV #define CONFIG_PCIE_IMX #endif diff --git a/include/configs/h.h b/include/configs/h.h new file mode 100644 index 0000000..a4371c1 --- /dev/null +++ b/include/configs/h.h @@ -0,0 +1,303 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices H board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3769 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#ifdef CONFIG_MX6Q +#define CONFIG_CMD_SATA +#endif + +/* + * SATA Configs + */ +#ifdef CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA +#endif + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_MXC_USB_PORT 1 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_SATA +#define CONFIG_DRIVE_SATA "sata " +#else +#define CONFIG_DRIVE_SATA +#endif + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttymxc1\0" \ + "disable_giga=1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in " CONFIG_DRIVE_TYPES \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "usb start; " \ + "setenv stdin serial,usbkbd\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in " CONFIG_DRIVE_TYPES \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done\0" \ + "initrd_high=0xffffffff\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-h-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-h-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +#define CONFIG_ARP_TIMEOUT 200UL + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +/* #define CONFIG_ENV_IS_IN_MMC */ +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_UNZIP +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#endif /* __CONFIG_H */ diff --git a/include/configs/h2200.h b/include/configs/h2200.h index 9470ad6..109cee9 100644 --- a/include/configs/h2200.h +++ b/include/configs/h2200.h @@ -116,7 +116,6 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 38400, 115200 } -#define CONFIG_CMD_IMPORTENV 1 #define CONFIG_CMD_LOADB #define CONFIG_CMD_SOURCE #define CONFIG_CMD_RUN diff --git a/include/configs/harmony.h b/include/configs/harmony.h index 3ec0e41..ff9fbc9 100644 --- a/include/configs/harmony.h +++ b/include/configs/harmony.h @@ -11,11 +11,6 @@ #include #include "tegra20-common.h" -/* Enable fdt support for Harmony. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra20-harmony -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - /* High-level configuration options */ #define V_PROMPT "Tegra20 (Harmony) # " #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Harmony" diff --git a/include/configs/insp.h b/include/configs/insp.h new file mode 100644 index 0000000..0496aee --- /dev/null +++ b/include/configs/insp.h @@ -0,0 +1,375 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices INSP + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3769 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#ifdef CONFIG_MX6Q +#define CONFIG_CMD_SATA +#endif + +/* + * SATA Configs + */ +#ifdef CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA +#endif + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_MCS7830 +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + + #define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + +#define CONFIG_BMP_16BPP +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_SATA +#define CONFIG_DRIVE_SATA "sata " +#else +#define CONFIG_DRIVE_SATA +#endif + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#ifdef CONFIG_USB_STORAGE +#define CONFIG_DRIVE_USB "usb " +#else +#define CONFIG_DRIVE_USB +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC CONFIG_DRIVE_USB +#define CONFIG_UMSDEVS CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ + "umsdevs=" CONFIG_UMSDEVS "\0" \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in ${bootdevs}" \ + "; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "setenv stdout serial;" \ + "setenv stdin serial,usbkbd;" \ + "for dtype in ${umsdevs} ; do " \ + "if itest.s sata == ${dtype}; then " \ + "initcmd='sata init' ;" \ + "else " \ + "initcmd='mmc rescan' ;" \ + "fi; " \ + "for disk in 0 1 ; do " \ + "if $initcmd && $dtype dev $disk ; then " \ + "setenv stdout serial,vga; " \ + "echo expose ${dtype} drive ${disk} over USB; " \ + "ums 0 $dtype $disk ;" \ + "fi; " \ + " done; " \ + "done ;" \ + "setenv stdout serial,vga; " \ + "echo no block devices found;" \ + "\0" \ + "dfu_alt_info=u-boot raw 0x0 0xc0000\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "loadsplash=if sf probe ; then sf read ${splashimage} c2000 ${splashsize} ; fi\0" \ + "rundfu=dfu 0 sf 0:0:25000000:0\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in ${bootdevs}" \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done\0" \ + "disable_giga=1\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-${board}-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-${board}-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_RESET_CAUSE_ADDR (PHYS_SDRAM + 0x80) + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +/* + * PCI express + */ +#ifdef CONFIG_CMD_PCI +#define CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCIE_IMX +#endif + +#define CONFIG_CMD_ELF + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#define CONFIG_CMD_FASTBOOT +#define CONFIG_ANDROID_BOOT_IMAGE +#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 + +/* USB Device Firmware Update support */ +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_SF +#define CONFIG_CMD_DFU +#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0xc0000 +#define DFU_MANIFEST_POLL_TIMEOUT 25000 + +#endif /* __CONFIG_H */ diff --git a/include/configs/ioc.h b/include/configs/ioc.h new file mode 100644 index 0000000..ea361fc --- /dev/null +++ b/include/configs/ioc.h @@ -0,0 +1,375 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices ioc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3769 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_MXC_SPI_DISPLAY +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#ifdef CONFIG_MX6Q +#define CONFIG_CMD_SATA +#endif + +/* + * SATA Configs + */ +#ifdef CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA +#endif + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_MCS7830 +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + +#define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + +#define CONFIG_BMP_16BPP +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_SATA +#define CONFIG_DRIVE_SATA "sata " +#else +#define CONFIG_DRIVE_SATA +#endif + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#ifdef CONFIG_USB_STORAGE +#define CONFIG_DRIVE_USB "usb " +#else +#define CONFIG_DRIVE_USB +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC CONFIG_DRIVE_USB +#define CONFIG_UMSDEVS CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ + "umsdevs=" CONFIG_UMSDEVS "\0" \ + "console=ttymxc1\0" \ + "panel=AA065VE11\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in ${bootdevs}; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ + "for disk in 1 0 ; do ${dtype} dev ${disk} ;" \ + "load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "setenv stdout serial;" \ + "setenv stdin serial,usbkbd;" \ + "for dtype in ${umsdevs} ; do " \ + "if itest.s sata == ${dtype}; then " \ + "initcmd='sata init' ;" \ + "else " \ + "initcmd='mmc rescan' ;" \ + "fi; " \ + "for disk in 0 1 ; do " \ + "if $initcmd && $dtype dev $disk ; then " \ + "setenv stdout serial,vga; " \ + "echo expose ${dtype} drive ${disk} over USB; " \ + "ums 0 $dtype $disk ;" \ + "fi; " \ + " done; " \ + "done ;" \ + "setenv stdout serial,vga; " \ + "echo no block devices found;" \ + "\0" \ + "dfu_alt_info=u-boot raw 0x0 0xc0000\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "loadsplash=if sf probe ; then sf read ${splashimage} c2000 ${splashsize} ; fi\0" \ + "rundfu=dfu 0 sf 0:0:25000000:0\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in ${bootdevs}" \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-${board}-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-${board}-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_RESET_CAUSE_ADDR (PHYS_SDRAM + 0x80) + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +/* + * PCI express + */ +#ifdef CONFIG_CMD_PCI +#define CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCIE_IMX +#endif + +#define CONFIG_CMD_ELF + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#define CONFIG_CMD_FASTBOOT +#define CONFIG_ANDROID_BOOT_IMAGE +#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 + +/* USB Device Firmware Update support */ +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_SF +#define CONFIG_CMD_DFU +#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0xc0000 +#define DFU_MANIFEST_POLL_TIMEOUT 25000 + +#endif /* __CONFIG_H */ diff --git a/include/configs/ip04.h b/include/configs/ip04.h index 3767502..ec510bd 100644 --- a/include/configs/ip04.h +++ b/include/configs/ip04.h @@ -133,7 +133,6 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_MISC_INIT_R /* needed for MAC address */ #define CONFIG_UART_CONSOLE 0 -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED #undef CONFIG_SHOW_BOOT_PROGRESS /* Enable this if bootretry required; currently it's disabled */ diff --git a/include/configs/jetson-tk1.h b/include/configs/jetson-tk1.h index d03a66c..d67c025 100644 --- a/include/configs/jetson-tk1.h +++ b/include/configs/jetson-tk1.h @@ -12,11 +12,6 @@ #include "tegra124-common.h" -/* Enable fdt support for Jetson TK1. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra124-jetson-tk1 -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - /* High-level configuration options */ #define V_PROMPT "Tegra124 (Jetson TK1) # " #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Jetson TK1" diff --git a/include/configs/ks2_evm.h b/include/configs/ks2_evm.h index 43db581..51926f7 100644 --- a/include/configs/ks2_evm.h +++ b/include/configs/ks2_evm.h @@ -58,8 +58,6 @@ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_SPI_LOAD -#define CONFIG_SPL_SPI_BUS 0 -#define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO #define CONFIG_SPL_FRAMEWORK diff --git a/include/configs/kwb.h b/include/configs/kwb.h index 0860434..29b263f 100644 --- a/include/configs/kwb.h +++ b/include/configs/kwb.h @@ -89,7 +89,6 @@ #undef CONFIG_BOOTM_RTEMS #undef CONFIG_GZIP #undef CONFIG_ZLIB -#undef CONFIG_CMD_CRC32 /* USB configuration */ #define CONFIG_USB_MUSB_DSPS diff --git a/include/configs/ls.h b/include/configs/ls.h new file mode 100644 index 0000000..ad1cd19 --- /dev/null +++ b/include/configs/ls.h @@ -0,0 +1,349 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices LS board + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3778 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +/* SPL magic */ +#ifdef CONFIG_SPL +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x00908400 +#define CONFIG_SPL_PAD_TO 0x400 +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7" +#define CONFIG_SPL_STACK 0x0091FFB8 + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_USB +#define CONFIG_SPL_WATCHDOG_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT + +/* SPI flash. */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 + +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SYS_SPL_MALLOC_START 0x00916000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 +#endif + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_ETHPRIME "usbnet" +#define CONFIG_FEC_MAC_FUSE + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + + #define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + +#define CONFIG_BMP_16BPP +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#ifdef CONFIG_USB_STORAGE +#define CONFIG_DRIVE_USB "usb " +#else +#define CONFIG_DRIVE_USB +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_MMC CONFIG_DRIVE_USB + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in ${bootdevs}" \ + "; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "setenv stdout serial; " \ + "for disk in 1 0 ; do " \ + "if mmc dev ${disk} ; then " \ + "setenv stdout serial,vga; " \ + "echo expose MMC drive ${disk} over USB; " \ + "ums 0 mmc ${disk}; " \ + "fi ;" \ + "done; " \ + "\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "loadsplash=if sf probe ; then sf read ${splashimage} c2000 ${splashsize} ; fi\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in ${bootdevs}" \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "serverip=10.0.0.1\0" \ + "ipaddr=10.0.0.2\0" \ + "netmask 255.255.255.0\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-${board}-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-${board}-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_RESET_CAUSE_ADDR (PHYS_SDRAM + 0x80) + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_MMC + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET ((1024 * 512) - CONFIG_ENV_SIZE) +#define CONFIG_SYS_MMC_ENV_DEV 1 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_CMD_ELF + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#define CONFIG_CMD_FASTBOOT +#define CONFIG_ANDROID_BOOT_IMAGE +#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 + +/* USB Device Firmware Update support */ +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_SF +#define CONFIG_CMD_DFU +#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0xc0000 +#define DFU_MANIFEST_POLL_TIMEOUT 25000 + +#endif /* __CONFIG_H */ diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h new file mode 100644 index 0000000..bb47813 --- /dev/null +++ b/include/configs/ls1021aqds.h @@ -0,0 +1,391 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include + +#define CONFIG_LS102XA + +#define CONFIG_SYS_GENERIC_BOARD + +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_BOARD_EARLY_INIT_F + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024 * 1024) + +#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE + +/* + * Generic Timer Definitions + */ +#define GENERIC_TIMER_CLK 12500000 + +#ifndef __ASSEMBLY__ +unsigned long get_board_sys_clk(void); +unsigned long get_board_ddr_clk(void); +#endif + +#define CONFIG_SYS_CLK_FREQ get_board_sys_clk() +#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0x67f80000 +#endif + +#define CONFIG_NR_DRAM_BANKS 1 + +#define CONFIG_DDR_SPD +#define SPD_EEPROM_ADDRESS 0x51 +#define CONFIG_SYS_SPD_BUS_NUM 0 + +#define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ +#ifndef CONFIG_SYS_FSL_DDR4 +#define CONFIG_SYS_FSL_DDR3 /* Use DDR3 memory */ +#define CONFIG_SYS_DDR_RAW_TIMING +#endif +#define CONFIG_DIMM_SLOTS_PER_CTLR 1 +#define CONFIG_CHIP_SELECTS_PER_CTRL 4 + +#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE + +#define CONFIG_DDR_ECC +#ifdef CONFIG_DDR_ECC +#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER +#define CONFIG_MEM_INIT_VALUE 0xdeadbeef +#endif + +#define CONFIG_SYS_HAS_SERDES + +/* + * IFC Definitions + */ +#define CONFIG_FSL_IFC +#define CONFIG_SYS_FLASH_BASE 0x60000000 +#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE + +#define CONFIG_SYS_NOR0_CSPR_EXT (0x0) +#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ + CSPR_PORT_SIZE_16 | \ + CSPR_MSEL_NOR | \ + CSPR_V) +#define CONFIG_SYS_NOR1_CSPR_EXT (0x0) +#define CONFIG_SYS_NOR1_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS \ + + 0x8000000) | \ + CSPR_PORT_SIZE_16 | \ + CSPR_MSEL_NOR | \ + CSPR_V) +#define CONFIG_SYS_NOR_AMASK IFC_AMASK(128 * 1024 * 1024) + +#define CONFIG_SYS_NOR_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ + CSOR_NOR_TRHZ_80) +#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \ + FTIM0_NOR_TEADC(0x5) | \ + FTIM0_NOR_TEAHC(0x5)) +#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \ + FTIM1_NOR_TRAD_NOR(0x1a) | \ + FTIM1_NOR_TSEQRAD_NOR(0x13)) +#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \ + FTIM2_NOR_TCH(0x4) | \ + FTIM2_NOR_TWPH(0xe) | \ + FTIM2_NOR_TWP(0x1c)) +#define CONFIG_SYS_NOR_FTIM3 0 + +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#define CONFIG_SYS_FLASH_QUIET_TEST +#define CONFIG_FLASH_SHOW_PROGRESS 45 +#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS + +#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ +#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ + +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS, \ + CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000} + +/* + * NAND Flash Definitions + */ +#define CONFIG_NAND_FSL_IFC + +#define CONFIG_SYS_NAND_BASE 0x7e800000 +#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE + +#define CONFIG_SYS_NAND_CSPR_EXT (0x0) + +#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ + | CSPR_PORT_SIZE_8 \ + | CSPR_MSEL_NAND \ + | CSPR_V) +#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64*1024) +#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ + | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ + | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ + | CSOR_NAND_RAL_3 /* RAL = 3 Bytes */ \ + | CSOR_NAND_PGS_2K /* Page Size = 2K */ \ + | CSOR_NAND_SPRZ_64 /* Spare size = 64 */ \ + | CSOR_NAND_PB(64)) /* 64 Pages Per Block */ + +#define CONFIG_SYS_NAND_ONFI_DETECTION + +#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x7) | \ + FTIM0_NAND_TWP(0x18) | \ + FTIM0_NAND_TWCHT(0x7) | \ + FTIM0_NAND_TWH(0xa)) +#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ + FTIM1_NAND_TWBE(0x39) | \ + FTIM1_NAND_TRR(0xe) | \ + FTIM1_NAND_TRP(0x18)) +#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0xf) | \ + FTIM2_NAND_TREH(0xa) | \ + FTIM2_NAND_TWHRE(0x1e)) +#define CONFIG_SYS_NAND_FTIM3 0x0 + +#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_MTD_NAND_VERIFY_WRITE +#define CONFIG_CMD_NAND + +#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) + +/* + * QIXIS Definitions + */ +#define CONFIG_FSL_QIXIS + +#ifdef CONFIG_FSL_QIXIS +#define QIXIS_BASE 0x7fb00000 +#define QIXIS_BASE_PHYS QIXIS_BASE +#define CONFIG_SYS_I2C_FPGA_ADDR 0x66 +#define QIXIS_LBMAP_SWITCH 6 +#define QIXIS_LBMAP_MASK 0x0f +#define QIXIS_LBMAP_SHIFT 0 +#define QIXIS_LBMAP_DFLTBANK 0x00 +#define QIXIS_LBMAP_ALTBANK 0x04 +#define QIXIS_RST_CTL_RESET 0x44 +#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 +#define QIXIS_RCFG_CTL_RECONFIG_START 0x21 +#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 + +#define CONFIG_SYS_FPGA_CSPR_EXT (0x0) +#define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ + CSPR_PORT_SIZE_8 | \ + CSPR_MSEL_GPCM | \ + CSPR_V) +#define CONFIG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024) +#define CONFIG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ + CSOR_NOR_NOR_MODE_AVD_NOR | \ + CSOR_NOR_TRHZ_80) + +/* + * QIXIS Timing parameters for IFC GPCM + */ +#define CONFIG_SYS_FPGA_FTIM0 (FTIM0_GPCM_TACSE(0xe) | \ + FTIM0_GPCM_TEADC(0xe) | \ + FTIM0_GPCM_TEAHC(0xe)) +#define CONFIG_SYS_FPGA_FTIM1 (FTIM1_GPCM_TACO(0xe) | \ + FTIM1_GPCM_TRAD(0x1f)) +#define CONFIG_SYS_FPGA_FTIM2 (FTIM2_GPCM_TCS(0xe) | \ + FTIM2_GPCM_TCH(0xe) | \ + FTIM2_GPCM_TWP(0xf0)) +#define CONFIG_SYS_FPGA_FTIM3 0x0 +#endif + +#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT +#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR +#define CONFIG_SYS_AMASK0 CONFIG_SYS_NOR_AMASK +#define CONFIG_SYS_CSOR0 CONFIG_SYS_NOR_CSOR +#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NOR_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NOR_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NOR_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3 +#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NOR1_CSPR_EXT +#define CONFIG_SYS_CSPR1 CONFIG_SYS_NOR1_CSPR +#define CONFIG_SYS_AMASK1 CONFIG_SYS_NOR_AMASK +#define CONFIG_SYS_CSOR1 CONFIG_SYS_NOR_CSOR +#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NOR_FTIM0 +#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NOR_FTIM1 +#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NOR_FTIM2 +#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NOR_FTIM3 +#define CONFIG_SYS_CSPR2_EXT CONFIG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR2 CONFIG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK2 CONFIG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR2 CONFIG_SYS_NAND_CSOR +#define CONFIG_SYS_CS2_FTIM0 CONFIG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS2_FTIM1 CONFIG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS2_FTIM2 CONFIG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS2_FTIM3 CONFIG_SYS_NAND_FTIM3 +#define CONFIG_SYS_CSPR3_EXT CONFIG_SYS_FPGA_CSPR_EXT +#define CONFIG_SYS_CSPR3 CONFIG_SYS_FPGA_CSPR +#define CONFIG_SYS_AMASK3 CONFIG_SYS_FPGA_AMASK +#define CONFIG_SYS_CSOR3 CONFIG_SYS_FPGA_CSOR +#define CONFIG_SYS_CS3_FTIM0 CONFIG_SYS_FPGA_FTIM0 +#define CONFIG_SYS_CS3_FTIM1 CONFIG_SYS_FPGA_FTIM1 +#define CONFIG_SYS_CS3_FTIM2 CONFIG_SYS_FPGA_FTIM2 +#define CONFIG_SYS_CS3_FTIM3 CONFIG_SYS_FPGA_FTIM3 + +/* + * Serial Port + */ +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK get_serial_clock() + +#define CONFIG_BAUDRATE 115200 + +/* + * I2C + */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC + +/* + * I2C bus multiplexer + */ +#define I2C_MUX_PCA_ADDR_PRI 0x77 +#define I2C_MUX_CH_DEFAULT 0x8 + +/* + * MMC + */ +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_GENERIC_MMC + +/* + * eTSEC + */ +#define CONFIG_TSEC_ENET + +#ifdef CONFIG_TSEC_ENET +#define CONFIG_MII +#define CONFIG_MII_DEFAULT_TSEC 3 +#define CONFIG_TSEC1 1 +#define CONFIG_TSEC1_NAME "eTSEC1" +#define CONFIG_TSEC2 1 +#define CONFIG_TSEC2_NAME "eTSEC2" +#define CONFIG_TSEC3 1 +#define CONFIG_TSEC3_NAME "eTSEC3" + +#define TSEC1_PHY_ADDR 1 +#define TSEC2_PHY_ADDR 2 +#define TSEC3_PHY_ADDR 3 + +#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) +#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) +#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) + +#define TSEC1_PHYIDX 0 +#define TSEC2_PHYIDX 0 +#define TSEC3_PHYIDX 0 + +#define CONFIG_ETHPRIME "eTSEC1" + +#define CONFIG_PHY_GIGE +#define CONFIG_PHYLIB +#define CONFIG_PHY_REALTEK + +#define CONFIG_HAS_ETH0 +#define CONFIG_HAS_ETH1 +#define CONFIG_HAS_ETH2 + +#define CONFIG_FSL_SGMII_RISER 1 +#define SGMII_RISER_PHY_OFFSET 0x1b + +#ifdef CONFIG_FSL_SGMII_RISER +#define CONFIG_SYS_TBIPA_VALUE 8 +#endif + +#endif +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET + +#define CONFIG_CMDLINE_TAG +#define CONFIG_CMDLINE_EDITING +#define CONFIG_CMD_IMLS + +#define CONFIG_HWCONFIG +#define HWCONFIG_BUFFER_SIZE 128 + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \ + "fdt_high=0xcfffffff\0" \ + "initrd_high=0xcfffffff\0" \ + "hwconfig=fsl_ddr:ctlr_intlv=null,bank_intlv=null\0" + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_CMD_ENV_EXISTS +#define CONFIG_CMD_GREPENV +#define CONFIG_CMD_MEMINFO +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END 0x9fffffff + +#define CONFIG_SYS_LOAD_ADDR 0x82000000 +#define CONFIG_SYS_HZ 1000 + +/* + * Stack sizes + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (30 * 1024) + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ + +/* + * Environment + */ +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ + +#define CONFIG_OF_LIBFDT +#define CONFIG_OF_BOARD_SETUP +#define CONFIG_CMD_BOOTZ + +#endif diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h new file mode 100644 index 0000000..45b2272 --- /dev/null +++ b/include/configs/ls1021atwr.h @@ -0,0 +1,291 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include + +#define CONFIG_LS102XA + +#define CONFIG_SYS_GENERIC_BOARD + +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_SKIP_LOWLEVEL_INIT +#define CONFIG_BOARD_EARLY_INIT_F + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024 * 1024) + +#define CONFIG_SYS_INIT_RAM_ADDR OCRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE OCRAM_SIZE + +/* + * Generic Timer Definitions + */ +#define GENERIC_TIMER_CLK 12500000 + +#define CONFIG_SYS_CLK_FREQ 100000000 +#define CONFIG_DDR_CLK_FREQ 100000000 + +#ifndef CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_TEXT_BASE 0x67f80000 +#endif + +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x80000000 +#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) + +#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL +#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE + +#define CONFIG_SYS_HAS_SERDES + +/* + * IFC Definitions + */ +#define CONFIG_FSL_IFC +#define CONFIG_SYS_FLASH_BASE 0x60000000 +#define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE + +#define CONFIG_SYS_NOR0_CSPR_EXT (0x0) +#define CONFIG_SYS_NOR0_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \ + CSPR_PORT_SIZE_16 | \ + CSPR_MSEL_NOR | \ + CSPR_V) +#define CONFIG_SYS_NOR_AMASK IFC_AMASK(128 * 1024 * 1024) + +/* NOR Flash Timing Params */ +#define CONFIG_SYS_NOR_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ + CSOR_NOR_TRHZ_80) +#define CONFIG_SYS_NOR_FTIM0 (FTIM0_NOR_TACSE(0x4) | \ + FTIM0_NOR_TEADC(0x5) | \ + FTIM0_NOR_TAVDS(0x0) | \ + FTIM0_NOR_TEAHC(0x5)) +#define CONFIG_SYS_NOR_FTIM1 (FTIM1_NOR_TACO(0x35) | \ + FTIM1_NOR_TRAD_NOR(0x1A) | \ + FTIM1_NOR_TSEQRAD_NOR(0x13)) +#define CONFIG_SYS_NOR_FTIM2 (FTIM2_NOR_TCS(0x4) | \ + FTIM2_NOR_TCH(0x4) | \ + FTIM2_NOR_TWP(0x1c) | \ + FTIM2_NOR_TWPH(0x0e)) +#define CONFIG_SYS_NOR_FTIM3 0 + +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#define CONFIG_SYS_FLASH_QUIET_TEST +#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ + +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ +#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ + +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE_PHYS } + +#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS + +/* CPLD */ + +#define CONFIG_SYS_CPLD_BASE 0x7fb00000 +#define CPLD_BASE_PHYS CONFIG_SYS_CPLD_BASE + +#define CONFIG_SYS_FPGA_CSPR_EXT (0x0) +#define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(CPLD_BASE_PHYS) | \ + CSPR_PORT_SIZE_8 | \ + CSPR_MSEL_GPCM | \ + CSPR_V) +#define CONFIG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024) +#define CONFIG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ + CSOR_NOR_NOR_MODE_AVD_NOR | \ + CSOR_NOR_TRHZ_80) + +/* CPLD Timing parameters for IFC GPCM */ +#define CONFIG_SYS_FPGA_FTIM0 (FTIM0_GPCM_TACSE(0xf) | \ + FTIM0_GPCM_TEADC(0xf) | \ + FTIM0_GPCM_TEAHC(0xf)) +#define CONFIG_SYS_FPGA_FTIM1 (FTIM1_GPCM_TACO(0xff) | \ + FTIM1_GPCM_TRAD(0x3f)) +#define CONFIG_SYS_FPGA_FTIM2 (FTIM2_GPCM_TCS(0xf) | \ + FTIM2_GPCM_TCH(0xf) | \ + FTIM2_GPCM_TWP(0xff)) +#define CONFIG_SYS_FPGA_FTIM3 0x0 +#define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT +#define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR +#define CONFIG_SYS_AMASK0 CONFIG_SYS_NOR_AMASK +#define CONFIG_SYS_CSOR0 CONFIG_SYS_NOR_CSOR +#define CONFIG_SYS_CS0_FTIM0 CONFIG_SYS_NOR_FTIM0 +#define CONFIG_SYS_CS0_FTIM1 CONFIG_SYS_NOR_FTIM1 +#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NOR_FTIM2 +#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3 +#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_FPGA_CSPR_EXT +#define CONFIG_SYS_CSPR1 CONFIG_SYS_FPGA_CSPR +#define CONFIG_SYS_AMASK1 CONFIG_SYS_FPGA_AMASK +#define CONFIG_SYS_CSOR1 CONFIG_SYS_FPGA_CSOR +#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_FPGA_FTIM0 +#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_FPGA_FTIM1 +#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_FPGA_FTIM2 +#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_FPGA_FTIM3 + +/* + * Serial Port + */ +#define CONFIG_CONS_INDEX 1 +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE 1 +#define CONFIG_SYS_NS16550_CLK get_serial_clock() + +#define CONFIG_BAUDRATE 115200 + +/* + * I2C + */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC + +/* + * MMC + */ +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_FSL_ESDHC +#define CONFIG_GENERIC_MMC + +/* + * Video + */ +#define CONFIG_FSL_DCU_FB + +#ifdef CONFIG_FSL_DCU_FB +#define CONFIG_VIDEO +#define CONFIG_CMD_BMP +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_LOGO + +#define CONFIG_FSL_DCU_SII9022A +#define CONFIG_SYS_I2C_DVI_BUS_NUM 1 +#define CONFIG_SYS_I2C_DVI_ADDR 0x39 +#endif + +/* + * eTSEC + */ +#define CONFIG_TSEC_ENET + +#ifdef CONFIG_TSEC_ENET +#define CONFIG_MII +#define CONFIG_MII_DEFAULT_TSEC 1 +#define CONFIG_TSEC1 1 +#define CONFIG_TSEC1_NAME "eTSEC1" +#define CONFIG_TSEC2 1 +#define CONFIG_TSEC2_NAME "eTSEC2" +#define CONFIG_TSEC3 1 +#define CONFIG_TSEC3_NAME "eTSEC3" + +#define TSEC1_PHY_ADDR 2 +#define TSEC2_PHY_ADDR 0 +#define TSEC3_PHY_ADDR 1 + +#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) +#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) +#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) + +#define TSEC1_PHYIDX 0 +#define TSEC2_PHYIDX 0 +#define TSEC3_PHYIDX 0 + +#define CONFIG_ETHPRIME "eTSEC1" + +#define CONFIG_PHY_GIGE +#define CONFIG_PHYLIB +#define CONFIG_PHY_ATHEROS + +#define CONFIG_HAS_ETH0 +#define CONFIG_HAS_ETH1 +#define CONFIG_HAS_ETH2 +#endif + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET + +#define CONFIG_CMDLINE_TAG +#define CONFIG_CMDLINE_EDITING +#define CONFIG_CMD_IMLS + +#define CONFIG_HWCONFIG +#define HWCONFIG_BUFFER_SIZE 128 + +#define CONFIG_BOOTDELAY 3 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootargs=root=/dev/ram0 rw console=ttyS0,115200\0" \ + "initrd_high=0xcfffffff\0" \ + "fdt_high=0xcfffffff\0" + +/* + * Miscellaneous configurable options + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_CMD_ENV_EXISTS +#define CONFIG_CMD_GREPENV +#define CONFIG_CMD_MEMINFO +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END 0x9fffffff + +#define CONFIG_SYS_LOAD_ADDR 0x82000000 +#define CONFIG_SYS_HZ 1000 + +/* + * Stack sizes + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (30 * 1024) + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ + +/* + * Environment + */ +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE 0x20000 +#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ + +#define CONFIG_OF_LIBFDT +#define CONFIG_OF_BOARD_SETUP +#define CONFIG_CMD_BOOTZ + +#endif diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h index 2bd5a47..a72e1f3 100644 --- a/include/configs/ls2085a_common.h +++ b/include/configs/ls2085a_common.h @@ -15,9 +15,11 @@ #define CONFIG_GICV3 /* Link Definitions */ -#define CONFIG_SYS_TEXT_BASE 0x30000000 +#define CONFIG_SYS_TEXT_BASE 0x30001000 +#ifdef CONFIG_EMU #define CONFIG_SYS_NO_FLASH +#endif #define CONFIG_SUPPORT_RAW_INITRD @@ -45,13 +47,27 @@ #define CONFIG_SYS_FSL_DDR_INTLV_256B /* force 256 byte interleaving */ -/* SMP Definitions */ -#define CPU_RELEASE_ADDR CONFIG_SYS_INIT_SP_ADDR - #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL +#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS 2 + +/* + * SMP Definitinos + */ +#define CPU_RELEASE_ADDR secondary_boot_func + +#define CONFIG_SYS_FSL_OTHER_DDR_NUM_CTRLS +#define CONFIG_SYS_DP_DDR_BASE 0x6000000000ULL +/* + * DDR controller use 0 as the base address for binding. + * It is mapped to CONFIG_SYS_DP_DDR_BASE for core to access. + */ +#define CONFIG_SYS_DP_DDR_BASE_PHY 0 +#define CONFIG_DP_DDR_CTRL 2 +#define CONFIG_DP_DDR_NUM_CTRLS 1 +#define CONFIG_DP_DDR_DIMM_SLOTS_PER_CTLR 1 /* Generic Timer Definitions */ #define COUNTER_FREQUENCY 12000000 /* 12MHz */ @@ -118,6 +134,66 @@ #define CONFIG_SYS_NOR_FTIM3 0x04000000 #define CONFIG_SYS_IFC_CCR 0x01000000 +#ifndef CONFIG_SYS_NO_FLASH +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#define CONFIG_SYS_FLASH_QUIET_TEST +#define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ + +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ +#define CONFIG_SYS_MAX_FLASH_SECT 1024 /* sectors per device */ +#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ +#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ + +#define CONFIG_SYS_FLASH_EMPTY_INFO +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } +#endif + +#define CONFIG_NAND_FSL_IFC +#define CONFIG_SYS_NAND_MAX_ECCPOS 256 +#define CONFIG_SYS_NAND_MAX_OOBFREE 2 +#define CONFIG_SYS_NAND_BASE 0x520000000 +#define CONFIG_SYS_NAND_BASE_PHYS 0x20000000 + +#define CONFIG_SYS_NAND_CSPR_EXT (0x0) +#define CONFIG_SYS_NAND_CSPR (CSPR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ + | CSPR_PORT_SIZE_8 /* Port Size = 8 bit */ \ + | CSPR_MSEL_NAND /* MSEL = NAND */ \ + | CSPR_V) +#define CONFIG_SYS_NAND_AMASK IFC_AMASK(64 * 1024) + +#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \ + | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \ + | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \ + | CSOR_NAND_RAL_3 /* RAL = 2Byes */ \ + | CSOR_NAND_PGS_2K /* Page Size = 2K */ \ + | CSOR_NAND_SPRZ_64/* Spare size = 64 */ \ + | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/ + +#define CONFIG_SYS_NAND_ONFI_DETECTION + +/* ONFI NAND Flash mode0 Timing Params */ +#define CONFIG_SYS_NAND_FTIM0 (FTIM0_NAND_TCCST(0x07) | \ + FTIM0_NAND_TWP(0x18) | \ + FTIM0_NAND_TWCHT(0x07) | \ + FTIM0_NAND_TWH(0x0a)) +#define CONFIG_SYS_NAND_FTIM1 (FTIM1_NAND_TADLE(0x32) | \ + FTIM1_NAND_TWBE(0x39) | \ + FTIM1_NAND_TRR(0x0e) | \ + FTIM1_NAND_TRP(0x18)) +#define CONFIG_SYS_NAND_FTIM2 (FTIM2_NAND_TRAD(0x0f) | \ + FTIM2_NAND_TREH(0x0a) | \ + FTIM2_NAND_TWHRE(0x1e)) +#define CONFIG_SYS_NAND_FTIM3 0x0 + +#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE } +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_MTD_NAND_VERIFY_WRITE +#define CONFIG_CMD_NAND + +#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) + #define CONFIG_SYS_CSPR0_EXT CONFIG_SYS_NOR0_CSPR_EXT #define CONFIG_SYS_CSPR0 CONFIG_SYS_NOR0_CSPR_EARLY #define CONFIG_SYS_CSPR0_FINAL CONFIG_SYS_NOR0_CSPR @@ -167,6 +243,7 @@ /* Miscellaneous configurable options */ #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000) +#define CONFIG_ARCH_EARLY_INIT_R /* Physical Memory Map */ /* fixme: these need to be checked against the board */ @@ -174,7 +251,7 @@ #define CONFIG_SYS_CLK_FREQ 133333333 -#define CONFIG_NR_DRAM_BANKS 2 +#define CONFIG_NR_DRAM_BANKS 3 #define CONFIG_SYS_HZ 1000 diff --git a/include/configs/ls2085a_emu.h b/include/configs/ls2085a_emu.h index a5cea63..487cd99 100644 --- a/include/configs/ls2085a_emu.h +++ b/include/configs/ls2085a_emu.h @@ -13,6 +13,7 @@ #define CONFIG_SYS_FSL_DDR_EMU /* Support emulator */ #define SPD_EEPROM_ADDRESS1 0x51 #define SPD_EEPROM_ADDRESS2 0x52 +#define SPD_EEPROM_ADDRESS3 0x53 #define SPD_EEPROM_ADDRESS SPD_EEPROM_ADDRESS1 #define CONFIG_SYS_SPD_BUS_NUM 1 /* SPD on I2C bus 1 */ diff --git a/include/configs/ls2085a_simu.h b/include/configs/ls2085a_simu.h index 46d47b0..0f40b78 100644 --- a/include/configs/ls2085a_simu.h +++ b/include/configs/ls2085a_simu.h @@ -13,4 +13,13 @@ #define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE (0x2210000) +#define CONFIG_SYS_CSPR1_EXT CONFIG_SYS_NAND_CSPR_EXT +#define CONFIG_SYS_CSPR1 CONFIG_SYS_NAND_CSPR +#define CONFIG_SYS_AMASK1 CONFIG_SYS_NAND_AMASK +#define CONFIG_SYS_CSOR1 CONFIG_SYS_NAND_CSOR +#define CONFIG_SYS_CS1_FTIM0 CONFIG_SYS_NAND_FTIM0 +#define CONFIG_SYS_CS1_FTIM1 CONFIG_SYS_NAND_FTIM1 +#define CONFIG_SYS_CS1_FTIM2 CONFIG_SYS_NAND_FTIM2 +#define CONFIG_SYS_CS1_FTIM3 CONFIG_SYS_NAND_FTIM3 + #endif /* __LS2_SIMU_H */ diff --git a/include/configs/mcs.h b/include/configs/mcs.h new file mode 100644 index 0000000..4f2ef5f --- /dev/null +++ b/include/configs/mcs.h @@ -0,0 +1,311 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices MCS board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3769 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (256 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +/* USB gadget support */ +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 3 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_MXC_USB_PORT 1 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#define CONFIG_BMP_16BPP +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "if itest.s \"\" != \"$bmpsize\" ; then " \ + " sf probe" \ + " && sf read 10008000 f0000 $bmpsize" \ + " && bmp d 10008000 ;" \ + "fi" +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_MMC + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "board=mcs\0" \ + "console=ttymxc1\0" \ + "disable_giga=1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in " CONFIG_DRIVE_TYPES \ + "; do " \ + "for disk in 0 1 2 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "usb start; " \ + "setenv stdin serial,usbkbd\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in " CONFIG_DRIVE_TYPES \ + "; do " \ + "for disk in 0 1 2; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done\0" \ + "savesplash=for dtype in mmc ; do " \ + "for disk in 0 1 2; do " \ + "${dtype} dev ${disk} ;" \ + "load ${dtype} ${disk}:1 10008000 /savesplash " \ + "&& source 10008000 ;" \ + "done ;" \ + "done\0" \ + "initrd_high=0xffffffff\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-mcs-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-mcs-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +#define CONFIG_ARP_TIMEOUT 200UL + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +/* #define CONFIG_ENV_IS_IN_MMC */ +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +/* #define CONFIG_SYS_DCACHE_OFF */ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_CMD_GPIO + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#endif /* __CONFIG_H */ diff --git a/include/configs/med.h b/include/configs/med.h new file mode 100644 index 0000000..cdb025c --- /dev/null +++ b/include/configs/med.h @@ -0,0 +1,327 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices Nitrogen6X + * and Freescale i.MX6Q Sabre Lite boards. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3774 +#define CONFIG_BOARD_NAME "med" +#define CONFIG_SDHC3_CD -1 +#define CONFIG_SDHC4_CD IMX_GPIO_NR(4, 20) +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_MXC_SPI_DISPLAY +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 1 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 7 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + +#define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + +#define CONFIG_BMP_16BPP +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "if itest.s \"\" != \"$splashsize\" ; then " \ + " sf probe" \ + " && sf read $splashram $splashflash $splashsize" \ + " && bmp d $splashram ;" \ + "fi" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#ifdef CONFIG_USB_STORAGE +#define CONFIG_DRIVE_USB "usb " +#else +#define CONFIG_DRIVE_USB +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_MMC CONFIG_DRIVE_USB + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in ${bootdevs}" \ + "; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "ums 0 mmc 1 ;" \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "setenv stdin serial,usbkbd\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "loadsplash=if sf probe ; then sf read ${splashram} ${splashflash} ${splashsize} ; fi\0" \ + "splashram=0x10008000\0" \ + "splashflash=0xf0000\0" \ + "splashpos=m,m\0" \ + "savesplash=for dtype in mmc ; do " \ + "for disk in 0 1 2; do " \ + "${dtype} dev ${disk} ;" \ + "load ${dtype} ${disk}:1 12800000 /savesplash " \ + "&& source 12800000 ;" \ + "done ;" \ + "done\0" \ + "novideo=1\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in ${bootdevs}" \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "netrecover=setenv ethact FEC; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "dhcp 10800000 $serverip:uImage-${board}-recovery" \ + "&& dhcp 12800000 $serverip:uramdisk-${board}-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-med-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-med-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_CMD_ELF + +#define CONFIG_CMD_UNZIP +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#endif /* __CONFIG_H */ diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h index 40155c3..ac5208f 100644 --- a/include/configs/medcom-wide.h +++ b/include/configs/medcom-wide.h @@ -12,11 +12,6 @@ #include "tegra20-common.h" -/* Enable fdt support for Medcom-Wide. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra20-medcom-wide -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - /* High-level configuration options */ #define V_PROMPT "Tegra20 (Medcom-Wide) # " #define CONFIG_TEGRA_BOARD_STRING "Avionic Design Medcom-Wide" diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index 1a82a57..bb07060 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -14,11 +14,6 @@ /* MicroBlaze CPU */ #define MICROBLAZE_V5 1 -/* Open Firmware DTS */ -#define CONFIG_OF_CONTROL 1 -#define CONFIG_OF_EMBED 1 -#define CONFIG_DEFAULT_DEVICE_TREE microblaze-generic - /* linear and spi flash memory */ #ifdef XILINX_FLASH_START #define FLASH diff --git a/include/configs/mtp.h b/include/configs/mtp.h new file mode 100644 index 0000000..fab8dc7 --- /dev/null +++ b/include/configs/mtp.h @@ -0,0 +1,317 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices mtp + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3779 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +/* SPL magic */ +#ifdef CONFIG_SPL +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x00908400 +#define CONFIG_SPL_PAD_TO 0x400 +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7" +#define CONFIG_SPL_STACK 0x0091FFB8 + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_USB +#define CONFIG_SPL_WATCHDOG_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT + +/* SPI flash. */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 + +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SYS_SPL_MALLOC_START 0x00916000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 +#endif + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE + +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CONSOLE_MUX + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#ifdef CONFIG_USB_STORAGE +#define CONFIG_DRIVE_USB "usb " +#else +#define CONFIG_DRIVE_USB +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_MMC CONFIG_DRIVE_USB + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in ${bootdevs}" \ + "; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "setenv stdin serial,usbkbd\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in ${bootdevs}" \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-${board}-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-${board}-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_RESET_CAUSE_ADDR (PHYS_SDRAM + 0x80) + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +/* + * PCI express + */ +/* #define CONFIG_CMD_PCI */ +#ifdef CONFIG_CMD_PCI +#define CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCIE_IMX +#endif + +#define CONFIG_CMD_ELF + +#define CONFIG_CMD_UNZIP +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#endif /* __CONFIG_H */ diff --git a/include/configs/mx51_efikamx.h b/include/configs/mx51_efikamx.h index 0f2a4ef..fce7ead 100644 --- a/include/configs/mx51_efikamx.h +++ b/include/configs/mx51_efikamx.h @@ -96,11 +96,11 @@ #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SST -#define CONFIG_SF_DEFAULT_CS (1 | 121 << 8) +#define CONFIG_SF_DEFAULT_CS 1 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) #define CONFIG_SF_DEFAULT_SPEED 25000000 -#define CONFIG_ENV_SPI_CS (1 | 121 << 8) +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_MAX_HZ 25000000 #define CONFIG_ENV_SPI_MODE (SPI_MODE_0) diff --git a/include/configs/mx6_r.h b/include/configs/mx6_r.h new file mode 100644 index 0000000..0b048c5 --- /dev/null +++ b/include/configs/mx6_r.h @@ -0,0 +1,298 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices Nitrogen6X + * and Freescale i.MX6Q Sabre Lite boards. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3774 +#define CONFIG_BOARD_NAME "mx6_r" +#define CONFIG_SDHC3_CD -1 +#define CONFIG_SDHC4_CD IMX_GPIO_NR(4, 20) +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS + +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_MXC_SPI_DISPLAY +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_MXC_USB_PORT 1 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + + #define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + +#define CONFIG_BMP_16BPP +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#ifdef CONFIG_USB_STORAGE +#define CONFIG_DRIVE_USB "usb " +#else +#define CONFIG_DRIVE_USB +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_MMC CONFIG_DRIVE_USB + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in ${bootdevs}" \ + "; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "setenv stdin serial,usbkbd\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "loadsplash=if sf probe ; then sf read ${splashimage} c2000 ${splashsize} ; fi\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in ${bootdevs}" \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-r-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-r-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_CMD_ELF + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#endif /* __CONFIG_H */ diff --git a/include/configs/mx6qarm2.h b/include/configs/mx6qarm2.h index fd651cf..35c0a85 100644 --- a/include/configs/mx6qarm2.h +++ b/include/configs/mx6qarm2.h @@ -23,6 +23,8 @@ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG +#define CONFIG_SYS_GENERIC_BOARD + /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h index d1639c4..0ab3127 100644 --- a/include/configs/mx6qsabreauto.h +++ b/include/configs/mx6qsabreauto.h @@ -45,7 +45,4 @@ #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_OF_SEPARATE -#define CONFIG_DEFAULT_DEVICE_TREE imx6q-sabreauto - #endif /* __MX6QSABREAUTO_CONFIG_H */ diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index e59a3b4..2d93d6c 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -74,7 +74,7 @@ #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_CS (0 | (IMX_GPIO_NR(4, 9) << 8)) +#define CONFIG_SF_DEFAULT_CS 0 #define CONFIG_SF_DEFAULT_SPEED 20000000 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #endif diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 3d05a64..4208ba1 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -26,6 +26,8 @@ #define CONFIG_INITRD_TAG #define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD + /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M) @@ -203,7 +205,7 @@ #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_MXC_SPI #define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_CS (0 | (IMX_GPIO_NR(4, 11) << 8)) +#define CONFIG_SF_DEFAULT_CS 0 #define CONFIG_SF_DEFAULT_SPEED 20000000 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #endif diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 1eda65e..b92d944 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -198,6 +198,16 @@ #define CONFIG_PHYLIB #define CONFIG_PHY_ATHEROS +#define CONFIG_CMD_PCI +#ifdef CONFIG_CMD_PCI +#define CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCIE_IMX +#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(2, 1) +#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(2, 0) +#endif + /* FLASH and environment organization */ #define CONFIG_SYS_NO_FLASH diff --git a/include/configs/nit6xlite.h b/include/configs/nit6xlite.h new file mode 100644 index 0000000..4128e0d --- /dev/null +++ b/include/configs/nit6xlite.h @@ -0,0 +1,289 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices Nitrogen6X-Lite + * board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3771 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (40 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 1 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in mmc usb ; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ + "disk=0;" \ + "load ${dtype} ${disk}:1 10008000 /6x_bootscript" \ + "&& source 10008000 ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "usb start; " \ + "setenv stdout serial;" \ + "setenv stdin serial,usbkbd;" \ + "if mmc dev 0 ; then " \ + "setenv stdout serial,vga; " \ + "echo expose SD card over USB; " \ + "ums 0 mmc 0;" \ + "fi; " \ + "setenv stdout serial,vga; " \ + "echo no SD card present;" \ + "\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in mmc usb ; do " \ + "disk=0;" \ + "load ${dtype} ${disk}:1 10008000 /6x_upgrade " \ + "&& source 10008000 ; " \ + "done ;\0" \ + "disable_giga=1\0" \ + "initrd_high=0xffffffff\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-nit6xlite-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-nit6xlite-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +/* #define CONFIG_ENV_IS_IN_MMC */ +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +/* #define CONFIG_SYS_DCACHE_OFF */ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP +#define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (8 * 1024 * 1024) +#endif + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#endif /* __CONFIG_H */ diff --git a/include/configs/nitrogen6_max.h b/include/configs/nitrogen6_max.h new file mode 100644 index 0000000..052bff5 --- /dev/null +++ b/include/configs/nitrogen6_max.h @@ -0,0 +1,376 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices Nitrogen6_max + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3778 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +/* SPL magic */ +#ifdef CONFIG_SPL +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x00908400 +#define CONFIG_SPL_PAD_TO 0x400 +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7" +#define CONFIG_SPL_STACK 0x0091FFB8 + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_USB +#define CONFIG_SPL_WATCHDOG_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT + +/* SPI flash. */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 + +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SYS_SPL_MALLOC_START 0x00916000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 +#endif + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + + +/* + * SATA Configs + */ +#define CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + + #define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + +#define CONFIG_BMP_16BPP +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_SATA +#define CONFIG_DRIVE_SATA "sata " +#else +#define CONFIG_DRIVE_SATA +#endif + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#ifdef CONFIG_USB_STORAGE +#define CONFIG_DRIVE_USB "usb " +#else +#define CONFIG_DRIVE_USB +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC CONFIG_DRIVE_USB + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in ${bootdevs}" \ + "; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "setenv stdout serial; " \ + "if sata init && sata dev 0; then " \ + "setenv stdout serial,vga; " \ + "echo expose SATA drive over USB; " \ + "ums 0 sata 0;" \ + "fi ;" \ + "for disk in 1 0 ; do " \ + "if mmc dev ${disk} ; then " \ + "setenv stdout serial,vga; " \ + "echo expose MMC drive ${disk} over USB; " \ + "ums 0 mmc ${disk}; " \ + "fi ;" \ + "done; " \ + "\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "loadsplash=if sf probe ; then sf read ${splashimage} c2000 ${splashsize} ; fi\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in ${bootdevs}" \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-${board}-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-${board}-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_RESET_CAUSE_ADDR (PHYS_SDRAM + 0x80) + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +/* + * PCI express + */ +/* #define CONFIG_CMD_PCI */ +#ifdef CONFIG_CMD_PCI +#define CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCIE_IMX +#endif + +#define CONFIG_CMD_ELF + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#endif /* __CONFIG_H */ diff --git a/include/configs/nitrogen6_vm.h b/include/configs/nitrogen6_vm.h new file mode 100644 index 0000000..cc52211 --- /dev/null +++ b/include/configs/nitrogen6_vm.h @@ -0,0 +1,303 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices nitrogen6_vm + * board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3771 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (40 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in mmc usb ; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "usb start; " \ + "setenv stdout serial;" \ + "setenv stdin serial,usbkbd;" \ + "if mmc dev 0 ; then " \ + "setenv stdout serial,vga; " \ + "echo expose SD card over USB; " \ + "ums 0 mmc 0;" \ + "else " \ + "setenv stdout serial,vga; " \ + "echo expose eMMC over USB; " \ + "ums 0 mmc 1;" \ + "fi; " \ + "setenv stdout serial,vga; " \ + "echo no SD card present;" \ + "\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in mmc usb ; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done ;\0" \ + "initrd_high=0xffffffff\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-nitrogen6_vm-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-nitrogen6_vm-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + "dtbname=imx6dl-nitrogen6_vm.dtb\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +/* #define CONFIG_ENV_IS_IN_MMC */ +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +/* #define CONFIG_SYS_DCACHE_OFF */ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP +#define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (8 * 1024 * 1024) +#endif + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#endif /* __CONFIG_H */ diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index b2b17ce..6302121 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -27,11 +27,12 @@ #define CONFIG_SYS_GENERIC_BOARD /* Size of malloc() pool */ -#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_MISC_INIT_R #define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO #define CONFIG_CI_UDC #define CONFIG_USBD_HS #define CONFIG_USB_GADGET_DUALSPEED @@ -52,8 +53,9 @@ #define CONFIG_SPI_FLASH #define CONFIG_SPI_FLASH_SST #define CONFIG_MXC_SPI +#define CONFIG_MXC_SPI_DISPLAY #define CONFIG_SF_DEFAULT_BUS 0 -#define CONFIG_SF_DEFAULT_CS (0|(IMX_GPIO_NR(3, 19)<<8)) +#define CONFIG_SF_DEFAULT_CS 0 #define CONFIG_SF_DEFAULT_SPEED 25000000 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) #endif @@ -63,6 +65,7 @@ #define CONFIG_SYS_I2C #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID /* MMC Configs */ #define CONFIG_FSL_ESDHC @@ -76,7 +79,10 @@ #define CONFIG_BOUNCE_BUFFER #define CONFIG_CMD_EXT2 #define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FS_GENERIC #define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION #ifdef CONFIG_MX6Q #define CONFIG_CMD_SATA @@ -122,6 +128,8 @@ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP /* Miscellaneous commands */ #define CONFIG_CMD_BMODE @@ -136,8 +144,14 @@ #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE #define CONFIG_VIDEO_BMP_RLE8 #define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + +#define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + #define CONFIG_BMP_16BPP -#define CONFIG_VIDEO_LOGO #define CONFIG_IPUV3_CLK 260000000 #define CONFIG_CMD_HDMIDETECT #define CONFIG_CONSOLE_MUX @@ -173,7 +187,14 @@ #define CONFIG_DRIVE_MMC #endif -#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC +#ifdef CONFIG_USB_STORAGE +#define CONFIG_DRIVE_USB "usb " +#else +#define CONFIG_DRIVE_USB +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC CONFIG_DRIVE_USB +#define CONFIG_UMSDEVS CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC #if defined(CONFIG_SABRELITE) #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -192,11 +213,11 @@ "mmcargs=setenv bootargs console=${console},${baudrate} " \ "root=${mmcroot}\0" \ "loadbootscript=" \ - "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ "bootscript=echo Running bootscript from mmc ...; " \ "source\0" \ - "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ - "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "loaduimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ + "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ @@ -250,37 +271,73 @@ "else run netboot; fi" #else #define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ + "umsdevs=" CONFIG_UMSDEVS "\0" \ "console=ttymxc1\0" \ "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ "sf erase 0xc0000 0x2000 && " \ "echo restored environment to factory default ; fi\0" \ - "bootcmd=for dtype in " CONFIG_DRIVE_TYPES \ + "bootcmd=for dtype in ${bootdevs}" \ "; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ - "for fs in fat ext2 ; do " \ - "${fs}load " \ - "${dtype} ${disk}:1 " \ - "10008000 " \ - "/6x_bootscript" \ - "&& source 10008000 ; " \ - "done ; " \ + "load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ "done ; " \ "done; " \ "setenv stdout serial,vga ; " \ "echo ; echo 6x_bootscript not found ; " \ "echo ; echo serial console at 115200, 8N1 ; echo ; " \ "echo details at http://boundarydevices.com/6q_bootscript ; " \ - "setenv stdout serial\0" \ - "upgradeu=for dtype in " CONFIG_DRIVE_TYPES \ + "setenv stdout serial;" \ + "setenv stdin serial,usbkbd;" \ + "for dtype in ${umsdevs} ; do " \ + "if itest.s sata == ${dtype}; then " \ + "initcmd='sata init' ;" \ + "else " \ + "initcmd='mmc rescan' ;" \ + "fi; " \ + "for disk in 0 1 ; do " \ + "if $initcmd && $dtype dev $disk ; then " \ + "setenv stdout serial,vga; " \ + "echo expose ${dtype} drive ${disk} over USB; " \ + "ums 0 $dtype $disk ;" \ + "fi; " \ + " done; " \ + "done ;" \ + "setenv stdout serial,vga; " \ + "echo no block devices found;" \ + "\0" \ + "dfu_alt_info=u-boot raw 0x0 0xc0000\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "loadsplash=if sf probe ; then sf read ${splashimage} c2000 ${splashsize} ; fi\0" \ + "rundfu=dfu 0 sf 0:0:25000000:0\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in ${bootdevs}" \ "; do " \ "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ - "for fs in fat ext2 ; do " \ - "${fs}load ${dtype} ${disk}:1 10008000 " \ - "/6x_upgrade " \ - "&& source 10008000 ; " \ - "done ; " \ + "load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ "done ; " \ "done\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-${board}-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-${board}-recovery.img " \ + "&& bootm 10800000 12800000\0" \ #endif /* Miscellaneous configurable options */ @@ -292,7 +349,7 @@ /* Print Buffer Size */ #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_MAXARGS 48 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_MEMTEST_START 0x10000000 @@ -306,6 +363,7 @@ /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_RESET_CAUSE_ADDR (PHYS_SDRAM + 0x80) #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR @@ -349,11 +407,13 @@ #define CONFIG_CMD_BMP #define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST #define CONFIG_SYS_ALT_MEMTEST #define CONFIG_CMD_BOOTZ #define CONFIG_SUPPORT_RAW_INITRD #define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT /* * PCI express @@ -365,4 +425,31 @@ #define CONFIG_PCIE_IMX #endif +#define CONFIG_CMD_ELF + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#define CONFIG_CMD_FASTBOOT +#define CONFIG_ANDROID_BOOT_IMAGE +#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 + +/* USB Device Firmware Update support */ +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_SF +#define CONFIG_CMD_DFU +#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0xc0000 +#define DFU_MANIFEST_POLL_TIMEOUT 25000 + #endif /* __CONFIG_H */ diff --git a/include/configs/nw.h b/include/configs/nw.h new file mode 100644 index 0000000..b6f4574 --- /dev/null +++ b/include/configs/nw.h @@ -0,0 +1,311 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices NW board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3769 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +/* USB gadget support */ +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 1 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 + +#define CONFIG_USB_STORAGE +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + + #define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#define CONFIG_CMD_BDI /* bdinfo */ +#define CONFIG_CMD_BOOTD /* bootd */ +#define CONFIG_CMD_CONSOLE /* coninfo */ +#define CONFIG_CMD_ECHO /* echo arguments */ +#define CONFIG_CMD_EDITENV /* editenv */ +#define CONFIG_CMD_FPGA /* FPGA configuration Support */ +#define CONFIG_CMD_IMI /* iminfo */ +#define CONFIG_CMD_ITEST /* Integer (and string) test */ +#ifndef CONFIG_SYS_NO_FLASH +#define CONFIG_CMD_FLASH /* flinfo, erase, protect */ +#define CONFIG_CMD_IMLS /* List all found images */ +#endif +#define CONFIG_CMD_LOADB /* loadb */ +#define CONFIG_CMD_LOADS /* loads */ +#define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop */ +#define CONFIG_CMD_MISC /* Misc functions like sleep etc*/ +#define CONFIG_CMD_RUN /* run command in env variable */ +#define CONFIG_CMD_SAVEENV /* saveenv */ +#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ +#define CONFIG_CMD_SOURCE /* "source" command support */ +#define CONFIG_CMD_XIMG /* Load part of Multi Image */ + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in mmc" \ + "; do " \ + "for disk in 0 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "usb start; " \ + "setenv stdin serial,usbkbd\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in mmc " \ + "; do " \ + "for disk in 0 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done\0" \ + "initrd_high=0xffffffff\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-nw-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-nw-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +/* #define CONFIG_ENV_IS_IN_MMC */ +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +/* #define CONFIG_SYS_DCACHE_OFF */ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#endif /* __CONFIG_H */ diff --git a/include/configs/oc.h b/include/configs/oc.h new file mode 100644 index 0000000..cb78366 --- /dev/null +++ b/include/configs/oc.h @@ -0,0 +1,316 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices Nitrogen6X + * and Freescale i.MX6Q Sabre Lite boards. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3769 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +/* USB gadget support */ +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#ifdef CONFIG_MX6Q +#define CONFIG_CMD_SATA +#endif + +/* + * SATA Configs + */ +#ifdef CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA +#endif + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_MXC_USB_PORT 1 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_SATA +#define CONFIG_DRIVE_SATA "sata " +#else +#define CONFIG_DRIVE_SATA +#endif + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttymxc1\0" \ + "disable_giga=1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in " CONFIG_DRIVE_TYPES \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "usb start; " \ + "setenv stdin serial,usbkbd\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in " CONFIG_DRIVE_TYPES \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done\0" \ + "initrd_high=0xffffffff\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-oc-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-oc-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +#define CONFIG_ARP_TIMEOUT 200UL + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +/* #define CONFIG_ENV_IS_IN_MMC */ +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +/* #define CONFIG_SYS_DCACHE_OFF */ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#endif /* __CONFIG_H */ diff --git a/include/configs/odroid.h b/include/configs/odroid.h new file mode 100644 index 0000000..b616ac2 --- /dev/null +++ b/include/configs/odroid.h @@ -0,0 +1,214 @@ +/* + * Copyright (C) 2014 Samsung Electronics + * Sanghee Kim + * Piotr Wilczek + * Przemyslaw Marczak + * + * Configuation settings for the Odroid-U3 (EXYNOS4412) board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ODROID_U3_H +#define __CONFIG_ODROID_U3_H + +#include + +#define CONFIG_SYS_PROMPT "Odroid # " /* Monitor Command Prompt */ + + +#define CONFIG_SYS_L2CACHE_OFF +#ifndef CONFIG_SYS_L2CACHE_OFF +#define CONFIG_SYS_L2_PL310 +#define CONFIG_SYS_PL310_BASE 0x10502000 +#endif + +#define CONFIG_MACH_TYPE 4289 + +#define CONFIG_NR_DRAM_BANKS 8 +#define CONFIG_SYS_SDRAM_BASE 0x40000000 +#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */ +#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE + +/* memtest works on */ +#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000) +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) +#define CONFIG_SYS_TEXT_BASE 0x43e00000 + +#include +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M)) + +/* select serial console configuration */ +#define CONFIG_SERIAL1 +#define CONFIG_BAUDRATE 115200 + +/* Console configuration */ +#define CONFIG_SYS_CONSOLE_INFO_QUIET +#define CONFIG_SYS_CONSOLE_IS_IN_ENV + +#define CONFIG_CMD_BOOTZ +#define CONFIG_FIT +#define CONFIG_FIT_VERBOSE +#define CONFIG_BOOTARGS "Please use defined boot" +#define CONFIG_BOOTCOMMAND "run autoboot" +#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" + +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \ + - GENERATED_GBL_DATA_SIZE) + +#define CONFIG_SYS_MEM_TOP_HIDE (SZ_1M) /* ram console */ + +#define CONFIG_SYS_MONITOR_BASE 0x00000000 + +#define CONFIG_ENV_IS_IN_MMC +#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV +#define CONFIG_ENV_SIZE 4096 +#define CONFIG_ENV_OFFSET (SZ_1K * 1280) /* 1.25 MiB offset */ +#define CONFIG_ENV_OVERWRITE + +/* Partitions name */ +#define PARTS_BOOT "boot" +#define PARTS_ROOT "platform" + +#define CONFIG_DFU_ALT \ + "uImage fat 0 1;" \ + "zImage fat 0 1;" \ + "Image.itb fat 0 1;" \ + "uInitrd fat 0 1;" \ + "exynos4412-odroidu3.dtb fat 0 1;" \ + "exynos4412-odroidx2.dtb fat 0 1;" \ + ""PARTS_BOOT" part 0 1;" \ + ""PARTS_ROOT" part 0 2\0" \ + +#define CONFIG_SET_DFU_ALT_INFO +#define CONFIG_SET_DFU_ALT_BUF_LEN (SZ_1K) + +#define CONFIG_DFU_ALT_BOOT_EMMC \ + "u-boot raw 0x3e 0x800 mmcpart 1;" \ + "bl1 raw 0x0 0x1e mmcpart 1;" \ + "bl2 raw 0x1e 0x1d mmcpart 1;" \ + "tzsw raw 0x83e 0x138 mmcpart 1\0" + +#define CONFIG_DFU_ALT_BOOT_SD \ + "u-boot raw 0x3f 0x800;" \ + "bl1 raw 0x1 0x1e;" \ + "bl2 raw 0x1f 0x1d;" \ + "tzsw raw 0x83f 0x138\0" + +/* + * Bootable media layout: + * dev: SD eMMC(part boot) + * BL1 1 0 + * BL2 31 30 + * UBOOT 63 62 + * TZSW 2111 2110 + * ENV 2560 2560(part user) + * + * MBR Primary partiions: + * Num Name Size Offset + * 1. BOOT: 100MiB 2MiB + * 2. ROOT: - +*/ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "loadkernel=fatload mmc ${mmcbootdev}:${mmcbootpart} ${kerneladdr} " \ + "${kernelname}\0" \ + "loadinitrd=fatload mmc ${mmcbootdev}:${mmcbootpart} ${initrdaddr} " \ + "${initrdname}\0" \ + "loaddtb=fatload mmc ${mmcbootdev}:${mmcbootpart} ${fdtaddr} " \ + "${fdtfile}\0" \ + "check_ramdisk=" \ + "if run loadinitrd; then " \ + "setenv initrd_addr ${initrdaddr};" \ + "else " \ + "setenv initrd_addr -;" \ + "fi;\0" \ + "check_dtb=" \ + "if run loaddtb; then " \ + "setenv fdt_addr ${fdtaddr};" \ + "else " \ + "setenv fdt_addr;" \ + "fi;\0" \ + "kernel_args=" \ + "setenv bootargs root=/dev/mmcblk${mmcrootdev}p${mmcrootpart}" \ + " rootwait ${console} ${opts}\0" \ + "boot_fit=" \ + "setenv kerneladdr 0x42000000;" \ + "setenv kernelname Image.itb;" \ + "run loadkernel;" \ + "run kernel_args;" \ + "bootm ${kerneladdr}#${boardname}\0" \ + "boot_uimg=" \ + "setenv kerneladdr 0x40007FC0;" \ + "setenv kernelname uImage;" \ + "run check_dtb;" \ + "run check_ramdisk;" \ + "run loadkernel;" \ + "run kernel_args;" \ + "bootm ${kerneladdr} ${initrd_addr} ${fdt_addr};\0" \ + "boot_zimg=" \ + "setenv kerneladdr 0x40007FC0;" \ + "setenv kernelname zImage;" \ + "run check_dtb;" \ + "run check_ramdisk;" \ + "run loadkernel;" \ + "run kernel_args;" \ + "bootz ${kerneladdr} ${initrd_addr} ${fdt_addr};\0" \ + "autoboot=" \ + "if test -e mmc 0 Image.itb; then; " \ + "run boot_fit;" \ + "elif test -e mmc 0 zImage; then; " \ + "run boot_zimg;" \ + "elif test -e mmc 0 uImage; then; " \ + "run boot_uimg;" \ + "fi;\0" \ + "console=" CONFIG_DEFAULT_CONSOLE \ + "mmcbootdev=0\0" \ + "mmcbootpart=1\0" \ + "mmcrootdev=0\0" \ + "mmcrootpart=2\0" \ + "bootdelay=0\0" \ + "dfu_alt_system="CONFIG_DFU_ALT \ + "dfu_alt_info=Please reset the board\0" \ + "consoleon=set console console=ttySAC1,115200n8; save; reset\0" \ + "consoleoff=set console console=ram; save; reset\0" \ + "initrdname=uInitrd\0" \ + "initrdaddr=42000000\0" \ + "fdtaddr=40800000\0" + +/* I2C */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_S3C24X0 +#define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 +#define CONFIG_SYS_I2C_S3C24X0_SLAVE 0 +#define CONFIG_MAX_I2C_NUM 8 +#define CONFIG_SYS_I2C_INIT_BOARD + +/* POWER */ +#define CONFIG_POWER +#define CONFIG_POWER_I2C +#define CONFIG_POWER_MAX77686 + +/* GPT */ +#define CONFIG_RANDOM_UUID + +/* Security subsystem - enable hw_rand() */ +#define CONFIG_EXYNOS_ACE_SHA +#define CONFIG_LIB_HW_RAND + +#define CONFIG_CMD_GPIO + +/* + * Supported Odroid boards: X3, U3 + * TODO: Add Odroid X support + */ +#define CONFIG_MISC_COMMON +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG +#define CONFIG_BOARD_TYPES +#define CONFIG_MISC_INIT_R + +#undef CONFIG_REVISION_TAG + +#endif /* __CONFIG_H */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 644e97f..f25a940 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -207,6 +207,9 @@ "rootfstype=${ramrootfstype}\0" \ "loadramdisk=load mmc ${bootpart} ${rdaddr} ${bootdir}/${ramdisk}\0" \ "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ + "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ + "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ + "source ${loadaddr}\0" \ "loadfdt=run validatefdt; load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ @@ -243,9 +246,13 @@ "echo Running uenvcmd ...;" \ "run uenvcmd;" \ "fi;" \ - "if run loadimage; then " \ - "run mmcboot;" \ - "fi;" \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot;" \ + "fi;" \ + "fi; " \ "fi;" \ "run nandboot;" \ "setenv bootfile zImage;" \ diff --git a/include/configs/origen.h b/include/configs/origen.h index 5d24916..fb1536c 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -13,8 +13,6 @@ #define CONFIG_SYS_PROMPT "ORIGEN # " -#undef CONFIG_DEFAULT_DEVICE_TREE -#define CONFIG_DEFAULT_DEVICE_TREE exynos4210-origen /* High Level Configuration Options */ #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ diff --git a/include/configs/paz00.h b/include/configs/paz00.h index dd0abf8..45bb470 100644 --- a/include/configs/paz00.h +++ b/include/configs/paz00.h @@ -20,11 +20,6 @@ #include #include "tegra20-common.h" -/* Enable fdt support for Paz00. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra20-paz00 -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - /* High-level configuration options */ #define V_PROMPT "Tegra20 (Paz00) MOD # " #define CONFIG_TEGRA_BOARD_STRING "Compal Paz00" diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h index 5efcd76..7d102a4 100644 --- a/include/configs/pcm051.h +++ b/include/configs/pcm051.h @@ -128,8 +128,6 @@ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_LOAD -#define CONFIG_SPL_SPI_BUS 0 -#define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 #define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 #endif diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h index 76b8d7a..987cef5 100644 --- a/include/configs/peach-pit.h +++ b/include/configs/peach-pit.h @@ -13,8 +13,6 @@ #include -#undef CONFIG_DEFAULT_DEVICE_TREE -#define CONFIG_DEFAULT_DEVICE_TREE exynos5420-peach-pit /* select serial console configuration */ #define CONFIG_SERIAL3 /* use SERIAL 3 */ @@ -22,4 +20,14 @@ #define CONFIG_SYS_PROMPT "Peach # " #define CONFIG_IDENT_STRING " for Peach" +#define CONFIG_VIDEO_PARADE + +/* Display */ +#define CONFIG_LCD +#ifdef CONFIG_LCD +#define CONFIG_EXYNOS_FB +#define CONFIG_EXYNOS_DP +#define LCD_BPP LCD_COLOR16 +#endif + #endif /* __CONFIG_PEACH_PIT_H */ diff --git a/include/configs/per.h b/include/configs/per.h new file mode 100644 index 0000000..a8e8aa7 --- /dev/null +++ b/include/configs/per.h @@ -0,0 +1,339 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices bt + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3781 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +/* SPL magic */ +#ifdef CONFIG_SPL +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x00908400 +#define CONFIG_SPL_PAD_TO 0x400 +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7" +#define CONFIG_SPL_STACK 0x0091FFB8 + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_USB +#define CONFIG_SPL_WATCHDOG_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT + +/* SPI flash. */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 + +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SYS_SPL_MALLOC_START 0x00916000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 +#endif + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 1 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + + #define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + +#define CONFIG_BMP_16BPP +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#ifdef CONFIG_USB_STORAGE +#define CONFIG_DRIVE_USB "usb " +#else +#define CONFIG_DRIVE_USB +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_MMC CONFIG_DRIVE_USB + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in ${bootdevs}" \ + "; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ + "for disk in 0; do ${dtype} dev ${disk} ;" \ + "load ${dtype} ${disk}:1 10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "setenv stdin serial,usbkbd\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "loadsplash=if sf probe ; then sf read ${splashimage} c2000 ${splashsize} ; fi\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in ${bootdevs}; do " \ + "disk=0; ${dtype} dev 0 ;" \ + "load ${dtype} 0:1 10008000 /6x_upgrade && source 10008000 ; " \ + "done\0" \ + "disable_giga=1\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-${board}-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-${board}-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_RESET_CAUSE_ADDR (PHYS_SDRAM + 0x80) + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +/* + * PCI express + */ +/* #define CONFIG_CMD_PCI */ +#ifdef CONFIG_CMD_PCI +#define CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCIE_IMX +#endif + +#define CONFIG_CMD_ELF + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#endif /* __CONFIG_H */ diff --git a/include/configs/plutux.h b/include/configs/plutux.h index a473f23..b663b89 100644 --- a/include/configs/plutux.h +++ b/include/configs/plutux.h @@ -12,11 +12,6 @@ #include "tegra20-common.h" -/* Enable fdt support for Plutux. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra20-plutux -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - /* High-level configuration options */ #define V_PROMPT "Tegra20 (Plutux) # " #define CONFIG_TEGRA_BOARD_STRING "Avionic Design Plutux" diff --git a/include/configs/pr1.h b/include/configs/pr1.h index e96ed4b..0f57e86 100644 --- a/include/configs/pr1.h +++ b/include/configs/pr1.h @@ -135,7 +135,6 @@ #define CONFIG_BOOTCOMMAND "run nandboot" #define CONFIG_BOOTDELAY 2 #define CONFIG_LOADADDR 0x2000000 -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/s.h b/include/configs/s.h new file mode 100644 index 0000000..624d96a --- /dev/null +++ b/include/configs/s.h @@ -0,0 +1,301 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices S board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3769 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART4_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + + #define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_MMC + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttymxc3,115200\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in " CONFIG_DRIVE_TYPES \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "usb start; " \ + "setenv stdin serial,usbkbd\0" \ + "loadsplash=if sf probe ; then sf read ${splashimage} c2000 ${splashsize} ; fi\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in " CONFIG_DRIVE_TYPES \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done\0" \ + "panel=LDB-WXGA\0" \ + "initrd_high=0xffffffff\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=$console; " \ + "tftpboot 10800000 10.0.0.1:uImage-s-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-s-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +/* #define CONFIG_ENV_IS_IN_MMC */ +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +/* #define CONFIG_SYS_DCACHE_OFF */ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + + +#endif /* __CONFIG_H */ diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h index eb046cd..082d51c 100644 --- a/include/configs/s5pc210_universal.h +++ b/include/configs/s5pc210_universal.h @@ -14,8 +14,6 @@ #define CONFIG_SYS_PROMPT "Universal # " /* Monitor Command Prompt */ -#undef CONFIG_DEFAULT_DEVICE_TREE -#define CONFIG_DEFAULT_DEVICE_TREE exynos4210-universal_c210 #define CONFIG_TIZEN /* TIZEN lib */ @@ -247,7 +245,4 @@ int universal_spi_read(void); #define CONFIG_VIDEO_BMP_GZIP #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) -#define LCD_XRES 480 -#define LCD_YRES 800 - #endif /* __CONFIG_H */ diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index 56c2454..c46baf2 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -79,8 +79,19 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME -/* No NOR flash */ +/* NOR flash */ +#define CONFIG_CMD_FLASH + +#ifdef CONFIG_CMD_FLASH +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_FLASH_BASE 0x10000000 +#define CONFIG_SYS_MAX_FLASH_SECT 131 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#else #define CONFIG_SYS_NO_FLASH +#endif /* * Command line configuration. @@ -287,8 +298,6 @@ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_LOAD -#define CONFIG_SPL_SPI_BUS 0 -#define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8400 #endif diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index bf2d25c..6972643 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -31,19 +31,19 @@ #define CONFIG_DM_DEMO_SHAPE #define CONFIG_DM_GPIO #define CONFIG_DM_TEST +#define CONFIG_DM_SERIAL + +#define CONFIG_SYS_STDIO_DEREGISTER /* Number of bits in a C 'long' on this architecture */ #define CONFIG_SANDBOX_BITS_PER_LONG 64 -#define CONFIG_OF_CONTROL -#define CONFIG_OF_HOSTFILE #define CONFIG_OF_LIBFDT #define CONFIG_LMB #define CONFIG_FIT #define CONFIG_FIT_SIGNATURE #define CONFIG_RSA #define CONFIG_CMD_FDT -#define CONFIG_DEFAULT_DEVICE_TREE sandbox #define CONFIG_ANDROID_BOOT_IMAGE #define CONFIG_FS_FAT @@ -91,7 +91,7 @@ #define CONFIG_ENV_SIZE 8192 #define CONFIG_ENV_IS_NOWHERE -/* SPI */ +/* SPI - enable all SPI flash types for testing purposes */ #define CONFIG_SANDBOX_SPI #define CONFIG_CMD_SF #define CONFIG_CMD_SF_TEST @@ -99,7 +99,13 @@ #define CONFIG_SPI_FLASH #define CONFIG_OF_SPI #define CONFIG_OF_SPI_FLASH +#define CONFIG_SPI_FLASH_ATMEL +#define CONFIG_SPI_FLASH_EON +#define CONFIG_SPI_FLASH_GIGADEVICE +#define CONFIG_SPI_FLASH_MACRONIX #define CONFIG_SPI_FLASH_SANDBOX +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_SPI_FLASH_SST #define CONFIG_SPI_FLASH_STMICRO #define CONFIG_SPI_FLASH_WINBOND diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h index fc4f976..04e4f82 100644 --- a/include/configs/seaboard.h +++ b/include/configs/seaboard.h @@ -19,11 +19,6 @@ #include "tegra20-common.h" -/* Enable fdt support for Seaboard. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra20-seaboard -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - /* High-level configuration options */ #define V_PROMPT "Tegra20 (SeaBoard) # " #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard" diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index b8fb77e..bf9752f 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -167,8 +167,6 @@ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_LOAD -#define CONFIG_SPL_SPI_BUS 0 -#define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index 66fa179..6117094 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -11,8 +11,6 @@ #include -#undef CONFIG_DEFAULT_DEVICE_TREE -#define CONFIG_DEFAULT_DEVICE_TREE exynos5250-smdk5250 /* Enable FIT support and comparison */ #define CONFIG_FIT diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index 606739b..36a156f 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -15,8 +15,6 @@ #define CONFIG_SMDK5420 /* which is in a SMDK5420 */ -#undef CONFIG_DEFAULT_DEVICE_TREE -#define CONFIG_DEFAULT_DEVICE_TREE exynos5420-smdk5420 /* select serial console configuration */ #define CONFIG_SERIAL3 /* use SERIAL 3 */ diff --git a/include/configs/snap.h b/include/configs/snap.h new file mode 100644 index 0000000..40899b2 --- /dev/null +++ b/include/configs/snap.h @@ -0,0 +1,340 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices Snap board + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3778 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +/* SPL magic */ +#ifdef CONFIG_SPL +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x00908400 +#define CONFIG_SPL_PAD_TO 0x400 +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7" +#define CONFIG_SPL_STACK 0x0091FFB8 + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_USB +#define CONFIG_SPL_WATCHDOG_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT + +/* SPI flash. */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 + +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SYS_SPL_MALLOC_START 0x00916000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 +#endif + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +/* + * SATA Configs + */ +#define CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 7 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_CONSOLE_MUX + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=mmc\0" \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in ${bootdevs}" \ + "; do " \ + "for disk in 1 ; do ${dtype} dev ${disk} ;" \ + "load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "setenv stdout serial; " \ + "if sata init && sata dev 0; then " \ + "echo expose SATA drive over USB; " \ + "ums 0 sata 0;" \ + "fi ;" \ + "for disk in 1 0 ; do " \ + "if mmc dev ${disk} ; then " \ + "echo expose MMC drive ${disk} over USB; " \ + "ums 0 mmc ${disk}; " \ + "fi ;" \ + "done; " \ + "\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "loadsplash=if sf probe ; then sf read ${splashimage} c2000 ${splashsize} ; fi\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in ${bootdevs}" \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done\0" \ + "disable_giga=1\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-${board}-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-${board}-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_RESET_CAUSE_ADDR (PHYS_SDRAM + 0x80) + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +/* + * PCI express + */ +/* #define CONFIG_CMD_PCI */ +#ifdef CONFIG_CMD_PCI +#define CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCIE_IMX +#endif + +#define CONFIG_CMD_ELF + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#define CONFIG_CMD_FASTBOOT +#define CONFIG_ANDROID_BOOT_IMAGE +#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 + +/* USB Device Firmware Update support */ +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_SF +#define CONFIG_CMD_DFU +#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0xc0000 +#define DFU_MANIFEST_POLL_TIMEOUT 25000 + +#endif /* __CONFIG_H */ diff --git a/include/configs/snow.h b/include/configs/snow.h index 673fa14..fbaaa59 100644 --- a/include/configs/snow.h +++ b/include/configs/snow.h @@ -11,8 +11,6 @@ #include -#undef CONFIG_DEFAULT_DEVICE_TREE -#define CONFIG_DEFAULT_DEVICE_TREE exynos5250-snow /* Enable FIT support and comparison */ #define CONFIG_FIT diff --git a/include/configs/sp.h b/include/configs/sp.h new file mode 100644 index 0000000..f18e280 --- /dev/null +++ b/include/configs/sp.h @@ -0,0 +1,280 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices SP board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3771 + +#define CONFIG_SDHC3_CD IMX_GPIO_NR(7, 0) +#define CONFIG_SDHC4_CD -1 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT4 +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_ETHPRIME "usbnet" + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_MXC_USB_PORT 1 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#define CONFIG_BMP_16BPP +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in mmc" \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "usb start; " \ + "setenv stdin serial,usbkbd\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in mmc " \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "serverip=10.0.0.1\0" \ + "ipaddr=10.0.0.2\0" \ + "netmask 255.255.255.0\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-sp-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-sp-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +/* #define CONFIG_ENV_IS_IN_MMC */ +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +/* #define CONFIG_SYS_DCACHE_OFF */ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#endif /* __CONFIG_H */ diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index e768921..1d947d7 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -244,7 +244,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ MEM_LAYOUT_ENV_SETTINGS \ - "fdtfile=" CONFIG_FTDFILE "\0" \ + "fdtfile=" CONFIG_FDTFILE "\0" \ "console=ttyS0,115200\0" \ BOOTENV diff --git a/include/configs/ta.h b/include/configs/ta.h new file mode 100644 index 0000000..84b5e56 --- /dev/null +++ b/include/configs/ta.h @@ -0,0 +1,365 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices TA board + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3778 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +/* SPL magic */ +#ifdef CONFIG_SPL +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_TEXT_BASE 0x00908400 +#define CONFIG_SPL_PAD_TO 0x400 +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/armv7" +#define CONFIG_SPL_STACK 0x0091FFB8 + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_USB +#define CONFIG_SPL_WATCHDOG_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT + +/* SPI flash. */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 + +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SYS_SPL_MALLOC_START 0x00916000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 +#endif + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + + #define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + +#define CONFIG_BMP_16BPP +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#ifdef CONFIG_USB_STORAGE +#define CONFIG_DRIVE_USB "usb " +#else +#define CONFIG_DRIVE_USB +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_MMC CONFIG_DRIVE_USB + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in ${bootdevs}" \ + "; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "setenv stdout serial; " \ + "for disk in 1 0 ; do " \ + "if mmc dev ${disk} ; then " \ + "setenv stdout serial,vga; " \ + "echo expose MMC drive ${disk} over USB; " \ + "ums 0 mmc ${disk}; " \ + "fi ;" \ + "done; " \ + "\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "loadsplash=if sf probe ; then sf read ${splashimage} c2000 ${splashsize} ; fi\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in ${bootdevs}" \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done\0" \ + "disable_giga=1\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-${board}-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-${board}-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_RESET_CAUSE_ADDR (PHYS_SDRAM + 0x80) + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +/* + * PCI express + */ +/* #define CONFIG_CMD_PCI */ +#ifdef CONFIG_CMD_PCI +#define CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCIE_IMX +#endif + +#define CONFIG_CMD_ELF + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#define CONFIG_CMD_FASTBOOT +#define CONFIG_ANDROID_BOOT_IMAGE +#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 + +/* USB Device Firmware Update support */ +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_SF +#define CONFIG_CMD_DFU +#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0xc0000 +#define DFU_MANIFEST_POLL_TIMEOUT 25000 + +#endif /* __CONFIG_H */ diff --git a/include/configs/tcm-bf518.h b/include/configs/tcm-bf518.h index a77ba69..6673026 100644 --- a/include/configs/tcm-bf518.h +++ b/include/configs/tcm-bf518.h @@ -116,7 +116,6 @@ #define CONFIG_UART_CONSOLE 0 #define CONFIG_BOOTCOMMAND "run flashboot" #define FLASHBOOT_ENV_SETTINGS "flashboot=bootm 0x20040000\0" -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/tcm-bf537.h b/include/configs/tcm-bf537.h index c4c1c57..9998343 100644 --- a/include/configs/tcm-bf537.h +++ b/include/configs/tcm-bf537.h @@ -145,7 +145,6 @@ "flashboot=flread 20040000 1000000 300000;" \ "bootm 0x1000000\0" #define CONFIG_BOARD_SIZE_LIMIT $$((384 * 1024)) -#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED /* * Pull in common ADI header for remaining command/environment setup diff --git a/include/configs/tec-ng.h b/include/configs/tec-ng.h index 13baa76..51f87da 100644 --- a/include/configs/tec-ng.h +++ b/include/configs/tec-ng.h @@ -10,11 +10,6 @@ #include "tegra30-common.h" -/* Enable fdt support for tec-ng. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra30-tec-ng -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - /* High-level configuration options */ #define V_PROMPT "Tegra30 (TEC-NG) # " #define CONFIG_TEGRA_BOARD_STRING "Avionic Design Tamonten™ NG Evaluation Carrier" diff --git a/include/configs/tec.h b/include/configs/tec.h index 90e7b7a..9ea4ff4 100644 --- a/include/configs/tec.h +++ b/include/configs/tec.h @@ -12,11 +12,6 @@ #include "tegra20-common.h" -/* Enable fdt support for TEC. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra20-tec -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - /* High-level configuration options */ #define V_PROMPT "Tegra20 (TEC) # " #define CONFIG_TEGRA_BOARD_STRING "Avionic Design Tamonten Evaluation Carrier" diff --git a/include/configs/tegra-common-post.h b/include/configs/tegra-common-post.h index c337e30..23e3c8a 100644 --- a/include/configs/tegra-common-post.h +++ b/include/configs/tegra-common-post.h @@ -69,7 +69,6 @@ /* remove devicetree support */ #ifdef CONFIG_OF_CONTROL -#undef CONFIG_OF_CONTROL #endif /* remove I2C support */ diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index d27fceb..834b3d5 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -20,6 +20,10 @@ #define CONFIG_DM #define CONFIG_CMD_DM +#define CONFIG_DM_GPIO +#ifndef CONFIG_SPL_BUILD +#define CONFIG_DM_SERIAL +#endif #define CONFIG_SYS_TIMER_RATE 1000000 #define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE @@ -40,14 +44,19 @@ * Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */ +#define CONFIG_SYS_MALLOC_F_LEN (1 << 10) /* * NS16550 Configuration */ -#define CONFIG_SYS_NS16550 +#ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE (-4) #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK +#else +#define CONFIG_TEGRA_SERIAL +#endif +#define CONFIG_SYS_NS16550 /* * Common HW configuration. diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 8c7310c..b0f199e 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -101,10 +101,10 @@ "vram=${vram} " \ "root=${mmcroot} " \ "rootfstype=${mmcrootfstype}\0" \ - "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ + "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \ "source ${loadaddr}\0" \ - "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ + "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \ "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \ "env import -t ${loadaddr} ${filesize}\0" \ "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \ diff --git a/include/configs/trats.h b/include/configs/trats.h index 7db1db6..43751e7 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -16,8 +16,6 @@ #define CONFIG_TRATS -#undef CONFIG_DEFAULT_DEVICE_TREE -#define CONFIG_DEFAULT_DEVICE_TREE exynos4210-trats #define CONFIG_TIZEN /* TIZEN lib */ @@ -261,7 +259,4 @@ #define CONFIG_VIDEO_BMP_GZIP #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) -#define LCD_XRES 720 -#define LCD_YRES 1280 - #endif /* __CONFIG_H */ diff --git a/include/configs/trats2.h b/include/configs/trats2.h index f537e4f..e9a04f7 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -15,8 +15,6 @@ #define CONFIG_SYS_PROMPT "Trats2 # " /* Monitor Command Prompt */ -#undef CONFIG_DEFAULT_DEVICE_TREE -#define CONFIG_DEFAULT_DEVICE_TREE exynos4412-trats2 #define CONFIG_TIZEN /* TIZEN lib */ @@ -241,7 +239,4 @@ int get_soft_i2c_sda_pin(void); #define CONFIG_VIDEO_BMP_GZIP #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54) -#define LCD_XRES 720 -#define LCD_YRES 1280 - #endif /* __CONFIG_H */ diff --git a/include/configs/trimslice.h b/include/configs/trimslice.h index f81cfa2..7c00642 100644 --- a/include/configs/trimslice.h +++ b/include/configs/trimslice.h @@ -11,11 +11,6 @@ #include #include "tegra20-common.h" -/* Enable fdt support for TrimSlice. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra20-trimslice -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - /* High-level configuration options */ #define V_PROMPT "Tegra20 (TrimSlice) # " #define CONFIG_TEGRA_BOARD_STRING "Compulab Trimslice" diff --git a/include/configs/tseries.h b/include/configs/tseries.h index 1dd13fd..9a62070 100644 --- a/include/configs/tseries.h +++ b/include/configs/tseries.h @@ -222,8 +222,6 @@ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_LOAD -#define CONFIG_SPL_SPI_BUS 0 -#define CONFIG_SPL_SPI_CS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 #undef CONFIG_ENV_IS_NOWHERE #define CONFIG_ENV_IS_IN_SPI_FLASH diff --git a/include/configs/utc.h b/include/configs/utc.h new file mode 100644 index 0000000..5cc73cf --- /dev/null +++ b/include/configs/utc.h @@ -0,0 +1,317 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices UTC board. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3769 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG + +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#ifdef CONFIG_MX6Q +#define CONFIG_CMD_SATA +#endif + +/* + * SATA Configs + */ +#ifdef CONFIG_CMD_SATA +#define CONFIG_DWC_AHSATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_DWC_AHSATA_PORT_ID 0 +#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR +#define CONFIG_LBA48 +#define CONFIG_LIBATA +#endif + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 +#define CONFIG_PHY_ATHEROS +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_MXC_USB_PORT 1 +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + + #define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_SATA +#define CONFIG_DRIVE_SATA "sata " +#else +#define CONFIG_DRIVE_SATA +#endif + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_SATA CONFIG_DRIVE_MMC + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in " CONFIG_DRIVE_TYPES \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "usb start; " \ + "setenv stdin serial,usbkbd\0" \ + "loadsplash=if sf probe ; then sf read ${splashimage} c2000 ${splashsize} ; fi\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in " CONFIG_DRIVE_TYPES \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "for fs in fat ext2 ; do " \ + "${fs}load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done ; " \ + "done\0" \ + "initrd_high=0xffffffff\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#endif /* __CONFIG_H */ diff --git a/include/configs/vct.h b/include/configs/vct.h index 5ab4de3..217ba2f 100644 --- a/include/configs/vct.h +++ b/include/configs/vct.h @@ -296,7 +296,6 @@ int vct_gpio_get(int pin); #undef CONFIG_CMD_BEDBUG #undef CONFIG_CMD_CACHE #undef CONFIG_CMD_CONSOLE -#undef CONFIG_CMD_CRC32 #undef CONFIG_CMD_DHCP #undef CONFIG_CMD_EEPROM #undef CONFIG_CMD_EEPROM diff --git a/include/configs/venice2.h b/include/configs/venice2.h index 6d4e999..6897aa8 100644 --- a/include/configs/venice2.h +++ b/include/configs/venice2.h @@ -12,11 +12,6 @@ #include "tegra124-common.h" -/* Enable fdt support for Venice2. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra124-venice2 -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - /* High-level configuration options */ #define V_PROMPT "Tegra124 (Venice2) # " #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Venice2" diff --git a/include/configs/ventana.h b/include/configs/ventana.h index edf3720..f195f8a 100644 --- a/include/configs/ventana.h +++ b/include/configs/ventana.h @@ -11,11 +11,6 @@ #include #include "tegra20-common.h" -/* Enable fdt support for Ventana. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra20-ventana -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - /* High-level configuration options */ #define V_PROMPT "Tegra20 (Ventana) # " #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Ventana" diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 0897932..f3af971 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -51,7 +51,6 @@ /* Flat Device Tree Definitions */ #define CONFIG_OF_LIBFDT -#define CONFIG_DEFAULT_DEVICE_TREE vexpress64 /* SMP Spin Table Definitions */ #ifdef CONFIG_BASE_FVP diff --git a/include/configs/vision2.h b/include/configs/vision2.h index 6891bf8..3f35076 100644 --- a/include/configs/vision2.h +++ b/include/configs/vision2.h @@ -57,11 +57,11 @@ * Use gpio 4 pin 25 as chip select for SPI flash * This corresponds to gpio 121 */ -#define CONFIG_SF_DEFAULT_CS (1 | (121 << 8)) +#define CONFIG_SF_DEFAULT_CS 1 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 #define CONFIG_SF_DEFAULT_SPEED 25000000 -#define CONFIG_ENV_SPI_CS (1 | (121 << 8)) +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS #define CONFIG_ENV_SPI_BUS 0 #define CONFIG_ENV_SPI_MAX_HZ 25000000 #define CONFIG_ENV_SPI_MODE SPI_MODE_0 diff --git a/include/configs/vp.h b/include/configs/vp.h new file mode 100644 index 0000000..f2e483f --- /dev/null +++ b/include/configs/vp.h @@ -0,0 +1,348 @@ +/* + * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. + * + * Configuration settings for the Boundary Devices VP + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "mx6_common.h" +#define CONFIG_MX6 +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DISPLAY_BOARDINFO + +#define CONFIG_MACH_TYPE 3769 + +#include +#include + +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_INITRD_TAG +#define CONFIG_REVISION_TAG +#define CONFIG_SYS_GENERIC_BOARD + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (12 * 1024 * 1024) + +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_MISC_INIT_R +#define CONFIG_MXC_GPIO +#define CONFIG_CMD_GPIO +#define CONFIG_CI_UDC +#define CONFIG_USBD_HS +#define CONFIG_USB_GADGET_DUALSPEED +#define CONFIG_USB_ETHER +#define CONFIG_USB_ETH_CDC +#define CONFIG_NETCONSOLE + +#define CONFIG_CMD_FUSE +#ifdef CONFIG_CMD_FUSE +#define CONFIG_MXC_OCOTP +#endif + +#define CONFIG_MXC_UART +#define CONFIG_MXC_UART_BASE UART2_BASE + +#define CONFIG_CMD_SF +#ifdef CONFIG_CMD_SF +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST +#define CONFIG_MXC_SPI +#define CONFIG_SF_DEFAULT_BUS 0 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 25000000 +#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) +#endif + +/* I2C Configs */ +#define CONFIG_CMD_I2C +#define CONFIG_SYS_I2C +#define CONFIG_SYS_I2C_MXC +#define CONFIG_SYS_I2C_SPEED 100000 +#define CONFIG_I2C_EDID + +/* MMC Configs */ +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +#define CONFIG_MMC +#define CONFIG_CMD_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_EXT4 +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION + +#define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_MII +#define CONFIG_CMD_NET +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_XCV_TYPE RGMII +#define CONFIG_ETHPRIME "FEC" +#define CONFIG_FEC_MXC_PHYADDR 6 +#define CONFIG_PHYLIB +#define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 + +/* USB Configs */ +#define CONFIG_CMD_USB +#define CONFIG_CMD_FAT +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MX6 +#define CONFIG_USB_STORAGE +#define CONFIG_USB_HOST_ETHER +#define CONFIG_USB_ETHER_ASIX +#define CONFIG_USB_ETHER_MCS7830 +#define CONFIG_USB_ETHER_SMSC95XX +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_KEYBOARD +#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP + +/* Miscellaneous commands */ +#define CONFIG_CMD_BMODE +#define CONFIG_CMD_SETEXPR + +/* Framebuffer and LCD */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN + + #define CONFIG_VIDEO_BMP_GZIP +#ifdef CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (6 * 1024 * 1024) +#endif + +#define CONFIG_BMP_16BPP +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_CMD_HDMIDETECT +#define CONFIG_CONSOLE_MUX +#define CONFIG_IMX_HDMI +#define CONFIG_IMX_VIDEO_SKIP + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 + +/* Command definition */ +#include + +#undef CONFIG_CMD_IMLS + +#define CONFIG_BOOTDELAY 1 + +#define CONFIG_PREBOOT "" + +#define CONFIG_LOADADDR 0x12000000 +#define CONFIG_SYS_TEXT_BASE 0x17800000 + +#ifdef CONFIG_CMD_MMC +#define CONFIG_DRIVE_MMC "mmc " +#else +#define CONFIG_DRIVE_MMC +#endif + +#ifdef CONFIG_USB_STORAGE +#define CONFIG_DRIVE_USB "usb " +#else +#define CONFIG_DRIVE_USB +#endif + +#define CONFIG_DRIVE_TYPES CONFIG_DRIVE_MMC CONFIG_DRIVE_USB +#define CONFIG_UMSDEVS CONFIG_DRIVE_MMC + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootdevs=" CONFIG_DRIVE_TYPES "\0" \ + "umsdevs=" CONFIG_UMSDEVS "\0" \ + "console=ttymxc1\0" \ + "clearenv=if sf probe || sf probe || sf probe 1 ; then " \ + "sf erase 0xc0000 0x2000 && " \ + "echo restored environment to factory default ; fi\0" \ + "bootcmd=for dtype in ${bootdevs}" \ + "; do " \ + "if itest.s \"xusb\" == \"x${dtype}\" ; then " \ + "usb start ;" \ + "fi; " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load " \ + "${dtype} ${disk}:1 " \ + "10008000 " \ + "/6x_bootscript" \ + "&& source 10008000 ; " \ + "done ; " \ + "done; " \ + "setenv stdout serial,vga ; " \ + "echo ; echo 6x_bootscript not found ; " \ + "echo ; echo serial console at 115200, 8N1 ; echo ; " \ + "echo details at http://boundarydevices.com/6q_bootscript ; " \ + "setenv stdout serial;" \ + "setenv stdin serial,usbkbd;" \ + "for dtype in ${umsdevs} ; do " \ + "initcmd='mmc rescan' ;" \ + "for disk in 0 1 ; do " \ + "if $initcmd && $dtype dev $disk ; then " \ + "setenv stdout serial,vga; " \ + "echo expose ${dtype} drive ${disk} over USB; " \ + "ums 0 $dtype $disk ;" \ + "fi; " \ + " done; " \ + "done ;" \ + "setenv stdout serial,vga; " \ + "echo no block devices found;" \ + "\0" \ + "dfu_alt_info=u-boot raw 0x0 0xc0000\0" \ + "fdt_addr=0x11000000\0" \ + "fdt_high=0xffffffff\0" \ + "initrd_high=0xffffffff\0" \ + "loadsplash=if sf probe ; then sf read ${splashimage} c2000 ${splashsize} ; fi\0" \ + "rundfu=dfu 0 sf 0:0:25000000:0\0" \ + "uboot_defconfig=" CONFIG_DEFCONFIG "\0" \ + "upgradeu=for dtype in ${bootdevs}" \ + "; do " \ + "for disk in 0 1 ; do ${dtype} dev ${disk} ;" \ + "load ${dtype} ${disk}:1 10008000 " \ + "/6x_upgrade " \ + "&& source 10008000 ; " \ + "done ; " \ + "done\0" \ + "usbnet_devaddr=00:19:b8:00:00:02\0" \ + "usbnet_hostaddr=00:19:b8:00:00:01\0" \ + "usbrecover=setenv ethact usb_ether; " \ + "setenv ipaddr 10.0.0.2; " \ + "setenv netmask 255.255.255.0; " \ + "setenv serverip 10.0.0.1; " \ + "setenv bootargs console=ttymxc1,115200; " \ + "tftpboot 10800000 10.0.0.1:uImage-${board}-recovery" \ + "&& tftpboot 12800000 10.0.0.1:uramdisk-${board}-recovery.img " \ + "&& bootm 10800000 12800000\0" \ + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT "U-Boot > " +#define CONFIG_AUTO_COMPLETE +#define CONFIG_SYS_CBSIZE 1024 + +/* Print Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_MAXARGS 48 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE + +#define CONFIG_SYS_MEMTEST_START 0x10000000 +#define CONFIG_SYS_MEMTEST_END 0x10010000 +#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_CMDLINE_EDITING + +/* Physical Memory Map */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CONFIG_RESET_CAUSE_ADDR (PHYS_SDRAM + 0x80) + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* FLASH and environment organization */ +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ENV_SIZE (8 * 1024) + +#define CONFIG_ENV_IS_IN_SPI_FLASH + +#if defined(CONFIG_ENV_IS_IN_MMC) +#define CONFIG_ENV_OFFSET (6 * 64 * 1024) +#define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) +#define CONFIG_ENV_OFFSET (768 * 1024) +#define CONFIG_ENV_SECT_SIZE (8 * 1024) +#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS +#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#endif + +#define CONFIG_OF_LIBFDT +#define CONFIG_CMD_BOOTZ + +#ifndef CONFIG_SYS_DCACHE_OFF +#define CONFIG_CMD_CACHE +#endif + +#define CONFIG_CMD_BMP + +#define CONFIG_CMD_TIME +#define CONFIG_CMD_MEMTEST +#define CONFIG_SYS_ALT_MEMTEST + +#define CONFIG_CMD_BOOTZ +#define CONFIG_SUPPORT_RAW_INITRD +#define CONFIG_CMD_FS_GENERIC +#define CONFIG_BOARD_LATE_INIT + +/* + * PCI express + */ +#ifdef CONFIG_CMD_PCI +#define CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_PCI_SCAN_SHOW +#define CONFIG_PCIE_IMX +#endif + +#define CONFIG_CMD_ELF + +#define CONFIG_CMD_UNZIP + +#define CONFIG_USB_GADGET +#define CONFIG_CMD_USB_MASS_STORAGE +#define CONFIG_USB_GADGET_MASS_STORAGE +#define CONFIG_USBDOWNLOAD_GADGET +#define CONFIG_USB_GADGET_VBUS_DRAW 2 + +/* Netchip IDs */ +#define CONFIG_G_DNL_VENDOR_NUM 0x0525 +#define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 +#define CONFIG_G_DNL_MANUFACTURER "Boundary" + +#define CONFIG_CMD_FASTBOOT +#define CONFIG_ANDROID_BOOT_IMAGE +#define CONFIG_USB_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR +#define CONFIG_USB_FASTBOOT_BUF_SIZE 0x07000000 + +/* USB Device Firmware Update support */ +#define CONFIG_DFU_FUNCTION +#define CONFIG_DFU_SF +#define CONFIG_CMD_DFU +#define CONFIG_SYS_DFU_DATA_BUF_SIZE 0xc0000 +#define DFU_MANIFEST_POLL_TIMEOUT 25000 + +#endif /* __CONFIG_H */ diff --git a/include/configs/whistler.h b/include/configs/whistler.h index 9e09f03..10e70d2 100644 --- a/include/configs/whistler.h +++ b/include/configs/whistler.h @@ -11,11 +11,6 @@ #include #include "tegra20-common.h" -/* Enable fdt support for Whistler. Flash the image in u-boot-dtb.bin */ -#define CONFIG_DEFAULT_DEVICE_TREE tegra20-whistler -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE - /* High-level configuration options */ #define V_PROMPT "Tegra20 (Whistler) # " #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Whistler" diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 875cb43..0b4dd66 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -227,8 +227,6 @@ #define CONFIG_IMAGE_FORMAT_LEGACY /* enable also legacy image format */ /* FDT support */ -#define CONFIG_OF_CONTROL -#define CONFIG_OF_SEPARATE #define CONFIG_DISPLAY_BOARDINFO_LATE /* RSA support */ @@ -273,18 +271,13 @@ #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 #define CONFIG_SPL_LIBDISK_SUPPORT #define CONFIG_SPL_FAT_SUPPORT -#if defined(CONFIG_OF_CONTROL) && defined(CONFIG_OF_SEPARATE) -# define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot-dtb.img" -#else -# define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" -#endif +#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot-dtb.img" #endif /* Disable dcache for SPL just for sure */ #ifdef CONFIG_SPL_BUILD #define CONFIG_SYS_DCACHE_OFF #undef CONFIG_FPGA -#undef CONFIG_OF_CONTROL #endif /* Address in RAM where the parameters must be copied by SPL. */ @@ -303,9 +296,7 @@ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_LOAD #define CONFIG_SPL_SPI_FLASH_SUPPORT -#define CONFIG_SPL_SPI_BUS 0 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x100000 -#define CONFIG_SPL_SPI_CS 0 #endif /* for booting directly linux */ diff --git a/include/configs/zynq_microzed.h b/include/configs/zynq_microzed.h index b0328a2..549a664 100644 --- a/include/configs/zynq_microzed.h +++ b/include/configs/zynq_microzed.h @@ -19,7 +19,6 @@ #define CONFIG_SYS_NO_FLASH #define CONFIG_ZYNQ_SDHCI0 -#define CONFIG_DEFAULT_DEVICE_TREE zynq-microzed #include diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h index 291a5fe..b659054 100644 --- a/include/configs/zynq_zc70x.h +++ b/include/configs/zynq_zc70x.h @@ -23,7 +23,6 @@ #define CONFIG_ZYNQ_I2C0 #define CONFIG_ZYNQ_EEPROM #define CONFIG_ZYNQ_BOOT_FREEBSD -#define CONFIG_DEFAULT_DEVICE_TREE zynq-zc702 #include diff --git a/include/configs/zynq_zc770.h b/include/configs/zynq_zc770.h index 8aa96e7..16b9047 100644 --- a/include/configs/zynq_zc770.h +++ b/include/configs/zynq_zc770.h @@ -20,18 +20,15 @@ # define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 # define CONFIG_ZYNQ_SDHCI0 # define CONFIG_ZYNQ_SPI -# define CONFIG_DEFAULT_DEVICE_TREE zynq-zc770-xm010 #elif defined(CONFIG_ZC770_XM012) # define CONFIG_ZYNQ_SERIAL_UART1 # undef CONFIG_SYS_NO_FLASH -# define CONFIG_DEFAULT_DEVICE_TREE zynq-zc770-xm012 #elif defined(CONFIG_ZC770_XM013) # define CONFIG_ZYNQ_SERIAL_UART0 # define CONFIG_ZYNQ_GEM1 # define CONFIG_ZYNQ_GEM_PHY_ADDR1 7 -# define CONFIG_DEFAULT_DEVICE_TREE zynq-zc770-xm013 #else # define CONFIG_ZYNQ_SERIAL_UART0 diff --git a/include/configs/zynq_zed.h b/include/configs/zynq_zed.h index ce17d40..946de95 100644 --- a/include/configs/zynq_zed.h +++ b/include/configs/zynq_zed.h @@ -21,7 +21,6 @@ #define CONFIG_ZYNQ_USB #define CONFIG_ZYNQ_SDHCI0 #define CONFIG_ZYNQ_BOOT_FREEBSD -#define CONFIG_DEFAULT_DEVICE_TREE zynq-zed #include diff --git a/include/dm/lists.h b/include/dm/lists.h index 87a3af5..2356895 100644 --- a/include/dm/lists.h +++ b/include/dm/lists.h @@ -53,7 +53,11 @@ int lists_bind_drivers(struct udevice *parent, bool pre_reloc_only); * @parent: parent driver (root) * @blob: device tree blob * @offset: offset of this device tree node + * @devp: if non-NULL, returns a pointer to the bound device + * @return 0 if device was bound, -EINVAL if the device tree is invalid, + * other -ve value on error */ -int lists_bind_fdt(struct udevice *parent, const void *blob, int offset); +int lists_bind_fdt(struct udevice *parent, const void *blob, int offset, + struct udevice **devp); #endif diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index dd95fca..7f0e37b 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -21,6 +21,7 @@ enum uclass_id { /* U-Boot uclasses start here */ UCLASS_GPIO, /* Bank of general-purpose I/O pins */ + UCLASS_SERIAL, /* Serial UART */ UCLASS_COUNT, UCLASS_INVALID = -1, diff --git a/include/dt-bindings/clock/tegra114-car.h b/include/dt-bindings/clock/tegra114-car.h new file mode 100644 index 0000000..6d0d8d8 --- /dev/null +++ b/include/dt-bindings/clock/tegra114-car.h @@ -0,0 +1,342 @@ +/* + * This header provides constants for binding nvidia,tegra114-car. + * + * The first 160 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB + * registers. These IDs often match those in the CAR's RST_DEVICES registers, + * but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In + * this case, those clocks are assigned IDs above 160 in order to highlight + * this issue. Implementations that interpret these clock IDs as bit values + * within the CLK_OUT_ENB or RST_DEVICES registers should be careful to + * explicitly handle these special cases. + * + * The balance of the clocks controlled by the CAR are assigned IDs of 160 and + * above. + */ + +#ifndef _DT_BINDINGS_CLOCK_TEGRA114_CAR_H +#define _DT_BINDINGS_CLOCK_TEGRA114_CAR_H + +/* 0 */ +/* 1 */ +/* 2 */ +/* 3 */ +#define TEGRA114_CLK_RTC 4 +#define TEGRA114_CLK_TIMER 5 +#define TEGRA114_CLK_UARTA 6 +/* 7 (register bit affects uartb and vfir) */ +/* 8 */ +#define TEGRA114_CLK_SDMMC2 9 +/* 10 (register bit affects spdif_in and spdif_out) */ +#define TEGRA114_CLK_I2S1 11 +#define TEGRA114_CLK_I2C1 12 +#define TEGRA114_CLK_NDFLASH 13 +#define TEGRA114_CLK_SDMMC1 14 +#define TEGRA114_CLK_SDMMC4 15 +/* 16 */ +#define TEGRA114_CLK_PWM 17 +#define TEGRA114_CLK_I2S2 18 +#define TEGRA114_CLK_EPP 19 +/* 20 (register bit affects vi and vi_sensor) */ +#define TEGRA114_CLK_GR2D 21 +#define TEGRA114_CLK_USBD 22 +#define TEGRA114_CLK_ISP 23 +#define TEGRA114_CLK_GR3D 24 +/* 25 */ +#define TEGRA114_CLK_DISP2 26 +#define TEGRA114_CLK_DISP1 27 +#define TEGRA114_CLK_HOST1X 28 +#define TEGRA114_CLK_VCP 29 +#define TEGRA114_CLK_I2S0 30 +/* 31 */ + +/* 32 */ +/* 33 */ +#define TEGRA114_CLK_APBDMA 34 +/* 35 */ +#define TEGRA114_CLK_KBC 36 +/* 37 */ +/* 38 */ +/* 39 (register bit affects fuse and fuse_burn) */ +#define TEGRA114_CLK_KFUSE 40 +#define TEGRA114_CLK_SBC1 41 +#define TEGRA114_CLK_NOR 42 +/* 43 */ +#define TEGRA114_CLK_SBC2 44 +/* 45 */ +#define TEGRA114_CLK_SBC3 46 +#define TEGRA114_CLK_I2C5 47 +#define TEGRA114_CLK_DSIA 48 +/* 49 */ +#define TEGRA114_CLK_MIPI 50 +#define TEGRA114_CLK_HDMI 51 +#define TEGRA114_CLK_CSI 52 +/* 53 */ +#define TEGRA114_CLK_I2C2 54 +#define TEGRA114_CLK_UARTC 55 +#define TEGRA114_CLK_MIPI_CAL 56 +#define TEGRA114_CLK_EMC 57 +#define TEGRA114_CLK_USB2 58 +#define TEGRA114_CLK_USB3 59 +/* 60 */ +#define TEGRA114_CLK_VDE 61 +#define TEGRA114_CLK_BSEA 62 +#define TEGRA114_CLK_BSEV 63 + +/* 64 */ +#define TEGRA114_CLK_UARTD 65 +/* 66 */ +#define TEGRA114_CLK_I2C3 67 +#define TEGRA114_CLK_SBC4 68 +#define TEGRA114_CLK_SDMMC3 69 +/* 70 */ +#define TEGRA114_CLK_OWR 71 +/* 72 */ +#define TEGRA114_CLK_CSITE 73 +/* 74 */ +/* 75 */ +#define TEGRA114_CLK_LA 76 +#define TEGRA114_CLK_TRACE 77 +#define TEGRA114_CLK_SOC_THERM 78 +#define TEGRA114_CLK_DTV 79 +#define TEGRA114_CLK_NDSPEED 80 +#define TEGRA114_CLK_I2CSLOW 81 +#define TEGRA114_CLK_DSIB 82 +#define TEGRA114_CLK_TSEC 83 +/* 84 */ +/* 85 */ +/* 86 */ +/* 87 */ +/* 88 */ +#define TEGRA114_CLK_XUSB_HOST 89 +/* 90 */ +#define TEGRA114_CLK_MSENC 91 +#define TEGRA114_CLK_CSUS 92 +/* 93 */ +/* 94 */ +/* 95 (bit affects xusb_dev and xusb_dev_src) */ + +/* 96 */ +/* 97 */ +/* 98 */ +#define TEGRA114_CLK_MSELECT 99 +#define TEGRA114_CLK_TSENSOR 100 +#define TEGRA114_CLK_I2S3 101 +#define TEGRA114_CLK_I2S4 102 +#define TEGRA114_CLK_I2C4 103 +#define TEGRA114_CLK_SBC5 104 +#define TEGRA114_CLK_SBC6 105 +#define TEGRA114_CLK_D_AUDIO 106 +#define TEGRA114_CLK_APBIF 107 +#define TEGRA114_CLK_DAM0 108 +#define TEGRA114_CLK_DAM1 109 +#define TEGRA114_CLK_DAM2 110 +#define TEGRA114_CLK_HDA2CODEC_2X 111 +/* 112 */ +#define TEGRA114_CLK_AUDIO0_2X 113 +#define TEGRA114_CLK_AUDIO1_2X 114 +#define TEGRA114_CLK_AUDIO2_2X 115 +#define TEGRA114_CLK_AUDIO3_2X 116 +#define TEGRA114_CLK_AUDIO4_2X 117 +#define TEGRA114_CLK_SPDIF_2X 118 +#define TEGRA114_CLK_ACTMON 119 +#define TEGRA114_CLK_EXTERN1 120 +#define TEGRA114_CLK_EXTERN2 121 +#define TEGRA114_CLK_EXTERN3 122 +/* 123 */ +/* 124 */ +#define TEGRA114_CLK_HDA 125 +/* 126 */ +#define TEGRA114_CLK_SE 127 + +#define TEGRA114_CLK_HDA2HDMI 128 +/* 129 */ +/* 130 */ +/* 131 */ +/* 132 */ +/* 133 */ +/* 134 */ +/* 135 */ +/* 136 */ +/* 137 */ +/* 138 */ +/* 139 */ +/* 140 */ +/* 141 */ +/* 142 */ +/* 143 (bit affects xusb_falcon_src, xusb_fs_src, */ +/* xusb_host_src and xusb_ss_src) */ +#define TEGRA114_CLK_CILAB 144 +#define TEGRA114_CLK_CILCD 145 +#define TEGRA114_CLK_CILE 146 +#define TEGRA114_CLK_DSIALP 147 +#define TEGRA114_CLK_DSIBLP 148 +/* 149 */ +#define TEGRA114_CLK_DDS 150 +/* 151 */ +#define TEGRA114_CLK_DP2 152 +#define TEGRA114_CLK_AMX 153 +#define TEGRA114_CLK_ADX 154 +/* 155 (bit affects dfll_ref and dfll_soc) */ +#define TEGRA114_CLK_XUSB_SS 156 +/* 157 */ +/* 158 */ +/* 159 */ + +/* 160 */ +/* 161 */ +/* 162 */ +/* 163 */ +/* 164 */ +/* 165 */ +/* 166 */ +/* 167 */ +/* 168 */ +/* 169 */ +/* 170 */ +/* 171 */ +/* 172 */ +/* 173 */ +/* 174 */ +/* 175 */ +/* 176 */ +/* 177 */ +/* 178 */ +/* 179 */ +/* 180 */ +/* 181 */ +/* 182 */ +/* 183 */ +/* 184 */ +/* 185 */ +/* 186 */ +/* 187 */ +/* 188 */ +/* 189 */ +/* 190 */ +/* 191 */ + +#define TEGRA114_CLK_UARTB 192 +#define TEGRA114_CLK_VFIR 193 +#define TEGRA114_CLK_SPDIF_IN 194 +#define TEGRA114_CLK_SPDIF_OUT 195 +#define TEGRA114_CLK_VI 196 +#define TEGRA114_CLK_VI_SENSOR 197 +#define TEGRA114_CLK_FUSE 198 +#define TEGRA114_CLK_FUSE_BURN 199 +#define TEGRA114_CLK_CLK_32K 200 +#define TEGRA114_CLK_CLK_M 201 +#define TEGRA114_CLK_CLK_M_DIV2 202 +#define TEGRA114_CLK_CLK_M_DIV4 203 +#define TEGRA114_CLK_PLL_REF 204 +#define TEGRA114_CLK_PLL_C 205 +#define TEGRA114_CLK_PLL_C_OUT1 206 +#define TEGRA114_CLK_PLL_C2 207 +#define TEGRA114_CLK_PLL_C3 208 +#define TEGRA114_CLK_PLL_M 209 +#define TEGRA114_CLK_PLL_M_OUT1 210 +#define TEGRA114_CLK_PLL_P 211 +#define TEGRA114_CLK_PLL_P_OUT1 212 +#define TEGRA114_CLK_PLL_P_OUT2 213 +#define TEGRA114_CLK_PLL_P_OUT3 214 +#define TEGRA114_CLK_PLL_P_OUT4 215 +#define TEGRA114_CLK_PLL_A 216 +#define TEGRA114_CLK_PLL_A_OUT0 217 +#define TEGRA114_CLK_PLL_D 218 +#define TEGRA114_CLK_PLL_D_OUT0 219 +#define TEGRA114_CLK_PLL_D2 220 +#define TEGRA114_CLK_PLL_D2_OUT0 221 +#define TEGRA114_CLK_PLL_U 222 +#define TEGRA114_CLK_PLL_U_480M 223 + +#define TEGRA114_CLK_PLL_U_60M 224 +#define TEGRA114_CLK_PLL_U_48M 225 +#define TEGRA114_CLK_PLL_U_12M 226 +#define TEGRA114_CLK_PLL_X 227 +#define TEGRA114_CLK_PLL_X_OUT0 228 +#define TEGRA114_CLK_PLL_RE_VCO 229 +#define TEGRA114_CLK_PLL_RE_OUT 230 +#define TEGRA114_CLK_PLL_E_OUT0 231 +#define TEGRA114_CLK_SPDIF_IN_SYNC 232 +#define TEGRA114_CLK_I2S0_SYNC 233 +#define TEGRA114_CLK_I2S1_SYNC 234 +#define TEGRA114_CLK_I2S2_SYNC 235 +#define TEGRA114_CLK_I2S3_SYNC 236 +#define TEGRA114_CLK_I2S4_SYNC 237 +#define TEGRA114_CLK_VIMCLK_SYNC 238 +#define TEGRA114_CLK_AUDIO0 239 +#define TEGRA114_CLK_AUDIO1 240 +#define TEGRA114_CLK_AUDIO2 241 +#define TEGRA114_CLK_AUDIO3 242 +#define TEGRA114_CLK_AUDIO4 243 +#define TEGRA114_CLK_SPDIF 244 +#define TEGRA114_CLK_CLK_OUT_1 245 +#define TEGRA114_CLK_CLK_OUT_2 246 +#define TEGRA114_CLK_CLK_OUT_3 247 +#define TEGRA114_CLK_BLINK 248 +/* 249 */ +/* 250 */ +/* 251 */ +#define TEGRA114_CLK_XUSB_HOST_SRC 252 +#define TEGRA114_CLK_XUSB_FALCON_SRC 253 +#define TEGRA114_CLK_XUSB_FS_SRC 254 +#define TEGRA114_CLK_XUSB_SS_SRC 255 + +#define TEGRA114_CLK_XUSB_DEV_SRC 256 +#define TEGRA114_CLK_XUSB_DEV 257 +#define TEGRA114_CLK_XUSB_HS_SRC 258 +#define TEGRA114_CLK_SCLK 259 +#define TEGRA114_CLK_HCLK 260 +#define TEGRA114_CLK_PCLK 261 +#define TEGRA114_CLK_CCLK_G 262 +#define TEGRA114_CLK_CCLK_LP 263 +#define TEGRA114_CLK_DFLL_REF 264 +#define TEGRA114_CLK_DFLL_SOC 265 +/* 266 */ +/* 267 */ +/* 268 */ +/* 269 */ +/* 270 */ +/* 271 */ +/* 272 */ +/* 273 */ +/* 274 */ +/* 275 */ +/* 276 */ +/* 277 */ +/* 278 */ +/* 279 */ +/* 280 */ +/* 281 */ +/* 282 */ +/* 283 */ +/* 284 */ +/* 285 */ +/* 286 */ +/* 287 */ + +/* 288 */ +/* 289 */ +/* 290 */ +/* 291 */ +/* 292 */ +/* 293 */ +/* 294 */ +/* 295 */ +/* 296 */ +/* 297 */ +/* 298 */ +/* 299 */ +#define TEGRA114_CLK_AUDIO0_MUX 300 +#define TEGRA114_CLK_AUDIO1_MUX 301 +#define TEGRA114_CLK_AUDIO2_MUX 302 +#define TEGRA114_CLK_AUDIO3_MUX 303 +#define TEGRA114_CLK_AUDIO4_MUX 304 +#define TEGRA114_CLK_SPDIF_MUX 305 +#define TEGRA114_CLK_CLK_OUT_1_MUX 306 +#define TEGRA114_CLK_CLK_OUT_2_MUX 307 +#define TEGRA114_CLK_CLK_OUT_3_MUX 308 +#define TEGRA114_CLK_DSIA_MUX 309 +#define TEGRA114_CLK_DSIB_MUX 310 +#define TEGRA114_CLK_CLK_MAX 311 + +#endif /* _DT_BINDINGS_CLOCK_TEGRA114_CAR_H */ diff --git a/include/dt-bindings/clock/tegra124-car.h b/include/dt-bindings/clock/tegra124-car.h new file mode 100644 index 0000000..fd8d62a --- /dev/null +++ b/include/dt-bindings/clock/tegra124-car.h @@ -0,0 +1,342 @@ +/* + * This header provides constants for binding nvidia,tegra124-car. + * + * The first 192 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB + * registers. These IDs often match those in the CAR's RST_DEVICES registers, + * but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In + * this case, those clocks are assigned IDs above 185 in order to highlight + * this issue. Implementations that interpret these clock IDs as bit values + * within the CLK_OUT_ENB or RST_DEVICES registers should be careful to + * explicitly handle these special cases. + * + * The balance of the clocks controlled by the CAR are assigned IDs of 185 and + * above. + */ + +#ifndef _DT_BINDINGS_CLOCK_TEGRA124_CAR_H +#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_H + +/* 0 */ +/* 1 */ +/* 2 */ +#define TEGRA124_CLK_ISPB 3 +#define TEGRA124_CLK_RTC 4 +#define TEGRA124_CLK_TIMER 5 +#define TEGRA124_CLK_UARTA 6 +/* 7 (register bit affects uartb and vfir) */ +/* 8 */ +#define TEGRA124_CLK_SDMMC2 9 +/* 10 (register bit affects spdif_in and spdif_out) */ +#define TEGRA124_CLK_I2S1 11 +#define TEGRA124_CLK_I2C1 12 +#define TEGRA124_CLK_NDFLASH 13 +#define TEGRA124_CLK_SDMMC1 14 +#define TEGRA124_CLK_SDMMC4 15 +/* 16 */ +#define TEGRA124_CLK_PWM 17 +#define TEGRA124_CLK_I2S2 18 +/* 20 (register bit affects vi and vi_sensor) */ +/* 21 */ +#define TEGRA124_CLK_USBD 22 +#define TEGRA124_CLK_ISP 23 +/* 26 */ +/* 25 */ +#define TEGRA124_CLK_DISP2 26 +#define TEGRA124_CLK_DISP1 27 +#define TEGRA124_CLK_HOST1X 28 +#define TEGRA124_CLK_VCP 29 +#define TEGRA124_CLK_I2S0 30 +/* 31 */ + +/* 32 */ +/* 33 */ +#define TEGRA124_CLK_APBDMA 34 +/* 35 */ +#define TEGRA124_CLK_KBC 36 +/* 37 */ +/* 38 */ +/* 39 (register bit affects fuse and fuse_burn) */ +#define TEGRA124_CLK_KFUSE 40 +#define TEGRA124_CLK_SBC1 41 +#define TEGRA124_CLK_NOR 42 +/* 43 */ +#define TEGRA124_CLK_SBC2 44 +/* 45 */ +#define TEGRA124_CLK_SBC3 46 +#define TEGRA124_CLK_I2C5 47 +#define TEGRA124_CLK_DSIA 48 +/* 49 */ +#define TEGRA124_CLK_MIPI 50 +#define TEGRA124_CLK_HDMI 51 +#define TEGRA124_CLK_CSI 52 +/* 53 */ +#define TEGRA124_CLK_I2C2 54 +#define TEGRA124_CLK_UARTC 55 +#define TEGRA124_CLK_MIPI_CAL 56 +#define TEGRA124_CLK_EMC 57 +#define TEGRA124_CLK_USB2 58 +#define TEGRA124_CLK_USB3 59 +/* 60 */ +#define TEGRA124_CLK_VDE 61 +#define TEGRA124_CLK_BSEA 62 +#define TEGRA124_CLK_BSEV 63 + +/* 64 */ +#define TEGRA124_CLK_UARTD 65 +#define TEGRA124_CLK_UARTE 66 +#define TEGRA124_CLK_I2C3 67 +#define TEGRA124_CLK_SBC4 68 +#define TEGRA124_CLK_SDMMC3 69 +#define TEGRA124_CLK_PCIE 70 +#define TEGRA124_CLK_OWR 71 +#define TEGRA124_CLK_AFI 72 +#define TEGRA124_CLK_CSITE 73 +/* 74 */ +/* 75 */ +#define TEGRA124_CLK_LA 76 +#define TEGRA124_CLK_TRACE 77 +#define TEGRA124_CLK_SOC_THERM 78 +#define TEGRA124_CLK_DTV 79 +#define TEGRA124_CLK_NDSPEED 80 +#define TEGRA124_CLK_I2CSLOW 81 +#define TEGRA124_CLK_DSIB 82 +#define TEGRA124_CLK_TSEC 83 +/* 84 */ +/* 85 */ +/* 86 */ +/* 87 */ +/* 88 */ +#define TEGRA124_CLK_XUSB_HOST 89 +/* 90 */ +#define TEGRA124_CLK_MSENC 91 +#define TEGRA124_CLK_CSUS 92 +/* 93 */ +/* 94 */ +/* 95 (bit affects xusb_dev and xusb_dev_src) */ + +/* 96 */ +/* 97 */ +/* 98 */ +#define TEGRA124_CLK_MSELECT 99 +#define TEGRA124_CLK_TSENSOR 100 +#define TEGRA124_CLK_I2S3 101 +#define TEGRA124_CLK_I2S4 102 +#define TEGRA124_CLK_I2C4 103 +#define TEGRA124_CLK_SBC5 104 +#define TEGRA124_CLK_SBC6 105 +#define TEGRA124_CLK_D_AUDIO 106 +#define TEGRA124_CLK_APBIF 107 +#define TEGRA124_CLK_DAM0 108 +#define TEGRA124_CLK_DAM1 109 +#define TEGRA124_CLK_DAM2 110 +#define TEGRA124_CLK_HDA2CODEC_2X 111 +/* 112 */ +#define TEGRA124_CLK_AUDIO0_2X 113 +#define TEGRA124_CLK_AUDIO1_2X 114 +#define TEGRA124_CLK_AUDIO2_2X 115 +#define TEGRA124_CLK_AUDIO3_2X 116 +#define TEGRA124_CLK_AUDIO4_2X 117 +#define TEGRA124_CLK_SPDIF_2X 118 +#define TEGRA124_CLK_ACTMON 119 +#define TEGRA124_CLK_EXTERN1 120 +#define TEGRA124_CLK_EXTERN2 121 +#define TEGRA124_CLK_EXTERN3 122 +#define TEGRA124_CLK_SATA_OOB 123 +#define TEGRA124_CLK_SATA 124 +#define TEGRA124_CLK_HDA 125 +/* 126 */ +#define TEGRA124_CLK_SE 127 + +#define TEGRA124_CLK_HDA2HDMI 128 +#define TEGRA124_CLK_SATA_COLD 129 +/* 130 */ +/* 131 */ +/* 132 */ +/* 133 */ +/* 134 */ +/* 135 */ +/* 136 */ +/* 137 */ +/* 138 */ +/* 139 */ +/* 140 */ +/* 141 */ +/* 142 */ +/* 143 (bit affects xusb_falcon_src, xusb_fs_src, */ +/* xusb_host_src and xusb_ss_src) */ +#define TEGRA124_CLK_CILAB 144 +#define TEGRA124_CLK_CILCD 145 +#define TEGRA124_CLK_CILE 146 +#define TEGRA124_CLK_DSIALP 147 +#define TEGRA124_CLK_DSIBLP 148 +#define TEGRA124_CLK_ENTROPY 149 +#define TEGRA124_CLK_DDS 150 +/* 151 */ +#define TEGRA124_CLK_DP2 152 +#define TEGRA124_CLK_AMX 153 +#define TEGRA124_CLK_ADX 154 +/* 155 (bit affects dfll_ref and dfll_soc) */ +#define TEGRA124_CLK_XUSB_SS 156 +/* 157 */ +/* 158 */ +/* 159 */ + +/* 160 */ +/* 161 */ +/* 162 */ +/* 163 */ +/* 164 */ +/* 165 */ +#define TEGRA124_CLK_I2C6 166 +/* 167 */ +/* 168 */ +/* 169 */ +/* 170 */ +#define TEGRA124_CLK_VIM2_CLK 171 +/* 172 */ +/* 173 */ +/* 174 */ +/* 175 */ +#define TEGRA124_CLK_HDMI_AUDIO 176 +#define TEGRA124_CLK_CLK72MHZ 177 +#define TEGRA124_CLK_VIC03 178 +/* 179 */ +#define TEGRA124_CLK_ADX1 180 +#define TEGRA124_CLK_DPAUX 181 +#define TEGRA124_CLK_SOR0 182 +/* 183 */ +#define TEGRA124_CLK_GPU 184 +#define TEGRA124_CLK_AMX1 185 +#define TEGRA124_CLK_AFC0 186 +#define TEGRA124_CLK_AFC1 187 +#define TEGRA124_CLK_AFC2 188 +#define TEGRA124_CLK_AFC3 189 +#define TEGRA124_CLK_AFC4 190 +#define TEGRA124_CLK_AFC5 191 +#define TEGRA124_CLK_UARTB 192 +#define TEGRA124_CLK_VFIR 193 +#define TEGRA124_CLK_SPDIF_IN 194 +#define TEGRA124_CLK_SPDIF_OUT 195 +#define TEGRA124_CLK_VI 196 +#define TEGRA124_CLK_VI_SENSOR 197 +#define TEGRA124_CLK_FUSE 198 +#define TEGRA124_CLK_FUSE_BURN 199 +#define TEGRA124_CLK_CLK_32K 200 +#define TEGRA124_CLK_CLK_M 201 +#define TEGRA124_CLK_CLK_M_DIV2 202 +#define TEGRA124_CLK_CLK_M_DIV4 203 +#define TEGRA124_CLK_PLL_REF 204 +#define TEGRA124_CLK_PLL_C 205 +#define TEGRA124_CLK_PLL_C_OUT1 206 +#define TEGRA124_CLK_PLL_C2 207 +#define TEGRA124_CLK_PLL_C3 208 +#define TEGRA124_CLK_PLL_M 209 +#define TEGRA124_CLK_PLL_M_OUT1 210 +#define TEGRA124_CLK_PLL_P 211 +#define TEGRA124_CLK_PLL_P_OUT1 212 +#define TEGRA124_CLK_PLL_P_OUT2 213 +#define TEGRA124_CLK_PLL_P_OUT3 214 +#define TEGRA124_CLK_PLL_P_OUT4 215 +#define TEGRA124_CLK_PLL_A 216 +#define TEGRA124_CLK_PLL_A_OUT0 217 +#define TEGRA124_CLK_PLL_D 218 +#define TEGRA124_CLK_PLL_D_OUT0 219 +#define TEGRA124_CLK_PLL_D2 220 +#define TEGRA124_CLK_PLL_D2_OUT0 221 +#define TEGRA124_CLK_PLL_U 222 +#define TEGRA124_CLK_PLL_U_480M 223 + +#define TEGRA124_CLK_PLL_U_60M 224 +#define TEGRA124_CLK_PLL_U_48M 225 +#define TEGRA124_CLK_PLL_U_12M 226 +#define TEGRA124_CLK_PLL_X 227 +#define TEGRA124_CLK_PLL_X_OUT0 228 +#define TEGRA124_CLK_PLL_RE_VCO 229 +#define TEGRA124_CLK_PLL_RE_OUT 230 +#define TEGRA124_CLK_PLL_E 231 +#define TEGRA124_CLK_SPDIF_IN_SYNC 232 +#define TEGRA124_CLK_I2S0_SYNC 233 +#define TEGRA124_CLK_I2S1_SYNC 234 +#define TEGRA124_CLK_I2S2_SYNC 235 +#define TEGRA124_CLK_I2S3_SYNC 236 +#define TEGRA124_CLK_I2S4_SYNC 237 +#define TEGRA124_CLK_VIMCLK_SYNC 238 +#define TEGRA124_CLK_AUDIO0 239 +#define TEGRA124_CLK_AUDIO1 240 +#define TEGRA124_CLK_AUDIO2 241 +#define TEGRA124_CLK_AUDIO3 242 +#define TEGRA124_CLK_AUDIO4 243 +#define TEGRA124_CLK_SPDIF 244 +#define TEGRA124_CLK_CLK_OUT_1 245 +#define TEGRA124_CLK_CLK_OUT_2 246 +#define TEGRA124_CLK_CLK_OUT_3 247 +#define TEGRA124_CLK_BLINK 248 +/* 249 */ +/* 250 */ +/* 251 */ +#define TEGRA124_CLK_XUSB_HOST_SRC 252 +#define TEGRA124_CLK_XUSB_FALCON_SRC 253 +#define TEGRA124_CLK_XUSB_FS_SRC 254 +#define TEGRA124_CLK_XUSB_SS_SRC 255 + +#define TEGRA124_CLK_XUSB_DEV_SRC 256 +#define TEGRA124_CLK_XUSB_DEV 257 +#define TEGRA124_CLK_XUSB_HS_SRC 258 +#define TEGRA124_CLK_SCLK 259 +#define TEGRA124_CLK_HCLK 260 +#define TEGRA124_CLK_PCLK 261 +#define TEGRA124_CLK_CCLK_G 262 +#define TEGRA124_CLK_CCLK_LP 263 +#define TEGRA124_CLK_DFLL_REF 264 +#define TEGRA124_CLK_DFLL_SOC 265 +#define TEGRA124_CLK_VI_SENSOR2 266 +#define TEGRA124_CLK_PLL_P_OUT5 267 +#define TEGRA124_CLK_CML0 268 +#define TEGRA124_CLK_CML1 269 +#define TEGRA124_CLK_PLL_C4 270 +#define TEGRA124_CLK_PLL_DP 271 +#define TEGRA124_CLK_PLL_E_MUX 272 +/* 273 */ +/* 274 */ +/* 275 */ +/* 276 */ +/* 277 */ +/* 278 */ +/* 279 */ +/* 280 */ +/* 281 */ +/* 282 */ +/* 283 */ +/* 284 */ +/* 285 */ +/* 286 */ +/* 287 */ + +/* 288 */ +/* 289 */ +/* 290 */ +/* 291 */ +/* 292 */ +/* 293 */ +/* 294 */ +/* 295 */ +/* 296 */ +/* 297 */ +/* 298 */ +/* 299 */ +#define TEGRA124_CLK_AUDIO0_MUX 300 +#define TEGRA124_CLK_AUDIO1_MUX 301 +#define TEGRA124_CLK_AUDIO2_MUX 302 +#define TEGRA124_CLK_AUDIO3_MUX 303 +#define TEGRA124_CLK_AUDIO4_MUX 304 +#define TEGRA124_CLK_SPDIF_MUX 305 +#define TEGRA124_CLK_CLK_OUT_1_MUX 306 +#define TEGRA124_CLK_CLK_OUT_2_MUX 307 +#define TEGRA124_CLK_CLK_OUT_3_MUX 308 +#define TEGRA124_CLK_DSIA_MUX 309 +#define TEGRA124_CLK_DSIB_MUX 310 +#define TEGRA124_CLK_SOR0_LVDS 311 +#define TEGRA124_CLK_PLL_M_UD 311 +#define TEGRA124_CLK_CLK_MAX 312 + +#endif /* _DT_BINDINGS_CLOCK_TEGRA124_CAR_H */ diff --git a/include/dt-bindings/clock/tegra20-car.h b/include/dt-bindings/clock/tegra20-car.h new file mode 100644 index 0000000..9406207 --- /dev/null +++ b/include/dt-bindings/clock/tegra20-car.h @@ -0,0 +1,158 @@ +/* + * This header provides constants for binding nvidia,tegra20-car. + * + * The first 96 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB + * registers. These IDs often match those in the CAR's RST_DEVICES registers, + * but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In + * this case, those clocks are assigned IDs above 95 in order to highlight + * this issue. Implementations that interpret these clock IDs as bit values + * within the CLK_OUT_ENB or RST_DEVICES registers should be careful to + * explicitly handle these special cases. + * + * The balance of the clocks controlled by the CAR are assigned IDs of 96 and + * above. + */ + +#ifndef _DT_BINDINGS_CLOCK_TEGRA20_CAR_H +#define _DT_BINDINGS_CLOCK_TEGRA20_CAR_H + +#define TEGRA20_CLK_CPU 0 +/* 1 */ +/* 2 */ +#define TEGRA20_CLK_AC97 3 +#define TEGRA20_CLK_RTC 4 +#define TEGRA20_CLK_TIMER 5 +#define TEGRA20_CLK_UARTA 6 +/* 7 (register bit affects uart2 and vfir) */ +#define TEGRA20_CLK_GPIO 8 +#define TEGRA20_CLK_SDMMC2 9 +/* 10 (register bit affects spdif_in and spdif_out) */ +#define TEGRA20_CLK_I2S1 11 +#define TEGRA20_CLK_I2C1 12 +#define TEGRA20_CLK_NDFLASH 13 +#define TEGRA20_CLK_SDMMC1 14 +#define TEGRA20_CLK_SDMMC4 15 +#define TEGRA20_CLK_TWC 16 +#define TEGRA20_CLK_PWM 17 +#define TEGRA20_CLK_I2S2 18 +#define TEGRA20_CLK_EPP 19 +/* 20 (register bit affects vi and vi_sensor) */ +#define TEGRA20_CLK_GR2D 21 +#define TEGRA20_CLK_USBD 22 +#define TEGRA20_CLK_ISP 23 +#define TEGRA20_CLK_GR3D 24 +#define TEGRA20_CLK_IDE 25 +#define TEGRA20_CLK_DISP2 26 +#define TEGRA20_CLK_DISP1 27 +#define TEGRA20_CLK_HOST1X 28 +#define TEGRA20_CLK_VCP 29 +/* 30 */ +#define TEGRA20_CLK_CACHE2 31 + +#define TEGRA20_CLK_MEM 32 +#define TEGRA20_CLK_AHBDMA 33 +#define TEGRA20_CLK_APBDMA 34 +/* 35 */ +#define TEGRA20_CLK_KBC 36 +#define TEGRA20_CLK_STAT_MON 37 +#define TEGRA20_CLK_PMC 38 +#define TEGRA20_CLK_FUSE 39 +#define TEGRA20_CLK_KFUSE 40 +#define TEGRA20_CLK_SBC1 41 +#define TEGRA20_CLK_NOR 42 +#define TEGRA20_CLK_SPI 43 +#define TEGRA20_CLK_SBC2 44 +#define TEGRA20_CLK_XIO 45 +#define TEGRA20_CLK_SBC3 46 +#define TEGRA20_CLK_DVC 47 +#define TEGRA20_CLK_DSI 48 +/* 49 (register bit affects tvo and cve) */ +#define TEGRA20_CLK_MIPI 50 +#define TEGRA20_CLK_HDMI 51 +#define TEGRA20_CLK_CSI 52 +#define TEGRA20_CLK_TVDAC 53 +#define TEGRA20_CLK_I2C2 54 +#define TEGRA20_CLK_UARTC 55 +/* 56 */ +#define TEGRA20_CLK_EMC 57 +#define TEGRA20_CLK_USB2 58 +#define TEGRA20_CLK_USB3 59 +#define TEGRA20_CLK_MPE 60 +#define TEGRA20_CLK_VDE 61 +#define TEGRA20_CLK_BSEA 62 +#define TEGRA20_CLK_BSEV 63 + +#define TEGRA20_CLK_SPEEDO 64 +#define TEGRA20_CLK_UARTD 65 +#define TEGRA20_CLK_UARTE 66 +#define TEGRA20_CLK_I2C3 67 +#define TEGRA20_CLK_SBC4 68 +#define TEGRA20_CLK_SDMMC3 69 +#define TEGRA20_CLK_PEX 70 +#define TEGRA20_CLK_OWR 71 +#define TEGRA20_CLK_AFI 72 +#define TEGRA20_CLK_CSITE 73 +/* 74 */ +#define TEGRA20_CLK_AVPUCQ 75 +#define TEGRA20_CLK_LA 76 +/* 77 */ +/* 78 */ +/* 79 */ +/* 80 */ +/* 81 */ +/* 82 */ +/* 83 */ +#define TEGRA20_CLK_IRAMA 84 +#define TEGRA20_CLK_IRAMB 85 +#define TEGRA20_CLK_IRAMC 86 +#define TEGRA20_CLK_IRAMD 87 +#define TEGRA20_CLK_CRAM2 88 +#define TEGRA20_CLK_AUDIO_2X 89 /* a/k/a audio_2x_sync_clk */ +#define TEGRA20_CLK_CLK_D 90 +/* 91 */ +#define TEGRA20_CLK_CSUS 92 +#define TEGRA20_CLK_CDEV2 93 +#define TEGRA20_CLK_CDEV1 94 +/* 95 */ + +#define TEGRA20_CLK_UARTB 96 +#define TEGRA20_CLK_VFIR 97 +#define TEGRA20_CLK_SPDIF_IN 98 +#define TEGRA20_CLK_SPDIF_OUT 99 +#define TEGRA20_CLK_VI 100 +#define TEGRA20_CLK_VI_SENSOR 101 +#define TEGRA20_CLK_TVO 102 +#define TEGRA20_CLK_CVE 103 +#define TEGRA20_CLK_OSC 104 +#define TEGRA20_CLK_CLK_32K 105 /* a/k/a clk_s */ +#define TEGRA20_CLK_CLK_M 106 +#define TEGRA20_CLK_SCLK 107 +#define TEGRA20_CLK_CCLK 108 +#define TEGRA20_CLK_HCLK 109 +#define TEGRA20_CLK_PCLK 110 +#define TEGRA20_CLK_BLINK 111 +#define TEGRA20_CLK_PLL_A 112 +#define TEGRA20_CLK_PLL_A_OUT0 113 +#define TEGRA20_CLK_PLL_C 114 +#define TEGRA20_CLK_PLL_C_OUT1 115 +#define TEGRA20_CLK_PLL_D 116 +#define TEGRA20_CLK_PLL_D_OUT0 117 +#define TEGRA20_CLK_PLL_E 118 +#define TEGRA20_CLK_PLL_M 119 +#define TEGRA20_CLK_PLL_M_OUT1 120 +#define TEGRA20_CLK_PLL_P 121 +#define TEGRA20_CLK_PLL_P_OUT1 122 +#define TEGRA20_CLK_PLL_P_OUT2 123 +#define TEGRA20_CLK_PLL_P_OUT3 124 +#define TEGRA20_CLK_PLL_P_OUT4 125 +#define TEGRA20_CLK_PLL_S 126 +#define TEGRA20_CLK_PLL_U 127 + +#define TEGRA20_CLK_PLL_X 128 +#define TEGRA20_CLK_COP 129 /* a/k/a avp */ +#define TEGRA20_CLK_AUDIO 130 /* a/k/a audio_sync_clk */ +#define TEGRA20_CLK_PLL_REF 131 +#define TEGRA20_CLK_TWD 132 +#define TEGRA20_CLK_CLK_MAX 133 + +#endif /* _DT_BINDINGS_CLOCK_TEGRA20_CAR_H */ diff --git a/include/dt-bindings/clock/tegra30-car.h b/include/dt-bindings/clock/tegra30-car.h new file mode 100644 index 0000000..889e49b --- /dev/null +++ b/include/dt-bindings/clock/tegra30-car.h @@ -0,0 +1,273 @@ +/* + * This header provides constants for binding nvidia,tegra30-car. + * + * The first 130 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB + * registers. These IDs often match those in the CAR's RST_DEVICES registers, + * but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In + * this case, those clocks are assigned IDs above 160 in order to highlight + * this issue. Implementations that interpret these clock IDs as bit values + * within the CLK_OUT_ENB or RST_DEVICES registers should be careful to + * explicitly handle these special cases. + * + * The balance of the clocks controlled by the CAR are assigned IDs of 160 and + * above. + */ + +#ifndef _DT_BINDINGS_CLOCK_TEGRA30_CAR_H +#define _DT_BINDINGS_CLOCK_TEGRA30_CAR_H + +#define TEGRA30_CLK_CPU 0 +/* 1 */ +/* 2 */ +/* 3 */ +#define TEGRA30_CLK_RTC 4 +#define TEGRA30_CLK_TIMER 5 +#define TEGRA30_CLK_UARTA 6 +/* 7 (register bit affects uartb and vfir) */ +#define TEGRA30_CLK_GPIO 8 +#define TEGRA30_CLK_SDMMC2 9 +/* 10 (register bit affects spdif_in and spdif_out) */ +#define TEGRA30_CLK_I2S1 11 +#define TEGRA30_CLK_I2C1 12 +#define TEGRA30_CLK_NDFLASH 13 +#define TEGRA30_CLK_SDMMC1 14 +#define TEGRA30_CLK_SDMMC4 15 +/* 16 */ +#define TEGRA30_CLK_PWM 17 +#define TEGRA30_CLK_I2S2 18 +#define TEGRA30_CLK_EPP 19 +/* 20 (register bit affects vi and vi_sensor) */ +#define TEGRA30_CLK_GR2D 21 +#define TEGRA30_CLK_USBD 22 +#define TEGRA30_CLK_ISP 23 +#define TEGRA30_CLK_GR3D 24 +/* 25 */ +#define TEGRA30_CLK_DISP2 26 +#define TEGRA30_CLK_DISP1 27 +#define TEGRA30_CLK_HOST1X 28 +#define TEGRA30_CLK_VCP 29 +#define TEGRA30_CLK_I2S0 30 +#define TEGRA30_CLK_COP_CACHE 31 + +#define TEGRA30_CLK_MC 32 +#define TEGRA30_CLK_AHBDMA 33 +#define TEGRA30_CLK_APBDMA 34 +/* 35 */ +#define TEGRA30_CLK_KBC 36 +#define TEGRA30_CLK_STATMON 37 +#define TEGRA30_CLK_PMC 38 +/* 39 (register bit affects fuse and fuse_burn) */ +#define TEGRA30_CLK_KFUSE 40 +#define TEGRA30_CLK_SBC1 41 +#define TEGRA30_CLK_NOR 42 +/* 43 */ +#define TEGRA30_CLK_SBC2 44 +/* 45 */ +#define TEGRA30_CLK_SBC3 46 +#define TEGRA30_CLK_I2C5 47 +#define TEGRA30_CLK_DSIA 48 +/* 49 (register bit affects cve and tvo) */ +#define TEGRA30_CLK_MIPI 50 +#define TEGRA30_CLK_HDMI 51 +#define TEGRA30_CLK_CSI 52 +#define TEGRA30_CLK_TVDAC 53 +#define TEGRA30_CLK_I2C2 54 +#define TEGRA30_CLK_UARTC 55 +/* 56 */ +#define TEGRA30_CLK_EMC 57 +#define TEGRA30_CLK_USB2 58 +#define TEGRA30_CLK_USB3 59 +#define TEGRA30_CLK_MPE 60 +#define TEGRA30_CLK_VDE 61 +#define TEGRA30_CLK_BSEA 62 +#define TEGRA30_CLK_BSEV 63 + +#define TEGRA30_CLK_SPEEDO 64 +#define TEGRA30_CLK_UARTD 65 +#define TEGRA30_CLK_UARTE 66 +#define TEGRA30_CLK_I2C3 67 +#define TEGRA30_CLK_SBC4 68 +#define TEGRA30_CLK_SDMMC3 69 +#define TEGRA30_CLK_PCIE 70 +#define TEGRA30_CLK_OWR 71 +#define TEGRA30_CLK_AFI 72 +#define TEGRA30_CLK_CSITE 73 +/* 74 */ +#define TEGRA30_CLK_AVPUCQ 75 +#define TEGRA30_CLK_LA 76 +/* 77 */ +/* 78 */ +#define TEGRA30_CLK_DTV 79 +#define TEGRA30_CLK_NDSPEED 80 +#define TEGRA30_CLK_I2CSLOW 81 +#define TEGRA30_CLK_DSIB 82 +/* 83 */ +#define TEGRA30_CLK_IRAMA 84 +#define TEGRA30_CLK_IRAMB 85 +#define TEGRA30_CLK_IRAMC 86 +#define TEGRA30_CLK_IRAMD 87 +#define TEGRA30_CLK_CRAM2 88 +/* 89 */ +#define TEGRA30_CLK_AUDIO_2X 90 /* a/k/a audio_2x_sync_clk */ +/* 91 */ +#define TEGRA30_CLK_CSUS 92 +#define TEGRA30_CLK_CDEV2 93 +#define TEGRA30_CLK_CDEV1 94 +/* 95 */ + +#define TEGRA30_CLK_CPU_G 96 +#define TEGRA30_CLK_CPU_LP 97 +#define TEGRA30_CLK_GR3D2 98 +#define TEGRA30_CLK_MSELECT 99 +#define TEGRA30_CLK_TSENSOR 100 +#define TEGRA30_CLK_I2S3 101 +#define TEGRA30_CLK_I2S4 102 +#define TEGRA30_CLK_I2C4 103 +#define TEGRA30_CLK_SBC5 104 +#define TEGRA30_CLK_SBC6 105 +#define TEGRA30_CLK_D_AUDIO 106 +#define TEGRA30_CLK_APBIF 107 +#define TEGRA30_CLK_DAM0 108 +#define TEGRA30_CLK_DAM1 109 +#define TEGRA30_CLK_DAM2 110 +#define TEGRA30_CLK_HDA2CODEC_2X 111 +#define TEGRA30_CLK_ATOMICS 112 +#define TEGRA30_CLK_AUDIO0_2X 113 +#define TEGRA30_CLK_AUDIO1_2X 114 +#define TEGRA30_CLK_AUDIO2_2X 115 +#define TEGRA30_CLK_AUDIO3_2X 116 +#define TEGRA30_CLK_AUDIO4_2X 117 +#define TEGRA30_CLK_SPDIF_2X 118 +#define TEGRA30_CLK_ACTMON 119 +#define TEGRA30_CLK_EXTERN1 120 +#define TEGRA30_CLK_EXTERN2 121 +#define TEGRA30_CLK_EXTERN3 122 +#define TEGRA30_CLK_SATA_OOB 123 +#define TEGRA30_CLK_SATA 124 +#define TEGRA30_CLK_HDA 125 +/* 126 */ +#define TEGRA30_CLK_SE 127 + +#define TEGRA30_CLK_HDA2HDMI 128 +#define TEGRA30_CLK_SATA_COLD 129 +/* 130 */ +/* 131 */ +/* 132 */ +/* 133 */ +/* 134 */ +/* 135 */ +/* 136 */ +/* 137 */ +/* 138 */ +/* 139 */ +/* 140 */ +/* 141 */ +/* 142 */ +/* 143 */ +/* 144 */ +/* 145 */ +/* 146 */ +/* 147 */ +/* 148 */ +/* 149 */ +/* 150 */ +/* 151 */ +/* 152 */ +/* 153 */ +/* 154 */ +/* 155 */ +/* 156 */ +/* 157 */ +/* 158 */ +/* 159 */ + +#define TEGRA30_CLK_UARTB 160 +#define TEGRA30_CLK_VFIR 161 +#define TEGRA30_CLK_SPDIF_IN 162 +#define TEGRA30_CLK_SPDIF_OUT 163 +#define TEGRA30_CLK_VI 164 +#define TEGRA30_CLK_VI_SENSOR 165 +#define TEGRA30_CLK_FUSE 166 +#define TEGRA30_CLK_FUSE_BURN 167 +#define TEGRA30_CLK_CVE 168 +#define TEGRA30_CLK_TVO 169 +#define TEGRA30_CLK_CLK_32K 170 +#define TEGRA30_CLK_CLK_M 171 +#define TEGRA30_CLK_CLK_M_DIV2 172 +#define TEGRA30_CLK_CLK_M_DIV4 173 +#define TEGRA30_CLK_PLL_REF 174 +#define TEGRA30_CLK_PLL_C 175 +#define TEGRA30_CLK_PLL_C_OUT1 176 +#define TEGRA30_CLK_PLL_M 177 +#define TEGRA30_CLK_PLL_M_OUT1 178 +#define TEGRA30_CLK_PLL_P 179 +#define TEGRA30_CLK_PLL_P_OUT1 180 +#define TEGRA30_CLK_PLL_P_OUT2 181 +#define TEGRA30_CLK_PLL_P_OUT3 182 +#define TEGRA30_CLK_PLL_P_OUT4 183 +#define TEGRA30_CLK_PLL_A 184 +#define TEGRA30_CLK_PLL_A_OUT0 185 +#define TEGRA30_CLK_PLL_D 186 +#define TEGRA30_CLK_PLL_D_OUT0 187 +#define TEGRA30_CLK_PLL_D2 188 +#define TEGRA30_CLK_PLL_D2_OUT0 189 +#define TEGRA30_CLK_PLL_U 190 +#define TEGRA30_CLK_PLL_X 191 + +#define TEGRA30_CLK_PLL_X_OUT0 192 +#define TEGRA30_CLK_PLL_E 193 +#define TEGRA30_CLK_SPDIF_IN_SYNC 194 +#define TEGRA30_CLK_I2S0_SYNC 195 +#define TEGRA30_CLK_I2S1_SYNC 196 +#define TEGRA30_CLK_I2S2_SYNC 197 +#define TEGRA30_CLK_I2S3_SYNC 198 +#define TEGRA30_CLK_I2S4_SYNC 199 +#define TEGRA30_CLK_VIMCLK_SYNC 200 +#define TEGRA30_CLK_AUDIO0 201 +#define TEGRA30_CLK_AUDIO1 202 +#define TEGRA30_CLK_AUDIO2 203 +#define TEGRA30_CLK_AUDIO3 204 +#define TEGRA30_CLK_AUDIO4 205 +#define TEGRA30_CLK_SPDIF 206 +#define TEGRA30_CLK_CLK_OUT_1 207 /* (extern1) */ +#define TEGRA30_CLK_CLK_OUT_2 208 /* (extern2) */ +#define TEGRA30_CLK_CLK_OUT_3 209 /* (extern3) */ +#define TEGRA30_CLK_SCLK 210 +#define TEGRA30_CLK_BLINK 211 +#define TEGRA30_CLK_CCLK_G 212 +#define TEGRA30_CLK_CCLK_LP 213 +#define TEGRA30_CLK_TWD 214 +#define TEGRA30_CLK_CML0 215 +#define TEGRA30_CLK_CML1 216 +#define TEGRA30_CLK_HCLK 217 +#define TEGRA30_CLK_PCLK 218 +/* 219 */ +/* 220 */ +/* 221 */ +/* 222 */ +/* 223 */ + +/* 288 */ +/* 289 */ +/* 290 */ +/* 291 */ +/* 292 */ +/* 293 */ +/* 294 */ +/* 295 */ +/* 296 */ +/* 297 */ +/* 298 */ +/* 299 */ +#define TEGRA30_CLK_CLK_OUT_1_MUX 300 +#define TEGRA30_CLK_CLK_OUT_2_MUX 301 +#define TEGRA30_CLK_CLK_OUT_3_MUX 302 +#define TEGRA30_CLK_AUDIO0_MUX 303 +#define TEGRA30_CLK_AUDIO1_MUX 304 +#define TEGRA30_CLK_AUDIO2_MUX 305 +#define TEGRA30_CLK_AUDIO3_MUX 306 +#define TEGRA30_CLK_AUDIO4_MUX 307 +#define TEGRA30_CLK_SPDIF_MUX 308 +#define TEGRA30_CLK_CLK_MAX 309 + +#endif /* _DT_BINDINGS_CLOCK_TEGRA30_CAR_H */ diff --git a/include/fb_mmc.h b/include/fb_mmc.h new file mode 100644 index 0000000..1ad1d13 --- /dev/null +++ b/include/fb_mmc.h @@ -0,0 +1,8 @@ +/* + * Copyright 2014 Broadcom Corporation. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +void fb_mmc_flash_write(const char *cmd, void *download_buffer, + unsigned int download_bytes, char *response); diff --git a/include/fdt_support.h b/include/fdt_support.h index 1bda686..c3d1fbc 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -133,6 +133,18 @@ static inline int fdt_status_fail_by_alias(void *fdt, const char *alias) return fdt_set_status_by_alias(fdt, alias, FDT_STATUS_FAIL, 0); } +/* Helper to read a big number; size is in cells (not bytes) */ +static inline u64 of_read_number(const fdt32_t *cell, int size) +{ + u64 r = 0; + while (size--) + r = (r << 32) | fdt32_to_cpu(*(cell++)); + return r; +} + +void of_bus_default_count_cells(void *blob, int parentoffset, + int *addrc, int *sizec); + #endif /* ifdef CONFIG_OF_LIBFDT */ #ifdef USE_HOSTCC diff --git a/include/fdtdec.h b/include/fdtdec.h index 856e6cf..2590d30 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -94,6 +94,8 @@ enum fdt_compat_id { COMPAT_SANDBOX_LCD_SDL, /* Sandbox LCD emulation with SDL */ COMPAT_TI_TPS65090, /* Texas Instrument TPS65090 */ COMPAT_NXP_PTN3460, /* NXP PTN3460 DP/LVDS bridge */ + COMPAT_SAMSUNG_EXYNOS_SYSMMU, /* Exynos sysmmu */ + COMPAT_PARADE_PS8625, /* Parade PS8622 EDP->LVDS bridge */ COMPAT_COUNT, }; @@ -374,6 +376,18 @@ int fdtdec_get_alias_seq(const void *blob, const char *base, int node, */ int fdtdec_get_alias_node(const void *blob, const char *name); +/** + * Get the offset of the given chosen node + * + * This looks up a property in /chosen containing the path to another node, + * then finds the offset of that node. + * + * @param blob Device tree blob (if NULL, then error is returned) + * @param name Property name, e.g. "stdout-path" + * @return Node offset referred to by that chosen node, or -ve FDT_ERR_... + */ +int fdtdec_get_chosen_node(const void *blob, const char *name); + /* * Get the name for a compatible ID * diff --git a/include/fm_eth.h b/include/fm_eth.h index 98edfcf..e46a684 100644 --- a/include/fm_eth.h +++ b/include/fm_eth.h @@ -8,8 +8,8 @@ #define __FM_ETH_H__ #include +#include #include -#include enum fm_port { FM1_DTSEC1, diff --git a/include/fsl_dcu_fb.h b/include/fsl_dcu_fb.h new file mode 100644 index 0000000..4263298 --- /dev/null +++ b/include/fsl_dcu_fb.h @@ -0,0 +1,16 @@ +/* + * Copyright 2014 Freescale Semiconductor, Inc. + * + * FSL DCU Framebuffer driver + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include + +int fsl_dcu_init(unsigned int xres, unsigned int yres, + unsigned int pixel_format); + +/* Prototypes for external board-specific functions */ +int platform_dcu_init(unsigned int xres, unsigned int yres, + const char *port, struct fb_videomode *dcu_fb_videomode); +unsigned int dcu_set_pixel_clock(unsigned int pixclock); diff --git a/include/fsl_ddr.h b/include/fsl_ddr.h index 5c49b22..675557a 100644 --- a/include/fsl_ddr.h +++ b/include/fsl_ddr.h @@ -15,6 +15,11 @@ #include +#ifndef CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS +/* All controllers are for main memory */ +#define CONFIG_SYS_FSL_DDR_MAIN_NUM_CTRLS CONFIG_NUM_DDR_CONTROLLERS +#endif + #ifdef CONFIG_SYS_FSL_DDR_LE #define ddr_in32(a) in_le32(a) #define ddr_out32(a, v) out_le32(a, v) @@ -57,6 +62,13 @@ typedef struct { memctl_options_t memctl_opts[CONFIG_SYS_NUM_DDR_CTLRS]; common_timing_params_t common_timing_params[CONFIG_SYS_NUM_DDR_CTLRS]; fsl_ddr_cfg_regs_t fsl_ddr_config_reg[CONFIG_SYS_NUM_DDR_CTLRS]; + unsigned int first_ctrl; + unsigned int num_ctrls; + unsigned long long mem_base; + unsigned int dimm_slots_per_ctrl; + int (*board_need_mem_reset)(void); + void (*board_mem_reset)(void); + void (*board_mem_de_reset)(void); } fsl_ddr_info_t; /* Compute steps */ @@ -72,7 +84,6 @@ typedef struct { unsigned long long fsl_ddr_compute(fsl_ddr_info_t *pinfo, unsigned int start_step, unsigned int size_only); - const char *step_to_string(unsigned int step); unsigned int compute_fsl_memctl_config_regs(const memctl_options_t *popts, @@ -102,7 +113,7 @@ void fsl_ddr_set_lawbar( int fsl_ddr_interactive_env_var_exists(void); unsigned long long fsl_ddr_interactive(fsl_ddr_info_t *pinfo, int var_is_set); void fsl_ddr_get_spd(generic_spd_eeprom_t *ctrl_dimms_spd, - unsigned int ctrl_num); + unsigned int ctrl_num, unsigned int dimm_slots_per_ctrl); int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]); unsigned int check_fsl_memctl_config_regs(const fsl_ddr_cfg_regs_t *ddr); diff --git a/include/fsl_ddr_sdram.h b/include/fsl_ddr_sdram.h index e8a2db9..5b03c14 100644 --- a/include/fsl_ddr_sdram.h +++ b/include/fsl_ddr_sdram.h @@ -51,7 +51,6 @@ typedef ddr2_spd_eeprom_t generic_spd_eeprom_t; #define CONFIG_FSL_SDRAM_TYPE SDRAM_TYPE_DDR2 #endif #elif defined(CONFIG_SYS_FSL_DDR3) -#define FSL_DDR_MIN_TCKE_PULSE_WIDTH_DDR (3) /* FIXME */ typedef ddr3_spd_eeprom_t generic_spd_eeprom_t; #ifndef CONFIG_FSL_SDRAM_TYPE #define CONFIG_FSL_SDRAM_TYPE SDRAM_TYPE_DDR3 @@ -281,6 +280,7 @@ typedef struct memctl_options_partial_s { #define DDR_DATA_BUS_WIDTH_64 0 #define DDR_DATA_BUS_WIDTH_32 1 #define DDR_DATA_BUS_WIDTH_16 2 +#define DDR_CSWL_CS0 0x04000001 /* * Generalized parameters for memory controller configuration, * might be a little specific to the FSL memory controller @@ -340,6 +340,7 @@ typedef struct memctl_options_s { unsigned int cpo_override; unsigned int write_data_delay; /* DQS adjust */ + unsigned int cswl_override; unsigned int wrlvl_override; unsigned int wrlvl_sample; /* Write leveling */ unsigned int wrlvl_start; @@ -350,7 +351,6 @@ typedef struct memctl_options_s { unsigned int twot_en; unsigned int threet_en; unsigned int bstopre; - unsigned int tcke_clock_pulse_width_ps; /* tCKE */ unsigned int tfaw_window_four_activates_ps; /* tFAW -- FOUR_ACT */ /* Rtt impedance */ @@ -377,12 +377,20 @@ typedef struct memctl_options_s { unsigned int trwt; /* read-to-write turnaround */ } memctl_options_t; -extern phys_size_t fsl_ddr_sdram(void); -extern phys_size_t fsl_ddr_sdram_size(void); +phys_size_t fsl_ddr_sdram(void); +phys_size_t fsl_ddr_sdram_size(void); +phys_size_t fsl_other_ddr_sdram(unsigned long long base, + unsigned int first_ctrl, + unsigned int num_ctrls, + unsigned int dimm_slots_per_ctrl, + int (*board_need_reset)(void), + void (*board_reset)(void), + void (*board_de_reset)(void)); extern int fsl_use_spd(void); -extern void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, - unsigned int ctrl_num, int step); +void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, + unsigned int ctrl_num, int step); u32 fsl_ddr_get_intl3r(void); +void print_ddr_info(unsigned int start_ctrl); static void __board_assert_mem_reset(void) { diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h index 9814964..c1b6648 100644 --- a/include/fsl_esdhc.h +++ b/include/fsl_esdhc.h @@ -162,7 +162,19 @@ struct fsl_esdhc_cfg { }; /* Select the correct accessors depending on endianess */ -#if __BYTE_ORDER == __LITTLE_ENDIAN +#if defined CONFIG_SYS_FSL_ESDHC_LE +#define esdhc_read32 in_le32 +#define esdhc_write32 out_le32 +#define esdhc_clrsetbits32 clrsetbits_le32 +#define esdhc_clrbits32 clrbits_le32 +#define esdhc_setbits32 setbits_le32 +#elif defined(CONFIG_SYS_FSL_ESDHC_BE) +#define esdhc_read32 in_be32 +#define esdhc_write32 out_be32 +#define esdhc_clrsetbits32 clrsetbits_be32 +#define esdhc_clrbits32 clrbits_be32 +#define esdhc_setbits32 setbits_be32 +#elif __BYTE_ORDER == __LITTLE_ENDIAN #define esdhc_read32 in_le32 #define esdhc_write32 out_le32 #define esdhc_clrsetbits32 clrsetbits_le32 diff --git a/include/fsl_mdio.h b/include/fsl_mdio.h index b58713d..2137282 100644 --- a/include/fsl_mdio.h +++ b/include/fsl_mdio.h @@ -10,7 +10,18 @@ #include #include -#include + +struct tsec_mii_mng { + u32 miimcfg; /* MII management configuration reg */ + u32 miimcom; /* MII management command reg */ + u32 miimadd; /* MII management address reg */ + u32 miimcon; /* MII management control reg */ + u32 miimstat; /* MII management status reg */ + u32 miimind; /* MII management indication reg */ + u32 ifstat; /* Interface Status Register */ +}; + +int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc); /* PHY register offsets */ #define PHY_EXT_PAGE_ACCESS 0x1f diff --git a/include/ipu_pixfmt.h b/include/ipu_pixfmt.h index f7a237c..a8c4276 100644 --- a/include/ipu_pixfmt.h +++ b/include/ipu_pixfmt.h @@ -32,6 +32,7 @@ #define IPU_PIX_FMT_RGB332 fourcc('R', 'G', 'B', '1') /*< 8 RGB-3-3-2 */ #define IPU_PIX_FMT_RGB555 fourcc('R', 'G', 'B', 'O') /*< 16 RGB-5-5-5 */ #define IPU_PIX_FMT_RGB565 fourcc('R', 'G', 'B', 'P') /*< 1 6 RGB-5-6-5 */ +#define IPU_PIX_FMT_UPS051 fourcc('U', 'P', 'S', '0') /*< 24 RG BR GB, 1.5 clks/pixel */ #define IPU_PIX_FMT_RGB666 fourcc('R', 'G', 'B', '6') /*< 18 RGB-6-6-6 */ #define IPU_PIX_FMT_BGR666 fourcc('B', 'G', 'R', '6') /*< 18 BGR-6-6-6 */ #define IPU_PIX_FMT_BGR24 fourcc('B', 'G', 'R', '3') /*< 24 BGR-8-8-8 */ @@ -63,6 +64,7 @@ int ipuv3_fb_init(struct fb_videomode const *mode, uint8_t disp, uint32_t pixfmt); +void *ipuv3_fb_init2(void); void ipuv3_fb_shutdown(void); #endif diff --git a/include/linker_lists.h b/include/linker_lists.h index 557e627..507d61b 100644 --- a/include/linker_lists.h +++ b/include/linker_lists.h @@ -28,11 +28,11 @@ * together. Assuming _list and _entry are the list and entry names, * then the corresponding input section name is * - * _u_boot_list + _2_ + @_list + _2_ + @_entry + * .u_boot_list_ + 2_ + @_list + _2_ + @_entry * * and the C variable name is * - * .u_boot_list_ + 2_ + @_list + _2_ + @_entry + * _u_boot_list + _2_ + @_list + _2_ + @_entry * * This ensures uniqueness for both input section and C variable name. * diff --git a/include/linux/compiler-clang.h b/include/linux/compiler-clang.h new file mode 100644 index 0000000..d1e49d5 --- /dev/null +++ b/include/linux/compiler-clang.h @@ -0,0 +1,12 @@ +#ifndef __LINUX_COMPILER_H +#error "Please don't include directly, include instead." +#endif + +/* Some compiler specific definitions are overwritten here + * for Clang compiler + */ + +#ifdef uninitialized_var +#undef uninitialized_var +#define uninitialized_var(x) x = *(&(x)) +#endif diff --git a/include/linux/compiler-gcc.h b/include/linux/compiler-gcc.h index 9896e54..e057bd2 100644 --- a/include/linux/compiler-gcc.h +++ b/include/linux/compiler-gcc.h @@ -5,6 +5,9 @@ /* * Common definitions for all gcc versions go here. */ +#define GCC_VERSION (__GNUC__ * 10000 \ + + __GNUC_MINOR__ * 100 \ + + __GNUC_PATCHLEVEL__) /* Optimization barrier */ @@ -34,9 +37,15 @@ __asm__ ("" : "=r"(__ptr) : "0"(ptr)); \ (typeof(ptr)) (__ptr + (off)); }) +/* Make the optimizer believe the variable can be manipulated arbitrarily. */ +#define OPTIMIZER_HIDE_VAR(var) __asm__ ("" : "=r" (var) : "0" (var)) + +#ifdef __CHECKER__ +#define __must_be_array(arr) 0 +#else /* &a[0] degrades to a pointer: a different type from an array */ -#define __must_be_array(a) \ - BUILD_BUG_ON_ZERO(__builtin_types_compatible_p(typeof(a), typeof(&a[0]))) +#define __must_be_array(a) BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0])) +#endif /* * Force always-inline if the user requests it so via the .config, @@ -44,24 +53,35 @@ */ #if !defined(CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING) || \ !defined(CONFIG_OPTIMIZE_INLINING) || (__GNUC__ < 4) -# define inline inline __attribute__((always_inline)) -# define __inline__ __inline__ __attribute__((always_inline)) -# define __inline __inline __attribute__((always_inline)) +# define inline inline __attribute__((always_inline)) notrace +# define __inline__ __inline__ __attribute__((always_inline)) notrace +# define __inline __inline __attribute__((always_inline)) notrace +#else +/* A lot of inline functions can cause havoc with function tracing */ +# define inline inline notrace +# define __inline__ __inline__ notrace +# define __inline __inline notrace #endif #define __deprecated __attribute__((deprecated)) #ifndef __packed -# define __packed __attribute__((packed)) +#define __packed __attribute__((packed)) #endif +#ifndef __weak #define __weak __attribute__((weak)) +#endif /* * it doesn't make sense on ARM (currently the only user of __naked) to trace * naked functions because then mcount is called without stack and frame pointer * being set up and there is no chance to restore the lr register to the value * before mcount was called. + * + * The asm() bodies of naked functions often depend on standard calling conventions, + * therefore they must be noinline and noclone. GCC 4.[56] currently fail to enforce + * this, so we must do so ourselves. See GCC PR44290. */ -#define __naked __attribute__((naked)) notrace +#define __naked __attribute__((naked)) noinline __noclone notrace #define __noreturn __attribute__((noreturn)) @@ -76,12 +96,13 @@ * [...] */ #ifndef __pure -# define __pure __attribute__((pure)) +#define __pure __attribute__((pure)) #endif #ifndef __aligned -# define __aligned(x) __attribute__((aligned(x))) +#define __aligned(x) __attribute__((aligned(x))) #endif -#define __printf(a,b) __attribute__((format(printf,a,b))) +#define __printf(a, b) __attribute__((format(printf, a, b))) +#define __scanf(a, b) __attribute__((format(scanf, a, b))) #define noinline __attribute__((noinline)) #define __attribute_const__ __attribute__((__const__)) #define __maybe_unused __attribute__((unused)) @@ -91,3 +112,17 @@ #define _gcc_header(x) __gcc_header(linux/compiler-gcc##x.h) #define gcc_header(x) _gcc_header(x) #include gcc_header(__GNUC__) + +#if !defined(__noclone) +#define __noclone /* not needed */ +#endif + +/* + * A trick to suppress uninitialized variable warning without generating any + * code + */ +#define uninitialized_var(x) x = x + +#ifndef __always_inline +#define __always_inline inline __attribute__((always_inline)) +#endif diff --git a/include/linux/compiler-gcc3.h b/include/linux/compiler-gcc3.h index 2befe65..7d89feb 100644 --- a/include/linux/compiler-gcc3.h +++ b/include/linux/compiler-gcc3.h @@ -2,20 +2,22 @@ #error "Please don't include directly, include instead." #endif -#if __GNUC_MINOR__ >= 3 +#if GCC_VERSION < 30200 +# error Sorry, your compiler is too old - please upgrade it. +#endif + +#if GCC_VERSION >= 30300 # define __used __attribute__((__used__)) #else # define __used __attribute__((__unused__)) #endif -#if __GNUC_MINOR__ >= 4 +#if GCC_VERSION >= 30400 #define __must_check __attribute__((warn_unused_result)) #endif -/* - * A trick to suppress uninitialized variable warning without generating any - * code - */ -#define uninitialized_var(x) x = x - -#define __always_inline inline __attribute__((always_inline)) +#ifdef CONFIG_GCOV_KERNEL +# if GCC_VERSION < 30400 +# error "GCOV profiling support for gcc versions below 3.4 not included" +# endif /* __GNUC_MINOR__ */ +#endif /* CONFIG_GCOV_KERNEL */ diff --git a/include/linux/compiler-gcc4.h b/include/linux/compiler-gcc4.h index 27d11ca..2507fd2 100644 --- a/include/linux/compiler-gcc4.h +++ b/include/linux/compiler-gcc4.h @@ -4,7 +4,7 @@ /* GCC 4.1.[01] miscompiles __weak */ #ifdef __KERNEL__ -# if __GNUC_MINOR__ == 1 && __GNUC_PATCHLEVEL__ <= 1 +# if GCC_VERSION >= 40100 && GCC_VERSION <= 40101 # error Your version of gcc miscompiles the __weak directive # endif #endif @@ -12,17 +12,12 @@ #define __used __attribute__((__used__)) #define __must_check __attribute__((warn_unused_result)) #define __compiler_offsetof(a,b) __builtin_offsetof(a,b) -#ifndef __always_inline -# define __always_inline inline __attribute__((always_inline)) -#endif -/* - * A trick to suppress uninitialized variable warning without generating any - * code - */ -#define uninitialized_var(x) x = x +#if GCC_VERSION >= 40100 && GCC_VERSION < 40600 +# define __compiletime_object_size(obj) __builtin_object_size(obj, 0) +#endif -#if __GNUC_MINOR__ >= 3 +#if GCC_VERSION >= 40300 /* Mark functions as cold. gcc will assume any path leading to a call to them will be unlikely. This means a lot of manual unlikely()s are unnecessary now for any paths leading to the usual suspects @@ -38,8 +33,15 @@ the kernel context */ #define __cold __attribute__((__cold__)) +#define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __COUNTER__) -#if __GNUC_MINOR__ >= 5 +#ifndef __CHECKER__ +# define __compiletime_warning(message) __attribute__((warning(message))) +# define __compiletime_error(message) __attribute__((error(message))) +#endif /* __CHECKER__ */ +#endif /* GCC_VERSION >= 40300 */ + +#if GCC_VERSION >= 40500 /* * Mark a position in code as unreachable. This can be used to * suppress control flow warnings after asm blocks that transfer @@ -50,14 +52,37 @@ * unreleased. Really, we need to have autoconf for the kernel. */ #define unreachable() __builtin_unreachable() -#endif +/* Mark a function definition as prohibited from being cloned. */ +#define __noclone __attribute__((__noclone__)) + +#endif /* GCC_VERSION >= 40500 */ + +#if GCC_VERSION >= 40600 +/* + * Tell the optimizer that something else uses this function or variable. + */ +#define __visible __attribute__((externally_visible)) #endif -#if __GNUC_MINOR__ > 0 -#define __compiletime_object_size(obj) __builtin_object_size(obj, 0) +/* + * GCC 'asm goto' miscompiles certain code sequences: + * + * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=58670 + * + * Work it around via a compiler barrier quirk suggested by Jakub Jelinek. + * Fixed in GCC 4.8.2 and later versions. + * + * (asm goto is automatically volatile - the naming reflects this.) + */ +#define asm_volatile_goto(x...) do { asm goto(x); asm (""); } while (0) + +#ifdef CONFIG_ARCH_USE_BUILTIN_BSWAP +#if GCC_VERSION >= 40400 +#define __HAVE_BUILTIN_BSWAP32__ +#define __HAVE_BUILTIN_BSWAP64__ #endif -#if __GNUC_MINOR__ >= 4 -#define __compiletime_warning(message) __attribute__((warning(message))) -#define __compiletime_error(message) __attribute__((error(message))) +#if GCC_VERSION >= 40800 || (defined(__powerpc__) && GCC_VERSION >= 40600) +#define __HAVE_BUILTIN_BSWAP16__ #endif +#endif /* CONFIG_ARCH_USE_BUILTIN_BSWAP */ diff --git a/include/linux/compiler-intel.h b/include/linux/compiler-intel.h new file mode 100644 index 0000000..ba147a1 --- /dev/null +++ b/include/linux/compiler-intel.h @@ -0,0 +1,40 @@ +#ifndef __LINUX_COMPILER_H +#error "Please don't include directly, include instead." +#endif + +#ifdef __ECC + +/* Some compiler specific definitions are overwritten here + * for Intel ECC compiler + */ + +#include + +/* Intel ECC compiler doesn't support gcc specific asm stmts. + * It uses intrinsics to do the equivalent things. + */ +#undef RELOC_HIDE +#undef OPTIMIZER_HIDE_VAR + +#define RELOC_HIDE(ptr, off) \ + ({ unsigned long __ptr; \ + __ptr = (unsigned long) (ptr); \ + (typeof(ptr)) (__ptr + (off)); }) + +/* This should act as an optimization barrier on var. + * Given that this compiler does not have inline assembly, a compiler barrier + * is the best we can do. + */ +#define OPTIMIZER_HIDE_VAR(var) barrier() + +/* Intel ECC compiler doesn't support __builtin_types_compatible_p() */ +#define __must_be_array(a) 0 + +#endif + +#ifndef __HAVE_BUILTIN_BSWAP16__ +/* icc has this, but it's called _bswap16 */ +#define __HAVE_BUILTIN_BSWAP16__ +#define __builtin_bswap16 _bswap16 +#endif + diff --git a/include/linux/compiler.h b/include/linux/compiler.h index 5be3dab..d5ad7b1 100644 --- a/include/linux/compiler.h +++ b/include/linux/compiler.h @@ -5,16 +5,23 @@ #ifdef __CHECKER__ # define __user __attribute__((noderef, address_space(1))) -# define __kernel /* default address space */ +# define __kernel __attribute__((address_space(0))) # define __safe __attribute__((safe)) # define __force __attribute__((force)) # define __nocast __attribute__((nocast)) # define __iomem __attribute__((noderef, address_space(2))) +# define __must_hold(x) __attribute__((context(x,1,1))) # define __acquires(x) __attribute__((context(x,0,1))) # define __releases(x) __attribute__((context(x,1,0))) # define __acquire(x) __context__(x,1) # define __release(x) __context__(x,-1) # define __cond_lock(x,c) ((c) ? ({ __acquire(x); 1; }) : 0) +# define __percpu __attribute__((noderef, address_space(3))) +#ifdef CONFIG_SPARSE_RCU_POINTER +# define __rcu __attribute__((noderef, address_space(4))) +#else +# define __rcu +#endif extern void __chk_user_ptr(const volatile void __user *); extern void __chk_io_ptr(const volatile void __iomem *); #else @@ -27,13 +34,20 @@ extern void __chk_io_ptr(const volatile void __iomem *); # define __chk_user_ptr(x) (void)0 # define __chk_io_ptr(x) (void)0 # define __builtin_warning(x, y...) (1) +# define __must_hold(x) # define __acquires(x) # define __releases(x) # define __acquire(x) (void)0 # define __release(x) (void)0 # define __cond_lock(x,c) (c) +# define __percpu +# define __rcu #endif +/* Indirect macros required for expanded argument pasting, eg. __LINE__. */ +#define ___PASTE(a,b) a##b +#define __PASTE(a,b) ___PASTE(a,b) + #ifdef __KERNEL__ #ifdef __GNUC__ @@ -49,6 +63,13 @@ extern void __chk_io_ptr(const volatile void __iomem *); # include #endif +/* Clang compiler defines __GNUC__. So we will overwrite implementations + * coming from above header files here + */ +#ifdef __clang__ +#include +#endif + /* * Generic compiler-dependent macros required for kernel * build go below this comment. Actual compiler/compiler version @@ -156,6 +177,15 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect); (typeof(ptr)) (__ptr + (off)); }) #endif +#ifndef OPTIMIZER_HIDE_VAR +#define OPTIMIZER_HIDE_VAR(var) barrier() +#endif + +/* Not-quite-unique ID. */ +#ifndef __UNIQUE_ID +# define __UNIQUE_ID(prefix) __PASTE(__PASTE(__UNIQUE_ID_, prefix), __LINE__) +#endif + #endif /* __KERNEL__ */ #endif /* __ASSEMBLY__ */ @@ -228,7 +258,7 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect); /* * Rather then using noinline to prevent stack consumption, use - * noinline_for_stack instead. For documentaiton reasons. + * noinline_for_stack instead. For documentation reasons. */ #define noinline_for_stack noinline @@ -270,11 +300,20 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect); # define __section(S) __attribute__ ((__section__(#S))) #endif +#ifndef __visible +#define __visible +#endif + /* Are two types/vars the same type (ignoring qualifiers)? */ #ifndef __same_type # define __same_type(a, b) __builtin_types_compatible_p(typeof(a), typeof(b)) #endif +/* Is this type a native word size -- useful for atomic operations */ +#ifndef __native_word +# define __native_word(t) (sizeof(t) == sizeof(int) || sizeof(t) == sizeof(long)) +#endif + /* Compile time object size, -1 for unknown */ #ifndef __compiletime_object_size # define __compiletime_object_size(obj) -1 @@ -284,8 +323,49 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect); #endif #ifndef __compiletime_error # define __compiletime_error(message) +/* + * Sparse complains of variable sized arrays due to the temporary variable in + * __compiletime_assert. Unfortunately we can't just expand it out to make + * sparse see a constant array size without breaking compiletime_assert on old + * versions of GCC (e.g. 4.2.4), so hide the array from sparse altogether. + */ +# ifndef __CHECKER__ +# define __compiletime_error_fallback(condition) \ + do { ((void)sizeof(char[1 - 2 * condition])); } while (0) +# endif +#endif +#ifndef __compiletime_error_fallback +# define __compiletime_error_fallback(condition) do { } while (0) #endif +#define __compiletime_assert(condition, msg, prefix, suffix) \ + do { \ + bool __cond = !(condition); \ + extern void prefix ## suffix(void) __compiletime_error(msg); \ + if (__cond) \ + prefix ## suffix(); \ + __compiletime_error_fallback(__cond); \ + } while (0) + +#define _compiletime_assert(condition, msg, prefix, suffix) \ + __compiletime_assert(condition, msg, prefix, suffix) + +/** + * compiletime_assert - break build and emit msg if condition is false + * @condition: a compile-time constant condition to check + * @msg: a message to emit if condition is false + * + * In tradition of POSIX assert, this macro will break the build if the + * supplied condition is *false*, emitting the supplied error message if the + * compiler has support to do so. + */ +#define compiletime_assert(condition, msg) \ + _compiletime_assert(condition, msg, __compiletime_assert_, __LINE__) + +#define compiletime_assert_atomic_type(t) \ + compiletime_assert(__native_word(t), \ + "Need native word sized stores/loads for atomicity.") + /* * Prevent the compiler from merging or refetching accesses. The compiler * is also forbidden from reordering successive instances of ACCESS_ONCE(), @@ -300,4 +380,12 @@ void ftrace_likely_update(struct ftrace_branch_data *f, int val, int expect); */ #define ACCESS_ONCE(x) (*(volatile typeof(x) *)&(x)) +/* Ignore/forbid kprobes attach on very low level functions marked by this attribute: */ +#ifdef CONFIG_KPROBES +# define __kprobes __attribute__((__section__(".kprobes.text"))) +# define nokprobe_inline __always_inline +#else +# define __kprobes +# define nokprobe_inline inline +#endif #endif /* __LINUX_COMPILER_H */ diff --git a/include/linux/fb.h b/include/linux/fb.h index 652cf3b..fc536e2 100644 --- a/include/linux/fb.h +++ b/include/linux/fb.h @@ -79,6 +79,7 @@ struct fb_bitfield { /* vtotal = 144d/288n/576i => PAL */ /* vtotal = 121d/242n/484i => NTSC */ #define FB_SYNC_ON_GREEN 32 /* sync on green */ +#define FB_SYNC_CLK_LAT_FALL 0x40000000 #define FB_VMODE_NONINTERLACED 0 /* non interlaced */ #define FB_VMODE_INTERLACED 1 /* interlaced */ diff --git a/include/linux/kbuild.h b/include/linux/kbuild.h index ab7805a..8a9f645 100644 --- a/include/linux/kbuild.h +++ b/include/linux/kbuild.h @@ -7,14 +7,14 @@ #define __LINUX_KBUILD_H #define DEFINE(sym, val) \ - asm volatile("\n->" #sym " %0 " #val : : "i" (val)) + asm volatile("\n.ascii \"->" #sym " %0 " #val "\"" : : "i" (val)) -#define BLANK() asm volatile("\n->" : : ) +#define BLANK() asm volatile("\n.ascii \"->\"" : : ) #define OFFSET(sym, str, mem) \ DEFINE(sym, offsetof(struct str, mem)) #define COMMENT(x) \ - asm volatile("\n->#" x) + asm volatile("\n.ascii \"->#" x "\"") #endif diff --git a/include/linux/mtd/flashchip.h b/include/linux/mtd/flashchip.h index 7028ee1..e5c7d1c 100644 --- a/include/linux/mtd/flashchip.h +++ b/include/linux/mtd/flashchip.h @@ -9,7 +9,6 @@ #ifndef __MTD_FLASHCHIP_H__ #define __MTD_FLASHCHIP_H__ -#define __UBOOT__ #ifndef __UBOOT__ /* For spinlocks. sched.h includes spinlock.h from whichever directory it * happens to be in - so we don't have to care whether we're on 2.2, which diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 1526d07..8666413 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -8,7 +8,6 @@ #ifndef __MTD_MTD_H__ #define __MTD_MTD_H__ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 67d2651..8438490 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -16,7 +16,6 @@ #ifndef __LINUX_MTD_NAND_H #define __LINUX_MTD_NAND_H -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/include/linux/mtd/ubi.h b/include/linux/mtd/ubi.h index d9e58ae..05d0ab5 100644 --- a/include/linux/mtd/ubi.h +++ b/include/linux/mtd/ubi.h @@ -10,7 +10,6 @@ #define __LINUX_UBI_H__ #include -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/include/linux/rbtree.h b/include/linux/rbtree.h index b5994e3..2cc16a3 100644 --- a/include/linux/rbtree.h +++ b/include/linux/rbtree.h @@ -17,7 +17,6 @@ #ifndef _LINUX_RBTREE_H #define _LINUX_RBTREE_H -#define __UBOOT__ #ifndef __UBOOT__ #include #endif diff --git a/include/mtd/mtd-abi.h b/include/mtd/mtd-abi.h index b9f4bcb..0ef582a 100644 --- a/include/mtd/mtd-abi.h +++ b/include/mtd/mtd-abi.h @@ -8,7 +8,6 @@ #ifndef __MTD_ABI_H__ #define __MTD_ABI_H__ -#define __UBOOT__ #ifdef __UBOOT__ #include #endif diff --git a/include/ns16550.h b/include/ns16550.h index d1f3a90..5784cfd 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -23,6 +23,14 @@ #include +#ifdef CONFIG_DM_SERIAL +/* + * For driver model we always use one byte per register, and sort out the + * differences in the driver + */ +#define CONFIG_SYS_NS16550_REG_SIZE (-1) +#endif + #if !defined(CONFIG_SYS_NS16550_REG_SIZE) || (CONFIG_SYS_NS16550_REG_SIZE == 0) #error "Please define NS16550 registers size." #elif defined(CONFIG_SYS_NS16550_MEM32) @@ -37,6 +45,21 @@ unsigned char postpad_##x[-CONFIG_SYS_NS16550_REG_SIZE - 1]; #endif +/** + * struct ns16550_platdata - information about a NS16550 port + * + * @base: Base register address + * @reg_shift: Shift size of registers (0=byte, 1=16bit, 2=32bit...) + * @clock: UART base clock speed in Hz + */ +struct ns16550_platdata { + unsigned char *base; + int reg_shift; + int clock; +}; + +struct udevice; + struct NS16550 { UART_REG(rbr); /* 0 */ UART_REG(ier); /* 1 */ @@ -65,6 +88,9 @@ struct NS16550 { UART_REG(scr); /* 10*/ UART_REG(ssr); /* 11*/ #endif +#ifdef CONFIG_DM_SERIAL + struct ns16550_platdata *plat; +#endif }; #define thr rbr @@ -170,3 +196,43 @@ void NS16550_putc(NS16550_t com_port, char c); char NS16550_getc(NS16550_t com_port); int NS16550_tstc(NS16550_t com_port); void NS16550_reinit(NS16550_t com_port, int baud_divisor); + +/** + * ns16550_calc_divisor() - calculate the divisor given clock and baud rate + * + * Given the UART input clock and required baudrate, calculate the divisor + * that should be used. + * + * @port: UART port + * @clock: UART input clock speed in Hz + * @baudrate: Required baud rate + * @return baud rate divisor that should be used + */ +int ns16550_calc_divisor(NS16550_t port, int clock, int baudrate); + +/** + * ns16550_serial_ofdata_to_platdata() - convert DT to platform data + * + * Decode a device tree node for an ns16550 device. This includes the + * register base address and register shift properties. The caller must set + * up the clock frequency. + * + * @dev: dev to decode platform data for + * @return: 0 if OK, -EINVAL on error + */ +int ns16550_serial_ofdata_to_platdata(struct udevice *dev); + +/** + * ns16550_serial_probe() - probe a serial port + * + * This sets up the serial port ready for use, except for the baud rate + * @return 0, or -ve on error + */ +int ns16550_serial_probe(struct udevice *dev); + +/** + * struct ns16550_serial_ops - ns16550 serial operations + * + * These should be used by the client driver for the driver's 'ops' member + */ +extern const struct dm_serial_ops ns16550_serial_ops; diff --git a/include/pci.h b/include/pci.h index 461f17c..2ff7365 100644 --- a/include/pci.h +++ b/include/pci.h @@ -659,6 +659,13 @@ extern int pci_hose_find_cap_start(struct pci_controller *hose, pci_dev_t dev, extern int pci_find_cap(struct pci_controller *hose, pci_dev_t dev, int pos, int cap); +#ifdef CONFIG_PCI_FIXUP_DEV +extern void board_pci_fixup_dev(struct pci_controller *hose, pci_dev_t dev, + unsigned short vendor, + unsigned short device, + unsigned short class); +#endif + const char * pci_class_str(u8 class); int pci_last_busno(void); diff --git a/include/samsung/misc.h b/include/samsung/misc.h index 10653a1..607e8d4 100644 --- a/include/samsung/misc.h +++ b/include/samsung/misc.h @@ -28,4 +28,14 @@ void check_boot_mode(void); void draw_logo(void); #endif +#ifdef CONFIG_SET_DFU_ALT_INFO +char *get_dfu_alt_system(void); +char *get_dfu_alt_boot(void); +void set_dfu_alt_info(void); +#endif +#ifdef CONFIG_BOARD_TYPES +void set_board_type(void); +const char *get_board_type(void); +#endif + #endif /* __SAMSUNG_MISC_COMMON_H__ */ diff --git a/include/sata.h b/include/sata.h index c95dc56..38f4b4a 100644 --- a/include/sata.h +++ b/include/sata.h @@ -9,6 +9,7 @@ ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer); int sata_initialize(void); int __sata_initialize(void); +int sata_port_status(int dev, int port); extern block_dev_desc_t sata_dev_desc[]; diff --git a/include/serial.h b/include/serial.h index d232d47..8f574e4 100644 --- a/include/serial.h +++ b/include/serial.h @@ -72,4 +72,96 @@ extern int write_port(struct stdio_dev *port, char *buf); extern int read_port(struct stdio_dev *port, char *buf, int size); #endif +struct udevice; + +/** + * struct struct dm_serial_ops - Driver model serial operations + * + * The uclass interface is implemented by all serial devices which use + * driver model. + */ +struct dm_serial_ops { + /** + * setbrg() - Set up the baud rate generator + * + * Adjust baud rate divisors to set up a new baud rate for this + * device. Not all devices will support all rates. If the rate + * cannot be supported, the driver is free to select the nearest + * available rate. or return -EINVAL if this is not possible. + * + * @dev: Device pointer + * @baudrate: New baud rate to use + * @return 0 if OK, -ve on error + */ + int (*setbrg)(struct udevice *dev, int baudrate); + /** + * getc() - Read a character and return it + * + * If no character is available, this should return -EAGAIN without + * waiting. + * + * @dev: Device pointer + * @return character (0..255), -ve on error + */ + int (*getc)(struct udevice *dev); + /** + * putc() - Write a character + * + * @dev: Device pointer + * @ch: character to write + * @return 0 if OK, -ve on error + */ + int (*putc)(struct udevice *dev, const char ch); + /** + * pending() - Check if input/output characters are waiting + * + * This can be used to return an indication of the number of waiting + * characters if the driver knows this (e.g. by looking at the FIFO + * level). It is acceptable to return 1 if an indeterminant number + * of characters is waiting. + * + * This method is optional. + * + * @dev: Device pointer + * @input: true to check input characters, false for output + * @return number of waiting characters, 0 for none, -ve on error + */ + int (*pending)(struct udevice *dev, bool input); + /** + * clear() - Clear the serial FIFOs/holding registers + * + * This method is optional. + * + * This quickly clears any input/output characters from the UART. + * If this is not possible, but characters still exist, then it + * is acceptable to return -EAGAIN (try again) or -EINVAL (not + * supported). + * + * @dev: Device pointer + * @return 0 if OK, -ve on error + */ + int (*clear)(struct udevice *dev); +#if CONFIG_POST & CONFIG_SYS_POST_UART + /** + * loop() - Control serial device loopback mode + * + * @dev: Device pointer + * @on: 1 to turn loopback on, 0 to turn if off + */ + int (*loop)(struct udevice *dev, int on); +#endif +}; + +/** + * struct serial_dev_priv - information about a device used by the uclass + * + * @sdev: stdio device attached to this uart + */ +struct serial_dev_priv { + struct stdio_dev *sdev; +}; + +/* Access the serial operations for a device */ +#define serial_get_ops(dev) ((struct dm_serial_ops *)(dev)->driver->ops) + #endif diff --git a/include/sparse_defs.h b/include/sparse_defs.h new file mode 100644 index 0000000..d0612c9 --- /dev/null +++ b/include/sparse_defs.h @@ -0,0 +1,7 @@ +/* + * Copyright 2014 Broadcom Corporation. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include diff --git a/include/spi.h b/include/spi.h index ffd6647..b673be2 100644 --- a/include/spi.h +++ b/include/spi.h @@ -30,24 +30,24 @@ #define SPI_XFER_MMAP 0x08 /* Memory Mapped start */ #define SPI_XFER_MMAP_END 0x10 /* Memory Mapped End */ #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) -#define SPI_XFER_U_PAGE (1 << 5) +#define SPI_XFER_U_PAGE (1 << 5) /* SPI TX operation modes */ -#define SPI_OPM_TX_QPP 1 << 0 +#define SPI_OPM_TX_QPP (1 << 0) /* SPI RX operation modes */ -#define SPI_OPM_RX_AS 1 << 0 -#define SPI_OPM_RX_DOUT 1 << 1 -#define SPI_OPM_RX_DIO 1 << 2 -#define SPI_OPM_RX_QOF 1 << 3 -#define SPI_OPM_RX_QIOF 1 << 4 -#define SPI_OPM_RX_EXTN SPI_OPM_RX_AS | SPI_OPM_RX_DOUT | \ +#define SPI_OPM_RX_AS (1 << 0) +#define SPI_OPM_RX_DOUT (1 << 1) +#define SPI_OPM_RX_DIO (1 << 2) +#define SPI_OPM_RX_QOF (1 << 3) +#define SPI_OPM_RX_QIOF (1 << 4) +#define SPI_OPM_RX_EXTN (SPI_OPM_RX_AS | SPI_OPM_RX_DOUT | \ SPI_OPM_RX_DIO | SPI_OPM_RX_QOF | \ - SPI_OPM_RX_QIOF + SPI_OPM_RX_QIOF) -/* SPI bus connection options */ -#define SPI_CONN_DUAL_SHARED 1 << 0 -#define SPI_CONN_DUAL_SEPARATED 1 << 1 +/* SPI bus connection options - see enum spi_dual_flash */ +#define SPI_CONN_DUAL_SHARED (1 << 0) +#define SPI_CONN_DUAL_SEPARATED (1 << 1) /* Header byte that marks the start of the message */ #define SPI_PREAMBLE_END_BYTE 0xec diff --git a/include/spi_flash.h b/include/spi_flash.h index 2db53c7..408a5b4 100644 --- a/include/spi_flash.h +++ b/include/spi_flash.h @@ -19,6 +19,19 @@ #include #include +#ifndef CONFIG_SF_DEFAULT_SPEED +# define CONFIG_SF_DEFAULT_SPEED 1000000 +#endif +#ifndef CONFIG_SF_DEFAULT_MODE +# define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 +#endif +#ifndef CONFIG_SF_DEFAULT_CS +# define CONFIG_SF_DEFAULT_CS 0 +#endif +#ifndef CONFIG_SF_DEFAULT_BUS +# define CONFIG_SF_DEFAULT_BUS 0 +#endif + /* sf param flags */ #define SECT_4K 1 << 1 #define SECT_32K 1 << 2 diff --git a/include/stdio_dev.h b/include/stdio_dev.h index a7d0825..268de8e 100644 --- a/include/stdio_dev.h +++ b/include/stdio_dev.h @@ -78,7 +78,29 @@ extern char *stdio_names[MAX_FILES]; */ int stdio_register (struct stdio_dev * dev); int stdio_register_dev(struct stdio_dev *dev, struct stdio_dev **devp); -int stdio_init (void); + +/** + * stdio_init_tables() - set up stdio tables ready for devices + * + * This does not add any devices, but just prepares stdio for use. + */ +int stdio_init_tables(void); + +/** + * stdio_add_devices() - Add stdio devices to the table + * + * This makes calls to all the various subsystems that use stdio, to make + * them register with stdio. + */ +int stdio_add_devices(void); + +/** + * stdio_init() - Sets up stdio ready for use + * + * This calls stdio_init_tables() and stdio_add_devices() + */ +int stdio_init(void); + void stdio_print_current_devices(void); #ifdef CONFIG_SYS_STDIO_DEREGISTER int stdio_deregister(const char *devname); diff --git a/include/systemace.h b/include/systemace.h index 73affc4..3f342d5 100644 --- a/include/systemace.h +++ b/include/systemace.h @@ -6,7 +6,6 @@ * * SPDX-License-Identifier: GPL-2.0+ */ -#ident "$Id:$" #ifdef CONFIG_SYSTEMACE diff --git a/include/tsec.h b/include/tsec.h index 1046426..58cdc19 100644 --- a/include/tsec.h +++ b/include/tsec.h @@ -20,10 +20,14 @@ #include #include #include -#include +#ifdef CONFIG_LS102XA +#define TSEC_SIZE 0x40000 +#define TSEC_MDIO_OFFSET 0x40000 +#else #define TSEC_SIZE 0x01000 #define TSEC_MDIO_OFFSET 0x01000 +#endif #define CONFIG_SYS_MDIO_BASE_ADDR (MDIO_BASE_ADDR + 0x520) @@ -125,9 +129,14 @@ #define MINFLR_INIT_SETTINGS 0x00000040 +#ifdef CONFIG_LS102XA +#define DMACTRL_INIT_SETTINGS 0x00000003 +#else #define DMACTRL_INIT_SETTINGS 0x000000c3 +#endif #define DMACTRL_GRS 0x00000010 #define DMACTRL_GTS 0x00000008 +#define DMACTRL_LE 0x00008000 #define TSTAT_CLEAR_THALT 0x80000000 #define RSTAT_CLEAR_RHALT 0x00800000 diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h index dd77ad6..433b362 100644 --- a/include/usb/ehci-fsl.h +++ b/include/usb/ehci-fsl.h @@ -279,5 +279,6 @@ struct usb_ehci { /* Board-specific initialization */ int board_ehci_hcd_init(int port); +int board_ehci_power(int port, int on); #endif /* _EHCI_FSL_H */ diff --git a/lib/Kconfig b/lib/Kconfig new file mode 100644 index 0000000..88e5da7 --- /dev/null +++ b/lib/Kconfig @@ -0,0 +1,11 @@ +menu "Library routines" + +config CC_OPTIMIZE_LIBS_FOR_SPEED + bool "Optimize libraries for speed" + help + Enabling this option will pass "-O2" to gcc when compiling + under "lib" directory. + + If unsure, say N. + +endmenu diff --git a/lib/fdtdec.c b/lib/fdtdec.c index eb5aa20..06d4542 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -70,6 +70,8 @@ static const char * const compat_names[COMPAT_COUNT] = { COMPAT(SANDBOX_LCD_SDL, "sandbox,lcd-sdl"), COMPAT(TI_TPS65090, "ti,tps65090"), COMPAT(COMPAT_NXP_PTN3460, "nxp,ptn3460"), + COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"), + COMPAT(PARADE_PS8625, "parade,ps8625"), }; const char *fdtdec_get_compatible(enum fdt_compat_id id) @@ -380,6 +382,21 @@ int fdtdec_get_alias_node(const void *blob, const char *name) return fdt_path_offset(blob, prop); } +int fdtdec_get_chosen_node(const void *blob, const char *name) +{ + const char *prop; + int chosen_node; + int len; + + if (!blob) + return -FDT_ERR_NOTFOUND; + chosen_node = fdt_path_offset(blob, "/chosen"); + prop = fdt_getprop(blob, chosen_node, name, &len); + if (!prop) + return -FDT_ERR_NOTFOUND; + return fdt_path_offset(blob, prop); +} + int fdtdec_check_fdt(void) { /* diff --git a/lib/gunzip.c b/lib/gunzip.c index 35abfb3..ec0e25d 100644 --- a/lib/gunzip.c +++ b/lib/gunzip.c @@ -11,7 +11,10 @@ #include #include #include +#include +#define HEADER0 '\x1f' +#define HEADER1 '\x8b' #define ZALLOC_ALIGNMENT 16 #define HEAD_CRC 2 #define EXTRA_FIELD 4 @@ -66,6 +69,196 @@ int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp) return zunzip(dst, dstlen, src, lenp, 1, i); } +__weak +void gzwrite_progress_init(u64 expectedsize) +{ + putc('\n'); +} + +__weak +void gzwrite_progress(int iteration, + u64 bytes_written, + u64 total_bytes) +{ + if (0 == (iteration & 3)) + printf("%llu/%llu\r", bytes_written, total_bytes); +} + +__weak +void gzwrite_progress_finish(int returnval, + u64 bytes_written, + u64 total_bytes, + u32 expected_crc, + u32 calculated_crc) +{ + if (0 == returnval) { + printf("\n\t%llu bytes, crc 0x%08x\n", + total_bytes, calculated_crc); + } else { + printf("\n\tuncompressed %llu of %llu\n" + "\tcrcs == 0x%08x/0x%08x\n", + bytes_written, total_bytes, + expected_crc, calculated_crc); + } +} + +int gzwrite(unsigned char *src, int len, + struct block_dev_desc *dev, + unsigned long szwritebuf, + u64 startoffs, + u64 szexpected) +{ + int i, flags; + z_stream s; + int r = 0; + unsigned char *writebuf; + unsigned crc = 0; + u64 totalfilled = 0; + lbaint_t blksperbuf, outblock; + u32 expected_crc; + u32 payload_size; + int iteration = 0; + + if (!szwritebuf || + (szwritebuf % dev->blksz) || + (szwritebuf < dev->blksz)) { + printf("%s: size %lu not a multiple of %lu\n", + __func__, szwritebuf, dev->blksz); + return -1; + } + + if (startoffs & (dev->blksz-1)) { + printf("%s: start offset %llu not a multiple of %lu\n", + __func__, startoffs, dev->blksz); + return -1; + } + + blksperbuf = szwritebuf / dev->blksz; + outblock = lldiv(startoffs, dev->blksz); + + /* skip header */ + i = 10; + flags = src[3]; + if (src[2] != DEFLATED || (flags & RESERVED) != 0) { + puts("Error: Bad gzipped data\n"); + return -1; + } + if ((flags & EXTRA_FIELD) != 0) + i = 12 + src[10] + (src[11] << 8); + if ((flags & ORIG_NAME) != 0) + while (src[i++] != 0) + ; + if ((flags & COMMENT) != 0) + while (src[i++] != 0) + ; + if ((flags & HEAD_CRC) != 0) + i += 2; + + if (i >= len-8) { + puts("Error: gunzip out of data in header"); + return -1; + } + + payload_size = len - i - 8; + + memcpy(&expected_crc, src + len - 8, sizeof(expected_crc)); + expected_crc = le32_to_cpu(expected_crc); + u32 szuncompressed; + memcpy(&szuncompressed, src + len - 4, sizeof(szuncompressed)); + if (szexpected == 0) { + szexpected = le32_to_cpu(szuncompressed); + } else if (szuncompressed != (u32)szexpected) { + printf("size of %llx doesn't match trailer low bits %x\n", + szexpected, szuncompressed); + return -1; + } + if (lldiv(szexpected, dev->blksz) > (dev->lba - outblock)) { + printf("%s: uncompressed size %llu exceeds device size\n", + __func__, szexpected); + return -1; + } + + gzwrite_progress_init(szexpected); + + s.zalloc = gzalloc; + s.zfree = gzfree; + + r = inflateInit2(&s, -MAX_WBITS); + if (r != Z_OK) { + printf("Error: inflateInit2() returned %d\n", r); + return -1; + } + + s.next_in = src + i; + s.avail_in = payload_size+8; + writebuf = (unsigned char *)malloc(szwritebuf); + + /* decompress until deflate stream ends or end of file */ + do { + if (s.avail_in == 0) { + printf("%s: weird termination with result %d\n", + __func__, r); + break; + } + + /* run inflate() on input until output buffer not full */ + do { + unsigned long blocks_written; + int numfilled; + lbaint_t writeblocks; + + s.avail_out = szwritebuf; + s.next_out = writebuf; + r = inflate(&s, Z_SYNC_FLUSH); + if ((r != Z_OK) && + (r != Z_STREAM_END)) { + printf("Error: inflate() returned %d\n", r); + goto out; + } + numfilled = szwritebuf - s.avail_out; + crc = crc32(crc, writebuf, numfilled); + totalfilled += numfilled; + if (numfilled < szwritebuf) { + writeblocks = (numfilled+dev->blksz-1) + / dev->blksz; + memset(writebuf+numfilled, 0, + dev->blksz-(numfilled%dev->blksz)); + } else { + writeblocks = blksperbuf; + } + + gzwrite_progress(iteration++, + totalfilled, + szexpected); + blocks_written = dev->block_write(dev->dev, + outblock, + writeblocks, + writebuf); + outblock += blocks_written; + if (ctrlc()) { + puts("abort\n"); + goto out; + } + WATCHDOG_RESET(); + } while (s.avail_out == 0); + /* done when inflate() says it's done */ + } while (r != Z_STREAM_END); + + if ((szexpected != totalfilled) || + (crc != expected_crc)) + r = -1; + else + r = 0; + +out: + gzwrite_progress_finish(r, totalfilled, szexpected, + expected_crc, crc); + free(writebuf); + inflateEnd(&s); + + return r; +} + /* * Uncompress blocks compressed with zlib without headers */ @@ -80,7 +273,7 @@ int zunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp, r = inflateInit2(&s, -MAX_WBITS); if (r != Z_OK) { - printf ("Error: inflateInit2() returned %d\n", r); + printf("Error: inflateInit2() returned %d\n", r); return -1; } s.next_in = src + offset; diff --git a/lib/list_sort.c b/lib/list_sort.c index 81de0a1..e841da5 100644 --- a/lib/list_sort.c +++ b/lib/list_sort.c @@ -1,4 +1,3 @@ -#define __UBOOT__ #ifndef __UBOOT__ #include #include diff --git a/lib/rbtree.c b/lib/rbtree.c index 9e52f70..5de3bf4 100644 --- a/lib/rbtree.c +++ b/lib/rbtree.c @@ -9,7 +9,6 @@ linux/lib/rbtree.c */ -#define __UBOOT__ #include #ifndef __UBOOT__ #include diff --git a/make_boundary b/make_boundary new file mode 100755 index 0000000..5d2373d --- /dev/null +++ b/make_boundary @@ -0,0 +1,23 @@ +savedir=../u-boot-images +mkdir -p $savedir +rm $savedir/* +boards=`grep DEFCONFIG configs/*| sed 's.configs/..' | sed 's/_defconfig.*$//'` ; +numboards=0; +numsuccess=0; +numfailures=0; +for board in $boards ; do + make distclean ; make ${board}_defconfig + make all + if [ $? -ne 0 ]; then + numfailures=`expr $numfailures + 1`; + echo -e "\n\n\n!!!!!!!! build failure for $board !!!!!!!!!!!!\n\n"; + read line; + else + cp -fv u-boot.imx $savedir/u-boot.${board}; + ls -l $savedir/u-boot.${board}; + numsuccess=`expr $numsuccess + 1`; + fi + numboards=`expr $numboards + 1`; +done +make distclean ; +echo -e "\n\n\nbuilt for ${numboards} boards. ${numsuccess} succeeded and ${numfailures} failed"; diff --git a/makeem b/makeem new file mode 100644 index 0000000..cd66c9e --- /dev/null +++ b/makeem @@ -0,0 +1,26 @@ +mkdir -p save +boards=`find board/boundary/ -name MAINTAINERS | xargs grep _defconfig | awk '{print $2}' | sed 's.configs/..' | sed 's._defconfig\$..'` ; +numboards=0; +numsuccess=0; +numfailures=0; +for board in $boards ; do + make mrproper ; make ${board}_defconfig + make all C=1 -j4 + if [ $? -ne 0 ]; then + numfailures=`expr $numfailures + 1`; + echo -e "\n\n\n!!!!!!!! build failure for $board !!!!!!!!!!!!\n\n"; + read line; + else + if [ "x${board}" == "xa" ] ; then + board=amp; # *.a gets clobbered in make mrproper + elif [ "x${board}" == "xs" ] ; then + board=son; # *.s gets clobbered in make mrproper + fi + cp -fv u-boot.imx save/u-boot.${board}; + ls -l save/u-boot.${board}; + numsuccess=`expr $numsuccess + 1`; + fi + numboards=`expr $numboards + 1`; +done +make mrproper ; +echo -e "\n\n\nbuilt for ${numboards} boards. ${numsuccess} succeeded and ${numfailures} failed"; diff --git a/net/Kconfig b/net/Kconfig new file mode 100644 index 0000000..22b9eaa --- /dev/null +++ b/net/Kconfig @@ -0,0 +1,10 @@ +# +# Network configuration +# + +menuconfig NET + bool "Networking support" + +if NET + +endif # if NET diff --git a/net/dns.c b/net/dns.c index ff9ddff..dd45320 100644 --- a/net/dns.c +++ b/net/dns.c @@ -202,5 +202,8 @@ DnsStart(void) NetSetTimeout(DNS_TIMEOUT, DnsTimeout); net_set_udp_handler(DnsHandler); + /* Clear a previous MAC address, the server IP might have changed. */ + memset(NetServerEther, 0, sizeof(NetServerEther)); + DnsSend(); } diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include index c664e39..4c33359 100644 --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include @@ -113,12 +113,12 @@ as-instr = $(call try-run,\ # Usage: cflags-y += $(call cc-option,-march=winchip-c6,-march=i586) cc-option = $(call try-run,\ - $(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",$(1),$(2)) + $(CC) -Werror $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",$(1),$(2)) # cc-option-yn # Usage: flag := $(call cc-option-yn,-march=winchip-c6) cc-option-yn = $(call try-run,\ - $(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",y,n) + $(CC) -Werror $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(1) -c -x c /dev/null -o "$$TMP",y,n) # cc-option-align # Prefix align with either -falign or -malign diff --git a/scripts/Makefile.autoconf b/scripts/Makefile.autoconf index 44c3997..ced2b9a 100644 --- a/scripts/Makefile.autoconf +++ b/scripts/Makefile.autoconf @@ -74,7 +74,6 @@ define filechk_config_h | sed '/=/ {s/=/ /;q; } ; { s/$$/ 1/; }'; \ done; \ echo \#define CONFIG_BOARDDIR board/$(if $(VENDOR),$(VENDOR)/)$(BOARD);\ - echo \#include \; \ echo \#include \; \ echo \#include \; \ echo \#include \; \ diff --git a/scripts/Makefile.clean b/scripts/Makefile.clean index d6dcd47..88f14e2 100644 --- a/scripts/Makefile.clean +++ b/scripts/Makefile.clean @@ -45,8 +45,8 @@ subdir-ymn := $(foreach f, $(subdir-ymn), \ # build a list of files to remove, usually relative to the current # directory -__clean-files := $(extra-y) $(always) \ - $(targets) $(clean-files) \ +__clean-files := $(extra-y) $(extra-m) $(extra-) \ + $(always) $(targets) $(clean-files) \ $(host-progs) \ $(hostprogs-y) $(hostprogs-m) $(hostprogs-) diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl index 3fed5e4..74db2e2 100755 --- a/scripts/checkpatch.pl +++ b/scripts/checkpatch.pl @@ -2148,7 +2148,7 @@ sub process { "please, no space before tabs\n" . $herevet) && $fix) { while ($fixed[$linenr - 1] =~ - s/(^\+.*) {8,8}+\t/$1\t\t/) {} + s/(^\+.*) {8,8}\t/$1\t\t/) {} while ($fixed[$linenr - 1] =~ s/(^\+.*) +\t/$1\t/) {} } diff --git a/scripts/multiconfig.sh b/scripts/multiconfig.sh index 4190798..4a8737f 100644 --- a/scripts/multiconfig.sh +++ b/scripts/multiconfig.sh @@ -118,6 +118,13 @@ do_board_defconfig () { defconfig_path=$srctree/configs/$1 tmp_defconfig_path=configs/.tmp_defconfig + if [ ! -r $defconfig_path ]; then + echo >&2 "***" + echo >&2 "*** Can't find default configuration \"confis/$1\"!" + echo >&2 "***" + exit 1 + fi + mkdir -p arch configs # defconfig for Normal: # pick lines without prefixes and lines starting '+' prefix @@ -170,7 +177,7 @@ do_savedefconfig () { # backslashes as an escape character while read -r line do - output_lines="$output_lines $line" + output_lines="$output_lines%$line" done < defconfig for img in $subimages @@ -185,42 +192,93 @@ do_savedefconfig () { tmp= match= + # "# CONFIG_FOO is not set" should not be divided. + # Use "%" as a separator, instead of a whitespace. + # "%" is unlikely to appear in defconfig context. + save_IFS=$IFS + IFS=% # coalesce common lines together for i in $output_lines do case "$i" in - "[+A-Z]*:$line") - tmp="$tmp $unmatched" + [+A-Z]*:$line) + tmp="$tmp%$unmatched" i=$(echo "$i" | \ - sed -e "s/^\([^:]\)*/\1$symbol/") - tmp="$tmp $i" + sed -e "s/^\([^:]*\)/\1$symbol/") + tmp="$tmp%$i" match=1 ;; - "$line") - tmp="$tmp $unmatched" - tmp="$tmp +$symbol:$i" + $line) + tmp="$tmp%$unmatched" + tmp="$tmp%+$symbol:$i" match=1 ;; *) - tmp="$tmp $i" + tmp="$tmp%$i" ;; esac done + # Restore the default separator for the outer for loop. + IFS=$save_IFS + if [ "$match" ]; then output_lines="$tmp" unmatched= else - unmatched="$unmatched $symbol:$line" + unmatched="$unmatched%$symbol:$line" fi done < defconfig done rm -f defconfig + touch defconfig + + save_IFS=$IFS + IFS=% + for line in $output_lines do - echo $line >> defconfig + case "$line" in + "") + # do not output blank lines + ;; + *) + echo $line >> defconfig + ;; + esac done + + IFS=$save_IFS +} + +# Some sanity checks before running "make /", +# where should be either "spl" or "tpl". +# Doing "make spl/menuconfig" etc. on a non-SPL board makes no sense. +# It should be allowed only when ".config" exists and "CONFIG_SPL" is enabled. +# +# Usage: +# check_enabled_sumbimage / +check_enabled_subimage () { + + case $2 in + spl|tpl) ;; + *) + echo >&2 "***" + echo >&2 "*** \"make $1\" is not supported." + echo >&2 "***" + exit 1 + ;; + esac + test -r "$KCONFIG_CONFIG" && get_enabled_subimages | grep -q $2 || { + config=CONFIG_$(echo $2 | tr '[a-z]' '[A-Z]') + + echo >&2 "***" + echo >&2 "*** Create \"$KCONFIG_CONFIG\" with \"$config\" enabled" + echo >&2 "*** before \"make $1\"." + echo >&2 "***" + exit 1 + } } # Usage: @@ -236,6 +294,7 @@ do_others () { objdir= else objdir=${1%/*} + check_enabled_subimage $1 $objdir fi run_make_config $target $objdir diff --git a/test/cmd_repeat.sh b/test/cmd_repeat.sh new file mode 100755 index 0000000..990e799 --- /dev/null +++ b/test/cmd_repeat.sh @@ -0,0 +1,29 @@ +#!/bin/sh + +# Test for U-Boot cli including command repeat + +BASE="$(dirname $0)" +. $BASE/common.sh + +run_test() { + ./${OUTPUT_DIR}/u-boot <${tmp} +check_results ${tmp} +rm ${tmp} +echo "Test passed" diff --git a/test/common.sh b/test/common.sh new file mode 100644 index 0000000..702d1ed --- /dev/null +++ b/test/common.sh @@ -0,0 +1,20 @@ +#!/bin/sh + +OUTPUT_DIR=sandbox + +fail() { + echo "Test failed: $1" + if [ -n ${tmp} ]; then + rm ${tmp} + fi + exit 1 +} + +build_uboot() { + echo "Build sandbox" + OPTS="O=${OUTPUT_DIR} $1" + NUM_CPUS=$(grep -c processor /proc/cpuinfo) + echo ${OPTS} + make ${OPTS} sandbox_config + make ${OPTS} -s -j${NUM_CPUS} +} diff --git a/test/trace/test-trace.sh b/test/trace/test-trace.sh index aa02f09..3e8651e 100755 --- a/test/trace/test-trace.sh +++ b/test/trace/test-trace.sh @@ -5,39 +5,25 @@ # Simple test script for tracing with sandbox -OUTPUT_DIR=sandbox TRACE_OPT="FTRACE=1" -fail() { - echo "Test failed: $1" - if [ -n ${tmp} ]; then - rm ${tmp} - fi - exit 1 -} - -build_uboot() { - echo "Build sandbox" - OPTS="O=${OUTPUT_DIR} ${TRACE_OPT}" - NUM_CPUS=$(grep -c processor /proc/cpuinfo) - make ${OPTS} sandbox_config - make ${OPTS} -s -j${NUM_CPUS} -} +BASE="$(dirname $0)/.." +. $BASE/common.sh run_trace() { echo "Run trace" ./${OUTPUT_DIR}/u-boot <${tmp} check_results ${tmp} rm ${tmp} diff --git a/tools/buildman/README b/tools/buildman/README index d4e8404..8ba19ec 100644 --- a/tools/buildman/README +++ b/tools/buildman/README @@ -114,6 +114,13 @@ the '&' operator to limit the selection: * 'freescale & arm sandbox' All Freescale boards with ARM architecture, plus sandbox +You can also use -x to specifically exclude some boards. For example: + + buildmand arm -x nvidia,freescale,.*ball$ + +means to build all arm boards except nvidia, freescale and anything ending +with 'ball'. + It is convenient to use the -n option to see whaat will be built based on the subset given. @@ -435,7 +442,11 @@ is fixed, but there is a new one at line 126. This is probably only because we added some code and moved the broken line father down the file. If many boards have the same error, then -e will display the error only -once. This makes the output as concise as possible. +once. This makes the output as concise as possible. To see which boards have +each error, use -l. + +Buildman tries to distinguish warnings from errors, and shows warning lines +separately with a 'w' prefix. The full build output in this case is available in: @@ -670,7 +681,9 @@ snapper9g45=${at91-boards} BUILD_TAG=443 This will use 'make ENABLE_AT91_TEST=1 BUILD_TAG=442' for snapper9260 and 'make ENABLE_AT91_TEST=1 BUILD_TAG=443' for snapper9g45. A special variable ${target} is available to access the target name (snapper9260 and -snapper9g20 in this case). Variables are resolved recursively. +snapper9g20 in this case). Variables are resolved recursively. Note that +variables can only contain the characters A-Z, a-z, 0-9, hyphen (-) and +underscore (_). It is expected that any variables added are dealt with in U-Boot's config.mk file and documented in the README. @@ -690,6 +703,12 @@ Other options Buildman has various other command line options. Try --help to see them. +When doing builds, Buildman's return code will reflect the overall result: + + 0 (success) No errors or warnings found + 128 Errors found + 129 Warnings found + How to change from MAKEALL ========================== @@ -730,10 +749,10 @@ followed by (afterwards, or perhaps concurrently in another terminal): to see the results of the build. Rather than showing you all the output, buildman just shows a summary, with red indicating that a commit introduced an error and green indicating that a commit fixed an error. Use the -e -flag to see the full errors. +flag to see the full errors and -l to see which boards caused which errors. If you really want to see build results as they happen, use -v when doing a -build (and -e if you want to see errors as well). +build (-e will be enabled automatically). You don't need to stick around on that branch while buildman is running. It checks out its own copy of the source code, so you can change branches, diff --git a/tools/buildman/board.py b/tools/buildman/board.py index a333287..5d536d5 100644 --- a/tools/buildman/board.py +++ b/tools/buildman/board.py @@ -239,13 +239,14 @@ class Boards: terms.append(term) return terms - def SelectBoards(self, args): + def SelectBoards(self, args, exclude=[]): """Mark boards selected based on args Args: - List of strings specifying boards to include, either named, or - by their target, architecture, cpu, vendor or soc. If empty, all - boards are selected. + args: List of strings specifying boards to include, either named, + or by their target, architecture, cpu, vendor or soc. If + empty, all boards are selected. + exclude: List of boards to exclude, regardless of 'args' Returns: Dictionary which holds the number of boards which were selected @@ -258,17 +259,33 @@ class Boards: for term in terms: result[str(term)] = 0 + exclude_list = [] + for expr in exclude: + exclude_list.append(Expr(expr)) + for board in self._boards: + matching_term = None + build_it = False if terms: match = False for term in terms: if term.Matches(board.props): - board.build_it = True - result[str(term)] += 1 - result['all'] += 1 + matching_term = str(term) + build_it = True break else: + build_it = True + + # Check that it is not specifically excluded + for expr in exclude_list: + if expr.Matches(board.props): + build_it = False + break + + if build_it: board.build_it = True + if matching_term: + result[matching_term] += 1 result['all'] += 1 return result diff --git a/tools/buildman/bsettings.py b/tools/buildman/bsettings.py index 9164798..fdd875b 100644 --- a/tools/buildman/bsettings.py +++ b/tools/buildman/bsettings.py @@ -5,6 +5,7 @@ import ConfigParser import os +import StringIO def Setup(fname=''): @@ -17,11 +18,15 @@ def Setup(fname=''): global config_fname settings = ConfigParser.SafeConfigParser() - config_fname = fname - if config_fname == '': - config_fname = '%s/.buildman' % os.getenv('HOME') - if config_fname: - settings.read(config_fname) + if fname is not None: + config_fname = fname + if config_fname == '': + config_fname = '%s/.buildman' % os.getenv('HOME') + if config_fname: + settings.read(config_fname) + +def AddFile(data): + settings.readfp(StringIO.StringIO(data)) def GetItems(section): """Get the items from a section of the config. diff --git a/tools/buildman/builder.py b/tools/buildman/builder.py index a555bd8..8155c16 100644 --- a/tools/buildman/builder.py +++ b/tools/buildman/builder.py @@ -20,6 +20,7 @@ import builderthread import command import gitutil import terminal +from terminal import Print import toolchain @@ -140,6 +141,7 @@ class Builder: Private members: _base_board_dict: Last-summarised Dict of boards _base_err_lines: Last-summarised list of errors + _base_warn_lines: Last-summarised list of warnings _build_period_us: Time taken for a single build (float object). _complete_delay: Expected delay until completion (timedelta) _next_delay_update: Next time we plan to display a progress update @@ -214,6 +216,11 @@ class Builder: self.col = terminal.Color() + self._re_function = re.compile('(.*): In function.*') + self._re_files = re.compile('In file included from.*') + self._re_warning = re.compile('(.*):(\d*):(\d*): warning: .*') + self._re_note = re.compile('(.*):(\d*):(\d*): note: this is the location of the previous.*') + self.queue = Queue.Queue() self.out_queue = Queue.Queue() for i in range(self.num_threads): @@ -237,18 +244,21 @@ class Builder: del t def SetDisplayOptions(self, show_errors=False, show_sizes=False, - show_detail=False, show_bloat=False): + show_detail=False, show_bloat=False, + list_error_boards=False): """Setup display options for the builder. show_errors: True to show summarised error/warning info show_sizes: Show size deltas show_detail: Show detail for each board show_bloat: Show detail for each function + list_error_boards: Show the boards which caused each error/warning """ self._show_errors = show_errors self._show_sizes = show_sizes self._show_detail = show_detail self._show_bloat = show_bloat + self._list_error_boards = list_error_boards def _AddTimestamp(self): """Add a new timestamp to the list and record the build period. @@ -290,8 +300,8 @@ class Builder: length: Length of new line, in characters """ if length < self.last_line_len: - print ' ' * (self.last_line_len - length), - print '\r', + Print(' ' * (self.last_line_len - length), newline=False) + Print('\r', newline=False) self.last_line_len = length sys.stdout.flush() @@ -342,7 +352,7 @@ class Builder: if result.already_done: self.already_done += 1 if self._verbose: - print '\r', + Print('\r', newline=False) self.ClearLine(0) boards_selected = {target : result.brd} self.ResetResultSummary(boards_selected) @@ -370,7 +380,7 @@ class Builder: self.commit_count) name += target - print line + name, + Print(line + name, newline=False) length = 14 + len(name) self.ClearLine(length) @@ -486,7 +496,7 @@ class Builder: try: size, type, name = line[:-1].split() except: - print "Invalid line in file '%s': '%s'" % (fname, line[:-1]) + Print("Invalid line in file '%s': '%s'" % (fname, line[:-1])) continue if type in 'tTdDbB': # function names begin with '.' on 64-bit powerpc @@ -569,19 +579,57 @@ class Builder: Tuple: Dict containing boards which passed building this commit. keyed by board.target - List containing a summary of error/warning lines + List containing a summary of error lines + Dict keyed by error line, containing a list of the Board + objects with that error + List containing a summary of warning lines + Dict keyed by error line, containing a list of the Board + objects with that warning """ + def AddLine(lines_summary, lines_boards, line, board): + line = line.rstrip() + if line in lines_boards: + lines_boards[line].append(board) + else: + lines_boards[line] = [board] + lines_summary.append(line) + board_dict = {} err_lines_summary = [] + err_lines_boards = {} + warn_lines_summary = [] + warn_lines_boards = {} for board in boards_selected.itervalues(): outcome = self.GetBuildOutcome(commit_upto, board.target, read_func_sizes) board_dict[board.target] = outcome - for err in outcome.err_lines: - if err and not err.rstrip() in err_lines_summary: - err_lines_summary.append(err.rstrip()) - return board_dict, err_lines_summary + last_func = None + last_was_warning = False + for line in outcome.err_lines: + if line: + if (self._re_function.match(line) or + self._re_files.match(line)): + last_func = line + else: + is_warning = self._re_warning.match(line) + is_note = self._re_note.match(line) + if is_warning or (last_was_warning and is_note): + if last_func: + AddLine(warn_lines_summary, warn_lines_boards, + last_func, board) + AddLine(warn_lines_summary, warn_lines_boards, + line, board) + else: + if last_func: + AddLine(err_lines_summary, err_lines_boards, + last_func, board) + AddLine(err_lines_summary, err_lines_boards, + line, board) + last_was_warning = is_warning + last_func = None + return (board_dict, err_lines_summary, err_lines_boards, + warn_lines_summary, warn_lines_boards) def AddOutcome(self, board_dict, arch_list, changes, char, color): """Add an output to our list of outcomes for each architecture @@ -636,6 +684,9 @@ class Builder: for board in board_selected: self._base_board_dict[board] = Builder.Outcome(0, [], [], {}) self._base_err_lines = [] + self._base_warn_lines = [] + self._base_err_line_boards = {} + self._base_warn_line_boards = {} def PrintFuncSizeDetail(self, fname, old, new): grow, shrink, add, remove, up, down = 0, 0, 0, 0, 0, 0 @@ -673,16 +724,16 @@ class Builder: return args = [self.ColourNum(x) for x in args] indent = ' ' * 15 - print ('%s%s: add: %s/%s, grow: %s/%s bytes: %s/%s (%s)' % - tuple([indent, self.col.Color(self.col.YELLOW, fname)] + args)) - print '%s %-38s %7s %7s %+7s' % (indent, 'function', 'old', 'new', - 'delta') + Print('%s%s: add: %s/%s, grow: %s/%s bytes: %s/%s (%s)' % + tuple([indent, self.col.Color(self.col.YELLOW, fname)] + args)) + Print('%s %-38s %7s %7s %+7s' % (indent, 'function', 'old', 'new', + 'delta')) for diff, name in delta: if diff: color = self.col.RED if diff > 0 else self.col.GREEN msg = '%s %-38s %7s %7s %+7d' % (indent, name, old.get(name, '-'), new.get(name,'-'), diff) - print self.col.Color(color, msg) + Print(msg, colour=color) def PrintSizeDetail(self, target_list, show_bloat): @@ -707,11 +758,12 @@ class Builder: color = self.col.RED if diff > 0 else self.col.GREEN msg = ' %s %+d' % (name, diff) if not printed_target: - print '%10s %-15s:' % ('', result['_target']), + Print('%10s %-15s:' % ('', result['_target']), + newline=False) printed_target = True - print self.col.Color(color, msg), + Print(msg, colour=color, newline=False) if printed_target: - print + Print() if show_bloat: target = result['_target'] outcome = result['_outcome'] @@ -816,18 +868,19 @@ class Builder: color = self.col.RED if avg_diff > 0 else self.col.GREEN msg = ' %s %+1.1f' % (name, avg_diff) if not printed_arch: - print '%10s: (for %d/%d boards)' % (arch, count, - arch_count[arch]), + Print('%10s: (for %d/%d boards)' % (arch, count, + arch_count[arch]), newline=False) printed_arch = True - print self.col.Color(color, msg), + Print(msg, colour=color, newline=False) if printed_arch: - print + Print() if show_detail: self.PrintSizeDetail(target_list, show_bloat) def PrintResultSummary(self, board_selected, board_dict, err_lines, + err_line_boards, warn_lines, warn_line_boards, show_sizes, show_detail, show_bloat): """Compare results with the base results and display delta. @@ -843,10 +896,48 @@ class Builder: commit, keyed by board.target. The value is an Outcome object. err_lines: A list of errors for this commit, or [] if there is none, or we don't want to print errors + err_line_boards: Dict keyed by error line, containing a list of + the Board objects with that error + warn_lines: A list of warnings for this commit, or [] if there is + none, or we don't want to print errors + warn_line_boards: Dict keyed by warning line, containing a list of + the Board objects with that warning show_sizes: Show image size deltas show_detail: Show detail for each board show_bloat: Show detail for each function """ + def _BoardList(line, line_boards): + """Helper function to get a line of boards containing a line + + Args: + line: Error line to search for + Return: + String containing a list of boards with that error line, or + '' if the user has not requested such a list + """ + if self._list_error_boards: + names = [] + for board in line_boards[line]: + names.append(board.target) + names_str = '(%s) ' % ','.join(names) + else: + names_str = '' + return names_str + + def _CalcErrorDelta(base_lines, base_line_boards, lines, line_boards, + char): + better_lines = [] + worse_lines = [] + for line in lines: + if line not in base_lines: + worse_lines.append(char + '+' + + _BoardList(line, line_boards) + line) + for line in base_lines: + if line not in lines: + better_lines.append(char + '-' + + _BoardList(line, base_line_boards) + line) + return better_lines, worse_lines + better = [] # List of boards fixed since last commit worse = [] # List of new broken boards since last commit new = [] # List of boards that didn't exist last time @@ -870,17 +961,14 @@ class Builder: new.append(target) # Get a list of errors that have appeared, and disappeared - better_err = [] - worse_err = [] - for line in err_lines: - if line not in self._base_err_lines: - worse_err.append('+' + line) - for line in self._base_err_lines: - if line not in err_lines: - better_err.append('-' + line) + better_err, worse_err = _CalcErrorDelta(self._base_err_lines, + self._base_err_line_boards, err_lines, err_line_boards, '') + better_warn, worse_warn = _CalcErrorDelta(self._base_warn_lines, + self._base_warn_line_boards, warn_lines, warn_line_boards, 'w') # Display results by arch - if better or worse or unknown or new or worse_err or better_err: + if (better or worse or unknown or new or worse_err or better_err + or worse_warn or better_warn): arch_list = {} self.AddOutcome(board_selected, arch_list, better, '', self.col.GREEN) @@ -891,13 +979,19 @@ class Builder: self.AddOutcome(board_selected, arch_list, unknown, '?', self.col.MAGENTA) for arch, target_list in arch_list.iteritems(): - print '%10s: %s' % (arch, target_list) + Print('%10s: %s' % (arch, target_list)) self._error_lines += 1 if better_err: - print self.col.Color(self.col.GREEN, '\n'.join(better_err)) + Print('\n'.join(better_err), colour=self.col.GREEN) self._error_lines += 1 if worse_err: - print self.col.Color(self.col.RED, '\n'.join(worse_err)) + Print('\n'.join(worse_err), colour=self.col.RED) + self._error_lines += 1 + if better_warn: + Print('\n'.join(better_warn), colour=self.col.CYAN) + self._error_lines += 1 + if worse_warn: + Print('\n'.join(worse_warn), colour=self.col.MAGENTA) self._error_lines += 1 if show_sizes: @@ -907,6 +1001,9 @@ class Builder: # Save our updated information for the next call to this function self._base_board_dict = board_dict self._base_err_lines = err_lines + self._base_warn_lines = warn_lines + self._base_err_line_boards = err_line_boards + self._base_warn_line_boards = warn_line_boards # Get a list of boards that did not get built, if needed not_built = [] @@ -914,18 +1011,21 @@ class Builder: if not board in board_dict: not_built.append(board) if not_built: - print "Boards not built (%d): %s" % (len(not_built), - ', '.join(not_built)) + Print("Boards not built (%d): %s" % (len(not_built), + ', '.join(not_built))) def ProduceResultSummary(self, commit_upto, commits, board_selected): - board_dict, err_lines = self.GetResultSummary(board_selected, - commit_upto, read_func_sizes=self._show_bloat) + (board_dict, err_lines, err_line_boards, warn_lines, + warn_line_boards) = self.GetResultSummary( + board_selected, commit_upto, + read_func_sizes=self._show_bloat) if commits: msg = '%02d: %s' % (commit_upto + 1, commits[commit_upto].subject) - print self.col.Color(self.col.BLUE, msg) + Print(msg, colour=self.col.BLUE) self.PrintResultSummary(board_selected, board_dict, - err_lines if self._show_errors else [], + err_lines if self._show_errors else [], err_line_boards, + warn_lines if self._show_errors else [], warn_line_boards, self._show_sizes, self._show_detail, self._show_bloat) def ShowSummary(self, commits, board_selected): @@ -946,7 +1046,7 @@ class Builder: for commit_upto in range(0, self.commit_count, self._step): self.ProduceResultSummary(commit_upto, commits, board_selected) if not self._error_lines: - print self.col.Color(self.col.GREEN, '(no errors to report)') + Print('(no errors to report)', colour=self.col.GREEN) def SetupBuild(self, board_selected, commits): @@ -991,7 +1091,7 @@ class Builder: if os.path.exists(git_dir): gitutil.Fetch(git_dir, thread_dir) else: - print 'Cloning repo for thread %d' % thread_num + Print('Cloning repo for thread %d' % thread_num) gitutil.Clone(src_dir, thread_dir) def _PrepareWorkingSpace(self, max_threads, setup_git): @@ -1031,13 +1131,17 @@ class Builder: value is Board object keep_outputs: True to save build output files verbose: Display build results as they are completed + Returns: + Tuple containing: + - number of boards that failed to build + - number of boards that issued warnings """ self.commit_count = len(commits) if commits else 1 self.commits = commits self._verbose = verbose self.ResetResultSummary(board_selected) - builderthread.Mkdir(self.base_dir) + builderthread.Mkdir(self.base_dir, parents = True) self._PrepareWorkingSpace(min(self.num_threads, len(board_selected)), commits is not None) self._PrepareOutputSpace() @@ -1058,5 +1162,6 @@ class Builder: # Wait until we have processed all output self.out_queue.join() - print + Print() self.ClearLine(0) + return (self.fail, self.warned) diff --git a/tools/buildman/builderthread.py b/tools/buildman/builderthread.py index 8214662..a9cf68a 100644 --- a/tools/buildman/builderthread.py +++ b/tools/buildman/builderthread.py @@ -12,14 +12,17 @@ import threading import command import gitutil -def Mkdir(dirname): +def Mkdir(dirname, parents = False): """Make a directory if it doesn't already exist. Args: dirname: Directory to create """ try: - os.mkdir(dirname) + if parents: + os.makedirs(dirname) + else: + os.mkdir(dirname) except OSError as err: if err.errno == errno.EEXIST: pass @@ -138,16 +141,17 @@ class BuilderThread(threading.Thread): result.already_done = os.path.exists(done_file) will_build = (force_build or force_build_failures or not result.already_done) - if result.already_done and will_build: + if result.already_done: # Get the return code from that build and use it with open(done_file, 'r') as fd: result.return_code = int(fd.readline()) - err_file = self.builder.GetErrFile(commit_upto, brd.target) - if os.path.exists(err_file) and os.stat(err_file).st_size: - result.stderr = 'bad' - elif not force_build: - # The build passed, so no need to build it again - will_build = False + if will_build: + err_file = self.builder.GetErrFile(commit_upto, brd.target) + if os.path.exists(err_file) and os.stat(err_file).st_size: + result.stderr = 'bad' + elif not force_build: + # The build passed, so no need to build it again + will_build = False if will_build: # We are going to have to build it. First, get a toolchain @@ -177,6 +181,7 @@ class BuilderThread(threading.Thread): Mkdir(out_dir) args = [] cwd = work_dir + src_dir = os.path.realpath(work_dir) if not self.builder.in_tree: if commit_upto is None: # In this case we are building in the original source @@ -189,6 +194,7 @@ class BuilderThread(threading.Thread): work_dir = os.path.realpath(work_dir) args.append('O=%s/build' % work_dir) cwd = None + src_dir = os.getcwd() else: args.append('O=build') args.append('-s') @@ -209,7 +215,7 @@ class BuilderThread(threading.Thread): if result.return_code == 0: result = self.Make(commit, brd, 'build', cwd, *args, env=env) - result.stdout = config_out + result.stdout + result.stderr = result.stderr.replace(src_dir + '/', '') else: result.return_code = 1 result.stderr = 'No tool chain for %s\n' % brd.arch diff --git a/tools/buildman/buildman.py b/tools/buildman/buildman.py index e18859b..d0afeda 100755 --- a/tools/buildman/buildman.py +++ b/tools/buildman/buildman.py @@ -8,7 +8,6 @@ """See README for more information""" import multiprocessing -from optparse import OptionParser import os import re import sys @@ -20,9 +19,10 @@ sys.path.append(os.path.join(our_path, '../patman')) # Our modules import board +import bsettings import builder import checkpatch -import command +import cmdline import control import doctest import gitutil @@ -31,27 +31,20 @@ import terminal import toolchain def RunTests(): + import func_test import test import doctest result = unittest.TestResult() - for module in ['toolchain']: + for module in ['toolchain', 'gitutil']: suite = doctest.DocTestSuite(module) suite.run(result) - # TODO: Surely we can just 'print' result? - print result - for test, err in result.errors: - print err - for test, err in result.failures: - print err - sys.argv = [sys.argv[0]] - suite = unittest.TestLoader().loadTestsFromTestCase(test.TestBuild) - result = unittest.TestResult() - suite.run(result) + for module in (test.TestBuild, func_test.TestFunctional): + suite = unittest.TestLoader().loadTestsFromTestCase(module) + suite.run(result) - # TODO: Surely we can just 'print' result? print result for test, err in result.errors: print err @@ -59,81 +52,14 @@ def RunTests(): print err -parser = OptionParser() -parser.add_option('-b', '--branch', type='string', - help='Branch name to build') -parser.add_option('-B', '--bloat', dest='show_bloat', - action='store_true', default=False, - help='Show changes in function code size for each board') -parser.add_option('-c', '--count', dest='count', type='int', - default=-1, help='Run build on the top n commits') -parser.add_option('-C', '--force-reconfig', dest='force_reconfig', - action='store_true', default=False, - help='Reconfigure for every commit (disable incremental build)') -parser.add_option('-d', '--detail', dest='show_detail', - action='store_true', default=False, - help='Show detailed information for each board in summary') -parser.add_option('-e', '--show_errors', action='store_true', - default=False, help='Show errors and warnings') -parser.add_option('-f', '--force-build', dest='force_build', - action='store_true', default=False, - help='Force build of boards even if already built') -parser.add_option('-F', '--force-build-failures', dest='force_build_failures', - action='store_true', default=False, - help='Force build of previously-failed build') -parser.add_option('-g', '--git', type='string', - help='Git repo containing branch to build', default='.') -parser.add_option('-G', '--config-file', type='string', - help='Path to buildman config file', default='') -parser.add_option('-H', '--full-help', action='store_true', dest='full_help', - default=False, help='Display the README file') -parser.add_option('-i', '--in-tree', dest='in_tree', - action='store_true', default=False, - help='Build in the source tree instead of a separate directory') -parser.add_option('-j', '--jobs', dest='jobs', type='int', - default=None, help='Number of jobs to run at once (passed to make)') -parser.add_option('-k', '--keep-outputs', action='store_true', - default=False, help='Keep all build output files (e.g. binaries)') -parser.add_option('--list-tool-chains', action='store_true', default=False, - help='List available tool chains') -parser.add_option('-n', '--dry-run', action='store_true', dest='dry_run', - default=False, help="Do a try run (describe actions, but no nothing)") -parser.add_option('-o', '--output-dir', type='string', - dest='output_dir', default='..', - help='Directory where all builds happen and buildman has its workspace (default is ../)') -parser.add_option('-Q', '--quick', action='store_true', - default=False, help='Do a rough build, with limited warning resolution') -parser.add_option('-s', '--summary', action='store_true', - default=False, help='Show a build summary') -parser.add_option('-S', '--show-sizes', action='store_true', - default=False, help='Show image size variation in summary') -parser.add_option('--step', type='int', - default=1, help='Only build every n commits (0=just first and last)') -parser.add_option('-t', '--test', action='store_true', dest='test', - default=False, help='run tests') -parser.add_option('-T', '--threads', type='int', - default=None, help='Number of builder threads to use') -parser.add_option('-u', '--show_unknown', action='store_true', - default=False, help='Show boards with unknown build result') -parser.add_option('-v', '--verbose', action='store_true', - default=False, help='Show build results while the build progresses') - -parser.usage += """ - -Build U-Boot for all commits in a branch. Use -n to do a dry run""" - -(options, args) = parser.parse_args() +options, args = cmdline.ParseArgs() # Run our meagre tests if options.test: RunTests() -elif options.full_help: - pager = os.getenv('PAGER') - if not pager: - pager = 'more' - fname = os.path.join(os.path.dirname(sys.argv[0]), 'README') - command.Run(pager, fname) # Build selected commits for selected boards else: - control.DoBuildman(options, args) + bsettings.Setup(options.config_file) + ret_code = control.DoBuildman(options, args) + sys.exit(ret_code) diff --git a/tools/buildman/cmdline.py b/tools/buildman/cmdline.py new file mode 100644 index 0000000..27d3c70 --- /dev/null +++ b/tools/buildman/cmdline.py @@ -0,0 +1,85 @@ +# +# Copyright (c) 2014 Google, Inc +# +# SPDX-License-Identifier: GPL-2.0+ +# + +from optparse import OptionParser + +def ParseArgs(): + """Parse command line arguments from sys.argv[] + + Returns: + tuple containing: + options: command line options + args: command lin arguments + """ + parser = OptionParser() + parser.add_option('-b', '--branch', type='string', + help='Branch name to build') + parser.add_option('-B', '--bloat', dest='show_bloat', + action='store_true', default=False, + help='Show changes in function code size for each board') + parser.add_option('-c', '--count', dest='count', type='int', + default=-1, help='Run build on the top n commits') + parser.add_option('-C', '--force-reconfig', dest='force_reconfig', + action='store_true', default=False, + help='Reconfigure for every commit (disable incremental build)') + parser.add_option('-d', '--detail', dest='show_detail', + action='store_true', default=False, + help='Show detailed information for each board in summary') + parser.add_option('-e', '--show_errors', action='store_true', + default=False, help='Show errors and warnings') + parser.add_option('-f', '--force-build', dest='force_build', + action='store_true', default=False, + help='Force build of boards even if already built') + parser.add_option('-F', '--force-build-failures', dest='force_build_failures', + action='store_true', default=False, + help='Force build of previously-failed build') + parser.add_option('-g', '--git', type='string', + help='Git repo containing branch to build', default='.') + parser.add_option('-G', '--config-file', type='string', + help='Path to buildman config file', default='') + parser.add_option('-H', '--full-help', action='store_true', dest='full_help', + default=False, help='Display the README file') + parser.add_option('-i', '--in-tree', dest='in_tree', + action='store_true', default=False, + help='Build in the source tree instead of a separate directory') + parser.add_option('-j', '--jobs', dest='jobs', type='int', + default=None, help='Number of jobs to run at once (passed to make)') + parser.add_option('-k', '--keep-outputs', action='store_true', + default=False, help='Keep all build output files (e.g. binaries)') + parser.add_option('-l', '--list-error-boards', action='store_true', + default=False, help='Show a list of boards next to each error/warning') + parser.add_option('--list-tool-chains', action='store_true', default=False, + help='List available tool chains') + parser.add_option('-n', '--dry-run', action='store_true', dest='dry_run', + default=False, help="Do a dry run (describe actions, but do nothing)") + parser.add_option('-o', '--output-dir', type='string', + dest='output_dir', default='..', + help='Directory where all builds happen and buildman has its workspace (default is ../)') + parser.add_option('-Q', '--quick', action='store_true', + default=False, help='Do a rough build, with limited warning resolution') + parser.add_option('-s', '--summary', action='store_true', + default=False, help='Show a build summary') + parser.add_option('-S', '--show-sizes', action='store_true', + default=False, help='Show image size variation in summary') + parser.add_option('--step', type='int', + default=1, help='Only build every n commits (0=just first and last)') + parser.add_option('-t', '--test', action='store_true', dest='test', + default=False, help='run tests') + parser.add_option('-T', '--threads', type='int', + default=None, help='Number of builder threads to use') + parser.add_option('-u', '--show_unknown', action='store_true', + default=False, help='Show boards with unknown build result') + parser.add_option('-v', '--verbose', action='store_true', + default=False, help='Show build results while the build progresses') + parser.add_option('-x', '--exclude', dest='exclude', + type='string', action='append', + help='Specify a list of boards to exclude, separated by comma') + + parser.usage += """ + + Build U-Boot for all commits in a branch. Use -n to do a dry run""" + + return parser.parse_args() diff --git a/tools/buildman/control.py b/tools/buildman/control.py index 68ea961..8b8c826 100644 --- a/tools/buildman/control.py +++ b/tools/buildman/control.py @@ -5,6 +5,7 @@ import multiprocessing import os +import shutil import sys import board @@ -13,6 +14,7 @@ from builder import Builder import gitutil import patchstream import terminal +from terminal import Print import toolchain import command import subprocess @@ -77,24 +79,44 @@ def ShowActions(series, why_selected, boards_selected, builder, options): print ('Total boards to build for each commit: %d\n' % why_selected['all']) -def DoBuildman(options, args): +def DoBuildman(options, args, toolchains=None, make_func=None, boards=None, + clean_dir=False): """The main control code for buildman Args: options: Command line options object args: Command line arguments (list of strings) + toolchains: Toolchains to use - this should be a Toolchains() + object. If None, then it will be created and scanned + make_func: Make function to use for the builder. This is called + to execute 'make'. If this is None, the normal function + will be used, which calls the 'make' tool with suitable + arguments. This setting is useful for tests. + board: Boards() object to use, containing a list of available + boards. If this is None it will be created and scanned. """ + global builder + + if options.full_help: + pager = os.getenv('PAGER') + if not pager: + pager = 'more' + fname = os.path.join(os.path.dirname(sys.argv[0]), 'README') + command.Run(pager, fname) + return 0 + gitutil.Setup() - bsettings.Setup(options.config_file) options.git_dir = os.path.join(options.git, '.git') - toolchains = toolchain.Toolchains() - toolchains.Scan(options.list_tool_chains) + if not toolchains: + toolchains = toolchain.Toolchains() + toolchains.GetSettings() + toolchains.Scan(options.list_tool_chains) if options.list_tool_chains: toolchains.List() print - return + return 0 # Work out how many commits to build. We want to build everything on the # branch. We also build the upstream commit as a control so we can see @@ -119,15 +141,22 @@ def DoBuildman(options, args): sys.exit(col.Color(col.RED, str)) # Work out what subset of the boards we are building - board_file = os.path.join(options.git, 'boards.cfg') - status = subprocess.call([os.path.join(options.git, - 'tools/genboardscfg.py')]) - if status != 0: - sys.exit("Failed to generate boards.cfg") - - boards = board.Boards() - boards.ReadBoards(os.path.join(options.git, 'boards.cfg')) - why_selected = boards.SelectBoards(args) + if not boards: + board_file = os.path.join(options.git, 'boards.cfg') + status = subprocess.call([os.path.join(options.git, + 'tools/genboardscfg.py')]) + if status != 0: + sys.exit("Failed to generate boards.cfg") + + boards = board.Boards() + boards.ReadBoards(os.path.join(options.git, 'boards.cfg')) + + exclude = [] + if options.exclude: + for arg in options.exclude: + exclude += arg.split(',') + + why_selected = boards.SelectBoards(args, exclude) selected = boards.GetSelected() if not len(selected): sys.exit(col.Color(col.RED, 'No matching boards found')) @@ -137,6 +166,10 @@ def DoBuildman(options, args): # upstream/master~..branch but that isn't possible if upstream/master is # a merge commit (it will list all the commits that form part of the # merge) + # Conflicting tags are not a problem for buildman, since it does not use + # them. For example, Series-version is not useful for buildman. On the + # other hand conflicting tags will cause an error. So allow later tags + # to overwrite earlier ones by setting allow_overwrite=True if options.branch: if count == -1: range_expr = gitutil.GetRangeInBranch(options.git_dir, @@ -144,19 +177,14 @@ def DoBuildman(options, args): upstream_commit = gitutil.GetUpstream(options.git_dir, options.branch) series = patchstream.GetMetaDataForList(upstream_commit, - options.git_dir, 1) + options.git_dir, 1, series=None, allow_overwrite=True) - # Conflicting tags are not a problem for buildman, since it does - # not use them. For example, Series-version is not useful for - # buildman. On the other hand conflicting tags will cause an - # error. So allow later tags to overwrite earlier ones. - series.allow_overwrite = True series = patchstream.GetMetaDataForList(range_expr, - options.git_dir, None, series) + options.git_dir, None, series, allow_overwrite=True) else: # Honour the count series = patchstream.GetMetaDataForList(options.branch, - options.git_dir, count) + options.git_dir, count, series=None, allow_overwrite=True) else: series = None options.verbose = True @@ -180,14 +208,18 @@ def DoBuildman(options, args): # Create a new builder with the selected options if options.branch: - dirname = options.branch + dirname = options.branch.replace('/', '_') else: dirname = 'current' output_dir = os.path.join(options.output_dir, dirname) + if clean_dir and os.path.exists(output_dir): + shutil.rmtree(output_dir) builder = Builder(toolchains, output_dir, options.git_dir, options.threads, options.jobs, gnu_make=gnu_make, checkout=True, show_unknown=options.show_unknown, step=options.step) builder.force_config_on_failure = not options.quick + if make_func: + builder.do_make = make_func # For a dry run, just show our actions as a sanity check if options.dry_run: @@ -203,19 +235,28 @@ def DoBuildman(options, args): if series: commits = series.commits + # Number the commits for test purposes + for commit in range(len(commits)): + commits[commit].sequence = commit else: commits = None - print GetActionSummary(options.summary, commits, board_selected, - options) + Print(GetActionSummary(options.summary, commits, board_selected, + options)) + # We can't show function sizes without board details at present + if options.show_bloat: + options.show_detail = True builder.SetDisplayOptions(options.show_errors, options.show_sizes, - options.show_detail, options.show_bloat) + options.show_detail, options.show_bloat, + options.list_error_boards) if options.summary: - # We can't show function sizes without board details at present - if options.show_bloat: - options.show_detail = True builder.ShowSummary(commits, board_selected) else: - builder.BuildBoards(commits, board_selected, + fail, warned = builder.BuildBoards(commits, board_selected, options.keep_outputs, options.verbose) + if fail: + return 128 + elif warned: + return 129 + return 0 diff --git a/tools/buildman/func_test.py b/tools/buildman/func_test.py new file mode 100644 index 0000000..75eb3a9 --- /dev/null +++ b/tools/buildman/func_test.py @@ -0,0 +1,519 @@ +# +# Copyright (c) 2014 Google, Inc +# +# SPDX-License-Identifier: GPL-2.0+ +# + +import os +import shutil +import sys +import tempfile +import unittest + +import board +import bsettings +import cmdline +import command +import control +import gitutil +import terminal +import toolchain + +settings_data = ''' +# Buildman settings file + +[toolchain] + +[toolchain-alias] + +[make-flags] +src=/home/sjg/c/src +chroot=/home/sjg/c/chroot +vboot=USE_STDINT=1 VBOOT_DEBUG=1 MAKEFLAGS_VBOOT=DEBUG=1 CFLAGS_EXTRA_VBOOT=-DUNROLL_LOOPS VBOOT_SOURCE=${src}/platform/vboot_reference +chromeos_coreboot=VBOOT=${chroot}/build/link/usr ${vboot} +chromeos_daisy=VBOOT=${chroot}/build/daisy/usr ${vboot} +chromeos_peach=VBOOT=${chroot}/build/peach_pit/usr ${vboot} +''' + +boards = [ + ['Active', 'arm', 'armv7', '', 'Tester', 'ARM Board 1', 'board0', ''], + ['Active', 'arm', 'armv7', '', 'Tester', 'ARM Board 2', 'board1', ''], + ['Active', 'powerpc', 'powerpc', '', 'Tester', 'PowerPC board 1', 'board2', ''], + ['Active', 'powerpc', 'mpc5xx', '', 'Tester', 'PowerPC board 2', 'board3', ''], + ['Active', 'sandbox', 'sandbox', '', 'Tester', 'Sandbox board', 'board4', ''], +] + +commit_shortlog = """4aca821 patman: Avoid changing the order of tags +39403bb patman: Use --no-pager' to stop git from forking a pager +db6e6f2 patman: Remove the -a option +f2ccf03 patman: Correct unit tests to run correctly +1d097f9 patman: Fix indentation in terminal.py +d073747 patman: Support the 'reverse' option for 'git log +""" + +commit_log = ["""commit 7f6b8315d18f683c5181d0c3694818c1b2a20dcd +Author: Masahiro Yamada +Date: Fri Aug 22 19:12:41 2014 +0900 + + buildman: refactor help message + + "buildman [options]" is displayed by default. + + Append the rest of help messages to parser.usage + instead of replacing it. + + Besides, "-b " is not mandatory since commit fea5858e. + Drop it from the usage. + + Signed-off-by: Masahiro Yamada +""", +"""commit d0737479be6baf4db5e2cdbee123e96bc5ed0ba8 +Author: Simon Glass +Date: Thu Aug 14 16:48:25 2014 -0600 + + patman: Support the 'reverse' option for 'git log' + + This option is currently not supported, but needs to be, for buildman to + operate as expected. + + Series-changes: 7 + - Add new patch to fix the 'reverse' bug + + Series-version: 8 + + Change-Id: I79078f792e8b390b8a1272a8023537821d45feda + Reported-by: York Sun + Signed-off-by: Simon Glass + +""", +"""commit 1d097f9ab487c5019152fd47bda126839f3bf9fc +Author: Simon Glass +Date: Sat Aug 9 11:44:32 2014 -0600 + + patman: Fix indentation in terminal.py + + This code came from a different project with 2-character indentation. Fix + it for U-Boot. + + Series-changes: 6 + - Add new patch to fix indentation in teminal.py + + Change-Id: I5a74d2ebbb3cc12a665f5c725064009ac96e8a34 + Signed-off-by: Simon Glass + +""", +"""commit f2ccf03869d1e152c836515a3ceb83cdfe04a105 +Author: Simon Glass +Date: Sat Aug 9 11:08:24 2014 -0600 + + patman: Correct unit tests to run correctly + + It seems that doctest behaves differently now, and some of the unit tests + do not run. Adjust the tests to work correctly. + + ./tools/patman/patman --test + + + Series-changes: 6 + - Add new patch to fix patman unit tests + + Change-Id: I3d2ca588f4933e1f9d6b1665a00e4ae58269ff3b + +""", +"""commit db6e6f2f9331c5a37647d6668768d4a40b8b0d1c +Author: Simon Glass +Date: Sat Aug 9 12:06:02 2014 -0600 + + patman: Remove the -a option + + It seems that this is no longer needed, since checkpatch.pl will catch + whitespace problems in patches. Also the option is not widely used, so + it seems safe to just remove it. + + Series-changes: 6 + - Add new patch to remove patman's -a option + + Suggested-by: Masahiro Yamada + Change-Id: I5821a1c75154e532c46513486ca40b808de7e2cc + +""", +"""commit 39403bb4f838153028a6f21ca30bf100f3791133 +Author: Simon Glass +Date: Thu Aug 14 21:50:52 2014 -0600 + + patman: Use --no-pager' to stop git from forking a pager + +""", +"""commit 4aca821e27e97925c039e69fd37375b09c6f129c +Author: Simon Glass +Date: Fri Aug 22 15:57:39 2014 -0600 + + patman: Avoid changing the order of tags + + patman collects tags that it sees in the commit and places them nicely + sorted at the end of the patch. However, this is not really necessary and + in fact is apparently not desirable. + + Series-changes: 9 + - Add new patch to avoid changing the order of tags + + Series-version: 9 + + Suggested-by: Masahiro Yamada + Change-Id: Ib1518588c1a189ad5c3198aae76f8654aed8d0db +"""] + +TEST_BRANCH = '__testbranch' + +class TestFunctional(unittest.TestCase): + """Functional test for buildman. + + This aims to test from just below the invocation of buildman (parsing + of arguments) to 'make' and 'git' invocation. It is not a true + emd-to-end test, as it mocks git, make and the tool chain. But this + makes it easier to detect when the builder is doing the wrong thing, + since in many cases this test code will fail. For example, only a + very limited subset of 'git' arguments is supported - anything + unexpected will fail. + """ + def setUp(self): + self._base_dir = tempfile.mkdtemp() + self._git_dir = os.path.join(self._base_dir, 'src') + self._buildman_pathname = sys.argv[0] + self._buildman_dir = os.path.dirname(sys.argv[0]) + command.test_result = self._HandleCommand + self.setupToolchains() + self._toolchains.Add('arm-gcc', test=False) + self._toolchains.Add('powerpc-gcc', test=False) + bsettings.Setup(None) + bsettings.AddFile(settings_data) + self._boards = board.Boards() + for brd in boards: + self._boards.AddBoard(board.Board(*brd)) + + # Directories where the source been cloned + self._clone_dirs = [] + self._commits = len(commit_shortlog.splitlines()) + 1 + self._total_builds = self._commits * len(boards) + + # Number of calls to make + self._make_calls = 0 + + # Map of [board, commit] to error messages + self._error = {} + + self._test_branch = TEST_BRANCH + + # Avoid sending any output and clear all terminal output + terminal.SetPrintTestMode() + terminal.GetPrintTestLines() + + def tearDown(self): + shutil.rmtree(self._base_dir) + + def setupToolchains(self): + self._toolchains = toolchain.Toolchains() + self._toolchains.Add('gcc', test=False) + + def _RunBuildman(self, *args): + return command.RunPipe([[self._buildman_pathname] + list(args)], + capture=True, capture_stderr=True) + + def _RunControl(self, *args, **kwargs): + sys.argv = [sys.argv[0]] + list(args) + options, args = cmdline.ParseArgs() + result = control.DoBuildman(options, args, toolchains=self._toolchains, + make_func=self._HandleMake, boards=self._boards, + clean_dir=kwargs.get('clean_dir', True)) + self._builder = control.builder + return result + + def testFullHelp(self): + command.test_result = None + result = self._RunBuildman('-H') + help_file = os.path.join(self._buildman_dir, 'README') + self.assertEqual(len(result.stdout), os.path.getsize(help_file)) + self.assertEqual(0, len(result.stderr)) + self.assertEqual(0, result.return_code) + + def testHelp(self): + command.test_result = None + result = self._RunBuildman('-h') + help_file = os.path.join(self._buildman_dir, 'README') + self.assertTrue(len(result.stdout) > 1000) + self.assertEqual(0, len(result.stderr)) + self.assertEqual(0, result.return_code) + + def testGitSetup(self): + """Test gitutils.Setup(), from outside the module itself""" + command.test_result = command.CommandResult(return_code=1) + gitutil.Setup() + self.assertEqual(gitutil.use_no_decorate, False) + + command.test_result = command.CommandResult(return_code=0) + gitutil.Setup() + self.assertEqual(gitutil.use_no_decorate, True) + + def _HandleCommandGitLog(self, args): + if '-n0' in args: + return command.CommandResult(return_code=0) + elif args[-1] == 'upstream/master..%s' % self._test_branch: + return command.CommandResult(return_code=0, stdout=commit_shortlog) + elif args[:3] == ['--no-color', '--no-decorate', '--reverse']: + if args[-1] == self._test_branch: + count = int(args[3][2:]) + return command.CommandResult(return_code=0, + stdout=''.join(commit_log[:count])) + + # Not handled, so abort + print 'git log', args + sys.exit(1) + + def _HandleCommandGitConfig(self, args): + config = args[0] + if config == 'sendemail.aliasesfile': + return command.CommandResult(return_code=0) + elif config.startswith('branch.badbranch'): + return command.CommandResult(return_code=1) + elif config == 'branch.%s.remote' % self._test_branch: + return command.CommandResult(return_code=0, stdout='upstream\n') + elif config == 'branch.%s.merge' % self._test_branch: + return command.CommandResult(return_code=0, + stdout='refs/heads/master\n') + + # Not handled, so abort + print 'git config', args + sys.exit(1) + + def _HandleCommandGit(self, in_args): + """Handle execution of a git command + + This uses a hacked-up parser. + + Args: + in_args: Arguments after 'git' from the command line + """ + git_args = [] # Top-level arguments to git itself + sub_cmd = None # Git sub-command selected + args = [] # Arguments to the git sub-command + for arg in in_args: + if sub_cmd: + args.append(arg) + elif arg[0] == '-': + git_args.append(arg) + else: + if git_args and git_args[-1] in ['--git-dir', '--work-tree']: + git_args.append(arg) + else: + sub_cmd = arg + if sub_cmd == 'config': + return self._HandleCommandGitConfig(args) + elif sub_cmd == 'log': + return self._HandleCommandGitLog(args) + elif sub_cmd == 'clone': + return command.CommandResult(return_code=0) + elif sub_cmd == 'checkout': + return command.CommandResult(return_code=0) + + # Not handled, so abort + print 'git', git_args, sub_cmd, args + sys.exit(1) + + def _HandleCommandNm(self, args): + return command.CommandResult(return_code=0) + + def _HandleCommandObjdump(self, args): + return command.CommandResult(return_code=0) + + def _HandleCommandSize(self, args): + return command.CommandResult(return_code=0) + + def _HandleCommand(self, **kwargs): + """Handle a command execution. + + The command is in kwargs['pipe-list'], as a list of pipes, each a + list of commands. The command should be emulated as required for + testing purposes. + + Returns: + A CommandResult object + """ + pipe_list = kwargs['pipe_list'] + wc = False + if len(pipe_list) != 1: + if pipe_list[1] == ['wc', '-l']: + wc = True + else: + print 'invalid pipe', kwargs + sys.exit(1) + cmd = pipe_list[0][0] + args = pipe_list[0][1:] + result = None + if cmd == 'git': + result = self._HandleCommandGit(args) + elif cmd == './scripts/show-gnu-make': + return command.CommandResult(return_code=0, stdout='make') + elif cmd.endswith('nm'): + return self._HandleCommandNm(args) + elif cmd.endswith('objdump'): + return self._HandleCommandObjdump(args) + elif cmd.endswith( 'size'): + return self._HandleCommandSize(args) + + if not result: + # Not handled, so abort + print 'unknown command', kwargs + sys.exit(1) + + if wc: + result.stdout = len(result.stdout.splitlines()) + return result + + def _HandleMake(self, commit, brd, stage, cwd, *args, **kwargs): + """Handle execution of 'make' + + Args: + commit: Commit object that is being built + brd: Board object that is being built + stage: Stage that we are at (mrproper, config, build) + cwd: Directory where make should be run + args: Arguments to pass to make + kwargs: Arguments to pass to command.RunPipe() + """ + self._make_calls += 1 + if stage == 'mrproper': + return command.CommandResult(return_code=0) + elif stage == 'config': + return command.CommandResult(return_code=0, + combined='Test configuration complete') + elif stage == 'build': + stderr = '' + if type(commit) is not str: + stderr = self._error.get((brd.target, commit.sequence)) + if stderr: + return command.CommandResult(return_code=1, stderr=stderr) + return command.CommandResult(return_code=0) + + # Not handled, so abort + print 'make', stage + sys.exit(1) + + # Example function to print output lines + def print_lines(self, lines): + print len(lines) + for line in lines: + print line + #self.print_lines(terminal.GetPrintTestLines()) + + def testNoBoards(self): + """Test that buildman aborts when there are no boards""" + self._boards = board.Boards() + with self.assertRaises(SystemExit): + self._RunControl() + + def testCurrentSource(self): + """Very simple test to invoke buildman on the current source""" + self.setupToolchains(); + self._RunControl() + lines = terminal.GetPrintTestLines() + self.assertIn('Building current source for %d boards' % len(boards), + lines[0].text) + + def testBadBranch(self): + """Test that we can detect an invalid branch""" + with self.assertRaises(ValueError): + self._RunControl('-b', 'badbranch') + + def testBadToolchain(self): + """Test that missing toolchains are detected""" + self.setupToolchains(); + ret_code = self._RunControl('-b', TEST_BRANCH) + lines = terminal.GetPrintTestLines() + + # Buildman always builds the upstream commit as well + self.assertIn('Building %d commits for %d boards' % + (self._commits, len(boards)), lines[0].text) + self.assertEqual(self._builder.count, self._total_builds) + + # Only sandbox should succeed, the others don't have toolchains + self.assertEqual(self._builder.fail, + self._total_builds - self._commits) + self.assertEqual(ret_code, 128) + + for commit in range(self._commits): + for board in self._boards.GetList(): + if board.arch != 'sandbox': + errfile = self._builder.GetErrFile(commit, board.target) + fd = open(errfile) + self.assertEqual(fd.readlines(), + ['No tool chain for %s\n' % board.arch]) + fd.close() + + def testBranch(self): + """Test building a branch with all toolchains present""" + self._RunControl('-b', TEST_BRANCH) + self.assertEqual(self._builder.count, self._total_builds) + self.assertEqual(self._builder.fail, 0) + + def testCount(self): + """Test building a specific number of commitst""" + self._RunControl('-b', TEST_BRANCH, '-c2') + self.assertEqual(self._builder.count, 2 * len(boards)) + self.assertEqual(self._builder.fail, 0) + # Each board has a mrproper, config, and then one make per commit + self.assertEqual(self._make_calls, len(boards) * (2 + 2)) + + def testIncremental(self): + """Test building a branch twice - the second time should do nothing""" + self._RunControl('-b', TEST_BRANCH) + + # Each board has a mrproper, config, and then one make per commit + self.assertEqual(self._make_calls, len(boards) * (self._commits + 2)) + self._make_calls = 0 + self._RunControl('-b', TEST_BRANCH, clean_dir=False) + self.assertEqual(self._make_calls, 0) + self.assertEqual(self._builder.count, self._total_builds) + self.assertEqual(self._builder.fail, 0) + + def testForceBuild(self): + """The -f flag should force a rebuild""" + self._RunControl('-b', TEST_BRANCH) + self._make_calls = 0 + self._RunControl('-b', TEST_BRANCH, '-f', clean_dir=False) + # Each board has a mrproper, config, and then one make per commit + self.assertEqual(self._make_calls, len(boards) * (self._commits + 2)) + + def testForceReconfigure(self): + """The -f flag should force a rebuild""" + self._RunControl('-b', TEST_BRANCH, '-C') + # Each commit has a mrproper, config and make + self.assertEqual(self._make_calls, len(boards) * self._commits * 3) + + def testErrors(self): + """Test handling of build errors""" + self._error['board2', 1] = 'fred\n' + self._RunControl('-b', TEST_BRANCH) + self.assertEqual(self._builder.count, self._total_builds) + self.assertEqual(self._builder.fail, 1) + + # Remove the error. This should have no effect since the commit will + # not be rebuilt + del self._error['board2', 1] + self._make_calls = 0 + self._RunControl('-b', TEST_BRANCH, clean_dir=False) + self.assertEqual(self._builder.count, self._total_builds) + self.assertEqual(self._make_calls, 0) + self.assertEqual(self._builder.fail, 1) + + # Now use the -F flag to force rebuild of the bad commit + self._RunControl('-b', TEST_BRANCH, '-F', clean_dir=False) + self.assertEqual(self._builder.count, self._total_builds) + self.assertEqual(self._builder.fail, 0) + self.assertEqual(self._make_calls, 3) + + def testBranchWithSlash(self): + """Test building a branch with a '/' in the name""" + self._test_branch = '/__dev/__testbranch' + self._RunControl('-b', self._test_branch, clean_dir=False) + self.assertEqual(self._builder.count, self._total_builds) + self.assertEqual(self._builder.fail, 0) diff --git a/tools/buildman/kconfiglib.py b/tools/buildman/kconfiglib.py new file mode 100644 index 0000000..655cf44 --- /dev/null +++ b/tools/buildman/kconfiglib.py @@ -0,0 +1,3799 @@ +# +# SPDX-License-Identifier: ISC +# +# Author: Ulf Magnusson +# https://github.com/ulfalizer/Kconfiglib + +# This is Kconfiglib, a Python library for scripting, debugging, and extracting +# information from Kconfig-based configuration systems. To view the +# documentation, run +# +# $ pydoc kconfiglib +# +# or, if you prefer HTML, +# +# $ pydoc -w kconfiglib +# +# The examples/ subdirectory contains examples, to be run with e.g. +# +# $ make scriptconfig SCRIPT=Kconfiglib/examples/print_tree.py +# +# Look in testsuite.py for the test suite. + +""" +Kconfiglib is a Python library for scripting and extracting information from +Kconfig-based configuration systems. Features include the following: + + - Symbol values and properties can be looked up and values assigned + programmatically. + - .config files can be read and written. + - Expressions can be evaluated in the context of a Kconfig configuration. + - Relations between symbols can be quickly determined, such as finding all + symbols that reference a particular symbol. + - Highly compatible with the scripts/kconfig/*conf utilities. The test suite + automatically compares outputs between Kconfiglib and the C implementation + for a large number of cases. + +For the Linux kernel, scripts are run using + + $ make scriptconfig SCRIPT= [SCRIPT_ARG=] + +Running scripts via the 'scriptconfig' target ensures that required environment +variables (SRCARCH, ARCH, srctree, KERNELVERSION, etc.) are set up correctly. +Alternative architectures can be specified like for other 'make *config' +targets: + + $ make scriptconfig ARCH=mips SCRIPT= [SCRIPT_ARG=] + +The script will receive the name of the Kconfig file to load in sys.argv[1]. +(As of Linux 3.7.0-rc8 this is always "Kconfig" from the kernel top-level +directory.) If an argument is provided with SCRIPT_ARG, it will appear in +sys.argv[2]. + +To get an interactive Python prompt with Kconfiglib preloaded and a Config +object 'c' created, use + + $ make iscriptconfig [ARCH=] + +Kconfiglib requires Python 2. For (i)scriptconfig the command to run the Python +interpreter can be passed in the environment variable PYTHONCMD (defaults to +'python'; PyPy works too and is a bit faster). + +Look in the examples/ subdirectory for examples, which can be run with e.g. + + $ make scriptconfig SCRIPT=Kconfiglib/examples/print_tree.py + +or + + $ make scriptconfig SCRIPT=Kconfiglib/examples/help_grep.py SCRIPT_ARG="kernel" + +Look in testsuite.py for the test suite. + +Credits: Written by Ulf "Ulfalizer" Magnusson + +Send bug reports, suggestions and other feedback to kconfiglib@gmail.com . +Don't wrestle with internal APIs. Tell me what you need and I might add it in a +safe way as a client API instead.""" + +# If you have Psyco installed (32-bit installations, Python <= 2.6 only), +# setting this to True (right here, not at runtime) might give a nice speedup. +# (22% faster for parsing arch/x86/Kconfig and 58% faster for evaluating all +# symbols in it without a .config on my Core Duo.) +use_psyco = False + +import os +import re +import string +import sys + +class Config(): + + """Represents a Kconfig configuration, e.g. for i386 or ARM. This is the + set of symbols and other items appearing in the configuration together with + their values. Creating any number of Config objects -- including for + different architectures -- is safe; Kconfiglib has no global state.""" + + # + # Public interface + # + + def __init__(self, + filename = "Kconfig", + base_dir = "$srctree", + print_warnings = True, + print_undef_assign = False): + """Creates a new Config object, representing a Kconfig configuration. + Raises Kconfig_Syntax_Error on syntax errors. + + filename (default: "Kconfig") -- The base Kconfig file of the + configuration. For the Linux kernel, this should usually be be + "Kconfig" from the top-level directory, as environment + variables will make sure the right Kconfig is included from + there (usually arch//Kconfig). If you are using + kconfiglib via 'make scriptconfig' the filename of the + correct Kconfig will be in sys.argv[1]. + + base_dir (default: "$srctree") -- The base directory relative to which + 'source' statements within Kconfig files will work. For the + Linux kernel this should be the top-level directory of the + kernel tree. $-references to environment variables will be + expanded. + + The environment variable 'srctree' is set by the Linux makefiles + to the top-level kernel directory. A default of "." would not + work if an alternative build directory is used. + + print_warnings (default: True) -- Set to True if warnings related to + this configuration should be printed to stderr. This can + be changed later with Config.set_print_warnings(). It is + provided as a constructor argument since warnings might + be generated during parsing. + + print_undef_assign (default: False) -- Set to True if informational + messages related to assignments to undefined symbols + should be printed to stderr for this configuration. + Can be changed later with + Config.set_print_undef_assign().""" + + # The set of all symbols, indexed by name (a string) + self.syms = {} + + # The set of all defined symbols in the configuration in the order they + # appear in the Kconfig files. This excludes the special symbols n, m, + # and y as well as symbols that are referenced but never defined. + self.kconfig_syms = [] + + # The set of all named choices (yes, choices can have names), indexed + # by name (a string) + self.named_choices = {} + + def register_special_symbol(type, name, value): + sym = Symbol() + sym.is_special_ = True + sym.is_defined_ = True + sym.config = self + sym.name = name + sym.type = type + sym.cached_value = value + self.syms[name] = sym + return sym + + # The special symbols n, m and y, used as shorthand for "n", "m" and + # "y" + self.n = register_special_symbol(TRISTATE, "n", "n") + self.m = register_special_symbol(TRISTATE, "m", "m") + self.y = register_special_symbol(TRISTATE, "y", "y") + + # DEFCONFIG_LIST uses this + register_special_symbol(STRING, "UNAME_RELEASE", os.uname()[2]) + + # The symbol with "option defconfig_list" set, containing a list of + # default .config files + self.defconfig_sym = None + + # See Symbol.get_(src)arch() + self.arch = os.environ.get("ARCH") + self.srcarch = os.environ.get("SRCARCH") + + # See Config.__init__(). We need this for get_defconfig_filename(). + self.srctree = os.environ.get("srctree") + if self.srctree is None: + self.srctree = "." + + self.filename = filename + self.base_dir = _strip_trailing_slash(os.path.expandvars(base_dir)) + + # The 'mainmenu' text + self.mainmenu_text = None + + # The filename of the most recently loaded .config file + self.config_filename = None + + # The textual header of the most recently loaded .config, uncommented + self.config_header = None + + self.print_warnings = print_warnings + self.print_undef_assign = print_undef_assign + + # Lists containing all choices, menus and comments in the configuration + + self.choices = [] + self.menus = [] + self.comments = [] + + # For parsing routines that stop when finding a line belonging to a + # different construct, these holds that line and the tokenized version + # of that line. The purpose is to avoid having to re-tokenize the line, + # which is inefficient and causes problems when recording references to + # symbols. + self.end_line = None + self.end_line_tokens = None + + # See the comment in _parse_expr(). + self.parse_expr_cur_sym_or_choice = None + self.parse_expr_line = None + self.parse_expr_filename = None + self.parse_expr_linenr = None + self.parse_expr_transform_m = None + + # Parse the Kconfig files + self.top_block = self._parse_file(filename, None, None, None) + + # Build Symbol.dep for all symbols + self._build_dep() + + def load_config(self, filename, replace = True): + """Loads symbol values from a file in the familiar .config format. + Equivalent to calling Symbol.set_user_value() to set each of the + values. + + filename -- The .config file to load. $-references to environment + variables will be expanded. For scripts to work even + when an alternative build directory is used with the + Linux kernel, you need to refer to the top-level kernel + directory with "$srctree". + + replace (default: True) -- True if the configuration should replace + the old configuration; False if it should add to it.""" + + def warn_override(filename, linenr, name, old_user_val, new_user_val): + self._warn("overriding the value of {0}. " + 'Old value: "{1}", new value: "{2}".' + .format(name, old_user_val, new_user_val), + filename, + linenr) + + filename = os.path.expandvars(filename) + + # Put this first so that a missing file doesn't screw up our state + line_feeder = _FileFeed(_get_lines(filename), filename) + + self.config_filename = filename + + # Invalidate everything. This is usually faster than finding the + # minimal set of symbols that needs to be invalidated, as nearly all + # symbols will tend to be affected anyway. + if replace: + self.unset_user_values() + else: + self._invalidate_all() + + # Read header + + self.config_header = None + + def is_header_line(line): + return line.startswith("#") and \ + not unset_re.match(line) + + first_line = line_feeder.get_next() + + if first_line is None: + return + + if not is_header_line(first_line): + line_feeder.go_back() + else: + self.config_header = first_line[1:] + + # Read remaining header lines + while 1: + line = line_feeder.get_next() + + if line is None: + break + + if not is_header_line(line): + line_feeder.go_back() + break + + self.config_header += line[1:] + + # Remove trailing newline + if self.config_header.endswith("\n"): + self.config_header = self.config_header[:-1] + + # Read assignments + + filename = line_feeder.get_filename() + + while 1: + line = line_feeder.get_next() + if line is None: + return + + linenr = line_feeder.get_linenr() + + line = line.strip() + + set_re_match = set_re.match(line) + if set_re_match: + name, val = set_re_match.groups() + # The unescaping producedure below should be safe since " can + # only appear as \" inside the string + val = _strip_quotes(val, line, filename, linenr)\ + .replace('\\"', '"').replace("\\\\", "\\") + if name in self.syms: + sym = self.syms[name] + + old_user_val = sym.user_val + if old_user_val is not None: + warn_override(filename, linenr, name, old_user_val, val) + + if sym.is_choice_symbol_: + user_mode = sym.parent.user_mode + if user_mode is not None and user_mode != val: + self._warn("assignment to {0} changes mode of containing " + 'choice from "{1}" to "{2}".' + .format(name, val, user_mode), + filename, + linenr) + + sym._set_user_value_no_invalidate(val, True) + + else: + self._undef_assign('attempt to assign the value "{0}" to the ' + "undefined symbol {1}." + .format(val, name), + filename, + linenr) + + else: + unset_re_match = unset_re.match(line) + if unset_re_match: + name = unset_re_match.group(1) + if name in self.syms: + sym = self.syms[name] + + old_user_val = sym.user_val + if old_user_val is not None: + warn_override(filename, linenr, name, old_user_val, "n") + + sym._set_user_value_no_invalidate("n", True) + + def write_config(self, filename, header = None): + """Writes out symbol values in the familiar .config format. + + filename -- The filename under which to save the configuration. + + header (default: None) -- A textual header that will appear at the + beginning of the file, with each line commented out + automatically. None means no header.""" + + # already_written is set when _make_conf() is called on a symbol, so + # that symbols defined in multiple locations only get one entry in the + # .config. We need to reset it prior to writing out a new .config. + for sym in self.syms.itervalues(): + sym.already_written = False + + with open(filename, "w") as f: + # Write header + if header is not None: + f.write(_comment(header)) + f.write("\n") + + # Write configuration. + # (You'd think passing a list around to all the nodes and appending + # to it to avoid copying would be faster, but it's actually a lot + # slower with PyPy, and about as fast with Python. Passing the file + # around is slower too.) + f.write("\n".join(self.top_block._make_conf())) + f.write("\n") + + def get_kconfig_filename(self): + """Returns the name of the (base) kconfig file this configuration was + loaded from.""" + return self.filename + + def get_arch(self): + """Returns the value the environment variable ARCH had at the time the + Config instance was created, or None if ARCH was not set. For the + kernel, this corresponds to the architecture being built for, with + values such as "i386" or "mips".""" + return self.arch + + def get_srcarch(self): + """Returns the value the environment variable SRCARCH had at the time + the Config instance was created, or None if SRCARCH was not set. For + the kernel, this corresponds to the arch/ subdirectory containing + architecture-specific source code.""" + return self.srcarch + + def get_srctree(self): + """Returns the value the environment variable srctree had at the time + the Config instance was created, or None if srctree was not defined. + This variable points to the source directory and is used when building + in a separate directory.""" + return self.srctree + + def get_config_filename(self): + """Returns the name of the most recently loaded configuration file, or + None if no configuration has been loaded.""" + return self.config_filename + + def get_mainmenu_text(self): + """Returns the text of the 'mainmenu' statement (with $-references to + symbols replaced by symbol values), or None if the configuration has no + 'mainmenu' statement.""" + return None if self.mainmenu_text is None else \ + self._expand_sym_refs(self.mainmenu_text) + + def get_defconfig_filename(self): + """Returns the name of the defconfig file, which is the first existing + file in the list given in a symbol having 'option defconfig_list' set. + $-references to symbols will be expanded ("$FOO bar" -> "foo bar" if + FOO has the value "foo"). Returns None in case of no defconfig file. + Setting 'option defconfig_list' on multiple symbols currently results + in undefined behavior. + + If the environment variable 'srctree' was set when the Config was + created, get_defconfig_filename() will first look relative to that + directory before looking in the current directory; see + Config.__init__().""" + + if self.defconfig_sym is None: + return None + + for (filename, cond_expr) in self.defconfig_sym.def_exprs: + if self._eval_expr(cond_expr) == "y": + filename = self._expand_sym_refs(filename) + + # We first look in $srctree. os.path.join() won't work here as + # an absolute path in filename would override $srctree. + srctree_filename = os.path.normpath(self.srctree + "/" + filename) + if os.path.exists(srctree_filename): + return srctree_filename + + if os.path.exists(filename): + return filename + + return None + + def get_symbol(self, name): + """Returns the symbol with name 'name', or None if no such symbol + appears in the configuration. An alternative shorthand is conf[name], + where conf is a Config instance, though that will instead raise + KeyError if the symbol does not exist.""" + return self.syms.get(name) + + def get_top_level_items(self): + """Returns a list containing the items (symbols, menus, choice + statements and comments) at the top level of the configuration -- that + is, all items that do not appear within a menu or choice. The items + appear in the same order as within the configuration.""" + return self.top_block.get_items() + + def get_symbols(self, all_symbols = True): + """Returns a list of symbols from the configuration. An alternative for + iterating over all defined symbols (in the order of definition) is + + for sym in config: + ... + + which relies on Config implementing __iter__() and is equivalent to + + for sym in config.get_symbols(False): + ... + + all_symbols (default: True) -- If True, all symbols - including special + and undefined symbols - will be included in the result, in + an undefined order. If False, only symbols actually defined + and not merely referred to in the configuration will be + included in the result, and will appear in the order that + they are defined within the Kconfig configuration files.""" + return self.syms.values() if all_symbols else self.kconfig_syms + + def get_choices(self): + """Returns a list containing all choice statements in the + configuration, in the order they appear in the Kconfig files.""" + return self.choices + + def get_menus(self): + """Returns a list containing all menus in the configuration, in the + order they appear in the Kconfig files.""" + return self.menus + + def get_comments(self): + """Returns a list containing all comments in the configuration, in the + order they appear in the Kconfig files.""" + return self.comments + + def eval(self, s): + """Returns the value of the expression 's' -- where 's' is represented + as a string -- in the context of the configuration. Raises + Kconfig_Syntax_Error if syntax errors are detected in 's'. + + For example, if FOO and BAR are tristate symbols at least one of which + has the value "y", then config.eval("y && (FOO || BAR)") => "y" + + This functions always yields a tristate value. To get the value of + non-bool, non-tristate symbols, use Symbol.get_value(). + + The result of this function is consistent with how evaluation works for + conditional expressions in the configuration as well as in the C + implementation. "m" and m are rewritten as '"m" && MODULES' and 'm && + MODULES', respectively, and a result of "m" will get promoted to "y" if + we're running without modules.""" + return self._eval_expr(self._parse_expr(self._tokenize(s, True), # Feed + None, # Current symbol or choice + s)) # line + + def get_config_header(self): + """Returns the (uncommented) textual header of the .config file most + recently loaded with load_config(). Returns None if no .config file has + been loaded or if the most recently loaded .config file has no header. + The header comprises all lines up to but not including the first line + that either + + 1. Does not start with "#" + 2. Has the form "# CONFIG_FOO is not set." + """ + return self.config_header + + def get_base_dir(self): + """Returns the base directory relative to which 'source' statements + will work, passed as an argument to Config.__init__().""" + return self.base_dir + + def set_print_warnings(self, print_warnings): + """Determines whether warnings related to this configuration (for + things like attempting to assign illegal values to symbols with + Symbol.set_user_value()) should be printed to stderr. + + print_warnings -- True if warnings should be + printed, otherwise False.""" + self.print_warnings = print_warnings + + def set_print_undef_assign(self, print_undef_assign): + """Determines whether informational messages related to assignments to + undefined symbols should be printed to stderr for this configuration. + + print_undef_assign -- If True, such messages will be printed.""" + self.print_undef_assign = print_undef_assign + + def __getitem__(self, key): + """Returns the symbol with name 'name'. Raises KeyError if the symbol + does not appear in the configuration.""" + return self.syms[key] + + def __iter__(self): + """Convenience function for iterating over the set of all defined + symbols in the configuration, used like + + for sym in conf: + ... + + The iteration happens in the order of definition within the Kconfig + configuration files. Symbols only referred to but not defined will not + be included, nor will the special symbols n, m, and y. If you want to + include such symbols as well, see config.get_symbols().""" + return iter(self.kconfig_syms) + + def unset_user_values(self): + """Resets the values of all symbols, as if Config.load_config() or + Symbol.set_user_value() had never been called.""" + for sym in self.syms.itervalues(): + sym._unset_user_value_no_recursive_invalidate() + + def __str__(self): + """Returns a string containing various information about the Config.""" + return _sep_lines("Configuration", + "File : " + self.filename, + "Base directory : " + self.base_dir, + "Value of $ARCH at creation time : " + + ("(not set)" if self.arch is None else self.arch), + "Value of $SRCARCH at creation time : " + + ("(not set)" if self.srcarch is None else self.srcarch), + "Source tree (derived from $srctree;", + "defaults to '.' if $srctree isn't set) : " + self.srctree, + "Most recently loaded .config : " + + ("(no .config loaded)" if self.config_filename is None else + self.config_filename), + "Print warnings : " + + bool_str[self.print_warnings], + "Print assignments to undefined symbols : " + + bool_str[self.print_undef_assign]) + + + # + # Private methods + # + + def _invalidate_all(self): + for sym in self.syms.itervalues(): + sym._invalidate() + + def _tokenize(self, + s, + for_eval = False, + filename = None, + linenr = None): + """Returns a _Feed instance containing tokens derived from the string + 's'. Registers any new symbols encountered (via _sym_lookup()). + + (I experimented with a pure regular expression implementation, but it + came out slower, less readable, and wouldn't have been as flexible.) + + for_eval -- True when parsing an expression for a call to + Config.eval(), in which case we should not treat the first + token specially nor register new symbols.""" + s = s.lstrip() + if s == "" or s[0] == "#": + return _Feed([]) + + if for_eval: + i = 0 # The current index in the string being tokenized + previous = None # The previous token seen + tokens = [] + else: + # The initial word on a line is parsed specially. Let + # command_chars = [A-Za-z0-9_]. Then + # - leading non-command_chars characters on the line are ignored, and + # - the first token consists the following one or more command_chars + # characters. + # This is why things like "----help--" are accepted. + + initial_token_match = initial_token_re.match(s) + if initial_token_match is None: + return _Feed([]) + # The current index in the string being tokenized + i = initial_token_match.end() + + keyword = keywords.get(initial_token_match.group(1)) + if keyword is None: + # We expect a keyword as the first token + _tokenization_error(s, len(s), filename, linenr) + if keyword == T_HELP: + # Avoid junk after "help", e.g. "---", being registered as a + # symbol + return _Feed([T_HELP]) + tokens = [keyword] + previous = keyword + + # _tokenize() is a hotspot during parsing, and this speeds things up a + # bit + strlen = len(s) + append = tokens.append + + # Main tokenization loop. (Handles tokens past the first one.) + while i < strlen: + # Test for an identifier/keyword preceded by whitespace first; this + # is the most common case. + id_keyword_match = id_keyword_re.match(s, i) + if id_keyword_match: + # We have an identifier or keyword. The above also stripped any + # whitespace for us. + name = id_keyword_match.group(1) + # Jump past it + i = id_keyword_match.end() + + # Keyword? + keyword = keywords.get(name) + if keyword is not None: + append(keyword) + # What would ordinarily be considered a name is treated as a + # string after certain tokens. + elif previous in string_lex: + append(name) + else: + # We're dealing with a symbol. _sym_lookup() will take care + # of allocating a new Symbol instance if it's the first + # time we see it. + sym = self._sym_lookup(name, not for_eval) + + if previous == T_CONFIG or previous == T_MENUCONFIG: + # If the previous token is T_(MENU)CONFIG + # ("(menu)config"), we're tokenizing the first line of + # a symbol definition, and should remember this as a + # location where the symbol is defined. + sym.def_locations.append((filename, linenr)) + else: + # Otherwise, it's a reference to the symbol + sym.ref_locations.append((filename, linenr)) + + append(sym) + + else: + # This restrips whitespace that could have been stripped in the + # regex above, but it's worth it since identifiers/keywords are + # more common + s = s[i:].lstrip() + if s == "": + break + strlen = len(s) + i = 0 + c = s[0] + + # String literal (constant symbol) + if c == '"' or c == "'": + i += 1 + + if "\\" in s: + # Slow path: This could probably be sped up, but it's a + # very unusual case anyway. + quote = c + value = "" + while 1: + if i >= strlen: + _tokenization_error(s, strlen, filename, + linenr) + c = s[i] + if c == quote: + break + if c == "\\": + if i + 1 >= strlen: + _tokenization_error(s, strlen, filename, + linenr) + value += s[i + 1] + i += 2 + else: + value += c + i += 1 + i += 1 + append(value) + else: + # Fast path: If the string contains no backslashes (almost + # always) we can simply look for the matching quote. + end = s.find(c, i) + if end == -1: + _tokenization_error(s, strlen, filename, linenr) + append(s[i:end]) + i = end + 1 + + elif c == "&": + if i + 1 >= strlen: + # Invalid characters are ignored + continue + if s[i + 1] != "&": + # Invalid characters are ignored + i += 1 + continue + append(T_AND) + i += 2 + + elif c == "|": + if i + 1 >= strlen: + # Invalid characters are ignored + continue + if s[i + 1] != "|": + # Invalid characters are ignored + i += 1 + continue + append(T_OR) + i += 2 + + elif c == "!": + if i + 1 >= strlen: + _tokenization_error(s, strlen, filename, linenr) + if s[i + 1] == "=": + append(T_UNEQUAL) + i += 2 + else: + append(T_NOT) + i += 1 + + elif c == "=": + append(T_EQUAL) + i += 1 + + elif c == "(": + append(T_OPEN_PAREN) + i += 1 + + elif c == ")": + append(T_CLOSE_PAREN) + i += 1 + + elif c == "#": + break + + else: + # Invalid characters are ignored + i += 1 + continue + + previous = tokens[-1] + + return _Feed(tokens) + + # + # Parsing + # + + # Expression grammar: + # + # -> + # '=' + # '!=' + # '(' ')' + # '!' + # '&&' + # '||' + + def _parse_expr(self, + feed, + cur_sym_or_choice, + line, + filename = None, + linenr = None, + transform_m = True): + """Parse an expression from the tokens in 'feed' using a simple + top-down approach. The result has the form (, ). + + feed -- _Feed instance containing the tokens for the expression. + + cur_sym_or_choice -- The symbol or choice currently being parsed, or + None if we're not parsing a symbol or choice. + Used for recording references to symbols. + + line -- The line containing the expression being parsed. + + filename (default: None) -- The file containing the expression. + + linenr (default: None) -- The line number containing the expression. + + transform_m (default: False) -- Determines if 'm' should be rewritten to + 'm && MODULES' -- see + parse_val_and_cond().""" + + # Use instance variables to avoid having to pass these as arguments + # through the top-down parser in _parse_expr_2(), which is tedious and + # obfuscates the code. A profiler run shows no noticeable performance + # difference. + self.parse_expr_cur_sym_or_choice = cur_sym_or_choice + self.parse_expr_line = line + self.parse_expr_filename = filename + self.parse_expr_linenr = linenr + self.parse_expr_transform_m = transform_m + + return self._parse_expr_2(feed) + + def _parse_expr_2(self, feed): + or_terms = [self._parse_or_term(feed)] + # Keep parsing additional terms while the lookahead is '||' + while feed.check(T_OR): + or_terms.append(self._parse_or_term(feed)) + + return or_terms[0] if len(or_terms) == 1 else (OR, or_terms) + + def _parse_or_term(self, feed): + and_terms = [self._parse_factor(feed)] + # Keep parsing additional terms while the lookahead is '&&' + while feed.check(T_AND): + and_terms.append(self._parse_factor(feed)) + + return and_terms[0] if len(and_terms) == 1 else (AND, and_terms) + + def _parse_factor(self, feed): + if feed.check(T_OPEN_PAREN): + expr_parse = self._parse_expr_2(feed) + + if not feed.check(T_CLOSE_PAREN): + _parse_error(self.parse_expr_line, + "missing end parenthesis.", + self.parse_expr_filename, + self.parse_expr_linenr) + + return expr_parse + + if feed.check(T_NOT): + return (NOT, self._parse_factor(feed)) + + sym_or_string = feed.get_next() + + if not isinstance(sym_or_string, (Symbol, str)): + _parse_error(self.parse_expr_line, + "malformed expression.", + self.parse_expr_filename, + self.parse_expr_linenr) + + if self.parse_expr_cur_sym_or_choice is not None and \ + isinstance(sym_or_string, Symbol): + self.parse_expr_cur_sym_or_choice.referenced_syms.add(sym_or_string) + + next_token = feed.peek_next() + + # For conditional expressions ('depends on ', '... if ', + # etc.), "m" and m are rewritten to "m" && MODULES. + if next_token != T_EQUAL and next_token != T_UNEQUAL: + if self.parse_expr_transform_m and (sym_or_string is self.m or + sym_or_string == "m"): + return (AND, ["m", self._sym_lookup("MODULES")]) + return sym_or_string + + relation = EQUAL if (feed.get_next() == T_EQUAL) else UNEQUAL + sym_or_string_2 = feed.get_next() + + if self.parse_expr_cur_sym_or_choice is not None and \ + isinstance(sym_or_string_2, Symbol): + self.parse_expr_cur_sym_or_choice.referenced_syms.add(sym_or_string_2) + + if sym_or_string is self.m: + sym_or_string = "m" + + if sym_or_string_2 is self.m: + sym_or_string_2 = "m" + + return (relation, sym_or_string, sym_or_string_2) + + def _parse_file(self, filename, parent, deps, visible_if_deps, res = None): + """Parse the Kconfig file 'filename'. The result is a _Block with all + items from the file. See _parse_block() for the meaning of the + parameters.""" + line_feeder = _FileFeed(_get_lines(filename), filename) + return self._parse_block(line_feeder, None, parent, deps, visible_if_deps, res) + + def _parse_block(self, line_feeder, end_marker, parent, deps, + visible_if_deps = None, res = None): + """Parses a block, which is the contents of either a file or an if, + menu, or choice statement. The result is a _Block with the items from + the block. + + end_marker -- The token that ends the block, e.g. T_ENDIF ("endif") for + if's. None for files. + + parent -- The enclosing menu, choice or if, or None if we're at the top + level. + + deps -- Dependencies from enclosing menus, choices and if's. + + visible_if_deps (default: None) -- 'visible if' dependencies from + enclosing menus. + + res (default: None) -- The _Block to add items to. If None, a new + _Block is created to hold the items.""" + + block = _Block() if res is None else res + + filename = line_feeder.get_filename() + + while 1: + + # Do we already have a tokenized line that we determined wasn't + # part of whatever we were parsing earlier? See comment in + # Config.__init__(). + if self.end_line is not None: + assert self.end_line_tokens is not None + tokens = self.end_line_tokens + tokens.go_to_start() + + line = self.end_line + linenr = line_feeder.get_linenr() + + self.end_line = None + self.end_line_tokens = None + + else: + line = line_feeder.get_next() + if line is None: + if end_marker is not None: + raise Kconfig_Syntax_Error, ( + "Unexpected end of file {0}." + .format(line_feeder.get_filename())) + return block + + linenr = line_feeder.get_linenr() + + tokens = self._tokenize(line, False, filename, linenr) + + if tokens.is_empty(): + continue + + t0 = tokens.get_next() + + # Have we reached the end of the block? + if t0 == end_marker: + return block + + if t0 == T_CONFIG or t0 == T_MENUCONFIG: + # The tokenizer will automatically allocate a new Symbol object + # for any new names it encounters, so we don't need to worry + # about that here. + sym = tokens.get_next() + + # Symbols defined in multiple places get the parent of their + # first definition. However, for symbols whose parents are choice + # statements, the choice statement takes precedence. + if not sym.is_defined_ or isinstance(parent, Choice): + sym.parent = parent + + sym.is_defined_ = True + + self.kconfig_syms.append(sym) + block.add_item(sym) + + self._parse_properties(line_feeder, sym, deps, visible_if_deps) + + elif t0 == T_MENU: + menu = Menu() + self.menus.append(menu) + menu.config = self + menu.parent = parent + menu.title = tokens.get_next() + + menu.filename = filename + menu.linenr = linenr + + # Parse properties and contents + self._parse_properties(line_feeder, menu, deps, visible_if_deps) + menu.block = self._parse_block(line_feeder, + T_ENDMENU, + menu, + menu.dep_expr, + _make_and(visible_if_deps, + menu.visible_if_expr)) + + block.add_item(menu) + + elif t0 == T_IF: + # If statements are treated as syntactic sugar for adding + # dependencies to enclosed items and do not have an explicit + # object representation. + + dep_expr = self._parse_expr(tokens, None, line, filename, linenr) + self._parse_block(line_feeder, + T_ENDIF, + parent, + _make_and(dep_expr, deps), + visible_if_deps, + block) # Add items to the same block + + elif t0 == T_CHOICE: + # We support named choices + already_defined = False + name = None + if len(tokens) > 1 and isinstance(tokens[1], str): + name = tokens[1] + already_defined = name in self.named_choices + + if already_defined: + choice = self.named_choices[name] + else: + choice = Choice() + self.choices.append(choice) + if name is not None: + choice.name = name + self.named_choices[name] = choice + + choice.config = self + choice.parent = parent + + choice.def_locations.append((filename, linenr)) + + # Parse properties and contents + self._parse_properties(line_feeder, choice, deps, visible_if_deps) + choice.block = self._parse_block(line_feeder, + T_ENDCHOICE, + choice, + None, + visible_if_deps) + + choice._determine_actual_symbols() + + # If no type is set for the choice, its type is that of the first + # choice item + if choice.type == UNKNOWN: + for item in choice.get_symbols(): + if item.type != UNKNOWN: + choice.type = item.type + break + + # Each choice item of UNKNOWN type gets the type of the choice + for item in choice.get_symbols(): + if item.type == UNKNOWN: + item.type = choice.type + + # For named choices defined in multiple locations, only record + # at the first definition + if not already_defined: + block.add_item(choice) + + elif t0 == T_COMMENT: + comment = Comment() + comment.config = self + comment.parent = parent + + comment.filename = filename + comment.linenr = linenr + + comment.text = tokens.get_next() + self._parse_properties(line_feeder, comment, deps, visible_if_deps) + + block.add_item(comment) + self.comments.append(comment) + + elif t0 == T_SOURCE: + kconfig_file = tokens.get_next() + exp_kconfig_file = self._expand_sym_refs(kconfig_file) + f = os.path.join(self.base_dir, exp_kconfig_file) + + if not os.path.exists(f): + raise IOError, ('{0}:{1}: sourced file "{2}" (expands to\n' + '"{3}") not found. Perhaps base_dir\n' + '(argument to Config.__init__(), currently\n' + '"{4}") is set to the wrong value.' + .format(filename, + linenr, + kconfig_file, + exp_kconfig_file, + self.base_dir)) + + # Add items to the same block + self._parse_file(f, parent, deps, visible_if_deps, block) + + elif t0 == T_MAINMENU: + text = tokens.get_next() + + if self.mainmenu_text is not None: + self._warn("overriding 'mainmenu' text. " + 'Old value: "{0}", new value: "{1}".' + .format(self.mainmenu_text, text), + filename, + linenr) + + self.mainmenu_text = text + + else: + _parse_error(line, "unrecognized construct.", filename, linenr) + + def _parse_properties(self, line_feeder, stmt, deps, visible_if_deps): + """Parsing of properties for symbols, menus, choices, and comments.""" + + def parse_val_and_cond(tokens, line, filename, linenr): + """Parses ' if ' constructs, where the 'if' part is + optional. Returns a tuple containing the parsed expressions, with + None as the second element if the 'if' part is missing.""" + val = self._parse_expr(tokens, stmt, line, filename, linenr, False) + + if tokens.check(T_IF): + return (val, self._parse_expr(tokens, stmt, line, filename, linenr)) + + return (val, None) + + # In case the symbol is defined in multiple locations, we need to + # remember what prompts, defaults, and selects are new for this + # definition, as "depends on" should only apply to the local + # definition. + new_prompt = None + new_def_exprs = [] + new_selects = [] + + # Dependencies from 'depends on' statements + depends_on_expr = None + + while 1: + line = line_feeder.get_next() + if line is None: + break + + filename = line_feeder.get_filename() + linenr = line_feeder.get_linenr() + + tokens = self._tokenize(line, False, filename, linenr) + + if tokens.is_empty(): + continue + + t0 = tokens.get_next() + + if t0 == T_HELP: + # Find first non-empty line and get its indentation + + line_feeder.remove_while(str.isspace) + line = line_feeder.get_next() + + if line is None: + stmt.help = "" + break + + indent = _indentation(line) + + # If the first non-empty lines has zero indent, there is no + # help text + if indent == 0: + stmt.help = "" + line_feeder.go_back() + break + + help_lines = [_deindent(line, indent)] + + # The help text goes on till the first non-empty line with less + # indent + while 1: + line = line_feeder.get_next() + if (line is None) or \ + (not line.isspace() and _indentation(line) < indent): + stmt.help = "".join(help_lines) + break + + help_lines.append(_deindent(line, indent)) + + if line is None: + break + + line_feeder.go_back() + + elif t0 == T_PROMPT: + # 'prompt' properties override each other within a single + # definition of a symbol, but additional prompts can be added + # by defining the symbol multiple times; hence 'new_prompt' + # instead of 'prompt'. + new_prompt = parse_val_and_cond(tokens, line, filename, linenr) + + elif t0 == T_DEFAULT: + new_def_exprs.append(parse_val_and_cond(tokens, line, filename, linenr)) + + elif t0 == T_DEPENDS: + if not tokens.check(T_ON): + _parse_error(line, 'expected "on" after "depends".', filename, linenr) + + parsed_deps = self._parse_expr(tokens, stmt, line, filename, linenr) + + if isinstance(stmt, (Menu, Comment)): + stmt.dep_expr = _make_and(stmt.dep_expr, parsed_deps) + else: + depends_on_expr = _make_and(depends_on_expr, parsed_deps) + + elif t0 == T_VISIBLE: + if not tokens.check(T_IF): + _parse_error(line, 'expected "if" after "visible".', filename, linenr) + if not isinstance(stmt, Menu): + _parse_error(line, + "'visible if' is only valid for menus.", + filename, + linenr) + + parsed_deps = self._parse_expr(tokens, stmt, line, filename, linenr) + stmt.visible_if_expr = _make_and(stmt.visible_if_expr, parsed_deps) + + elif t0 == T_SELECT: + target = tokens.get_next() + + stmt.referenced_syms.add(target) + stmt.selected_syms.add(target) + + if tokens.check(T_IF): + new_selects.append((target, + self._parse_expr(tokens, stmt, line, filename, linenr))) + else: + new_selects.append((target, None)) + + elif t0 in (T_BOOL, T_TRISTATE, T_INT, T_HEX, T_STRING): + stmt.type = token_to_type[t0] + + if len(tokens) > 1: + new_prompt = parse_val_and_cond(tokens, line, filename, linenr) + + elif t0 == T_RANGE: + lower = tokens.get_next() + upper = tokens.get_next() + stmt.referenced_syms.add(lower) + stmt.referenced_syms.add(upper) + + if tokens.check(T_IF): + stmt.ranges.append((lower, upper, + self._parse_expr(tokens, stmt, line, filename, linenr))) + else: + stmt.ranges.append((lower, upper, None)) + + elif t0 == T_DEF_BOOL: + stmt.type = BOOL + + if len(tokens) > 1: + new_def_exprs.append(parse_val_and_cond(tokens, line, filename, linenr)) + + elif t0 == T_DEF_TRISTATE: + stmt.type = TRISTATE + + if len(tokens) > 1: + new_def_exprs.append(parse_val_and_cond(tokens, line, filename, linenr)) + + elif t0 == T_OPTIONAL: + if not isinstance(stmt, Choice): + _parse_error(line, + '"optional" is only valid for choices.', + filename, + linenr) + stmt.optional = True + + elif t0 == T_OPTION: + if tokens.check(T_ENV) and tokens.check(T_EQUAL): + env_var = tokens.get_next() + + stmt.is_special_ = True + stmt.is_from_env = True + + if env_var not in os.environ: + self._warn(""" +The symbol {0} references the non-existent environment variable {1} and will +get the empty string as its value. + +If you're using kconfiglib via 'make (i)scriptconfig' it should have set up the +environment correctly for you. If you still got this message, that might be an +error, and you should e-mail kconfiglib@gmail.com. +.""" .format(stmt.name, env_var), + filename, + linenr) + + stmt.cached_value = "" + else: + stmt.cached_value = os.environ[env_var] + + elif tokens.check(T_DEFCONFIG_LIST): + self.defconfig_sym = stmt + + elif tokens.check(T_MODULES): + self._warn("the 'modules' option is not supported. " + "Let me know if this is a problem for you; " + "it shouldn't be that hard to implement.", + filename, + linenr) + + else: + _parse_error(line, "unrecognized option.", filename, linenr) + + else: + # See comment in Config.__init__() + self.end_line = line + self.end_line_tokens = tokens + break + + # Propagate dependencies from enclosing menus and if's. + + # For menus and comments.. + if isinstance(stmt, (Menu, Comment)): + stmt.orig_deps = stmt.dep_expr + stmt.deps_from_containing = deps + stmt.dep_expr = _make_and(stmt.dep_expr, deps) + + stmt.all_referenced_syms = \ + stmt.referenced_syms | _get_expr_syms(deps) + + # For symbols and choices.. + else: + + # See comment for 'menu_dep' + stmt.menu_dep = depends_on_expr + + # Propagate dependencies specified with 'depends on' to any new + # default expressions, prompts, and selections. ("New" since a + # symbol might be defined in multiple places and the dependencies + # should only apply to the local definition.) + + new_def_exprs = [(val_expr, _make_and(cond_expr, depends_on_expr)) + for (val_expr, cond_expr) in new_def_exprs] + + new_selects = [(target, _make_and(cond_expr, depends_on_expr)) + for (target, cond_expr) in new_selects] + + if new_prompt is not None: + prompt, cond_expr = new_prompt + + # 'visible if' dependencies from enclosing menus get propagated + # to prompts + if visible_if_deps is not None: + cond_expr = _make_and(cond_expr, visible_if_deps) + + new_prompt = (prompt, _make_and(cond_expr, depends_on_expr)) + + # We save the original expressions -- before any menu and if + # conditions have been propagated -- so these can be retrieved + # later. + + stmt.orig_def_exprs.extend(new_def_exprs) + if new_prompt is not None: + stmt.orig_prompts.append(new_prompt) + + # Only symbols can select + if isinstance(stmt, Symbol): + stmt.orig_selects.extend(new_selects) + + # Save dependencies from enclosing menus and if's + stmt.deps_from_containing = deps + + # The set of symbols referenced directly by the symbol/choice plus + # all symbols referenced by enclosing menus and if's. + stmt.all_referenced_syms = \ + stmt.referenced_syms | _get_expr_syms(deps) + + # Propagate dependencies from enclosing menus and if's + + stmt.def_exprs.extend([(val_expr, _make_and(cond_expr, deps)) + for (val_expr, cond_expr) in new_def_exprs]) + + for (target, cond) in new_selects: + target.rev_dep = _make_or(target.rev_dep, + _make_and(stmt, + _make_and(cond, deps))) + + if new_prompt is not None: + prompt, cond_expr = new_prompt + stmt.prompts.append((prompt, _make_and(cond_expr, deps))) + + # + # Symbol table manipulation + # + + def _sym_lookup(self, name, add_sym_if_not_exists = True): + """Fetches the symbol 'name' from the symbol table, optionally adding + it if it does not exist (this is usually what we want).""" + if name in self.syms: + return self.syms[name] + + new_sym = Symbol() + new_sym.config = self + new_sym.name = name + + if add_sym_if_not_exists: + self.syms[name] = new_sym + else: + # This warning is generated while evaluating an expression + # containing undefined symbols using Config.eval() + self._warn("no symbol {0} in configuration".format(name)) + + return new_sym + + # + # Evaluation of symbols and expressions + # + + def _eval_expr(self, expr): + """Evaluates an expression and returns one of the tristate values "n", + "m" or "y".""" + res = self._eval_expr_2(expr) + + # Promote "m" to "y" if we're running without modules. Internally, "m" + # is often rewritten to "m" && MODULES by both the C implementation and + # kconfiglib, which takes care of cases where "m" should be false if + # we're running without modules. + if res == "m" and not self._has_modules(): + return "y" + + return res + + def _eval_expr_2(self, expr): + if expr is None: + return "y" + + if isinstance(expr, Symbol): + # Non-bool/tristate symbols are always "n" in a tristate sense, + # regardless of their value + if expr.type != BOOL and expr.type != TRISTATE: + return "n" + return expr.get_value() + + if isinstance(expr, str): + return expr if (expr == "y" or expr == "m") else "n" + + first_expr = expr[0] + + if first_expr == OR: + res = "n" + + for subexpr in expr[1]: + ev = self._eval_expr_2(subexpr) + + # Return immediately upon discovering a "y" term + if ev == "y": + return "y" + + if ev == "m": + res = "m" + + # 'res' is either "n" or "m" here; we already handled the + # short-circuiting "y" case in the loop. + return res + + if first_expr == AND: + res = "y" + + for subexpr in expr[1]: + ev = self._eval_expr_2(subexpr) + + # Return immediately upon discovering an "n" term + if ev == "n": + return "n" + + if ev == "m": + res = "m" + + # 'res' is either "m" or "y" here; we already handled the + # short-circuiting "n" case in the loop. + return res + + if first_expr == NOT: + ev = self._eval_expr_2(expr[1]) + + if ev == "y": + return "n" + + return "y" if (ev == "n") else "m" + + if first_expr == EQUAL: + return "y" if (self._get_str_value(expr[1]) == + self._get_str_value(expr[2])) else "n" + + if first_expr == UNEQUAL: + return "y" if (self._get_str_value(expr[1]) != + self._get_str_value(expr[2])) else "n" + + _internal_error("Internal error while evaluating expression: " + "unknown operation {0}.".format(first_expr)) + + def _get_str_value(self, obj): + if isinstance(obj, str): + return obj + # obj is a Symbol + return obj.get_value() + + def _eval_min(self, e1, e2): + e1_eval = self._eval_expr(e1) + e2_eval = self._eval_expr(e2) + + return e1_eval if tri_less(e1_eval, e2_eval) else e2_eval + + def _eval_max(self, e1, e2): + e1_eval = self._eval_expr(e1) + e2_eval = self._eval_expr(e2) + + return e1_eval if tri_greater(e1_eval, e2_eval) else e2_eval + + # + # Methods related to the MODULES symbol + # + + def _has_modules(self): + modules_sym = self.syms.get("MODULES") + return (modules_sym is not None) and (modules_sym.get_value() == "y") + + # + # Dependency tracking + # + + def _build_dep(self): + """Populates the Symbol.dep sets, linking the symbol to the symbols + that immediately depend on it in the sense that changing the value of + the symbol might affect the values of those other symbols. This is used + for caching/invalidation purposes. The calculated sets might be larger + than necessary as we don't do any complicated analysis of the + expressions.""" + for sym in self.syms.itervalues(): + sym.dep = set() + + # Adds 'sym' as a directly dependent symbol to all symbols that appear + # in the expression 'e' + def add_expr_deps(e, sym): + for s in _get_expr_syms(e): + s.dep.add(sym) + + # The directly dependent symbols of a symbol are: + # - Any symbols whose prompts, default values, rev_dep (select + # condition), or ranges depend on the symbol + # - Any symbols that belong to the same choice statement as the symbol + # (these won't be included in 'dep' as that makes the dependency + # graph unwieldy, but Symbol._get_dependent() will include them) + # - Any symbols in a choice statement that depends on the symbol + for sym in self.syms.itervalues(): + for (_, e) in sym.prompts: + add_expr_deps(e, sym) + + for (v, e) in sym.def_exprs: + add_expr_deps(v, sym) + add_expr_deps(e, sym) + + add_expr_deps(sym.rev_dep, sym) + + for (l, u, e) in sym.ranges: + add_expr_deps(l, sym) + add_expr_deps(u, sym) + add_expr_deps(e, sym) + + if sym.is_choice_symbol_: + choice = sym.parent + + for (_, e) in choice.prompts: + add_expr_deps(e, sym) + + for (_, e) in choice.def_exprs: + add_expr_deps(e, sym) + + def _expr_val_str(self, expr, no_value_str = "(none)", get_val_instead_of_eval = False): + # Since values are valid expressions, _expr_to_str() will get a nice + # string representation for those as well. + + if expr is None: + return no_value_str + + if get_val_instead_of_eval: + if isinstance(expr, str): + return _expr_to_str(expr) + val = expr.get_value() + else: + val = self._eval_expr(expr) + + return "{0} (value: {1})".format(_expr_to_str(expr), _expr_to_str(val)) + + def _expand_sym_refs(self, s): + """Expands $-references to symbols in 's' to symbol values, or to the + empty string for undefined symbols.""" + + while 1: + sym_ref_re_match = sym_ref_re.search(s) + if sym_ref_re_match is None: + return s + + sym_name = sym_ref_re_match.group(0)[1:] + sym = self.syms.get(sym_name) + expansion = "" if sym is None else sym.get_value() + + s = s[:sym_ref_re_match.start()] + \ + expansion + \ + s[sym_ref_re_match.end():] + + def _get_sym_or_choice_str(self, sc): + """Symbols and choices have many properties in common, so we factor out + common __str__() stuff here. "sc" is short for "symbol or choice".""" + + # As we deal a lot with string representations here, use some + # convenient shorthand: + s = _expr_to_str + + # + # Common symbol/choice properties + # + + user_value_str = "(no user value)" if sc.user_val is None else s(sc.user_val) + + visibility_str = s(sc.get_visibility()) + + # Build prompts string + if sc.prompts == []: + prompts_str = " (no prompts)" + else: + prompts_str_rows = [] + + for (prompt, cond_expr) in sc.orig_prompts: + if cond_expr is None: + prompts_str_rows.append(' "{0}"'.format(prompt)) + else: + prompts_str_rows.append(' "{0}" if '.format(prompt) + + self._expr_val_str(cond_expr)) + + prompts_str = "\n".join(prompts_str_rows) + + # Build locations string + if sc.def_locations == []: + locations_str = "(no locations)" + else: + locations_str = " ".join(["{0}:{1}".format(filename, linenr) for + (filename, linenr) in sc.def_locations]) + + # Build additional-dependencies-from-menus-and-if's string + additional_deps_str = " " + self._expr_val_str(sc.deps_from_containing, + "(no additional dependencies)") + + # + # Symbol-specific stuff + # + + if isinstance(sc, Symbol): + + # Build value string + value_str = s(sc.get_value()) + + # Build ranges string + if isinstance(sc, Symbol): + if sc.ranges == []: + ranges_str = " (no ranges)" + else: + ranges_str_rows = [] + + for (l, u, cond_expr) in sc.ranges: + if cond_expr is None: + ranges_str_rows.append(" [{0}, {1}]".format(s(l), s(u))) + else: + ranges_str_rows.append(" [{0}, {1}] if {2}" + .format(s(l), s(u), self._expr_val_str(cond_expr))) + + ranges_str = "\n".join(ranges_str_rows) + + # Build default values string + if sc.def_exprs == []: + defaults_str = " (no default values)" + else: + defaults_str_rows = [] + + for (val_expr, cond_expr) in sc.orig_def_exprs: + row_str = " " + self._expr_val_str(val_expr, "(none)", sc.type == STRING) + defaults_str_rows.append(row_str) + defaults_str_rows.append(" Condition: " + self._expr_val_str(cond_expr)) + + defaults_str = "\n".join(defaults_str_rows) + + # Build selects string + if sc.orig_selects == []: + selects_str = " (no selects)" + else: + selects_str_rows = [] + + for (target, cond_expr) in sc.orig_selects: + if cond_expr is None: + selects_str_rows.append(" {0}".format(target.name)) + else: + selects_str_rows.append(" {0} if ".format(target.name) + + self._expr_val_str(cond_expr)) + + selects_str = "\n".join(selects_str_rows) + + # Build reverse dependencies string + if sc.rev_dep == "n": + rev_dep_str = " (no reverse dependencies)" + else: + rev_dep_str = " " + self._expr_val_str(sc.rev_dep) + + res = _sep_lines("Symbol " + (sc.name if sc.name is not None else "(no name)"), + "Type : " + typename[sc.type], + "Value : " + value_str, + "User value : " + user_value_str, + "Visibility : " + visibility_str, + "Is choice item : " + bool_str[sc.is_choice_symbol_], + "Is defined : " + bool_str[sc.is_defined_], + "Is from env. : " + bool_str[sc.is_from_env], + "Is special : " + bool_str[sc.is_special_] + "\n") + + if sc.ranges != []: + res += _sep_lines("Ranges:", + ranges_str + "\n") + + res += _sep_lines("Prompts:", + prompts_str, + "Default values:", + defaults_str, + "Selects:", + selects_str, + "Reverse dependencies:", + rev_dep_str, + "Additional dependencies from enclosing menus and if's:", + additional_deps_str, + "Locations: " + locations_str) + + return res + + # + # Choice-specific stuff + # + + # Build name string (for named choices) + if sc.name is None: + name_str = "(no name)" + else: + name_str = sc.name + + # Build selected symbol string + sel = sc.get_selection() + if sel is None: + sel_str = "(no selection)" + else: + sel_str = sel.name + + # Build mode string + mode_str = s(sc.get_mode()) + + # Build default values string + if sc.def_exprs == []: + defaults_str = " (no default values)" + else: + defaults_str_rows = [] + + for (sym, cond_expr) in sc.orig_def_exprs: + if cond_expr is None: + defaults_str_rows.append(" {0}".format(sym.name)) + else: + defaults_str_rows.append(" {0} if ".format(sym.name) + + self._expr_val_str(cond_expr)) + + defaults_str = "\n".join(defaults_str_rows) + + # Build contained symbols string + names = [sym.name for sym in sc.get_symbols()] + + if names == []: + syms_string = "(empty)" + else: + syms_string = " ".join(names) + + return _sep_lines("Choice", + "Name (for named choices): " + name_str, + "Type : " + typename[sc.type], + "Selected symbol : " + sel_str, + "User value : " + user_value_str, + "Mode : " + mode_str, + "Visibility : " + visibility_str, + "Optional : " + bool_str[sc.optional], + "Prompts:", + prompts_str, + "Defaults:", + defaults_str, + "Choice symbols:", + " " + syms_string, + "Additional dependencies from enclosing menus and if's:", + additional_deps_str, + "Locations: " + locations_str) + + def _expr_depends_on(self, expr, sym): + """Reimplementation of expr_depends_symbol() from mconf.c. Used to + determine if a submenu should be implicitly created, which influences what + items inside choice statements are considered choice items.""" + if expr is None: + return False + + def rec(expr): + if isinstance(expr, str): + return False + + if isinstance(expr, Symbol): + return expr is sym + + e0 = expr[0] + + if e0 == EQUAL or e0 == UNEQUAL: + return self._eq_to_sym(expr) is sym + + if e0 == AND: + for and_expr in expr[1]: + if rec(and_expr): + return True + + return False + + return rec(expr) + + def _eq_to_sym(self, eq): + """_expr_depends_on() helper. For (in)equalities of the form sym = y/m + or sym != n, returns sym. For other (in)equalities, returns None.""" + relation, left, right = eq + + left = self._transform_n_m_y(left) + right = self._transform_n_m_y(right) + + # Make sure the symbol (if any) appears to the left + if not isinstance(left, Symbol): + left, right = right, left + + if not isinstance(left, Symbol): + return None + + if (relation == EQUAL and (right == "m" or right == "y")) or \ + (relation == UNEQUAL and right == "n"): + return left + + return None + + def _transform_n_m_y(self, item): + """_eq_to_sym() helper. Translates the symbols n, m, and y to their + string equivalents.""" + if item is self.n: + return "n" + if item is self.m: + return "m" + if item is self.y: + return "y" + return item + + def _warn(self, msg, filename = None, linenr = None): + """For printing warnings to stderr.""" + if self.print_warnings: + self._warn_or_undef_assign(msg, WARNING, filename, linenr) + + def _undef_assign(self, msg, filename = None, linenr = None): + """For printing informational messages related to assignments + to undefined variables to stderr.""" + if self.print_undef_assign: + self._warn_or_undef_assign(msg, UNDEF_ASSIGN, filename, linenr) + + def _warn_or_undef_assign(self, msg, msg_type, filename, linenr): + if filename is not None: + sys.stderr.write("{0}:".format(_clean_up_path(filename))) + if linenr is not None: + sys.stderr.write("{0}:".format(linenr)) + + if msg_type == WARNING: + sys.stderr.write("warning: ") + elif msg_type == UNDEF_ASSIGN: + sys.stderr.write("info: ") + else: + _internal_error('Internal error while printing warning: unknown warning type "{0}".' + .format(msg_type)) + + sys.stderr.write(msg + "\n") + +def _get_expr_syms(expr): + """Returns the set() of symbols appearing in expr.""" + res = set() + if expr is None: + return res + + def rec(expr): + if isinstance(expr, Symbol): + res.add(expr) + return + + if isinstance(expr, str): + return + + e0 = expr[0] + + if e0 == OR or e0 == AND: + for term in expr[1]: + rec(term) + + elif e0 == NOT: + rec(expr[1]) + + elif e0 == EQUAL or e0 == UNEQUAL: + _, v1, v2 = expr + + if isinstance(v1, Symbol): + res.add(v1) + + if isinstance(v2, Symbol): + res.add(v2) + + else: + _internal_error("Internal error while fetching symbols from an " + "expression with token stream {0}.".format(expr)) + + rec(expr) + return res + + +# +# Construction of expressions +# + +# These functions as well as the _eval_min/max() functions above equate +# None with "y", which is usually what we want, but needs to be kept in +# mind. + +def _make_or(e1, e2): + # Perform trivial simplification and avoid None's (which + # correspond to y's) + if e1 is None or e2 is None or \ + e1 == "y" or e2 == "y": + return "y" + + if e1 == "n": + return e2 + + if e2 == "n": + return e1 + + # Prefer to merge/update argument list if possible instead of creating + # a new OR node + + if isinstance(e1, tuple) and e1[0] == OR: + if isinstance(e2, tuple) and e2[0] == OR: + return (OR, e1[1] + e2[1]) + return (OR, e1[1] + [e2]) + + if isinstance(e2, tuple) and e2[0] == OR: + return (OR, e2[1] + [e1]) + + return (OR, [e1, e2]) + +# Note: returns None if e1 == e2 == None + +def _make_and(e1, e2): + if e1 == "n" or e2 == "n": + return "n" + + if e1 is None or e1 == "y": + return e2 + + if e2 is None or e2 == "y": + return e1 + + # Prefer to merge/update argument list if possible instead of creating + # a new AND node + + if isinstance(e1, tuple) and e1[0] == AND: + if isinstance(e2, tuple) and e2[0] == AND: + return (AND, e1[1] + e2[1]) + return (AND, e1[1] + [e2]) + + if isinstance(e2, tuple) and e2[0] == AND: + return (AND, e2[1] + [e1]) + + return (AND, [e1, e2]) + +# +# Constants and functions related to types, parsing, evaluation and printing, +# put globally to unclutter the Config class a bit. +# + +# Tokens +(T_OR, T_AND, T_NOT, + T_OPEN_PAREN, T_CLOSE_PAREN, + T_EQUAL, T_UNEQUAL, + T_MAINMENU, T_MENU, T_ENDMENU, + T_SOURCE, T_CHOICE, T_ENDCHOICE, + T_COMMENT, T_CONFIG, T_MENUCONFIG, + T_HELP, T_IF, T_ENDIF, T_DEPENDS, T_ON, + T_OPTIONAL, T_PROMPT, T_DEFAULT, + T_BOOL, T_TRISTATE, T_HEX, T_INT, T_STRING, + T_DEF_BOOL, T_DEF_TRISTATE, + T_SELECT, T_RANGE, T_OPTION, T_ENV, + T_DEFCONFIG_LIST, T_MODULES, T_VISIBLE) = range(0, 38) + +# Keyword to token map +keywords = { + "mainmenu" : T_MAINMENU, + "menu" : T_MENU, + "endmenu" : T_ENDMENU, + "endif" : T_ENDIF, + "endchoice" : T_ENDCHOICE, + "source" : T_SOURCE, + "choice" : T_CHOICE, + "config" : T_CONFIG, + "comment" : T_COMMENT, + "menuconfig" : T_MENUCONFIG, + "help" : T_HELP, + "if" : T_IF, + "depends" : T_DEPENDS, + "on" : T_ON, + "optional" : T_OPTIONAL, + "prompt" : T_PROMPT, + "default" : T_DEFAULT, + "bool" : T_BOOL, + "boolean" : T_BOOL, + "tristate" : T_TRISTATE, + "int" : T_INT, + "hex" : T_HEX, + "def_bool" : T_DEF_BOOL, + "def_tristate" : T_DEF_TRISTATE, + "string" : T_STRING, + "select" : T_SELECT, + "range" : T_RANGE, + "option" : T_OPTION, + "env" : T_ENV, + "defconfig_list" : T_DEFCONFIG_LIST, + "modules" : T_MODULES, + "visible" : T_VISIBLE } + +# Strings to use for True and False +bool_str = { False : "false", True : "true" } + +# Tokens after which identifier-like lexemes are treated as strings. T_CHOICE +# is included to avoid symbols being registered for named choices. +string_lex = frozenset((T_BOOL, T_TRISTATE, T_INT, T_HEX, T_STRING, T_CHOICE, + T_PROMPT, T_MENU, T_COMMENT, T_SOURCE, T_MAINMENU)) + +# Matches the initial token on a line; see _tokenize(). +initial_token_re = re.compile(r"[^\w]*(\w+)") + +# Matches an identifier/keyword optionally preceded by whitespace +id_keyword_re = re.compile(r"\s*([\w./-]+)") + +# Regular expressions for parsing .config files +set_re = re.compile(r"CONFIG_(\w+)=(.*)") +unset_re = re.compile(r"# CONFIG_(\w+) is not set") + +# Regular expression for finding $-references to symbols in strings +sym_ref_re = re.compile(r"\$[A-Za-z_]+") + +# Integers representing symbol types +UNKNOWN, BOOL, TRISTATE, STRING, HEX, INT = range(0, 6) + +# Strings to use for types +typename = { + UNKNOWN : "unknown", + BOOL : "bool", + TRISTATE : "tristate", + STRING : "string", + HEX : "hex", + INT : "int" } + +# Token to type mapping +token_to_type = { T_BOOL : BOOL, + T_TRISTATE : TRISTATE, + T_STRING : STRING, + T_INT : INT, + T_HEX : HEX } + +# Default values for symbols of different types (the value the symbol gets if +# it is not assigned a user value and none of its 'default' clauses kick in) +default_value = { BOOL : "n", + TRISTATE : "n", + STRING : "", + INT : "", + HEX : "" } + +# Indicates that no item is selected in a choice statement +NO_SELECTION = 0 + +# Integers representing expression types +OR, AND, NOT, EQUAL, UNEQUAL = range(0, 5) + +# Map from tristate values to integers +tri_to_int = { "n" : 0, "m" : 1, "y" : 2 } + +# Printing-related stuff + +op_to_str = { AND : " && ", + OR : " || ", + EQUAL : " = ", + UNEQUAL : " != " } + +precedence = { OR : 0, AND : 1, NOT : 2 } + +# Types of informational messages +WARNING = 0 +UNDEF_ASSIGN = 1 + +def _intersperse(lst, op): + """_expr_to_str() helper. Gets the string representation of each expression in lst + and produces a list where op has been inserted between the elements.""" + if lst == []: + return "" + + res = [] + + def handle_sub_expr(expr): + no_parens = isinstance(expr, (str, Symbol)) or \ + expr[0] in (EQUAL, UNEQUAL) or \ + precedence[op] <= precedence[expr[0]] + if not no_parens: + res.append("(") + res.extend(_expr_to_str_rec(expr)) + if not no_parens: + res.append(")") + + op_str = op_to_str[op] + + handle_sub_expr(lst[0]) + for expr in lst[1:]: + res.append(op_str) + handle_sub_expr(expr) + + return res + +def _expr_to_str(expr): + s = "".join(_expr_to_str_rec(expr)) + return s + +def _sym_str_string(sym_or_str): + if isinstance(sym_or_str, str): + return '"{0}"'.format(sym_or_str) + return sym_or_str.name + +def _expr_to_str_rec(expr): + if expr is None: + return [""] + + if isinstance(expr, (Symbol, str)): + return [_sym_str_string(expr)] + + e0 = expr[0] + + if e0 == OR or e0 == AND: + return _intersperse(expr[1], expr[0]) + + if e0 == NOT: + need_parens = not isinstance(expr[1], (str, Symbol)) + + res = ["!"] + if need_parens: + res.append("(") + res.extend(_expr_to_str_rec(expr[1])) + if need_parens: + res.append(")") + return res + + if e0 == EQUAL or e0 == UNEQUAL: + return [_sym_str_string(expr[1]), + op_to_str[expr[0]], + _sym_str_string(expr[2])] + +class _Block: + + """Represents a list of items (symbols, menus, choice statements and + comments) appearing at the top-level of a file or witin a menu, choice or + if statement.""" + + def __init__(self): + self.items = [] + + def get_items(self): + return self.items + + def add_item(self, item): + self.items.append(item) + + def _make_conf(self): + # Collect the substrings in a list and later use join() instead of += + # to build the final .config contents. With older Python versions, this + # yields linear instead of quadratic complexity. + strings = [] + for item in self.items: + strings.extend(item._make_conf()) + + return strings + + def add_depend_expr(self, expr): + for item in self.items: + item.add_depend_expr(expr) + +class Item(): + + """Base class for symbols and other Kconfig constructs. Subclasses are + Symbol, Choice, Menu, and Comment.""" + + def is_symbol(self): + """Returns True if the item is a symbol, otherwise False. Short for + isinstance(item, kconfiglib.Symbol).""" + return isinstance(self, Symbol) + + def is_choice(self): + """Returns True if the item is a choice, otherwise False. Short for + isinstance(item, kconfiglib.Choice).""" + return isinstance(self, Choice) + + def is_menu(self): + """Returns True if the item is a menu, otherwise False. Short for + isinstance(item, kconfiglib.Menu).""" + return isinstance(self, Menu) + + def is_comment(self): + """Returns True if the item is a comment, otherwise False. Short for + isinstance(item, kconfiglib.Comment).""" + return isinstance(self, Comment) + +class _HasVisibility(): + + """Base class for elements that have a "visibility" that acts as an upper + limit on the values a user can set for them. Subclasses are Symbol and + Choice (which supply some of the attributes).""" + + def __init__(self): + self.cached_visibility = None + self.prompts = [] + + def _invalidate(self): + self.cached_visibility = None + + def _get_visibility(self): + if self.cached_visibility is None: + vis = "n" + for (prompt, cond_expr) in self.prompts: + vis = self.config._eval_max(vis, cond_expr) + + if isinstance(self, Symbol) and self.is_choice_symbol_: + vis = self.config._eval_min(vis, self.parent._get_visibility()) + + # Promote "m" to "y" if we're dealing with a non-tristate + if vis == "m" and self.type != TRISTATE: + vis = "y" + + self.cached_visibility = vis + + return self.cached_visibility + +class Symbol(Item, _HasVisibility): + + """Represents a configuration symbol - e.g. FOO for + + config FOO + ...""" + + # + # Public interface + # + + def get_value(self): + """Calculate and return the value of the symbol. See also + Symbol.set_user_value().""" + + if self.cached_value is not None: + return self.cached_value + + self.write_to_conf = False + + # As a quirk of Kconfig, undefined symbols get their name as their + # value. This is why things like "FOO = bar" work for seeing if FOO has + # the value "bar". + if self.type == UNKNOWN: + self.cached_value = self.name + return self.name + + new_val = default_value[self.type] + + vis = self._get_visibility() + + if self.type == BOOL or self.type == TRISTATE: + # The visibility and mode (modules-only or single-selection) of + # choice items will be taken into account in self._get_visibility() + + if self.is_choice_symbol_: + if vis != "n": + choice = self.parent + mode = choice.get_mode() + + self.write_to_conf = (mode != "n") + + if mode == "y": + new_val = "y" if (choice.get_selection() is self) else "n" + elif mode == "m": + if self.user_val == "m" or self.user_val == "y": + new_val = "m" + + else: + use_defaults = True + + if vis != "n": + # If the symbol is visible and has a user value, use that. + # Otherwise, look at defaults. + self.write_to_conf = True + + if self.user_val is not None: + new_val = self.config._eval_min(self.user_val, vis) + use_defaults = False + + if use_defaults: + for (val_expr, cond_expr) in self.def_exprs: + cond_eval = self.config._eval_expr(cond_expr) + + if cond_eval != "n": + self.write_to_conf = True + new_val = self.config._eval_min(val_expr, cond_eval) + break + + # Reverse dependencies take precedence + rev_dep_val = self.config._eval_expr(self.rev_dep) + + if rev_dep_val != "n": + self.write_to_conf = True + new_val = self.config._eval_max(new_val, rev_dep_val) + + # Promote "m" to "y" for booleans + if new_val == "m" and self.type == BOOL: + new_val = "y" + + elif self.type == STRING: + use_defaults = True + + if vis != "n": + self.write_to_conf = True + if self.user_val is not None: + new_val = self.user_val + use_defaults = False + + if use_defaults: + for (val_expr, cond_expr) in self.def_exprs: + if self.config._eval_expr(cond_expr) != "n": + self.write_to_conf = True + new_val = self.config._get_str_value(val_expr) + break + + elif self.type == HEX or self.type == INT: + has_active_range = False + low = None + high = None + use_defaults = True + + base = 16 if self.type == HEX else 10 + + for(l, h, cond_expr) in self.ranges: + if self.config._eval_expr(cond_expr) != "n": + has_active_range = True + + low_str = self.config._get_str_value(l) + high_str = self.config._get_str_value(h) + + low = int(low_str, base) if \ + _is_base_n(low_str, base) else 0 + high = int(high_str, base) if \ + _is_base_n(high_str, base) else 0 + + break + + if vis != "n": + self.write_to_conf = True + + if self.user_val is not None and \ + _is_base_n(self.user_val, base) and \ + (not has_active_range or + low <= int(self.user_val, base) <= high): + + # If the user value is OK, it is stored in exactly the same + # form as specified in the assignment (with or without + # "0x", etc). + + use_defaults = False + new_val = self.user_val + + if use_defaults: + for (val_expr, cond_expr) in self.def_exprs: + if self.config._eval_expr(cond_expr) != "n": + self.write_to_conf = True + + # If the default value is OK, it is stored in exactly + # the same form as specified. Otherwise, it is clamped + # to the range, and the output has "0x" as appropriate + # for the type. + + new_val = self.config._get_str_value(val_expr) + + if _is_base_n(new_val, base): + new_val_num = int(new_val, base) + if has_active_range: + clamped_val = None + + if new_val_num < low: + clamped_val = low + elif new_val_num > high: + clamped_val = high + + if clamped_val is not None: + new_val = (hex(clamped_val) if \ + self.type == HEX else str(clamped_val)) + + break + else: # For the for loop + # If no user value or default kicks in but the hex/int has + # an active range, then the low end of the range is used, + # provided it's > 0, with "0x" prepended as appropriate. + + if has_active_range and low > 0: + new_val = (hex(low) if self.type == HEX else str(low)) + + self.cached_value = new_val + return new_val + + def set_user_value(self, v): + """Sets the user value of the symbol. + + Equal in effect to assigning the value to the symbol within a .config + file. Use get_lower/upper_bound() or get_assignable_values() to find + the range of currently assignable values for bool and tristate symbols; + setting values outside this range will cause the user value to differ + from the result of Symbol.get_value() (be truncated). Values that are + invalid for the type (such as a_bool.set_user_value("foo")) are + ignored, and a warning is emitted if an attempt is made to assign such + a value. + + For any type of symbol, is_modifiable() can be used to check if a user + value will currently have any effect on the symbol, as determined by + its visibility and range of assignable values. Any value that is valid + for the type (bool, tristate, etc.) will end up being reflected in + get_user_value() though, and might have an effect later if conditions + change. To get rid of the user value, use unset_user_value(). + + Any symbols dependent on the symbol are (recursively) invalidated, so + things will just work with regards to dependencies. + + v -- The user value to give to the symbol.""" + self._set_user_value_no_invalidate(v, False) + + # There might be something more efficient you could do here, but play + # it safe. + if self.name == "MODULES": + self.config._invalidate_all() + return + + self._invalidate() + self._invalidate_dependent() + + def unset_user_value(self): + """Resets the user value of the symbol, as if the symbol had never + gotten a user value via Config.load_config() or + Symbol.set_user_value().""" + self._unset_user_value_no_recursive_invalidate() + self._invalidate_dependent() + + def get_user_value(self): + """Returns the value assigned to the symbol in a .config or via + Symbol.set_user_value() (provided the value was valid for the type of the + symbol). Returns None in case of no user value.""" + return self.user_val + + def get_name(self): + """Returns the name of the symbol.""" + return self.name + + def get_prompts(self): + """Returns a list of prompts defined for the symbol, in the order they + appear in the configuration files. Returns the empty list for symbols + with no prompt. + + This list will have a single entry for the vast majority of symbols + having prompts, but having multiple prompts for a single symbol is + possible through having multiple 'config' entries for it.""" + return [prompt for prompt, _ in self.orig_prompts] + + def get_upper_bound(self): + """For string/hex/int symbols and for bool and tristate symbols that + cannot be modified (see is_modifiable()), returns None. + + Otherwise, returns the highest value the symbol can be set to with + Symbol.set_user_value() (that will not be truncated): one of "m" or "y", + arranged from lowest to highest. This corresponds to the highest value + the symbol could be given in e.g. the 'make menuconfig' interface. + + See also the tri_less*() and tri_greater*() functions, which could come + in handy.""" + if self.type != BOOL and self.type != TRISTATE: + return None + rev_dep = self.config._eval_expr(self.rev_dep) + # A bool selected to "m" gets promoted to "y" + if self.type == BOOL and rev_dep == "m": + rev_dep = "y" + vis = self._get_visibility() + if (tri_to_int[vis] - tri_to_int[rev_dep]) > 0: + return vis + return None + + def get_lower_bound(self): + """For string/hex/int symbols and for bool and tristate symbols that + cannot be modified (see is_modifiable()), returns None. + + Otherwise, returns the lowest value the symbol can be set to with + Symbol.set_user_value() (that will not be truncated): one of "n" or "m", + arranged from lowest to highest. This corresponds to the lowest value + the symbol could be given in e.g. the 'make menuconfig' interface. + + See also the tri_less*() and tri_greater*() functions, which could come + in handy.""" + if self.type != BOOL and self.type != TRISTATE: + return None + rev_dep = self.config._eval_expr(self.rev_dep) + # A bool selected to "m" gets promoted to "y" + if self.type == BOOL and rev_dep == "m": + rev_dep = "y" + if (tri_to_int[self._get_visibility()] - tri_to_int[rev_dep]) > 0: + return rev_dep + return None + + def get_assignable_values(self): + """For string/hex/int symbols and for bool and tristate symbols that + cannot be modified (see is_modifiable()), returns the empty list. + + Otherwise, returns a list containing the user values that can be + assigned to the symbol (that won't be truncated). Usage example: + + if "m" in sym.get_assignable_values(): + sym.set_user_value("m") + + This is basically a more convenient interface to + get_lower/upper_bound() when wanting to test if a particular tristate + value can be assigned.""" + if self.type != BOOL and self.type != TRISTATE: + return [] + rev_dep = self.config._eval_expr(self.rev_dep) + # A bool selected to "m" gets promoted to "y" + if self.type == BOOL and rev_dep == "m": + rev_dep = "y" + res = ["n", "m", "y"][tri_to_int[rev_dep] : + tri_to_int[self._get_visibility()] + 1] + return res if len(res) > 1 else [] + + def get_type(self): + """Returns the type of the symbol: one of UNKNOWN, BOOL, TRISTATE, + STRING, HEX, or INT. These are defined at the top level of the module, + so you'd do something like + + if sym.get_type() == kconfiglib.STRING: + ...""" + return self.type + + def get_visibility(self): + """Returns the visibility of the symbol: one of "n", "m" or "y". For + bool and tristate symbols, this is an upper bound on the value users + can set for the symbol. For other types of symbols, a visibility of "n" + means the user value will be ignored. A visibility of "n" corresponds + to not being visible in the 'make *config' interfaces. + + Example (assuming we're running with modules enabled -- i.e., MODULES + set to 'y'): + + # Assume this has been assigned 'n' + config N_SYM + tristate "N_SYM" + + # Assume this has been assigned 'm' + config M_SYM + tristate "M_SYM" + + # Has visibility 'n' + config A + tristate "A" + depends on N_SYM + + # Has visibility 'm' + config B + tristate "B" + depends on M_SYM + + # Has visibility 'y' + config C + tristate "C" + + # Has no prompt, and hence visibility 'n' + config D + tristate + + Having visibility be tri-valued ensures that e.g. a symbol cannot be + set to "y" by the user if it depends on a symbol with value "m", which + wouldn't be safe. + + You should probably look at get_lower/upper_bound(), + get_assignable_values() and is_modifiable() before using this.""" + return self._get_visibility() + + def get_parent(self): + """Returns the menu or choice statement that contains the symbol, or + None if the symbol is at the top level. Note that if statements are + treated as syntactic and do not have an explicit class + representation.""" + return self.parent + + def get_referenced_symbols(self, refs_from_enclosing = False): + """Returns the set() of all symbols referenced by this symbol. For + example, the symbol defined by + + config FOO + bool + prompt "foo" if A && B + default C if D + depends on E + select F if G + + references the symbols A through G. + + refs_from_enclosing (default: False) -- If True, the symbols + referenced by enclosing menus and if's will be + included in the result.""" + return self.all_referenced_syms if refs_from_enclosing else self.referenced_syms + + def get_selected_symbols(self): + """Returns the set() of all symbols X for which this symbol has a + 'select X' or 'select X if Y' (regardless of whether Y is satisfied or + not). This is a subset of the symbols returned by + get_referenced_symbols().""" + return self.selected_syms + + def get_help(self): + """Returns the help text of the symbol, or None if the symbol has no + help text.""" + return self.help + + def get_config(self): + """Returns the Config instance this symbol is from.""" + return self.config + + def get_def_locations(self): + """Returns a list of (filename, linenr) tuples, where filename (string) + and linenr (int) represent a location where the symbol is defined. For + the vast majority of symbols this list will only contain one element. + For the following Kconfig, FOO would get two entries: the lines marked + with *. + + config FOO * + bool "foo prompt 1" + + config FOO * + bool "foo prompt 2" + """ + return self.def_locations + + def get_ref_locations(self): + """Returns a list of (filename, linenr) tuples, where filename (string) + and linenr (int) represent a location where the symbol is referenced in + the configuration. For example, the lines marked by * would be included + for FOO below: + + config A + bool + default BAR || FOO * + + config B + tristate + depends on FOO * + default m if FOO * + + if FOO * + config A + bool "A" + endif + + config FOO (definition not included) + bool + """ + return self.ref_locations + + def is_modifiable(self): + """Returns True if the value of the symbol could be modified by calling + Symbol.set_user_value() and False otherwise. + + For bools and tristates, this corresponds to the symbol being visible + in the 'make menuconfig' interface and not already being pinned to a + specific value (e.g. because it is selected by another symbol). + + For strings and numbers, this corresponds to just being visible. (See + Symbol.get_visibility().)""" + if self.is_special_: + return False + if self.type == BOOL or self.type == TRISTATE: + rev_dep = self.config._eval_expr(self.rev_dep) + # A bool selected to "m" gets promoted to "y" + if self.type == BOOL and rev_dep == "m": + rev_dep = "y" + return (tri_to_int[self._get_visibility()] - + tri_to_int[rev_dep]) > 0 + return self._get_visibility() != "n" + + def is_defined(self): + """Returns False if the symbol is referred to in the Kconfig but never + actually defined, otherwise True.""" + return self.is_defined_ + + def is_special(self): + """Returns True if the symbol is one of the special symbols n, m, y, or + UNAME_RELEASE, or gets its value from the environment. Otherwise, + returns False.""" + return self.is_special_ + + def is_from_environment(self): + """Returns True if the symbol gets its value from the environment. + Otherwise, returns False.""" + return self.is_from_env + + def has_ranges(self): + """Returns True if the symbol is of type INT or HEX and has ranges that + limits what values it can take on, otherwise False.""" + return self.ranges != [] + + def is_choice_symbol(self): + """Returns True if the symbol is in a choice statement and is an actual + choice symbol (see Choice.get_symbols()); otherwise, returns + False.""" + return self.is_choice_symbol_ + + def is_choice_selection(self): + """Returns True if the symbol is contained in a choice statement and is + the selected item, otherwise False. Equivalent to 'sym.is_choice_symbol() + and sym.get_parent().get_selection() is sym'.""" + return self.is_choice_symbol_ and self.parent.get_selection() is self + + def __str__(self): + """Returns a string containing various information about the symbol.""" + return self.config._get_sym_or_choice_str(self) + + # + # Private methods + # + + def __init__(self): + """Symbol constructor -- not intended to be called directly by + kconfiglib clients.""" + + # Set default values + _HasVisibility.__init__(self) + + self.config = None + + self.parent = None + self.name = None + self.type = UNKNOWN + + self.def_exprs = [] + self.ranges = [] + self.rev_dep = "n" + + # The prompt, default value and select conditions without any + # dependencies from menus or if's propagated to them + + self.orig_prompts = [] + self.orig_def_exprs = [] + self.orig_selects = [] + + # Dependencies inherited from containing menus and if's + self.deps_from_containing = None + + self.help = None + + # The set of symbols referenced by this symbol (see + # get_referenced_symbols()) + self.referenced_syms = set() + + # The set of symbols selected by this symbol (see + # get_selected_symbols()) + self.selected_syms = set() + + # Like 'referenced_syms', but includes symbols from + # dependencies inherited from enclosing menus and if's + self.all_referenced_syms = set() + + # This is set to True for "actual" choice symbols. See + # Choice._determine_actual_symbols(). The trailing underscore avoids a + # collision with is_choice_symbol(). + self.is_choice_symbol_ = False + + # This records only dependencies specified with 'depends on'. Needed + # when determining actual choice items (hrrrr...). See also + # Choice._determine_actual_symbols(). + self.menu_dep = None + + # See Symbol.get_ref/def_locations(). + self.def_locations = [] + self.ref_locations = [] + + self.user_val = None + + # Flags + + # Should the symbol get an entry in .config? + self.write_to_conf = False + + # Caches the calculated value + self.cached_value = None + + # Note: An instance variable 'self.dep' gets set on the Symbol in + # Config._build_dep(), linking the symbol to the symbols that + # immediately depend on it (in a caching/invalidation sense). The total + # set of dependent symbols for the symbol (the transitive closure) is + # calculated on an as-needed basis in _get_dependent(). + + # Caches the total list of dependent symbols. Calculated in + # _get_dependent(). + self.cached_deps = None + + # Does the symbol have an entry in the Kconfig file? The trailing + # underscore avoids a collision with is_defined(). + self.is_defined_ = False + + # Does the symbol get its value in some special way, e.g. from the + # environment or by being one of the special symbols n, m, and y? If + # so, the value is stored in self.cached_value, which is never + # invalidated. The trailing underscore avoids a collision with + # is_special(). + self.is_special_ = False + + # Does the symbol get its value from the environment? + self.is_from_env = False + + def _invalidate(self): + if self.is_special_: + return + + if self.is_choice_symbol_: + self.parent._invalidate() + + _HasVisibility._invalidate(self) + + self.write_to_conf = False + self.cached_value = None + + def _invalidate_dependent(self): + for sym in self._get_dependent(): + sym._invalidate() + + def _set_user_value_no_invalidate(self, v, suppress_load_warnings): + """Like set_user_value(), but does not invalidate any symbols. + + suppress_load_warnings -- + some warnings are annoying when loading a .config that can be helpful + when manually invoking set_user_value(). This flag is set to True to + suppress such warnings. + + Perhaps this could be made optional for load_config() instead.""" + + if self.is_special_: + if self.is_from_env: + self.config._warn('attempt to assign the value "{0}" to the ' + 'symbol {1}, which gets its value from the ' + 'environment. Assignment ignored.' + .format(v, self.name)) + else: + self.config._warn('attempt to assign the value "{0}" to the ' + 'special symbol {1}. Assignment ignored.' + .format(v, self.name)) + + return + + + if not self.is_defined_: + filename, linenr = self.ref_locations[0] + + self.config._undef_assign('attempt to assign the value "{0}" to {1}, ' + "which is referenced at {2}:{3} but never " + "defined. Assignment ignored." + .format(v, self.name, filename, linenr)) + return + + # Check if the value is valid for our type + + if not (( self.type == BOOL and (v == "n" or v == "y") ) or + ( self.type == TRISTATE and (v == "n" or v == "m" or + v == "y") ) or + ( self.type == STRING ) or + ( self.type == INT and _is_base_n(v, 10) ) or + ( self.type == HEX and _is_base_n(v, 16) )): + + self.config._warn('the value "{0}" is invalid for {1}, which has type {2}. ' + "Assignment ignored." + .format(v, self.name, typename[self.type])) + return + + if self.prompts == [] and not suppress_load_warnings: + self.config._warn('assigning "{0}" to the symbol {1} which ' + 'lacks prompts and thus has visibility "n". ' + 'The assignment will have no effect.' + .format(v, self.name)) + + self.user_val = v + + if self.is_choice_symbol_ and (self.type == BOOL or + self.type == TRISTATE): + choice = self.parent + if v == "y": + choice.user_val = self + choice.user_mode = "y" + elif v == "m": + choice.user_val = None + choice.user_mode = "m" + + def _unset_user_value_no_recursive_invalidate(self): + self._invalidate() + self.user_val = None + + if self.is_choice_symbol_: + self.parent._unset_user_value() + + def _make_conf(self): + if self.already_written: + return [] + + self.already_written = True + + # Note: write_to_conf is determined in get_value() + val = self.get_value() + if not self.write_to_conf: + return [] + + if self.type == BOOL or self.type == TRISTATE: + if val == "m" or val == "y": + return ["CONFIG_{0}={1}".format(self.name, val)] + return ["# CONFIG_{0} is not set".format(self.name)] + + elif self.type == STRING: + # Escape \ and " + return ['CONFIG_{0}="{1}"' + .format(self.name, + val.replace("\\", "\\\\").replace('"', '\\"'))] + + elif self.type == INT or self.type == HEX: + return ["CONFIG_{0}={1}".format(self.name, val)] + + else: + _internal_error('Internal error while creating .config: unknown type "{0}".' + .format(self.type)) + + def _get_dependent(self): + """Returns the set of symbols that should be invalidated if the value + of the symbol changes, because they might be affected by the change. + Note that this is an internal API -- it's probably of limited + usefulness to clients.""" + if self.cached_deps is not None: + return self.cached_deps + + res = set() + + self._add_dependent_ignore_siblings(res) + if self.is_choice_symbol_: + for s in self.parent.get_symbols(): + if s is not self: + res.add(s) + s._add_dependent_ignore_siblings(res) + + self.cached_deps = res + return res + + def _add_dependent_ignore_siblings(self, to): + """Calculating dependencies gets a bit tricky for choice items as they + all depend on each other, potentially leading to infinite recursion. + This helper function calculates dependencies ignoring the other symbols + in the choice. It also works fine for symbols that are not choice + items.""" + for s in self.dep: + to.add(s) + to |= s._get_dependent() + + def _has_auto_menu_dep_on(self, on): + """See Choice._determine_actual_symbols().""" + if not isinstance(self.parent, Choice): + _internal_error("Attempt to determine auto menu dependency for symbol ouside of choice.") + + if self.prompts == []: + # If we have no prompt, use the menu dependencies instead (what was + # specified with 'depends on') + return self.menu_dep is not None and \ + self.config._expr_depends_on(self.menu_dep, on) + + for (_, cond_expr) in self.prompts: + if self.config._expr_depends_on(cond_expr, on): + return True + + return False + +class Menu(Item): + + """Represents a menu statement.""" + + # + # Public interface + # + + def get_config(self): + """Return the Config instance this menu is from.""" + return self.config + + def get_visibility(self): + """Returns the visibility of the menu. This also affects the visibility + of subitems. See also Symbol.get_visibility().""" + return self.config._eval_expr(self.dep_expr) + + def get_visible_if_visibility(self): + """Returns the visibility the menu gets from its 'visible if' + condition. "y" if the menu has no 'visible if' condition.""" + return self.config._eval_expr(self.visible_if_expr) + + def get_items(self, recursive = False): + """Returns a list containing the items (symbols, menus, choice + statements and comments) in in the menu, in the same order that the + items appear within the menu. + + recursive (default: False) -- True if items contained in items within + the menu should be included + recursively (preorder).""" + + if not recursive: + return self.block.get_items() + + res = [] + for item in self.block.get_items(): + res.append(item) + if isinstance(item, Menu): + res.extend(item.get_items(True)) + elif isinstance(item, Choice): + res.extend(item.get_items()) + return res + + def get_symbols(self, recursive = False): + """Returns a list containing the symbols in the menu, in the same order + that they appear within the menu. + + recursive (default: False) -- True if symbols contained in items within + the menu should be included + recursively.""" + + return [item for item in self.get_items(recursive) if isinstance(item, Symbol)] + + def get_title(self): + """Returns the title text of the menu.""" + return self.title + + def get_parent(self): + """Returns the menu or choice statement that contains the menu, or + None if the menu is at the top level. Note that if statements are + treated as syntactic sugar and do not have an explicit class + representation.""" + return self.parent + + def get_referenced_symbols(self, refs_from_enclosing = False): + """See Symbol.get_referenced_symbols().""" + return self.all_referenced_syms if refs_from_enclosing else self.referenced_syms + + def get_location(self): + """Returns the location of the menu as a (filename, linenr) tuple, + where filename is a string and linenr an int.""" + return (self.filename, self.linenr) + + def __str__(self): + """Returns a string containing various information about the menu.""" + depends_on_str = self.config._expr_val_str(self.orig_deps, + "(no dependencies)") + visible_if_str = self.config._expr_val_str(self.visible_if_expr, + "(no dependencies)") + + additional_deps_str = " " + self.config._expr_val_str(self.deps_from_containing, + "(no additional dependencies)") + + return _sep_lines("Menu", + "Title : " + self.title, + "'depends on' dependencies : " + depends_on_str, + "'visible if' dependencies : " + visible_if_str, + "Additional dependencies from enclosing menus and if's:", + additional_deps_str, + "Location: {0}:{1}".format(self.filename, self.linenr)) + + # + # Private methods + # + + def __init__(self): + """Menu constructor -- not intended to be called directly by + kconfiglib clients.""" + + self.config = None + + self.parent = None + self.title = None + self.block = None + self.dep_expr = None + + # Dependency expression without dependencies from enclosing menus and + # if's propagated + self.orig_deps = None + + # Dependencies inherited from containing menus and if's + self.deps_from_containing = None + + # The 'visible if' expression + self.visible_if_expr = None + + # The set of symbols referenced by this menu (see + # get_referenced_symbols()) + self.referenced_syms = set() + + # Like 'referenced_syms', but includes symbols from + # dependencies inherited from enclosing menus and if's + self.all_referenced_syms = None + + self.filename = None + self.linenr = None + + def _make_conf(self): + item_conf = self.block._make_conf() + + if self.config._eval_expr(self.dep_expr) != "n" and \ + self.config._eval_expr(self.visible_if_expr) != "n": + return ["\n#\n# {0}\n#".format(self.title)] + item_conf + return item_conf + +class Choice(Item, _HasVisibility): + + """Represents a choice statement. A choice can be in one of three modes: + + "n" - The choice is not visible and no symbols can be selected. + + "m" - Any number of symbols can be set to "m". The rest will be "n". This + is safe since potentially conflicting options don't actually get + compiled into the kernel simultaneously with "m". + + "y" - One symbol will be "y" while the rest are "n". + + Only tristate choices can be in "m" mode, and the visibility of the choice + is an upper bound on the mode, so that e.g. a choice that depends on a + symbol with value "m" will be in "m" mode. + + The mode changes automatically when a value is assigned to a symbol within + the choice. + + See Symbol.get_visibility() too.""" + + # + # Public interface + # + + def get_selection(self): + """Returns the symbol selected (either by the user or through + defaults), or None if either no symbol is selected or the mode is not + "y".""" + if self.cached_selection is not None: + if self.cached_selection == NO_SELECTION: + return None + return self.cached_selection + + if self.get_mode() != "y": + return self._cache_ret(None) + + # User choice available? + if self.user_val is not None and \ + self.user_val._get_visibility() == "y": + return self._cache_ret(self.user_val) + + if self.optional: + return self._cache_ret(None) + + return self._cache_ret(self.get_selection_from_defaults()) + + def get_selection_from_defaults(self): + """Like Choice.get_selection(), but acts as if no symbol has been + selected by the user and no 'optional' flag is in effect.""" + + if self.actual_symbols == []: + return None + + for (symbol, cond_expr) in self.def_exprs: + if self.config._eval_expr(cond_expr) != "n": + chosen_symbol = symbol + break + else: + chosen_symbol = self.actual_symbols[0] + + # Is the chosen symbol visible? + if chosen_symbol._get_visibility() != "n": + return chosen_symbol + # Otherwise, pick the first visible symbol + for sym in self.actual_symbols: + if sym._get_visibility() != "n": + return sym + return None + + def get_user_selection(self): + """If the choice is in "y" mode and has a user-selected symbol, returns + that symbol. Otherwise, returns None.""" + return self.user_val + + def get_config(self): + """Returns the Config instance this choice is from.""" + return self.config + + def get_name(self): + """For named choices, returns the name. Returns None for unnamed + choices. No named choices appear anywhere in the kernel Kconfig files + as of Linux 3.7.0-rc8.""" + return self.name + + def get_prompts(self): + """Returns a list of prompts defined for the choice, in the order they + appear in the configuration files. Returns the empty list for choices + with no prompt. + + This list will have a single entry for the vast majority of choices + having prompts, but having multiple prompts for a single choice is + possible through having multiple 'choice' entries for it (though I'm + not sure if that ever happens in practice).""" + return [prompt for prompt, _ in self.orig_prompts] + + def get_help(self): + """Returns the help text of the choice, or None if the choice has no + help text.""" + return self.help + + def get_type(self): + """Returns the type of the choice. See Symbol.get_type().""" + return self.type + + def get_items(self): + """Gets all items contained in the choice in the same order as within + the configuration ("items" instead of "symbols" since choices and + comments might appear within choices. This only happens in one place as + of Linux 3.7.0-rc8, in drivers/usb/gadget/Kconfig).""" + return self.block.get_items() + + def get_symbols(self): + """Returns a list containing the choice's symbols. + + A quirk (perhaps a bug) of Kconfig is that you can put items within a + choice that will not be considered members of the choice insofar as + selection is concerned. This happens for example if one symbol within a + choice 'depends on' the symbol preceding it, or if you put non-symbol + items within choices. + + As of Linux 3.7.0-rc8, this seems to be used intentionally in one + place: drivers/usb/gadget/Kconfig. + + This function returns the "proper" symbols of the choice in the order + they appear in the choice, excluding such items. If you want all items + in the choice, use get_items().""" + return self.actual_symbols + + def get_parent(self): + """Returns the menu or choice statement that contains the choice, or + None if the choice is at the top level. Note that if statements are + treated as syntactic sugar and do not have an explicit class + representation.""" + return self.parent + + def get_referenced_symbols(self, refs_from_enclosing = False): + """See Symbol.get_referenced_symbols().""" + return self.all_referenced_syms if refs_from_enclosing else self.referenced_syms + + def get_def_locations(self): + """Returns a list of (filename, linenr) tuples, where filename (string) + and linenr (int) represent a location where the choice is defined. For + the vast majority of choices (all of them as of Linux 3.7.0-rc8) this + list will only contain one element, but its possible for named choices + to be defined in multiple locations.""" + return self.def_locations + + def get_visibility(self): + """Returns the visibility of the choice statement: one of "n", "m" or + "y". This acts as an upper limit on the mode of the choice (though bool + choices can only have the mode "y"). See the class documentation for an + explanation of modes.""" + return self._get_visibility() + + def get_mode(self): + """Returns the mode of the choice. See the class documentation for + an explanation of modes.""" + minimum_mode = "n" if self.optional else "m" + mode = self.user_mode if self.user_mode is not None else minimum_mode + mode = self.config._eval_min(mode, self._get_visibility()) + + # Promote "m" to "y" for boolean choices + if mode == "m" and self.type == BOOL: + return "y" + + return mode + + def is_optional(self): + """Returns True if the symbol has the optional flag set (and so will default + to "n" mode). Otherwise, returns False.""" + return self.optional + + def __str__(self): + """Returns a string containing various information about the choice + statement.""" + return self.config._get_sym_or_choice_str(self) + + # + # Private methods + # + + def __init__(self): + """Choice constructor -- not intended to be called directly by + kconfiglib clients.""" + + _HasVisibility.__init__(self) + + self.config = None + + self.parent = None + self.name = None # Yes, choices can be named + self.type = UNKNOWN + self.def_exprs = [] + self.help = None + self.optional = False + self.block = None + + # The prompts and default values without any dependencies from + # enclosing menus or if's propagated + + self.orig_prompts = [] + self.orig_def_exprs = [] + + # Dependencies inherited from containing menus and if's + self.deps_from_containing = None + + # We need to filter out symbols that appear within the choice block but + # are not considered choice items (see + # Choice._determine_actual_symbols()) This list holds the "actual" choice + # items. + self.actual_symbols = [] + + # The set of symbols referenced by this choice (see + # get_referenced_symbols()) + self.referenced_syms = set() + + # Like 'referenced_syms', but includes symbols from + # dependencies inherited from enclosing menus and if's + self.all_referenced_syms = set() + + # See Choice.get_def_locations() + self.def_locations = [] + + self.user_val = None + self.user_mode = None + + self.cached_selection = None + + def _determine_actual_symbols(self): + """If a symbol's visibility depends on the preceding symbol within a + choice, it is no longer viewed as a choice item (quite possibly a bug, + but some things consciously use it.. ugh. It stems from automatic + submenu creation). In addition, it's possible to have choices and + comments within choices, and those shouldn't be considered as choice + items either. Only drivers/usb/gadget/Kconfig seems to depend on any of + this. This method computes the "actual" items in the choice and sets + the is_choice_symbol_ flag on them (retrieved via is_choice_symbol()). + + Don't let this scare you: an earlier version simply checked for a + sequence of symbols where all symbols after the first appeared in the + 'depends on' expression of the first, and that worked fine. The added + complexity is to be future-proof in the event that + drivers/usb/gadget/Kconfig turns even more sinister. It might very well + be overkilling things (especially if that file is refactored ;).""" + + items = self.block.get_items() + + # Items might depend on each other in a tree structure, so we need a + # stack to keep track of the current tentative parent + stack = [] + + for item in items: + if not isinstance(item, Symbol): + stack = [] + continue + + while stack != []: + if item._has_auto_menu_dep_on(stack[-1]): + # The item should not be viewed as a choice item, so don't + # set item.is_choice_symbol_. + stack.append(item) + break + else: + stack.pop() + else: + item.is_choice_symbol_ = True + self.actual_symbols.append(item) + stack.append(item) + + def _cache_ret(self, selection): + # As None is used to indicate the lack of a cached value we can't use + # that to cache the fact that the choice has no selection. Instead, we + # use the symbolic constant NO_SELECTION. + if selection is None: + self.cached_selection = NO_SELECTION + else: + self.cached_selection = selection + + return selection + + def _invalidate(self): + _HasVisibility._invalidate(self) + self.cached_selection = None + + def _unset_user_value(self): + self._invalidate() + self.user_val = None + self.user_mode = None + + def _make_conf(self): + return self.block._make_conf() + +class Comment(Item): + + """Represents a comment statement.""" + + # + # Public interface + # + + def get_config(self): + """Returns the Config instance this comment is from.""" + return self.config + + def get_visibility(self): + """Returns the visibility of the comment. See also + Symbol.get_visibility().""" + return self.config._eval_expr(self.dep_expr) + + def get_text(self): + """Returns the text of the comment.""" + return self.text + + def get_parent(self): + """Returns the menu or choice statement that contains the comment, or + None if the comment is at the top level. Note that if statements are + treated as syntactic sugar and do not have an explicit class + representation.""" + return self.parent + + def get_referenced_symbols(self, refs_from_enclosing = False): + """See Symbol.get_referenced_symbols().""" + return self.all_referenced_syms if refs_from_enclosing else self.referenced_syms + + def get_location(self): + """Returns the location of the comment as a (filename, linenr) tuple, + where filename is a string and linenr an int.""" + return (self.filename, self.linenr) + + def __str__(self): + """Returns a string containing various information about the comment.""" + dep_str = self.config._expr_val_str(self.orig_deps, "(no dependencies)") + + additional_deps_str = " " + self.config._expr_val_str(self.deps_from_containing, + "(no additional dependencies)") + + return _sep_lines("Comment", + "Text: " + str(self.text), + "Dependencies: " + dep_str, + "Additional dependencies from enclosing menus and if's:", + additional_deps_str, + "Location: {0}:{1}".format(self.filename, self.linenr)) + + # + # Private methods + # + + def __init__(self): + """Comment constructor -- not intended to be called directly by + kconfiglib clients.""" + + self.config = None + + self.parent = None + self.text = None + self.dep_expr = None + + # Dependency expression without dependencies from enclosing menus and + # if's propagated + self.orig_deps = None + + # Dependencies inherited from containing menus and if's + self.deps_from_containing = None + + # The set of symbols referenced by this comment (see + # get_referenced_symbols()) + self.referenced_syms = set() + + # Like 'referenced_syms', but includes symbols from + # dependencies inherited from enclosing menus and if's + self.all_referenced_syms = None + + self.filename = None + self.linenr = None + + def _make_conf(self): + if self.config._eval_expr(self.dep_expr) != "n": + return ["\n#\n# {0}\n#".format(self.text)] + return [] + +class _Feed: + + """Class for working with sequences in a stream-like fashion; handy for tokens.""" + + def __init__(self, items): + self.items = items + self.length = len(self.items) + self.i = 0 + + def get_next(self): + if self.i >= self.length: + return None + + item = self.items[self.i] + self.i += 1 + return item + + def peek_next(self): + return None if self.i >= self.length else self.items[self.i] + + def go_to_start(self): + self.i = 0 + + def __getitem__(self, index): + return self.items[index] + + def __len__(self): + return len(self.items) + + def is_empty(self): + return self.items == [] + + def check(self, token): + """Check if the next token is 'token'. If so, remove it from the token + feed and return True. Otherwise, leave it in and return False.""" + if self.i >= self.length: + return None + + if self.items[self.i] == token: + self.i += 1 + return True + + return False + + def remove_while(self, pred): + while self.i < self.length and pred(self.items[self.i]): + self.i += 1 + + def go_back(self): + if self.i <= 0: + _internal_error("Attempt to move back in Feed while already at the beginning.") + self.i -= 1 + +class _FileFeed(_Feed): + + """Feed subclass that keeps track of the current filename and line + number.""" + + def __init__(self, lines, filename): + self.filename = _clean_up_path(filename) + _Feed.__init__(self, lines) + + def get_filename(self): + return self.filename + + def get_linenr(self): + return self.i + +# +# Misc. public global utility functions +# + +def tri_less(v1, v2): + """Returns True if the tristate v1 is less than the tristate v2, where "n", + "m" and "y" are ordered from lowest to highest. Otherwise, returns + False.""" + return tri_to_int[v1] < tri_to_int[v2] + +def tri_less_eq(v1, v2): + """Returns True if the tristate v1 is less than or equal to the tristate + v2, where "n", "m" and "y" are ordered from lowest to highest. Otherwise, + returns False.""" + return tri_to_int[v1] <= tri_to_int[v2] + +def tri_greater(v1, v2): + """Returns True if the tristate v1 is greater than the tristate v2, where + "n", "m" and "y" are ordered from lowest to highest. Otherwise, returns + False.""" + return tri_to_int[v1] > tri_to_int[v2] + +def tri_greater_eq(v1, v2): + """Returns True if the tristate v1 is greater than or equal to the tristate + v2, where "n", "m" and "y" are ordered from lowest to highest. Otherwise, + returns False.""" + return tri_to_int[v1] >= tri_to_int[v2] + +# +# Helper functions, mostly related to text processing +# + +def _strip_quotes(s, line, filename, linenr): + """Removes any quotes surrounding 's' if it has them; otherwise returns 's' + unmodified.""" + s = s.strip() + if not s: + return "" + if s[0] == '"' or s[0] == "'": + if len(s) < 2 or s[-1] != s[0]: + _parse_error(line, + "malformed string literal", + filename, + linenr) + return s[1:-1] + return s + +def _indentation(line): + """Returns the indentation of the line, treating tab stops as being spaced + 8 characters apart.""" + if line.isspace(): + _internal_error("Attempt to take indentation of blank line.") + indent = 0 + for c in line: + if c == " ": + indent += 1 + elif c == "\t": + # Go to the next tab stop + indent = (indent + 8) & ~7 + else: + return indent + +def _deindent(line, indent): + """Deindent 'line' by 'indent' spaces.""" + line = line.expandtabs() + if len(line) <= indent: + return line + return line[indent:] + +def _is_base_n(s, n): + try: + int(s, n) + return True + except ValueError: + return False + +def _sep_lines(*args): + """Returns a string comprised of all arguments, with newlines inserted + between them.""" + return "\n".join(args) + +def _comment(s): + """Returns a new string with "#" inserted before each line in 's'.""" + if not s: + return "#" + res = "".join(["#" + line for line in s.splitlines(True)]) + if s.endswith("\n"): + return res + "#" + return res + +def _get_lines(filename): + """Returns a list of lines from 'filename', joining any line ending in \\ + with the following line.""" + with open(filename, "r") as f: + lines = [] + accum = "" + while 1: + line = f.readline() + + if line == "": + return lines + + if line.endswith("\\\n"): + accum += line[:-2] + else: + accum += line + lines.append(accum) + accum = "" + +def _strip_trailing_slash(path): + """Removes any trailing slash from 'path'.""" + return path[:-1] if path.endswith("/") else path + +def _clean_up_path(path): + """Strips any initial "./" and trailing slash from 'path'.""" + if path.startswith("./"): + path = path[2:] + return _strip_trailing_slash(path) + +# +# Error handling +# + +class Kconfig_Syntax_Error(Exception): + """Exception raised for syntax errors.""" + pass + +class Internal_Error(Exception): + """Exception raised for internal errors.""" + pass + +def _tokenization_error(s, index, filename, linenr): + if filename is not None: + assert linenr is not None + sys.stderr.write("{0}:{1}:\n".format(filename, linenr)) + + if s.endswith("\n"): + s = s[:-1] + + # Calculate the visual offset corresponding to index 'index' in 's' + # assuming tabstops are spaced 8 characters apart + vis_index = 0 + for c in s[:index]: + if c == "\t": + vis_index = (vis_index + 8) & ~7 + else: + vis_index += 1 + + # Don't output actual tabs to be independent of how the terminal renders + # them + s = s.expandtabs() + + raise Kconfig_Syntax_Error, ( + _sep_lines("Error during tokenization at location indicated by caret.\n", + s, + " " * vis_index + "^\n")) + +def _parse_error(s, msg, filename, linenr): + error_str = "" + + if filename is not None: + assert linenr is not None + error_str += "{0}:{1}: ".format(filename, linenr) + + if s.endswith("\n"): + s = s[:-1] + + error_str += 'Error while parsing "{0}"'.format(s) + \ + ("." if msg is None else ": " + msg) + + raise Kconfig_Syntax_Error, error_str + +def _internal_error(msg): + msg += "\nSorry! You may want to send an email to kconfiglib@gmail.com " \ + "to tell me about this. Include the message above and the stack " \ + "trace and describe what you were doing." + + raise Internal_Error, msg + +if use_psyco: + import psyco + + Config._tokenize = psyco.proxy(Config._tokenize) + Config._eval_expr = psyco.proxy(Config._eval_expr) + + _indentation = psyco.proxy(_indentation) + _get_lines = psyco.proxy(_get_lines) diff --git a/tools/buildman/test.py b/tools/buildman/test.py index a51c942..a2a85ac 100644 --- a/tools/buildman/test.py +++ b/tools/buildman/test.py @@ -21,20 +21,21 @@ import builder import control import command import commit +import terminal import toolchain errors = [ '''main.c: In function 'main_loop': main.c:260:6: warning: unused variable 'joe' [-Wunused-variable] ''', - '''main.c: In function 'main_loop': + '''main.c: In function 'main_loop2': main.c:295:2: error: 'fred' undeclared (first use in this function) main.c:295:2: note: each undeclared identifier is reported only once for each function it appears in make[1]: *** [main.o] Error 1 make: *** [common/libcommon.o] Error 2 Make failed ''', - '''main.c: In function 'main_loop': + '''main.c: In function 'main_loop3': main.c:280:6: warning: unused variable 'mary' [-Wunused-variable] ''', '''powerpc-linux-ld: warning: dot moved backwards before `.bss' @@ -45,6 +46,20 @@ powerpc-linux-ld: u-boot: section .reloc lma 0xffffa400 overlaps previous sectio powerpc-linux-ld: u-boot: section .data lma 0xffffcd38 overlaps previous sections powerpc-linux-ld: u-boot: section .u_boot_cmd lma 0xffffeb40 overlaps previous sections powerpc-linux-ld: u-boot: section .bootpg lma 0xfffff198 overlaps previous sections +''', + '''In file included from %(basedir)sarch/sandbox/cpu/cpu.c:9:0: +%(basedir)sarch/sandbox/include/asm/state.h:44:0: warning: "xxxx" redefined [enabled by default] +%(basedir)sarch/sandbox/include/asm/state.h:43:0: note: this is the location of the previous definition +%(basedir)sarch/sandbox/cpu/cpu.c: In function 'do_reset': +%(basedir)sarch/sandbox/cpu/cpu.c:27:1: error: unknown type name 'blah' +%(basedir)sarch/sandbox/cpu/cpu.c:28:12: error: expected declaration specifiers or '...' before numeric constant +make[2]: *** [arch/sandbox/cpu/cpu.o] Error 1 +make[1]: *** [arch/sandbox/cpu] Error 2 +make[1]: *** Waiting for unfinished jobs.... +In file included from %(basedir)scommon/board_f.c:55:0: +%(basedir)sarch/sandbox/include/asm/state.h:44:0: warning: "xxxx" redefined [enabled by default] +%(basedir)sarch/sandbox/include/asm/state.h:43:0: note: this is the location of the previous definition +make: *** [sub-make] Error 2 ''' ] @@ -56,7 +71,8 @@ commits = [ ['9012', 'Third commit, error', 1, errors[0:2]], ['3456', 'Fourth commit, warning', 0, [errors[0], errors[2]]], ['7890', 'Fifth commit, link errors', 1, [errors[0], errors[3]]], - ['abcd', 'Sixth commit, fixes all errors', 0, []] + ['abcd', 'Sixth commit, fixes all errors', 0, []], + ['ef01', 'Seventh commit, check directory suppression', 1, [errors[4]]], ] boards = [ @@ -103,16 +119,24 @@ class TestBuild(unittest.TestCase): self.toolchains.Add('powerpc-linux-gcc', test=False) self.toolchains.Add('gcc', test=False) + # Avoid sending any output + terminal.SetPrintTestMode() + self._col = terminal.Color() + def Make(self, commit, brd, stage, *args, **kwargs): + global base_dir + result = command.CommandResult() boardnum = int(brd.target[-1]) result.return_code = 0 result.stderr = '' result.stdout = ('This is the test output for board %s, commit %s' % (brd.target, commit.hash)) - if boardnum >= 1 and boardnum >= commit.sequence: + if ((boardnum >= 1 and boardnum >= commit.sequence) or + boardnum == 4 and commit.sequence == 6): result.return_code = commit.return_code - result.stderr = ''.join(commit.error_list) + result.stderr = (''.join(commit.error_list) + % {'basedir' : base_dir + '/.bm-work/00/'}) if stage == 'build': target_dir = None for arg in args: @@ -121,25 +145,129 @@ class TestBuild(unittest.TestCase): if not os.path.isdir(target_dir): os.mkdir(target_dir) - #time.sleep(.2 + boardnum * .2) result.combined = result.stdout + result.stderr return result - def testBasic(self): - """Test basic builder operation""" - output_dir = tempfile.mkdtemp() - if not os.path.isdir(output_dir): - os.mkdir(output_dir) - build = builder.Builder(self.toolchains, output_dir, None, 1, 2, + def assertSummary(self, text, arch, plus, boards, ok=False): + col = self._col + expected_colour = col.GREEN if ok else col.RED + expect = '%10s: ' % arch + # TODO(sjg@chromium.org): If plus is '', we shouldn't need this + expect += col.Color(expected_colour, plus) + expect += ' ' + for board in boards: + expect += col.Color(expected_colour, ' %s' % board) + self.assertEqual(text, expect) + + def testOutput(self): + """Test basic builder operation and output + + This does a line-by-line verification of the summary output. + """ + global base_dir + + base_dir = tempfile.mkdtemp() + if not os.path.isdir(base_dir): + os.mkdir(base_dir) + build = builder.Builder(self.toolchains, base_dir, None, 1, 2, checkout=False, show_unknown=False) build.do_make = self.Make board_selected = self.boards.GetSelectedDict() build.BuildBoards(self.commits, board_selected, keep_outputs=False, verbose=False) + lines = terminal.GetPrintTestLines() + count = 0 + for line in lines: + if line.text.strip(): + count += 1 + + # We should get one starting message, then an update for every commit + # built. + self.assertEqual(count, len(commits) * len(boards) + 1) build.SetDisplayOptions(show_errors=True); build.ShowSummary(self.commits, board_selected) + #terminal.EchoPrintTestLines() + lines = terminal.GetPrintTestLines() + self.assertEqual(lines[0].text, '01: %s' % commits[0][1]) + self.assertEqual(lines[1].text, '02: %s' % commits[1][1]) + + # We expect all archs to fail + col = terminal.Color() + self.assertSummary(lines[2].text, 'sandbox', '+', ['board4']) + self.assertSummary(lines[3].text, 'arm', '+', ['board1']) + self.assertSummary(lines[4].text, 'powerpc', '+', ['board2', 'board3']) + + # Now we should have the compiler warning + self.assertEqual(lines[5].text, 'w+%s' % + errors[0].rstrip().replace('\n', '\nw+')) + self.assertEqual(lines[5].colour, col.MAGENTA) + + self.assertEqual(lines[6].text, '03: %s' % commits[2][1]) + self.assertSummary(lines[7].text, 'sandbox', '+', ['board4']) + self.assertSummary(lines[8].text, 'arm', '', ['board1'], ok=True) + self.assertSummary(lines[9].text, 'powerpc', '+', ['board2', 'board3']) + + # Compiler error + self.assertEqual(lines[10].text, '+%s' % + errors[1].rstrip().replace('\n', '\n+')) + + self.assertEqual(lines[11].text, '04: %s' % commits[3][1]) + self.assertSummary(lines[12].text, 'sandbox', '', ['board4'], ok=True) + self.assertSummary(lines[13].text, 'powerpc', '', ['board2', 'board3'], + ok=True) + + # Compile error fixed + self.assertEqual(lines[14].text, '-%s' % + errors[1].rstrip().replace('\n', '\n-')) + self.assertEqual(lines[14].colour, col.GREEN) + + self.assertEqual(lines[15].text, 'w+%s' % + errors[2].rstrip().replace('\n', '\nw+')) + self.assertEqual(lines[15].colour, col.MAGENTA) + + self.assertEqual(lines[16].text, '05: %s' % commits[4][1]) + self.assertSummary(lines[17].text, 'sandbox', '+', ['board4']) + self.assertSummary(lines[18].text, 'powerpc', '', ['board3'], ok=True) + + # The second line of errors[3] is a duplicate, so buildman will drop it + expect = errors[3].rstrip().split('\n') + expect = [expect[0]] + expect[2:] + self.assertEqual(lines[19].text, '+%s' % + '\n'.join(expect).replace('\n', '\n+')) + + self.assertEqual(lines[20].text, 'w-%s' % + errors[2].rstrip().replace('\n', '\nw-')) + + self.assertEqual(lines[21].text, '06: %s' % commits[5][1]) + self.assertSummary(lines[22].text, 'sandbox', '', ['board4'], ok=True) + + # The second line of errors[3] is a duplicate, so buildman will drop it + expect = errors[3].rstrip().split('\n') + expect = [expect[0]] + expect[2:] + self.assertEqual(lines[23].text, '-%s' % + '\n'.join(expect).replace('\n', '\n-')) + + self.assertEqual(lines[24].text, 'w-%s' % + errors[0].rstrip().replace('\n', '\nw-')) + + self.assertEqual(lines[25].text, '07: %s' % commits[6][1]) + self.assertSummary(lines[26].text, 'sandbox', '+', ['board4']) + + # Pick out the correct error lines + expect_str = errors[4].rstrip().replace('%(basedir)s', '').split('\n') + expect = expect_str[3:8] + [expect_str[-1]] + self.assertEqual(lines[27].text, '+%s' % + '\n'.join(expect).replace('\n', '\n+')) + + # Now the warnings lines + expect = [expect_str[0]] + expect_str[10:12] + [expect_str[9]] + self.assertEqual(lines[28].text, 'w+%s' % + '\n'.join(expect).replace('\n', '\nw+')) + + self.assertEqual(len(lines), 29) + shutil.rmtree(base_dir) def _testGit(self): """Test basic builder operation by building a branch""" @@ -164,6 +292,7 @@ class TestBuild(unittest.TestCase): options.keep_outputs = False args = ['tegra20'] control.DoBuildman(options, args) + shutil.rmtree(base_dir) def testBoardSingle(self): """Test single board selection""" diff --git a/tools/buildman/toolchain.py b/tools/buildman/toolchain.py index 1b9771f..27dc318 100644 --- a/tools/buildman/toolchain.py +++ b/tools/buildman/toolchain.py @@ -99,6 +99,9 @@ class Toolchains: def __init__(self): self.toolchains = {} self.paths = [] + self._make_flags = dict(bsettings.GetItems('make-flags')) + + def GetSettings(self): toolchains = bsettings.GetItems('toolchain') if not toolchains: print ("Warning: No tool chains - please add a [toolchain] section" @@ -110,7 +113,6 @@ class Toolchains: self.paths += glob.glob(value) else: self.paths.append(value) - self._make_flags = dict(bsettings.GetItems('make-flags')) def Add(self, fname, test=True, verbose=False): """Add a toolchain to our list @@ -198,7 +200,7 @@ class Toolchains: >>> tcs.ResolveReferences(var_dict, 'this=${oblique}_set${first}nd') 'this=OBLIQUE_setfi2ndrstnd' """ - re_var = re.compile('(\$\{[a-z0-9A-Z]{1,}\})') + re_var = re.compile('(\$\{[-_a-z0-9A-Z]{1,}\})') while True: m = re_var.search(args) diff --git a/tools/env/Makefile b/tools/env/Makefile index 4927489..40164f7 100644 --- a/tools/env/Makefile +++ b/tools/env/Makefile @@ -21,14 +21,16 @@ HOST_EXTRACFLAGS += -DMTD_OLD endif always := fw_printenv -hostprogs-y := fw_printenv_unstripped +hostprogs-y := fw_printenv -fw_printenv_unstripped-objs := fw_env.o fw_env_main.o \ +fw_printenv-objs := fw_env.o fw_env_main.o \ crc32.o ctype.o linux_string.o \ env_attr.o env_flags.o aes.o -quiet_cmd_strip = STRIP $@ - cmd_strip = $(STRIP) -o $@ $< +quiet_cmd_crosstools_strip = STRIP $^ + cmd_crosstools_strip = $(STRIP) $^; touch $@ -$(obj)/fw_printenv: $(obj)/fw_printenv_unstripped FORCE - $(call if_changed,strip) +$(obj)/.strip: $(obj)/fw_printenv + $(call cmd,crosstools_strip) + +always += .strip diff --git a/tools/genboardscfg.py b/tools/genboardscfg.py index e6870f5..23c956b 100755 --- a/tools/genboardscfg.py +++ b/tools/genboardscfg.py @@ -6,34 +6,33 @@ # """ -Converter from Kconfig and MAINTAINERS to boards.cfg +Converter from Kconfig and MAINTAINERS to a board database. -Run 'tools/genboardscfg.py' to create boards.cfg file. +Run 'tools/genboardscfg.py' to create a board database. Run 'tools/genboardscfg.py -h' for available options. -This script only works on python 2.6 or later, but not python 3.x. +Python 2.6 or later, but not Python 3.x is necessary to run this script. """ import errno import fnmatch import glob +import multiprocessing import optparse import os -import re -import shutil import subprocess import sys import tempfile import time -BOARD_FILE = 'boards.cfg' -CONFIG_DIR = 'configs' -REFORMAT_CMD = [os.path.join('tools', 'reformat.py'), - '-i', '-d', '-', '-s', '8'] -SHOW_GNU_MAKE = 'scripts/show-gnu-make' -SLEEP_TIME=0.003 +sys.path.append(os.path.join(os.path.dirname(__file__), 'buildman')) +import kconfiglib +### constant variables ### +OUTPUT_FILE = 'boards.cfg' +CONFIG_DIR = 'configs' +SLEEP_TIME = 0.03 COMMENT_BLOCK = '''# # List of boards # Automatically generated by %s: don't edit @@ -43,35 +42,14 @@ COMMENT_BLOCK = '''# ''' % __file__ ### helper functions ### -def get_terminal_columns(): - """Get the width of the terminal. - - Returns: - The width of the terminal, or zero if the stdout is not - associated with tty. - """ +def try_remove(f): + """Remove a file ignoring 'No such file or directory' error.""" try: - return shutil.get_terminal_size().columns # Python 3.3~ - except AttributeError: - import fcntl - import termios - import struct - arg = struct.pack('hhhh', 0, 0, 0, 0) - try: - ret = fcntl.ioctl(sys.stdout.fileno(), termios.TIOCGWINSZ, arg) - except IOError as exception: - # If 'Inappropriate ioctl for device' error occurs, - # stdout is probably redirected. Return 0. - return 0 - return struct.unpack('hhhh', ret)[1] - -def get_devnull(): - """Get the file object of '/dev/null' device.""" - try: - devnull = subprocess.DEVNULL # py3k - except AttributeError: - devnull = open(os.devnull, 'wb') - return devnull + os.remove(f) + except OSError as exception: + # Ignore 'No such file or directory' error + if exception.errno != errno.ENOENT: + raise def check_top_directory(): """Exit if we are not at the top of source directory.""" @@ -79,23 +57,15 @@ def check_top_directory(): if not os.path.exists(f): sys.exit('Please run at the top of source directory.') -def get_make_cmd(): - """Get the command name of GNU Make.""" - process = subprocess.Popen([SHOW_GNU_MAKE], stdout=subprocess.PIPE) - ret = process.communicate() - if process.returncode: - sys.exit('GNU Make not found') - return ret[0].rstrip() - -def output_is_new(): - """Check if the boards.cfg file is up to date. +def output_is_new(output): + """Check if the output file is up to date. Returns: - True if the boards.cfg file exists and is newer than any of + True if the given output file exists and is newer than any of *_defconfig, MAINTAINERS and Kconfig*. False otherwise. """ try: - ctime = os.path.getctime(BOARD_FILE) + ctime = os.path.getctime(output) except OSError as exception: if exception.errno == errno.ENOENT: # return False on 'No such file or directory' error @@ -121,9 +91,9 @@ def output_is_new(): if ctime < os.path.getctime(filepath): return False - # Detect a board that has been removed since the current boards.cfg + # Detect a board that has been removed since the current board database # was generated - with open(BOARD_FILE) as f: + with open(output) as f: for line in f: if line[0] == '#' or line == '\n': continue @@ -134,6 +104,172 @@ def output_is_new(): return True ### classes ### +class KconfigScanner: + + """Kconfig scanner.""" + + ### constant variable only used in this class ### + _SYMBOL_TABLE = { + 'arch' : 'SYS_ARCH', + 'cpu' : 'SYS_CPU', + 'soc' : 'SYS_SOC', + 'vendor' : 'SYS_VENDOR', + 'board' : 'SYS_BOARD', + 'config' : 'SYS_CONFIG_NAME', + 'options' : 'SYS_EXTRA_OPTIONS' + } + + def __init__(self): + """Scan all the Kconfig files and create a Config object.""" + # Define environment variables referenced from Kconfig + os.environ['srctree'] = os.getcwd() + os.environ['UBOOTVERSION'] = 'dummy' + os.environ['KCONFIG_OBJDIR'] = '' + self._conf = kconfiglib.Config() + + def __del__(self): + """Delete a leftover temporary file before exit. + + The scan() method of this class creates a temporay file and deletes + it on success. If scan() method throws an exception on the way, + the temporary file might be left over. In that case, it should be + deleted in this destructor. + """ + if hasattr(self, '_tmpfile') and self._tmpfile: + try_remove(self._tmpfile) + + def scan(self, defconfig): + """Load a defconfig file to obtain board parameters. + + Arguments: + defconfig: path to the defconfig file to be processed + + Returns: + A dictionary of board parameters. It has a form of: + { + 'arch': , + 'cpu': , + 'soc': , + 'vendor': , + 'board': , + 'target': , + 'config': , + 'options': + } + """ + # strip special prefixes and save it in a temporary file + fd, self._tmpfile = tempfile.mkstemp() + with os.fdopen(fd, 'w') as f: + for line in open(defconfig): + colon = line.find(':CONFIG_') + if colon == -1: + f.write(line) + else: + f.write(line[colon + 1:]) + + self._conf.load_config(self._tmpfile) + + try_remove(self._tmpfile) + self._tmpfile = None + + params = {} + + # Get the value of CONFIG_SYS_ARCH, CONFIG_SYS_CPU, ... etc. + # Set '-' if the value is empty. + for key, symbol in self._SYMBOL_TABLE.items(): + value = self._conf.get_symbol(symbol).get_value() + if value: + params[key] = value + else: + params[key] = '-' + + defconfig = os.path.basename(defconfig) + params['target'], match, rear = defconfig.partition('_defconfig') + assert match and not rear, '%s : invalid defconfig' % defconfig + + # fix-up for aarch64 + if params['arch'] == 'arm' and params['cpu'] == 'armv8': + params['arch'] = 'aarch64' + + # fix-up options field. It should have the form: + # [:comma separated config options] + if params['options'] != '-': + params['options'] = params['config'] + ':' + \ + params['options'].replace(r'\"', '"') + elif params['config'] != params['target']: + params['options'] = params['config'] + + return params + +def scan_defconfigs_for_multiprocess(queue, defconfigs): + """Scan defconfig files and queue their board parameters + + This function is intended to be passed to + multiprocessing.Process() constructor. + + Arguments: + queue: An instance of multiprocessing.Queue(). + The resulting board parameters are written into it. + defconfigs: A sequence of defconfig files to be scanned. + """ + kconf_scanner = KconfigScanner() + for defconfig in defconfigs: + queue.put(kconf_scanner.scan(defconfig)) + +def read_queues(queues, params_list): + """Read the queues and append the data to the paramers list""" + for q in queues: + while not q.empty(): + params_list.append(q.get()) + +def scan_defconfigs(jobs=1): + """Collect board parameters for all defconfig files. + + This function invokes multiple processes for faster processing. + + Arguments: + jobs: The number of jobs to run simultaneously + """ + all_defconfigs = [] + for (dirpath, dirnames, filenames) in os.walk(CONFIG_DIR): + for filename in fnmatch.filter(filenames, '*_defconfig'): + if fnmatch.fnmatch(filename, '.*'): + continue + all_defconfigs.append(os.path.join(dirpath, filename)) + + total_boards = len(all_defconfigs) + processes = [] + queues = [] + for i in range(jobs): + defconfigs = all_defconfigs[total_boards * i / jobs : + total_boards * (i + 1) / jobs] + q = multiprocessing.Queue(maxsize=-1) + p = multiprocessing.Process(target=scan_defconfigs_for_multiprocess, + args=(q, defconfigs)) + p.start() + processes.append(p) + queues.append(q) + + # The resulting data should be accumulated to this list + params_list = [] + + # Data in the queues should be retrieved preriodically. + # Otherwise, the queues would become full and subprocesses would get stuck. + while any([p.is_alive() for p in processes]): + read_queues(queues, params_list) + # sleep for a while until the queues are filled + time.sleep(SLEEP_TIME) + + # Joining subprocesses just in case + # (All subprocesses should already have been finished) + for p in processes: + p.join() + + # retrieve leftover data + read_queues(queues, params_list) + + return params_list + class MaintainersDatabase: """The database of board status and maintainers.""" @@ -145,8 +281,12 @@ class MaintainersDatabase: def get_status(self, target): """Return the status of the given board. + The board status is generally either 'Active' or 'Orphan'. + Display a warning message and return '-' if status information + is not found. + Returns: - Either 'Active' or 'Orphan' + 'Active', 'Orphan' or '-'. """ if not target in self.database: print >> sys.stderr, "WARNING: no status info for '%s'" % target @@ -165,8 +305,9 @@ class MaintainersDatabase: def get_maintainers(self, target): """Return the maintainers of the given board. - If the board has two or more maintainers, they are separated - with colons. + Returns: + Maintainers of the board. If the board has two or more maintainers, + they are separated with colons. """ if not target in self.database: print >> sys.stderr, "WARNING: no maintainers for '%s'" % target @@ -175,10 +316,10 @@ class MaintainersDatabase: return ':'.join(self.database[target][1]) def parse_file(self, file): - """Parse the given MAINTAINERS file. + """Parse a MAINTAINERS file. - This method parses MAINTAINERS and add board status and - maintainers information to the database. + Parse a MAINTAINERS file and accumulates board status and + maintainers information. Arguments: file: MAINTAINERS file to be parsed @@ -187,6 +328,9 @@ class MaintainersDatabase: maintainers = [] status = '-' for line in open(file): + # Check also commented maintainers + if line[:3] == '#M:': + line = line[1:] tag, rest = line[:2], line[2:].strip() if tag == 'M:': maintainers.append(rest) @@ -210,414 +354,91 @@ class MaintainersDatabase: for target in targets: self.database[target] = (status, maintainers) -class DotConfigParser: +def insert_maintainers_info(params_list): + """Add Status and Maintainers information to the board parameters list. - """A parser of .config file. - - Each line of the output should have the form of: - Status, Arch, CPU, SoC, Vendor, Board, Target, Options, Maintainers - Most of them are extracted from .config file. - MAINTAINERS files are also consulted for Status and Maintainers fields. + Arguments: + params_list: A list of the board parameters """ + database = MaintainersDatabase() + for (dirpath, dirnames, filenames) in os.walk('.'): + if 'MAINTAINERS' in filenames: + database.parse_file(os.path.join(dirpath, 'MAINTAINERS')) - re_arch = re.compile(r'CONFIG_SYS_ARCH="(.*)"') - re_cpu = re.compile(r'CONFIG_SYS_CPU="(.*)"') - re_soc = re.compile(r'CONFIG_SYS_SOC="(.*)"') - re_vendor = re.compile(r'CONFIG_SYS_VENDOR="(.*)"') - re_board = re.compile(r'CONFIG_SYS_BOARD="(.*)"') - re_config = re.compile(r'CONFIG_SYS_CONFIG_NAME="(.*)"') - re_options = re.compile(r'CONFIG_SYS_EXTRA_OPTIONS="(.*)"') - re_list = (('arch', re_arch), ('cpu', re_cpu), ('soc', re_soc), - ('vendor', re_vendor), ('board', re_board), - ('config', re_config), ('options', re_options)) - must_fields = ('arch', 'config') - - def __init__(self, build_dir, output, maintainers_database): - """Create a new .config perser. + for i, params in enumerate(params_list): + target = params['target'] + params['status'] = database.get_status(target) + params['maintainers'] = database.get_maintainers(target) + params_list[i] = params - Arguments: - build_dir: Build directory where .config is located - output: File object which the result is written to - maintainers_database: An instance of class MaintainersDatabase - """ - self.dotconfig = os.path.join(build_dir, '.config') - self.output = output - self.database = maintainers_database +def format_and_output(params_list, output): + """Write board parameters into a file. - def parse(self, defconfig): - """Parse .config file and output one-line database for the given board. - - Arguments: - defconfig: Board (defconfig) name - """ - fields = {} - for line in open(self.dotconfig): - if not line.startswith('CONFIG_SYS_'): - continue - for (key, pattern) in self.re_list: - m = pattern.match(line) - if m and m.group(1): - fields[key] = m.group(1) - break - - # sanity check of '.config' file - for field in self.must_fields: - if not field in fields: - print >> sys.stderr, ( - "WARNING: '%s' is not defined in '%s'. Skip." % - (field, defconfig)) - return + Columnate the board parameters, sort lines alphabetically, + and then write them to a file. - # fix-up for aarch64 - if fields['arch'] == 'arm' and 'cpu' in fields: - if fields['cpu'] == 'armv8': - fields['arch'] = 'aarch64' - - target, match, rear = defconfig.partition('_defconfig') - assert match and not rear, \ - '%s : invalid defconfig file name' % defconfig - - fields['status'] = self.database.get_status(target) - fields['maintainers'] = self.database.get_maintainers(target) - - if 'options' in fields: - options = fields['config'] + ':' + \ - fields['options'].replace(r'\"', '"') - elif fields['config'] != target: - options = fields['config'] - else: - options = '-' - - self.output.write((' '.join(['%s'] * 9) + '\n') % - (fields['status'], - fields['arch'], - fields.get('cpu', '-'), - fields.get('soc', '-'), - fields.get('vendor', '-'), - fields.get('board', '-'), - target, - options, - fields['maintainers'])) - -class Slot: - - """A slot to store a subprocess. - - Each instance of this class handles one subprocess. - This class is useful to control multiple processes - for faster processing. + Arguments: + params_list: The list of board parameters + output: The path to the output file """ + FIELDS = ('status', 'arch', 'cpu', 'soc', 'vendor', 'board', 'target', + 'options', 'maintainers') - def __init__(self, output, maintainers_database, devnull, make_cmd): - """Create a new slot. - - Arguments: - output: File object which the result is written to - maintainers_database: An instance of class MaintainersDatabase - devnull: file object of 'dev/null' - make_cmd: the command name of Make - """ - self.build_dir = tempfile.mkdtemp() - self.devnull = devnull - self.ps = subprocess.Popen([make_cmd, 'O=' + self.build_dir, - 'allnoconfig'], stdout=devnull) - self.occupied = True - self.parser = DotConfigParser(self.build_dir, output, - maintainers_database) - self.env = os.environ.copy() - self.env['srctree'] = os.getcwd() - self.env['UBOOTVERSION'] = 'dummy' - self.env['KCONFIG_OBJDIR'] = '' - - def __del__(self): - """Delete the working directory""" - if not self.occupied: - while self.ps.poll() == None: - pass - shutil.rmtree(self.build_dir) - - def add(self, defconfig): - """Add a new subprocess to the slot. + # First, decide the width of each column + max_length = dict([ (f, 0) for f in FIELDS]) + for params in params_list: + for f in FIELDS: + max_length[f] = max(max_length[f], len(params[f])) - Fails if the slot is occupied, that is, the current subprocess - is still running. + output_lines = [] + for params in params_list: + line = '' + for f in FIELDS: + # insert two spaces between fields like column -t would + line += ' ' + params[f].ljust(max_length[f]) + output_lines.append(line.strip()) - Arguments: - defconfig: Board (defconfig) name - - Returns: - Return True on success or False on fail - """ - if self.occupied: - return False - - with open(os.path.join(self.build_dir, '.tmp_defconfig'), 'w') as f: - for line in open(os.path.join(CONFIG_DIR, defconfig)): - colon = line.find(':CONFIG_') - if colon == -1: - f.write(line) - else: - f.write(line[colon + 1:]) - - self.ps = subprocess.Popen([os.path.join('scripts', 'kconfig', 'conf'), - '--defconfig=.tmp_defconfig', 'Kconfig'], - stdout=self.devnull, - cwd=self.build_dir, - env=self.env) - - self.defconfig = defconfig - self.occupied = True - return True - - def wait(self): - """Wait until the current subprocess finishes.""" - while self.occupied and self.ps.poll() == None: - time.sleep(SLEEP_TIME) - self.occupied = False - - def poll(self): - """Check if the subprocess is running and invoke the .config - parser if the subprocess is terminated. - - Returns: - Return True if the subprocess is terminated, False otherwise - """ - if not self.occupied: - return True - if self.ps.poll() == None: - return False - if self.ps.poll() == 0: - self.parser.parse(self.defconfig) - else: - print >> sys.stderr, ("WARNING: failed to process '%s'. skip." % - self.defconfig) - self.occupied = False - return True - -class Slots: - - """Controller of the array of subprocess slots.""" - - def __init__(self, jobs, output, maintainers_database): - """Create a new slots controller. - - Arguments: - jobs: A number of slots to instantiate - output: File object which the result is written to - maintainers_database: An instance of class MaintainersDatabase - """ - self.slots = [] - devnull = get_devnull() - make_cmd = get_make_cmd() - for i in range(jobs): - self.slots.append(Slot(output, maintainers_database, - devnull, make_cmd)) - for slot in self.slots: - slot.wait() - - def add(self, defconfig): - """Add a new subprocess if a vacant slot is available. - - Arguments: - defconfig: Board (defconfig) name - - Returns: - Return True on success or False on fail - """ - for slot in self.slots: - if slot.add(defconfig): - return True - return False - - def available(self): - """Check if there is a vacant slot. - - Returns: - Return True if a vacant slot is found, False if all slots are full - """ - for slot in self.slots: - if slot.poll(): - return True - return False - - def empty(self): - """Check if all slots are vacant. - - Returns: - Return True if all slots are vacant, False if at least one slot - is running - """ - ret = True - for slot in self.slots: - if not slot.poll(): - ret = False - return ret - -class Indicator: - - """A class to control the progress indicator.""" - - MIN_WIDTH = 15 - MAX_WIDTH = 70 - - def __init__(self, total): - """Create an instance. - - Arguments: - total: A number of boards - """ - self.total = total - self.cur = 0 - width = get_terminal_columns() - width = min(width, self.MAX_WIDTH) - width -= self.MIN_WIDTH - if width > 0: - self.enabled = True - else: - self.enabled = False - self.width = width - - def inc(self): - """Increment the counter and show the progress bar.""" - if not self.enabled: - return - self.cur += 1 - arrow_len = self.width * self.cur // self.total - msg = '%4d/%d [' % (self.cur, self.total) - msg += '=' * arrow_len + '>' + ' ' * (self.width - arrow_len) + ']' - sys.stdout.write('\r' + msg) - sys.stdout.flush() - -class BoardsFileGenerator: - - """Generator of boards.cfg.""" - - def __init__(self): - """Prepare basic things for generating boards.cfg.""" - # All the defconfig files to be processed - defconfigs = [] - for (dirpath, dirnames, filenames) in os.walk(CONFIG_DIR): - dirpath = dirpath[len(CONFIG_DIR) + 1:] - for filename in fnmatch.filter(filenames, '*_defconfig'): - if fnmatch.fnmatch(filename, '.*'): - continue - defconfigs.append(os.path.join(dirpath, filename)) - self.defconfigs = defconfigs - self.indicator = Indicator(len(defconfigs)) - - # Parse all the MAINTAINERS files - maintainers_database = MaintainersDatabase() - for (dirpath, dirnames, filenames) in os.walk('.'): - if 'MAINTAINERS' in filenames: - maintainers_database.parse_file(os.path.join(dirpath, - 'MAINTAINERS')) - self.maintainers_database = maintainers_database - - def __del__(self): - """Delete the incomplete boards.cfg - - This destructor deletes boards.cfg if the private member 'in_progress' - is defined as True. The 'in_progress' member is set to True at the - beginning of the generate() method and set to False at its end. - So, in_progress==True means generating boards.cfg was terminated - on the way. - """ + # ignore case when sorting + output_lines.sort(key=str.lower) - if hasattr(self, 'in_progress') and self.in_progress: - try: - os.remove(BOARD_FILE) - except OSError as exception: - # Ignore 'No such file or directory' error - if exception.errno != errno.ENOENT: - raise - print 'Removed incomplete %s' % BOARD_FILE + with open(output, 'w') as f: + f.write(COMMENT_BLOCK + '\n'.join(output_lines) + '\n') - def generate(self, jobs): - """Generate boards.cfg - - This method sets the 'in_progress' member to True at the beginning - and sets it to False on success. The boards.cfg should not be - touched before/after this method because 'in_progress' is used - to detect the incomplete boards.cfg. - - Arguments: - jobs: The number of jobs to run simultaneously - """ - - self.in_progress = True - print 'Generating %s ... (jobs: %d)' % (BOARD_FILE, jobs) - - # Output lines should be piped into the reformat tool - reformat_process = subprocess.Popen(REFORMAT_CMD, - stdin=subprocess.PIPE, - stdout=open(BOARD_FILE, 'w')) - pipe = reformat_process.stdin - pipe.write(COMMENT_BLOCK) - - slots = Slots(jobs, pipe, self.maintainers_database) - - # Main loop to process defconfig files: - # Add a new subprocess into a vacant slot. - # Sleep if there is no available slot. - for defconfig in self.defconfigs: - while not slots.add(defconfig): - while not slots.available(): - # No available slot: sleep for a while - time.sleep(SLEEP_TIME) - self.indicator.inc() - - # wait until all the subprocesses finish - while not slots.empty(): - time.sleep(SLEEP_TIME) - print '' - - # wait until the reformat tool finishes - reformat_process.communicate() - if reformat_process.returncode != 0: - sys.exit('"%s" failed' % REFORMAT_CMD[0]) - - self.in_progress = False - -def gen_boards_cfg(jobs=1, force=False): - """Generate boards.cfg file. - - The incomplete boards.cfg is deleted if an error (including - the termination by the keyboard interrupt) occurs on the halfway. +def gen_boards_cfg(output, jobs=1, force=False): + """Generate a board database file. Arguments: + output: The name of the output file jobs: The number of jobs to run simultaneously + force: Force to generate the output even if it is new """ check_top_directory() - if not force and output_is_new(): - print "%s is up to date. Nothing to do." % BOARD_FILE + + if not force and output_is_new(output): + print "%s is up to date. Nothing to do." % output sys.exit(0) - generator = BoardsFileGenerator() - generator.generate(jobs) + params_list = scan_defconfigs(jobs) + insert_maintainers_info(params_list) + format_and_output(params_list, output) def main(): + try: + cpu_count = multiprocessing.cpu_count() + except NotImplementedError: + cpu_count = 1 + parser = optparse.OptionParser() # Add options here - parser.add_option('-j', '--jobs', - help='the number of jobs to run simultaneously') parser.add_option('-f', '--force', action="store_true", default=False, help='regenerate the output even if it is new') + parser.add_option('-j', '--jobs', type='int', default=cpu_count, + help='the number of jobs to run simultaneously') + parser.add_option('-o', '--output', default=OUTPUT_FILE, + help='output file [default=%s]' % OUTPUT_FILE) (options, args) = parser.parse_args() - if options.jobs: - try: - jobs = int(options.jobs) - except ValueError: - sys.exit('Option -j (--jobs) takes a number') - else: - try: - jobs = int(subprocess.Popen(['getconf', '_NPROCESSORS_ONLN'], - stdout=subprocess.PIPE).communicate()[0]) - except (OSError, ValueError): - print 'info: failed to get the number of CPUs. Set jobs to 1' - jobs = 1 - - gen_boards_cfg(jobs, force=options.force) + gen_boards_cfg(options.output, jobs=options.jobs, force=options.force) if __name__ == '__main__': main() diff --git a/tools/imximage.c b/tools/imximage.c index 18dc051..faba238 100644 --- a/tools/imximage.c +++ b/tools/imximage.c @@ -568,6 +568,13 @@ static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd, /* Parse dcd configuration file */ dcd_len = parse_cfg_file(imxhdr, params->imagename); + if (imximage_version == IMXIMAGE_V2) { + if (imximage_init_loadsize < imximage_ivt_offset + + sizeof(imx_header_v2_t)) + imximage_init_loadsize = imximage_ivt_offset + + sizeof(imx_header_v2_t); + } + /* Set the imx header */ (*set_imx_hdr)(imxhdr, dcd_len, params->ep, imximage_ivt_offset); diff --git a/tools/imximage.h b/tools/imximage.h index 01f861e..5b5ad0e 100644 --- a/tools/imximage.h +++ b/tools/imximage.h @@ -8,7 +8,7 @@ #ifndef _IMXIMAGE_H_ #define _IMXIMAGE_H_ -#define MAX_HW_CFG_SIZE_V2 121 /* Max number of registers imx can set for v2 */ +#define MAX_HW_CFG_SIZE_V2 220 /* Max number of registers imx can set for v2 */ #define MAX_HW_CFG_SIZE_V1 60 /* Max number of registers imx can set for v1 */ #define APP_CODE_BARKER 0xB1 #define DCD_BARKER 0xB17219E9 diff --git a/tools/patman/README b/tools/patman/README index 5fb508b..e466886 100644 --- a/tools/patman/README +++ b/tools/patman/README @@ -27,8 +27,8 @@ Series-to: fred.blogs@napier.co.nz in one of your commits, the series will be sent there. -In Linux this will also call get_maintainer.pl on each of your -patches automatically. +In Linux and U-Boot this will also call get_maintainer.pl on each of your +patches automatically (unless you use -m to disable this). How to use this tool diff --git a/tools/patman/command.py b/tools/patman/command.py index 449d3d0..d586f11 100644 --- a/tools/patman/command.py +++ b/tools/patman/command.py @@ -20,9 +20,25 @@ class CommandResult: def __init__(self): self.stdout = None self.stderr = None + self.combined = None self.return_code = None self.exception = None + def __init__(self, stdout='', stderr='', combined='', return_code=0, + exception=None): + self.stdout = stdout + self.stderr = stderr + self.combined = combined + self.return_code = return_code + self.exception = exception + + +# This permits interception of RunPipe for test purposes. If it is set to +# a function, then that function is called with the pipe list being +# executed. Otherwise, it is assumed to be a CommandResult object, and is +# returned as the result for every RunPipe() call. +# When this value is None, commands are executed as normal. +test_result = None def RunPipe(pipe_list, infile=None, outfile=None, capture=False, capture_stderr=False, oneline=False, @@ -44,10 +60,16 @@ def RunPipe(pipe_list, infile=None, outfile=None, Returns: CommandResult object """ + if test_result: + if hasattr(test_result, '__call__'): + return test_result(pipe_list=pipe_list) + return test_result result = CommandResult() last_pipe = None pipeline = list(pipe_list) user_pipestr = '|'.join([' '.join(pipe) for pipe in pipe_list]) + kwargs['stdout'] = None + kwargs['stderr'] = None while pipeline: cmd = pipeline.pop(0) if last_pipe is not None: diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py index e2b4959..b68df5d 100644 --- a/tools/patman/gitutil.py +++ b/tools/patman/gitutil.py @@ -33,7 +33,7 @@ def LogCmd(commit_range, git_dir=None, oneline=False, reverse=False, cmd = ['git'] if git_dir: cmd += ['--git-dir', git_dir] - cmd += ['log', '--no-color'] + cmd += ['--no-pager', 'log', '--no-color'] if oneline: cmd.append('--oneline') if use_no_decorate: @@ -152,7 +152,8 @@ def Checkout(commit_hash, git_dir=None, work_tree=None, force=False): if force: pipe.append('-f') pipe.append(commit_hash) - result = command.RunPipe([pipe], capture=True, raise_on_error=False) + result = command.RunPipe([pipe], capture=True, raise_on_error=False, + capture_stderr=True) if result.return_code != 0: raise OSError, 'git checkout (%s): %s' % (pipe, result.stderr) @@ -163,7 +164,8 @@ def Clone(git_dir, output_dir): commit_hash: Commit hash to check out """ pipe = ['git', 'clone', git_dir, '.'] - result = command.RunPipe([pipe], capture=True, cwd=output_dir) + result = command.RunPipe([pipe], capture=True, cwd=output_dir, + capture_stderr=True) if result.return_code != 0: raise OSError, 'git clone: %s' % result.stderr @@ -179,7 +181,7 @@ def Fetch(git_dir=None, work_tree=None): if work_tree: pipe.extend(['--work-tree', work_tree]) pipe.append('fetch') - result = command.RunPipe([pipe], capture=True) + result = command.RunPipe([pipe], capture=True, capture_stderr=True) if result.return_code != 0: raise OSError, 'git fetch: %s' % result.stderr @@ -215,94 +217,6 @@ def CreatePatches(start, count, series): else: return None, files -def ApplyPatch(verbose, fname): - """Apply a patch with git am to test it - - TODO: Convert these to use command, with stderr option - - Args: - fname: filename of patch file to apply - """ - col = terminal.Color() - cmd = ['git', 'am', fname] - pipe = subprocess.Popen(cmd, stdout=subprocess.PIPE, - stderr=subprocess.PIPE) - stdout, stderr = pipe.communicate() - re_error = re.compile('^error: patch failed: (.+):(\d+)') - for line in stderr.splitlines(): - if verbose: - print line - match = re_error.match(line) - if match: - print checkpatch.GetWarningMsg(col, 'warning', match.group(1), - int(match.group(2)), 'Patch failed') - return pipe.returncode == 0, stdout - -def ApplyPatches(verbose, args, start_point): - """Apply the patches with git am to make sure all is well - - Args: - verbose: Print out 'git am' output verbatim - args: List of patch files to apply - start_point: Number of commits back from HEAD to start applying. - Normally this is len(args), but it can be larger if a start - offset was given. - """ - error_count = 0 - col = terminal.Color() - - # Figure out our current position - cmd = ['git', 'name-rev', 'HEAD', '--name-only'] - pipe = subprocess.Popen(cmd, stdout=subprocess.PIPE) - stdout, stderr = pipe.communicate() - if pipe.returncode: - str = 'Could not find current commit name' - print col.Color(col.RED, str) - print stdout - return False - old_head = stdout.splitlines()[0] - if old_head == 'undefined': - str = "Invalid HEAD '%s'" % stdout.strip() - print col.Color(col.RED, str) - return False - - # Checkout the required start point - cmd = ['git', 'checkout', 'HEAD~%d' % start_point] - pipe = subprocess.Popen(cmd, stdout=subprocess.PIPE, - stderr=subprocess.PIPE) - stdout, stderr = pipe.communicate() - if pipe.returncode: - str = 'Could not move to commit before patch series' - print col.Color(col.RED, str) - print stdout, stderr - return False - - # Apply all the patches - for fname in args: - ok, stdout = ApplyPatch(verbose, fname) - if not ok: - print col.Color(col.RED, 'git am returned errors for %s: will ' - 'skip this patch' % fname) - if verbose: - print stdout - error_count += 1 - cmd = ['git', 'am', '--skip'] - pipe = subprocess.Popen(cmd, stdout=subprocess.PIPE) - stdout, stderr = pipe.communicate() - if pipe.returncode != 0: - print col.Color(col.RED, 'Unable to skip patch! Aborting...') - print stdout - break - - # Return to our previous position - cmd = ['git', 'checkout', old_head] - pipe = subprocess.Popen(cmd, stdout=subprocess.PIPE, stderr=subprocess.PIPE) - stdout, stderr = pipe.communicate() - if pipe.returncode: - print col.Color(col.RED, 'Could not move back to head commit') - print stdout, stderr - return error_count == 0 - def BuildEmailList(in_list, tag=None, alias=None, raise_on_error=True): """Build a list of email addresses based on an input list. @@ -478,13 +392,13 @@ def LookupEmail(lookup_name, alias=None, raise_on_error=True, level=0): ... OSError: Recursive email alias at 'other' >>> LookupEmail('odd', alias, raise_on_error=False) - \033[1;31mAlias 'odd' not found\033[0m + Alias 'odd' not found [] >>> # In this case the loop part will effectively be ignored. >>> LookupEmail('loop', alias, raise_on_error=False) - \033[1;31mRecursive email alias at 'other'\033[0m - \033[1;31mRecursive email alias at 'john'\033[0m - \033[1;31mRecursive email alias at 'mary'\033[0m + Recursive email alias at 'other' + Recursive email alias at 'john' + Recursive email alias at 'mary' ['j.bloggs@napier.co.nz', 'm.poppins@cloud.net'] """ if not alias: @@ -569,6 +483,8 @@ def GetDefaultUserEmail(): def Setup(): """Set up git utils, by reading the alias files.""" # Check for a git alias file also + global use_no_decorate + alias_fname = GetAliasFile() if alias_fname: settings.ReadGitAliases(alias_fname) diff --git a/tools/patman/patchstream.py b/tools/patman/patchstream.py index 0040468..d630157 100644 --- a/tools/patman/patchstream.py +++ b/tools/patman/patchstream.py @@ -72,7 +72,6 @@ class PatchStream: self.in_change = 0 # Non-zero if we are in a change list self.blank_count = 0 # Number of blank lines stored up self.state = STATE_MSG_HEADER # What state are we in? - self.tags = [] # Tags collected, like Tested-by... self.signoff = [] # Contents of signoff line self.commit = None # Current commit @@ -113,16 +112,6 @@ class PatchStream: self.series.AddCommit(self.commit) self.commit = None - def FormatTags(self, tags): - out_list = [] - for tag in sorted(tags): - if tag.startswith('Cc:'): - tag_list = tag[4:].split(',') - out_list += gitutil.BuildEmailList(tag_list, 'Cc:') - else: - out_list.append(tag) - return out_list - def ProcessLine(self, line): """Process a single line of a patch file or commit log @@ -271,11 +260,11 @@ class PatchStream: elif tag_match.group(1) == 'Patch-cc': self.commit.AddCc(tag_match.group(2).split(',')) else: - self.tags.append(line); + out = [line] # Suppress duplicate signoffs elif signoff_match: - if (self.is_log or + if (self.is_log or not self.commit or self.commit.CheckDuplicateSignoff(signoff_match.group(1))): out = [line] @@ -311,8 +300,10 @@ class PatchStream: # Output the tags (signeoff first), then change list out = [] log = self.series.MakeChangeLog(self.commit) - out += self.FormatTags(self.tags) - out += [line] + self.commit.notes + [''] + log + out += [line] + if self.commit: + out += self.commit.notes + out += [''] + log elif self.found_test: if not re_allowed_after_test.match(line): self.lines_after_test += 1 @@ -364,7 +355,7 @@ class PatchStream: def GetMetaDataForList(commit_range, git_dir=None, count=None, - series = Series()): + series = None, allow_overwrite=False): """Reads out patch series metadata from the commits This does a 'git log' on the relevant commits and pulls out the tags we @@ -376,9 +367,13 @@ def GetMetaDataForList(commit_range, git_dir=None, count=None, count: Number of commits to list, or None for no limit series: Series object to add information into. By default a new series is started. + allow_overwrite: Allow tags to overwrite an existing tag Returns: A Series object containing information about the commits. """ + if not series: + series = Series() + series.allow_overwrite = allow_overwrite params = gitutil.LogCmd(commit_range,reverse=True, count=count, git_dir=git_dir) stdout = command.RunPipe([params], capture=True).stdout diff --git a/tools/patman/patman.py b/tools/patman/patman.py index ca34cb9..6c6473e 100755 --- a/tools/patman/patman.py +++ b/tools/patman/patman.py @@ -25,9 +25,6 @@ import test parser = OptionParser() -parser.add_option('-a', '--no-apply', action='store_false', - dest='apply_patches', default=True, - help="Don't test-apply patches with git am") parser.add_option('-H', '--full-help', action='store_true', dest='full_help', default=False, help='Display the README file') parser.add_option('-c', '--count', dest='count', type='int', @@ -35,6 +32,9 @@ parser.add_option('-c', '--count', dest='count', type='int', parser.add_option('-i', '--ignore-errors', action='store_true', dest='ignore_errors', default=False, help='Send patches email even if patch errors are found') +parser.add_option('-m', '--no-maintainers', action='store_false', + dest='add_maintainers', default=True, + help="Don't cc the file maintainers automatically") parser.add_option('-n', '--dry-run', action='store_true', dest='dry_run', default=False, help="Do a dry run (create but don't email patches)") parser.add_option('-p', '--project', default=project.DetectProject(), @@ -143,23 +143,25 @@ else: ok = checkpatch.CheckPatches(options.verbose, args) else: ok = True - if options.apply_patches: - if not gitutil.ApplyPatches(options.verbose, args, - options.count + options.start): - ok = False cc_file = series.MakeCcFile(options.process_tags, cover_fname, - not options.ignore_bad_tags) + not options.ignore_bad_tags, + options.add_maintainers) # Email the patches out (giving the user time to check / cancel) cmd = '' - if ok or options.ignore_errors: + its_a_go = ok or options.ignore_errors + if its_a_go: cmd = gitutil.EmailPatches(series, cover_fname, args, options.dry_run, not options.ignore_bad_tags, cc_file, in_reply_to=options.in_reply_to) + else: + print col.Color(col.RED, "Not sending emails due to errors/warnings") # For a dry run, just show our actions as a sanity check if options.dry_run: series.ShowActions(args, cmd, options.process_tags) + if not its_a_go: + print col.Color(col.RED, "Email would not be sent") os.remove(cc_file) diff --git a/tools/patman/series.py b/tools/patman/series.py index 88c0d87..b67f870 100644 --- a/tools/patman/series.py +++ b/tools/patman/series.py @@ -201,7 +201,8 @@ class Series(dict): str = 'Change log exists, but no version is set' print col.Color(col.RED, str) - def MakeCcFile(self, process_tags, cover_fname, raise_on_error): + def MakeCcFile(self, process_tags, cover_fname, raise_on_error, + add_maintainers): """Make a cc file for us to use for per-commit Cc automation Also stores in self._generated_cc to make ShowActions() faster. @@ -211,6 +212,7 @@ class Series(dict): cover_fname: If non-None the name of the cover letter. raise_on_error: True to raise an error when an alias fails to match, False to just print a message. + add_maintainers: Call the get_maintainers to CC maintainers Return: Filename of temp file created """ @@ -225,7 +227,8 @@ class Series(dict): raise_on_error=raise_on_error) list += gitutil.BuildEmailList(commit.cc_list, raise_on_error=raise_on_error) - list += get_maintainer.GetMaintainer(commit.patch) + if add_maintainers: + list += get_maintainer.GetMaintainer(commit.patch) all_ccs += list print >>fd, commit.patch, ', '.join(list) self._generated_cc[commit.patch] = list diff --git a/tools/patman/terminal.py b/tools/patman/terminal.py index 597d526..e78a7c1 100644 --- a/tools/patman/terminal.py +++ b/tools/patman/terminal.py @@ -14,67 +14,145 @@ import sys # Selection of when we want our output to be colored COLOR_IF_TERMINAL, COLOR_ALWAYS, COLOR_NEVER = range(3) -class Color(object): - """Conditionally wraps text in ANSI color escape sequences.""" - BLACK, RED, GREEN, YELLOW, BLUE, MAGENTA, CYAN, WHITE = range(8) - BOLD = -1 - BRIGHT_START = '\033[1;%dm' - NORMAL_START = '\033[22;%dm' - BOLD_START = '\033[1m' - RESET = '\033[0m' +# Initially, we are set up to print to the terminal +print_test_mode = False +print_test_list = [] - def __init__(self, colored=COLOR_IF_TERMINAL): - """Create a new Color object, optionally disabling color output. +class PrintLine: + """A line of text output - Args: - enabled: True if color output should be enabled. If False then this - class will not add color codes at all. + Members: + text: Text line that was printed + newline: True to output a newline after the text + colour: Text colour to use """ - self._enabled = (colored == COLOR_ALWAYS or - (colored == COLOR_IF_TERMINAL and os.isatty(sys.stdout.fileno()))) + def __init__(self, text, newline, colour): + self.text = text + self.newline = newline + self.colour = colour - def Start(self, color, bright=True): - """Returns a start color code. + def __str__(self): + return 'newline=%s, colour=%s, text=%s' % (self.newline, self.colour, + self.text) - Args: - color: Color to use, .e.g BLACK, RED, etc. +def Print(text='', newline=True, colour=None): + """Handle a line of output to the terminal. - Returns: - If color is enabled, returns an ANSI sequence to start the given color, - otherwise returns empty string + In test mode this is recorded in a list. Otherwise it is output to the + terminal. + + Args: + text: Text to print + newline: True to add a new line at the end of the text + colour: Colour to use for the text """ - if self._enabled: - base = self.BRIGHT_START if bright else self.NORMAL_START - return base % (color + 30) - return '' + if print_test_mode: + print_test_list.append(PrintLine(text, newline, colour)) + else: + if colour: + col = Color() + text = col.Color(colour, text) + print text, + if newline: + print + +def SetPrintTestMode(): + """Go into test mode, where all printing is recorded""" + global print_test_mode + + print_test_mode = True - def Stop(self): - """Retruns a stop color code. +def GetPrintTestLines(): + """Get a list of all lines output through Print() Returns: - If color is enabled, returns an ANSI color reset sequence, otherwise - returns empty string + A list of PrintLine objects """ - if self._enabled: - return self.RESET - return '' + global print_test_list - def Color(self, color, text, bright=True): - """Returns text with conditionally added color escape sequences. + ret = print_test_list + print_test_list = [] + return ret - Keyword arguments: - color: Text color -- one of the color constants defined in this class. - text: The text to color. +def EchoPrintTestLines(): + """Print out the text lines collected""" + for line in print_test_list: + if line.colour: + col = Color() + print col.Color(line.colour, line.text), + else: + print line.text, + if line.newline: + print - Returns: - If self._enabled is False, returns the original text. If it's True, - returns text with color escape sequences based on the value of color. - """ - if not self._enabled: - return text - if color == self.BOLD: - start = self.BOLD_START - else: - base = self.BRIGHT_START if bright else self.NORMAL_START - start = base % (color + 30) - return start + text + self.RESET + +class Color(object): + """Conditionally wraps text in ANSI color escape sequences.""" + BLACK, RED, GREEN, YELLOW, BLUE, MAGENTA, CYAN, WHITE = range(8) + BOLD = -1 + BRIGHT_START = '\033[1;%dm' + NORMAL_START = '\033[22;%dm' + BOLD_START = '\033[1m' + RESET = '\033[0m' + + def __init__(self, colored=COLOR_IF_TERMINAL): + """Create a new Color object, optionally disabling color output. + + Args: + enabled: True if color output should be enabled. If False then this + class will not add color codes at all. + """ + try: + self._enabled = (colored == COLOR_ALWAYS or + (colored == COLOR_IF_TERMINAL and + os.isatty(sys.stdout.fileno()))) + except: + self._enabled = False + + def Start(self, color, bright=True): + """Returns a start color code. + + Args: + color: Color to use, .e.g BLACK, RED, etc. + + Returns: + If color is enabled, returns an ANSI sequence to start the given + color, otherwise returns empty string + """ + if self._enabled: + base = self.BRIGHT_START if bright else self.NORMAL_START + return base % (color + 30) + return '' + + def Stop(self): + """Retruns a stop color code. + + Returns: + If color is enabled, returns an ANSI color reset sequence, + otherwise returns empty string + """ + if self._enabled: + return self.RESET + return '' + + def Color(self, color, text, bright=True): + """Returns text with conditionally added color escape sequences. + + Keyword arguments: + color: Text color -- one of the color constants defined in this + class. + text: The text to color. + + Returns: + If self._enabled is False, returns the original text. If it's True, + returns text with color escape sequences based on the value of + color. + """ + if not self._enabled: + return text + if color == self.BOLD: + start = self.BOLD_START + else: + base = self.BRIGHT_START if bright else self.NORMAL_START + start = base % (color + 30) + return start + text + self.RESET diff --git a/tools/patman/test.py b/tools/patman/test.py index 8fcfe53..e8f7472 100644 --- a/tools/patman/test.py +++ b/tools/patman/test.py @@ -55,6 +55,7 @@ This adds functions to enable/disable clocks and reset to on-chip peripherals. Signed-off-by: Simon Glass --- + arch/arm/cpu/armv7/tegra2/Makefile | 2 +- arch/arm/cpu/armv7/tegra2/ap20.c | 57 ++---- arch/arm/cpu/armv7/tegra2/clock.c | 163 +++++++++++++++++ @@ -200,7 +201,7 @@ index 0000000..2234c87 self.assertEqual(result.errors, 0) self.assertEqual(result.warnings, 0) self.assertEqual(result.checks, 0) - self.assertEqual(result.lines, 67) + self.assertEqual(result.lines, 56) os.remove(inf) def testNoSignoff(self): @@ -211,18 +212,18 @@ index 0000000..2234c87 self.assertEqual(result.errors, 1) self.assertEqual(result.warnings, 0) self.assertEqual(result.checks, 0) - self.assertEqual(result.lines, 67) + self.assertEqual(result.lines, 56) os.remove(inf) def testSpaces(self): inf = self.SetupData('spaces') result = checkpatch.CheckPatch(inf) self.assertEqual(result.ok, False) - self.assertEqual(len(result.problems), 1) + self.assertEqual(len(result.problems), 2) self.assertEqual(result.errors, 0) - self.assertEqual(result.warnings, 1) + self.assertEqual(result.warnings, 2) self.assertEqual(result.checks, 0) - self.assertEqual(result.lines, 67) + self.assertEqual(result.lines, 56) os.remove(inf) def testIndent(self): @@ -233,7 +234,7 @@ index 0000000..2234c87 self.assertEqual(result.errors, 0) self.assertEqual(result.warnings, 0) self.assertEqual(result.checks, 1) - self.assertEqual(result.lines, 67) + self.assertEqual(result.lines, 56) os.remove(inf) diff --git a/tools/reformat.py b/tools/reformat.py deleted file mode 100755 index 61306d0..0000000 --- a/tools/reformat.py +++ /dev/null @@ -1,132 +0,0 @@ -#! /usr/bin/python -######################################################################## -# -# reorder and reformat a file in columns -# -# this utility takes lines from its standard input and reproduces them, -# partially reordered and reformatted, on its standard output. -# -# It has the same effect as a 'sort | column -t', with the exception -# that empty lines, as well as lines which start with a '#' sign, are -# not affected, i.e. they keep their position and formatting, and act -# as separators, i.e. the parts before and after them are each sorted -# separately (but overall field widths are computed across the whole -# input). -# -# Options: -# -i: -# --ignore-case: -# Do not consider case when sorting. -# -d: -# --default: -# What to chage empty fields to. -# -s : -# --split=: -# Treat only the first N whitespace sequences as separators. -# line content after the Nth separator will count as only one -# field even if it contains whitespace. -# Example : '-s 2' causes input 'a b c d e' to be split into -# three fields, 'a', 'b', and 'c d e'. -# -# boards.cfg requires -ids 6. -# -######################################################################## - -import sys, getopt, locale - -# ensure we sort using the C locale. - -locale.setlocale(locale.LC_ALL, 'C') - -# check options - -maxsplit = 0 -ignore_case = 0 -default_field ='' - -try: - opts, args = getopt.getopt(sys.argv[1:], "id:s:", - ["ignore-case","default","split="]) -except getopt.GetoptError as err: - print str(err) # will print something like "option -a not recognized" - sys.exit(2) - -for o, a in opts: - if o in ("-s", "--split"): - maxsplit = eval(a) - elif o in ("-i", "--ignore-case"): - ignore_case = 1 - elif o in ("-d", "--default"): - default_field = a - else: - assert False, "unhandled option" - -# collect all lines from standard input and, for the ones which must be -# reformatted and sorted, count their fields and compute each field's -# maximum size - -input_lines = [] -field_width = [] - -for line in sys.stdin: - # remove final end of line - input_line = line.strip('\n') - if (len(input_line)>0) and (input_line[0] != '#'): - # sortable line: split into fields - fields = input_line.split(None,maxsplit) - # if there are new fields, top up field_widths - for f in range(len(field_width), len(fields)): - field_width.append(0) - # compute the maximum witdh of each field - for f in range(len(fields)): - field_width[f] = max(field_width[f],len(fields[f])) - # collect the line for next stage - input_lines.append(input_line) - -# run through collected input lines, collect the ones which must be -# reformatted and sorted, and whenever a non-reformattable, non-sortable -# line is met, sort the collected lines before it and append them to the -# output lines, then add the non-sortable line too. - -output_lines = [] -sortable_lines = [] -for input_line in input_lines: - if (len(input_line)>0) and (input_line[0] != '#'): - # this line should be reformatted and sorted - input_fields = input_line.split(None,maxsplit) - output_fields = []; - # reformat each field to this field's column width - for f in range(len(input_fields)): - output_field = input_fields[f]; - output_fields.append(output_field.ljust(field_width[f])) - # any missing field is set to default if it exists - if default_field != '': - for f in range(len(input_fields),len(field_width)): - output_fields.append(default_field.ljust(field_width[f])) - # join fields using two spaces, like column -t would - output_line = ' '.join(output_fields); - # collect line for later - sortable_lines.append(output_line) - else: - # this line is non-sortable - # sort collected sortable lines - if ignore_case!=0: - sortable_lines.sort(key=lambda x: str.lower(locale.strxfrm(x))) - else: - sortable_lines.sort(key=lambda x: locale.strxfrm(x)) - # append sortable lines to the final output - output_lines.extend(sortable_lines) - sortable_lines = [] - # append non-sortable line to the final output - output_lines.append(input_line) -# maybe we had sortable lines pending, so append them to the final output -if ignore_case!=0: - sortable_lines.sort(key=lambda x: str.lower(locale.strxfrm(x))) -else: - sortable_lines.sort(key=lambda x: locale.strxfrm(x)) -output_lines.extend(sortable_lines) - -# run through output lines and print them, except rightmost whitespace - -for output_line in output_lines: - print output_line.rstrip()