diff -Naur gcc-4.4.7.orig/configure gcc-4.4.7/configure
--- gcc-4.4.7.orig/configure 2012-03-13 14:42:52.000000000 -0500
+++ gcc-4.4.7/configure 2012-03-13 15:08:57.000000000 -0500
@@ -2599,7 +2599,7 @@
m68k-apollo-*)
noconfigdirs="$noconfigdirs ld binutils gprof target-libgloss ${libgcj}"
;;
- mips*-sde-elf*)
+ mips*-sde-elf* | mips*-nlm-elf*)
skipdirs="$skipdirs target-libiberty"
noconfigdirs="$noconfigdirs ${libgcj}"
if test x$with_newlib = xyes; then
diff -Naur gcc-4.4.7.orig/configure.ac gcc-4.4.7/configure.ac
--- gcc-4.4.7.orig/configure.ac 2012-03-13 14:44:32.000000000 -0500
+++ gcc-4.4.7/configure.ac 2012-03-13 15:08:57.000000000 -0500
@@ -834,7 +834,7 @@
m68k-apollo-*)
noconfigdirs="$noconfigdirs ld binutils gprof target-libgloss ${libgcj}"
;;
- mips*-sde-elf*)
+ mips*-sde-elf* | mips*-nlm-elf*)
skipdirs="$skipdirs target-libiberty"
noconfigdirs="$noconfigdirs ${libgcj}"
if test x$with_newlib = xyes; then
diff -Naur gcc-4.4.7.orig/gcc/config/mips/elfnlm.h gcc-4.4.7/gcc/config/mips/elfnlm.h
--- gcc-4.4.7.orig/gcc/config/mips/elfnlm.h 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/mips/elfnlm.h 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,99 @@
+/* Target macros for mips*-elf targets.
+ Copyright (C) 1994, 1997, 1999, 2000, 2002, 2003, 2004, 2007
+ Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+. */
+
+/* Incorporate libnlm.a, expected to come from newlib
+ The link order is important! */
+#undef LIB_SPEC
+#define LIB_SPEC "\
+%{shared: --start-group -lnlm -lc --end-group} \
+%{!shared: --start-group -lnlm -lc --end-group}"
+
+#ifndef LINK_PIE_SPEC
+#ifdef HAVE_LD_PIE
+#define LINK_PIE_SPEC "%{pie:-pie} "
+#else
+#define LINK_PIE_SPEC "%{pie:} "
+#endif
+#endif
+
+#ifndef LINK_COMMAND_SPEC
+#define LINK_COMMAND_SPEC "\
+%{!fsyntax-only:%{!c:%{!M:%{!MM:%{!E:%{!S:\
+ %(linker) %l " LINK_PIE_SPEC "%X %{o*} %{A} %{d} %{e*} %{m} %{N} %{n} %{r}\
+ %{s} %{t} %{u*} %{x} %{z} %{Z} %{!A:%{!nostdlib:%{!nostartfiles:%S}}}\
+ %{static:} %{L*} %(mfwrap) %(link_libgcc) %o\
+ %{fopenmp|ftree-parallelize-loops=*:%:include(libgomp.spec)%(link_gomp)} %(mflib)\
+ %{fprofile-arcs|fprofile-generate|coverage:-lgcov}\
+ %{march=xlp:-Tnlm.ld} %{march=xlr:-Tnlm.ld} \
+ %{!nostdlib:%{!nodefaultlibs:%(link_ssp) %(link_gcc_c_sequence)}}\
+ %{!A:%{!nostdlib:%{!nostartfiles:%E}}} %{T*} }}}}}}"
+#endif
+
+/* Pass additional Linker Flags. This adds
+ a default NLM-specific Linker script, so
+ that none need be specified on the cmd line. */
+
+#undef LINK_SPEC
+#define LINK_SPEC "\
+%(endian_spec) \
+%{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32*} %{mips64*} \
+%{bestGnum} \
+%{shared} %{non_shared} %{call_shared} \
+%{mabi=n32:-melf32%{EB:b}%{EL:l}tsmipn32} \
+%{mabi=64:-melf64%{EB:b}%{EL:l}tsmip} \
+%{mabi=o64:-melf32%{EB:b}%{EL:l}tsmip} \
+%{mabi=32:-melf32%{EB:b}%{EL:l}tsmip}"
+
+/* Desired default CFLAGS */
+
+#undef SUBTARGET_CC1_SPEC
+#define SUBTARGET_CC1_SPEC "-G 0 -mno-gpopt -O3 -fno-schedule-insns"
+
+#undef DRIVER_SELF_SPECS
+#define DRIVER_SELF_SPECS \
+ /* Make sure a -mips option is present. This helps us to pick \
+ the right multilib, and also makes the later specs easier \
+ to write. */ \
+ MIPS_ISA_LEVEL_SPEC, \
+ \
+ /* Infer the default float setting from -march. */ \
+ MIPS_ARCH_FLOAT_SPEC, \
+ /* Configuration-independent MIPS rules. */ \
+ BASE_DRIVER_SELF_SPECS
+
+#undef DEFAULT_SIGNED_CHAR
+#define DEFAULT_SIGNED_CHAR 0
+
+/* Use standard ELF-style local labels (not '$' as on early Irix). */
+#undef LOCAL_LABEL_PREFIX
+#define LOCAL_LABEL_PREFIX "."
+
+/* Use periods rather than dollar signs in special g++ assembler names. */
+#define NO_DOLLAR_IN_LABEL
+
+/* Currently we don't support 128bit long doubles in software, so for
+ now we force n32/n64 long-double to be 64bit. */
+#undef LONG_DOUBLE_TYPE_SIZE
+#define LONG_DOUBLE_TYPE_SIZE 64
+
+#ifdef IN_LIBGCC2
+#undef LIBGCC2_LONG_DOUBLE_TYPE_SIZE
+#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
+#endif
diff -Naur gcc-4.4.7.orig/gcc/config/mips/linux64nlm.h gcc-4.4.7/gcc/config/mips/linux64nlm.h
--- gcc-4.4.7.orig/gcc/config/mips/linux64nlm.h 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/mips/linux64nlm.h 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,35 @@
+/* Definitions for MIPS running Linux-based GNU systems with ELF format
+ using n32/64 abi.
+ Copyright 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+. */
+
+/* Force the default endianness and ABI flags onto the command line
+ in order to make the other specs easier to write. */
+
+/* when march=xlr is passed, default to msoft-float */
+
+#undef SUBTARGET_CC1_SPEC
+#define SUBTARGET_CC1_SPEC "-fno-schedule-insns %{profile:-p}"
+
+#undef DRIVER_SELF_SPECS
+#define DRIVER_SELF_SPECS \
+ MIPS_ARCH_FLOAT_SPEC, \
+ BASE_DRIVER_SELF_SPECS, \
+ LINUX_DRIVER_SELF_SPECS, \
+ " %{!EB:%{!EL:%(endian_spec)}}" \
+ " %{!mabi=*: -mabi=n32}"
diff -Naur gcc-4.4.7.orig/gcc/config/mips/mips.c gcc-4.4.7/gcc/config/mips/mips.c
--- gcc-4.4.7.orig/gcc/config/mips/mips.c 2012-03-13 14:42:03.000000000 -0500
+++ gcc-4.4.7/gcc/config/mips/mips.c 2012-03-13 15:08:57.000000000 -0500
@@ -669,7 +669,8 @@
{ "xlr", PROCESSOR_XLR, 64, 0 },
/* MIPS64 Release 2 processors. */
- { "octeon", PROCESSOR_OCTEON, 65, PTF_AVOID_BRANCHLIKELY }
+ { "octeon", PROCESSOR_OCTEON, 65, PTF_AVOID_BRANCHLIKELY },
+ { "xlp", PROCESSOR_XLP, 65, PTF_AVOID_BRANCHLIKELY }
};
/* Default costs. If these are used for a processor we should look
@@ -1077,6 +1078,19 @@
COSTS_N_INSNS (72), /* int_div_di */
1, /* branch_cost */
4 /* memory_latency */
+ },
+ { /* Netlogic XLP */
+ COSTS_N_INSNS (4), /* fp_add */
+ COSTS_N_INSNS (4), /* fp_mult_sf */
+ COSTS_N_INSNS (4), /* fp_mult_df */
+ COSTS_N_INSNS (24), /* fp_div_sf */
+ COSTS_N_INSNS (32), /* fp_div_df */
+ COSTS_N_INSNS (4), /* int_mult_si */
+ COSTS_N_INSNS (5), /* int_mult_di */
+ COSTS_N_INSNS (36), /* int_div_si */
+ COSTS_N_INSNS (68), /* int_div_di */
+ 1, /* branch_cost */
+ 4 /* memory_latency */
}
};
@@ -10613,6 +10627,9 @@
larger number, and partly because in most common cases we can't
reach the theoretical max of 4. */
return 3;
+
+ case PROCESSOR_XLP:
+ return (reload_completed ? 4:2);
case PROCESSOR_LOONGSON_2E:
case PROCESSOR_LOONGSON_2F:
@@ -10741,6 +10758,9 @@
/* Can schedule up to 4 of the 6 function units in any one cycle. */
if (TUNE_SB1)
return 4;
+
+ if (TUNE_XLP)
+ return 4;
if (TUNE_LOONGSON_2EF)
return 4;
diff -Naur gcc-4.4.7.orig/gcc/config/mips/mips.h gcc-4.4.7/gcc/config/mips/mips.h
--- gcc-4.4.7.orig/gcc/config/mips/mips.h 2012-03-13 14:42:03.000000000 -0500
+++ gcc-4.4.7/gcc/config/mips/mips.h 2012-03-13 15:08:57.000000000 -0500
@@ -72,6 +72,7 @@
PROCESSOR_SB1A,
PROCESSOR_SR71000,
PROCESSOR_XLR,
+ PROCESSOR_XLP,
PROCESSOR_MAX
};
@@ -259,6 +260,7 @@
#define TARGET_SB1 (mips_arch == PROCESSOR_SB1 \
|| mips_arch == PROCESSOR_SB1A)
#define TARGET_SR71K (mips_arch == PROCESSOR_SR71000)
+#define TARGET_XLP (mips_arch == PROCESSOR_XLP)
/* Scheduling target defines. */
#define TUNE_20KC (mips_tune == PROCESSOR_20KC)
@@ -285,6 +287,7 @@
#define TUNE_OCTEON (mips_tune == PROCESSOR_OCTEON)
#define TUNE_SB1 (mips_tune == PROCESSOR_SB1 \
|| mips_tune == PROCESSOR_SB1A)
+#define TUNE_XLP (mips_tune == PROCESSOR_XLP)
/* Whether vector modes and intrinsics for ST Microelectronics
Loongson-2E/2F processors should be enabled. In o32 pairs of
@@ -709,8 +712,8 @@
%{march=mips32|march=4kc|march=4km|march=4kp|march=4ksc:-mips32} \
%{march=mips32r2|march=m4k|march=4ke*|march=4ksd|march=24k* \
|march=34k*|march=74k*: -mips32r2} \
- %{march=mips64|march=5k*|march=20k*|march=sb1*|march=sr71000: -mips64} \
- %{march=mips64r2|march=octeon: -mips64r2} \
+ %{march=mips64|march=5k*|march=20k*|march=sb1*|march=sr71000|march=xlr: -mips64} \
+ %{march=mips64r2|march=octeon|march=xlp: -mips64r2} \
%{!march=*: -" MULTILIB_ISA_DEFAULT "}}"
/* A spec that infers a -mhard-float or -msoft-float setting from an
@@ -720,7 +723,8 @@
#define MIPS_ARCH_FLOAT_SPEC \
"%{mhard-float|msoft-float|march=mips*:; \
march=vr41*|march=m4k|march=4k*|march=24kc|march=24kec \
- |march=34kc|march=74kc|march=5kc|march=octeon: -msoft-float; \
+ |march=34kc|march=74kc|march=5kc|march=octeon|march=xlr: -msoft-float; \
+ march=xlp: -mhard-float; \
march=*: -mhard-float}"
/* A spec condition that matches 32-bit options. It only works if
@@ -803,7 +807,7 @@
/* ISA has a three-operand multiplication instruction. */
#define ISA_HAS_DMUL3 (TARGET_64BIT \
- && TARGET_OCTEON \
+ && (TARGET_OCTEON || TARGET_XLP) \
&& !TARGET_MIPS16)
/* ISA has the floating-point conditional move instructions introduced
diff -Naur gcc-4.4.7.orig/gcc/config/mips/mips.md gcc-4.4.7/gcc/config/mips/mips.md
--- gcc-4.4.7.orig/gcc/config/mips/mips.md 2012-03-13 14:42:03.000000000 -0500
+++ gcc-4.4.7/gcc/config/mips/mips.md 2012-03-13 15:08:57.000000000 -0500
@@ -564,7 +564,7 @@
;; Attribute describing the processor. This attribute must match exactly
;; with the processor_type enumeration in mips.h.
(define_attr "cpu"
- "r3000,4kc,4kp,5kc,5kf,20kc,24kc,24kf2_1,24kf1_1,74kc,74kf2_1,74kf1_1,74kf3_2,loongson_2e,loongson_2f,m4k,octeon,r3900,r6000,r4000,r4100,r4111,r4120,r4130,r4300,r4600,r4650,r5000,r5400,r5500,r7000,r8000,r9000,r10000,sb1,sb1a,sr71000,xlr"
+ "r3000,4kc,4kp,5kc,5kf,20kc,24kc,24kf2_1,24kf1_1,74kc,74kf2_1,74kf1_1,74kf3_2,loongson_2e,loongson_2f,m4k,octeon,r3900,r6000,r4000,r4100,r4111,r4120,r4130,r4300,r4600,r4650,r5000,r5400,r5500,r7000,r8000,r9000,r10000,sb1,sb1a,sr71000,xlr,xlp"
(const (symbol_ref "mips_tune")))
;; The type of hardware hazard associated with this instruction.
@@ -962,6 +962,7 @@
(include "sb1.md")
(include "sr71k.md")
(include "xlr.md")
+(include "xlp.md")
(include "generic.md")
;;
diff -Naur gcc-4.4.7.orig/gcc/config/mips/t-linux64-nlm gcc-4.4.7/gcc/config/mips/t-linux64-nlm
--- gcc-4.4.7.orig/gcc/config/mips/t-linux64-nlm 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/mips/t-linux64-nlm 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,18 @@
+MULTILIB_OPTIONS = march=xlr mabi=n32/mabi=32/mabi=64 EL
+MULTILIB_DIRNAMES = xlr n32 32 64 el
+
+MULTILIB_MATCHES = EL=mel EB=meb
+
+MULTILIB_OSDIRNAMES = march.xlr/mabi.n32=../xlr/lib32
+MULTILIB_OSDIRNAMES += march.xlr/mabi.32=../xlr/lib
+MULTILIB_OSDIRNAMES += march.xlr/mabi.64=../xlr/lib64
+MULTILIB_OSDIRNAMES += mabi.n32=../lib32
+MULTILIB_OSDIRNAMES += mabi.32=../lib
+MULTILIB_OSDIRNAMES += mabi.64=../lib64
+
+MULTILIB_OSDIRNAMES += march.xlr/mabi.n32/EL=../xlr/lib32/el
+MULTILIB_OSDIRNAMES += march.xlr/mabi.32/EL=../xlr/lib/el
+MULTILIB_OSDIRNAMES += march.xlr/mabi.64/EL=../xlr/lib64/el
+MULTILIB_OSDIRNAMES += mabi.n32/EL=../lib32/el
+MULTILIB_OSDIRNAMES += mabi.32/EL=../lib/el
+MULTILIB_OSDIRNAMES += mabi.64/EL=../lib64/el
diff -Naur gcc-4.4.7.orig/gcc/config/mips/t-linux64-nlm-native gcc-4.4.7/gcc/config/mips/t-linux64-nlm-native
--- gcc-4.4.7.orig/gcc/config/mips/t-linux64-nlm-native 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/mips/t-linux64-nlm-native 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,14 @@
+# Use this multilib config file to build
+# O32 and N64 ABIs for XLP. In addition,
+# configure uses --with-abi=32 & --with-arch=xlp
+# This builds default 32, extra 32 and 64
+
+MULTILIB_OPTIONS = mabi=64/mabi=32
+MULTILIB_DIRNAMES = 64 32
+
+# These are used to correctly pick up LIBC paths
+
+MULTILIB_OSDIRNAMES = march.xlp/mabi.64=../xlp/lib64
+MULTILIB_OSDIRNAMES += march.xlp/mabi.32=../xlp/lib
+MULTILIB_OSDIRNAMES += mabi.64=../xlp/lib64
+MULTILIB_OSDIRNAMES += mabi.32=../xlp/lib
diff -Naur gcc-4.4.7.orig/gcc/config/mips/t-nlm gcc-4.4.7/gcc/config/mips/t-nlm
--- gcc-4.4.7.orig/gcc/config/mips/t-nlm 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/mips/t-nlm 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,19 @@
+# Addendum file to the t-elf
+# base file, for the XLP/XLR
+#
+# Float: no soft float for XLP
+# Hard-Float is built for XLR, but
+# march=xlr will pick up soft-float
+
+CRTSTUFF_T_CFLAGS += -mno-gpopt
+TARGET_LIBGCC2_CFLAGS += -mno-gpopt
+
+# Default ABI=O32
+
+MULTILIB_OPTIONS = march=xlp/march=xlr/march=mips32 mabi=64/mabi=n32/mabi=o64 msoft-float EL
+MULTILIB_DIRNAMES = xlp xlr mips32 lib64 libn32 libo64 soft-float el
+
+# Use MULTILIB_EXCLUSIONS instead of
+# MULTILIB_EXCEPTIONS for '!' logic.
+
+MULTILIB_EXCLUSIONS = !march=xlr/msoft-float march=mips32/mabi=64 march=mips32/mabi=o64 march=mips32/mabi=n32
diff -Naur gcc-4.4.7.orig/gcc/config/mips/xlp.md gcc-4.4.7/gcc/config/mips/xlp.md
--- gcc-4.4.7.orig/gcc/config/mips/xlp.md 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/mips/xlp.md 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,124 @@
+;; Software Code Disclaimer
+;; xlp.md Machine Description for the RMI XLP Microprocessor
+;; Copyright © 2006 Raza Microelectronics, Inc. "RMI")
+;;
+;; This program is free software. You may use it, redistribute it
+;; and/or modify it under the terms of the GNU General Public License
+;; as published by the Free Software Foundation; either version two
+;; of the License or (at your option) any later version.
+;;
+;; This program is distributed in the hope that you will find it
+;; useful. Notwithstanding the foregoing, you understand and agree
+;; that this program is provided by RMI "as is," and without any
+;; warranties, whether express, implied or statutory, including without
+;; limitation any implied warranty of non-infringement, merchantability
+;; or fitness for a particular purpose. In no event will RMI be liable
+;; for any loss of data, lost profits, cost of procurement of substitute
+;; technology or services or for any direct, indirect, incidental,
+;; consequential or special damages arising from the use of this program,
+;; however caused. Your unconditional agreement to these terms and
+;; conditions is an express condition to, and shall be deemed to occur
+;; upon, your use, redistribution and/or modification of this program.
+;;
+;; See the GNU General Public License for more details.
+;;
+;; DFA-based pipeline description for XLP
+;;
+;;
+(define_automaton "xlp_cpu")
+
+;; CPU function units.
+(define_cpu_unit "xlp_ex0" "xlp_cpu")
+(define_cpu_unit "xlp_ex1" "xlp_cpu")
+(define_cpu_unit "xlp_ex2" "xlp_cpu")
+(define_cpu_unit "xlp_ex3" "xlp_cpu")
+
+;; Floating-point units.
+(define_cpu_unit "xlp_fp" "xlp_cpu")
+
+;; Integer Multiply Unit
+(define_cpu_unit "xlp_div" "xlp_cpu")
+
+;; Floating Point Sqrt/Divide
+(define_cpu_unit "xlp_divsq" "xlp_cpu")
+
+;; Define reservations for common combinations.
+
+;;
+;; The ordering of the instruction-execution-path/resource-usage
+;; descriptions (also known as reservation RTL) is roughly ordered
+;; based on the define attribute RTL for the "type" classification.
+;; When modifying, remember that the first test that matches is the
+;; reservation used!
+;;
+(define_insn_reservation "ir_xlp_unknown" 1
+ (and (eq_attr "cpu" "xlp")
+ (eq_attr "type" "unknown,multi"))
+ "xlp_ex0+xlp_ex1+xlp_ex2+xlp_ex3")
+
+(define_insn_reservation "ir_xlp_branch" 1
+ (and (eq_attr "cpu" "xlp")
+ (eq_attr "type" "branch,jump,call"))
+ "xlp_ex3")
+
+(define_insn_reservation "ir_xlp_prefeth" 1
+ (and (eq_attr "cpu" "xlp")
+ (eq_attr "type" "prefetch,prefetchx"))
+ "xlp_ex0|xlp_ex1")
+
+(define_insn_reservation "ir_xlp_load" 4
+ (and (eq_attr "cpu" "xlp")
+ (eq_attr "type" "load"))
+ "xlp_ex0 | xlp_ex1")
+
+(define_insn_reservation "ir_xlp_fpload" 5
+ (and (eq_attr "cpu" "xlp")
+ (eq_attr "type" "fpload,fpidxload"))
+ "xlp_ex0 | xlp_ex1")
+
+(define_insn_reservation "ir_xlp_alu" 1
+ (and (eq_attr "cpu" "xlp")
+ (eq_attr "type" "const,arith,shift,slt,clz,nop"))
+ "xlp_ex0 | xlp_ex1 | xlp_ex2 | xlp_ex3")
+
+(define_insn_reservation "ir_xlp_condmov" 1
+ (and (eq_attr "cpu" "xlp")
+ (eq_attr "type" "condmove"))
+ "xlp_ex2")
+
+(define_insn_reservation "ir_xlp_mul" 6
+ (and (eq_attr "cpu" "xlp")
+ (eq_attr "type" "imul,imul3,imadd"))
+ "xlp_ex2")
+
+(define_insn_reservation "ir_xlp_div" 36
+ (and (eq_attr "cpu" "xlp")
+ (eq_attr "type" "idiv"))
+ "xlp_ex2+xlp_div,xlp_div*35")
+
+(define_insn_reservation "ir_xlp_store" 1
+ (and (eq_attr "cpu" "xlp")
+ (eq_attr "type" "store,fpstore,fpidxstore"))
+ "xlp_ex0 | xlp_ex1")
+
+(define_insn_reservation "ir_xlp_fpmove" 2
+ (and (eq_attr "cpu" "xlp")
+ (eq_attr "type" "mfc"))
+ "xlp_ex3,xlp_fp")
+
+(define_insn_reservation "ir_xlp_hilo" 1
+ (and (eq_attr "cpu" "xlp")
+ (eq_attr "type" "mthilo,mfhilo"))
+ "xlp_ex2")
+
+(define_insn_reservation "ir_xlp_fpsimple" 6
+ (and (eq_attr "cpu" "xlp")
+ (eq_attr "type" "fmove,fadd,fmul,fmadd,fabs,fneg,fcmp,fcvt"))
+ "xlp_fp")
+
+(define_insn_reservation "ir_xlp_fpcomplex" 30
+ (and (eq_attr "cpu" "xlp")
+ (eq_attr "type" "fdiv,frdiv,frdiv1,frdiv2,fsqrt,frsqrt,frsqrt1,frsqrt2"))
+ "xlp_fp+xlp_divsq,xlp_divsq*29")
+
+(define_bypass 5 "ir_xlp_mul" "ir_xlp_hilo")
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/leon.h gcc-4.4.7/gcc/config/sparc/leon.h
--- gcc-4.4.7.orig/gcc/config/sparc/leon.h 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/leon.h 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,41 @@
+/* Definitions for rtems targeting a SPARC using a.out.
+ Copyright (C) 1996, 1997, 2000, 2002 Free Software Foundation, Inc.
+ Contributed by Joel Sherrill (joel@OARcorp.com).
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GNU CC; see the file COPYING. If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA. */
+
+/* bundle libraries */
+#undef LIB_SPEC
+#define LIB_SPEC \
+"%{!nostdlib: --start-group -lc -lgcc -lleonbare --end-group} "
+
+/*
+ -qsvt flag : switch to single vector trapping dispatcher traptable
+ -qsmall flag : link in locore_atexit.o that defines a simple atexit (mo malloc) to
+ avoid linking in clib's malloc referencing stuff
+*/
+
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC \
+"%{!qsvt: locore_mvt.o%s} %{qsvt: locore_svt.o%s} %{!qprom: crt0.o%s} %{qprom: %{qprom2: %{qprom2ecos: crt_cpdataecos.o%s} %{!qprom2ecos: crt_cpdata.o%s} } %{!qprom2: crt0_noatexit.o%s } } crti.o%s %{!qprom: %{!qnocrtbegin: crtbegin.o%s } } %{qprom: %{qprom2: %{!qprom2ecos: %{!qnocrtbegin: crtbegin.o%s } } } prominit.o%s %{qsvt: prominit_svt.o%s} } %{qprommp: prominit_mp.o%s} %{qambapp: pnpinit.o%s} %{!qambapp: pnpinit_simple.o%s} "
+
+/*
+ "%{!qprom: %{!qsvt: locore_mvt.o%s} %{qsvt: locore_svt.o%s} crt0.o%s crti.o%s crtbegin.o%s } \
+ %{qprom: %{qprom2: %{qw: promcore2_qw.o%s} %{!qw: promcore2.o%s} crti.o%s crtbegin.o%s } \
+ %{!qprom2: %{qw: promcore3_qw.o%s} %{!qw: promcore3.o%s}}}"
+*/
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/leon.md gcc-4.4.7/gcc/config/sparc/leon.md
--- gcc-4.4.7.orig/gcc/config/sparc/leon.md 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/leon.md 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,56 @@
+;; Scheduling description for Leon.
+;; Copyright (C) 2002, 2007 Free Software Foundation, Inc.
+;;
+;; This file is part of GCC.
+;;
+;; GCC is free software; you can redistribute it and/or modify
+;; it under the terms of the GNU General Public License as published by
+;; the Free Software Foundation; either version 3, or (at your option)
+;; any later version.
+;;
+;; GCC is distributed in the hope that it will be useful,
+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+;; GNU General Public License for more details.
+;;
+;; You should have received a copy of the GNU General Public License
+;; along with GCC; see the file COPYING3. If not see
+;; .
+
+
+(define_automaton "leon")
+
+(define_cpu_unit "leon_memory, leon_fpalu" "leon")
+(define_cpu_unit "leon_fpmds" "leon")
+(define_cpu_unit "write_buf" "leon")
+
+(define_insn_reservation "leon_load" 1
+ (and (eq_attr "cpu" "leon")
+ (eq_attr "type" "load,sload,fpload"))
+ "leon_memory")
+
+(define_insn_reservation "leon_store" 1
+ (and (eq_attr "cpu" "leon")
+ (eq_attr "type" "store,fpstore"))
+ "leon_memory+write_buf")
+
+(define_insn_reservation "leon_fp_alu" 1
+ (and (eq_attr "cpu" "leon")
+ (eq_attr "type" "fp,fpmove"))
+ "leon_fpalu, nothing")
+
+(define_insn_reservation "leon_fp_mult" 1
+ (and (eq_attr "cpu" "leon")
+ (eq_attr "type" "fpmul"))
+ "leon_fpmds, nothing")
+
+(define_insn_reservation "leon_fp_div" 16
+ (and (eq_attr "cpu" "leon")
+ (eq_attr "type" "fpdivs,fpdivd"))
+ "leon_fpmds, nothing*15")
+
+(define_insn_reservation "leon_fp_sqrt" 23
+ (and (eq_attr "cpu" "leon")
+ (eq_attr "type" "fpsqrts,fpsqrtd"))
+ "leon_fpmds, nothing*21")
+
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/sparc.c gcc-4.4.7/gcc/config/sparc/sparc.c
--- gcc-4.4.7.orig/gcc/config/sparc/sparc.c 2012-03-13 14:42:03.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/sparc.c 2012-03-13 15:08:57.000000000 -0500
@@ -79,6 +79,30 @@
};
static const
+struct processor_costs leon_costs = {
+ COSTS_N_INSNS (1), /* int load */
+ COSTS_N_INSNS (1), /* int signed load */
+ COSTS_N_INSNS (1), /* int zeroed load */
+ COSTS_N_INSNS (1), /* float load */
+ COSTS_N_INSNS (1), /* fmov, fneg, fabs */
+ COSTS_N_INSNS (1), /* fadd, fsub */
+ COSTS_N_INSNS (1), /* fcmp */
+ COSTS_N_INSNS (1), /* fmov, fmovr */
+ COSTS_N_INSNS (1), /* fmul */
+ COSTS_N_INSNS (15), /* fdivs */
+ COSTS_N_INSNS (15), /* fdivd */
+ COSTS_N_INSNS (23), /* fsqrts */
+ COSTS_N_INSNS (23), /* fsqrtd */
+ COSTS_N_INSNS (5), /* imul */
+ COSTS_N_INSNS (5), /* imulX */
+ 0, /* imul bit factor */
+ COSTS_N_INSNS (5), /* idiv */
+ COSTS_N_INSNS (5), /* idivX */
+ COSTS_N_INSNS (1), /* movcc/movr */
+ 0, /* shift penalty */
+};
+
+static const
struct processor_costs supersparc_costs = {
COSTS_N_INSNS (1), /* int load */
COSTS_N_INSNS (1), /* int signed load */
@@ -349,6 +373,8 @@
/* 1 if the next opcode is to be specially indented. */
int sparc_indent_opcode = 0;
+int debug_patch_divsqrt = 0;
+
static bool sparc_handle_option (size_t, const char *, int);
static void sparc_init_modes (void);
static void scan_record_type (tree, int *, int *, int *);
@@ -451,6 +477,7 @@
/* Whether an FPU option was specified. */
static bool fpu_option_set = false;
+static bool mv8_option_set = false;
/* Initialize the GCC target structure. */
@@ -614,6 +641,11 @@
case OPT_mtune_:
sparc_select[2].string = arg;
break;
+
+ case OPT_mv8:
+ mv8_option_set = true;
+ break;
+
}
return true;
@@ -647,6 +679,11 @@
{ TARGET_CPU_sparclet, "tsc701" },
{ TARGET_CPU_sparclite, "f930" },
{ TARGET_CPU_v8, "v8" },
+ { TARGET_CPU_leon, "leon" },
+ { TARGET_CPU_fhleon, "fhleon" },
+ { TARGET_CPU_fhleonv8, "fhleonv8" },
+ { TARGET_CPU_sfleon, "sfleon" },
+ { TARGET_CPU_sfleonv8, "sfleonv8" },
{ TARGET_CPU_hypersparc, "hypersparc" },
{ TARGET_CPU_sparclite86x, "sparclite86x" },
{ TARGET_CPU_supersparc, "supersparc" },
@@ -690,6 +727,14 @@
/* TI ultrasparc III */
/* ??? Check if %y issue still holds true in ultra3. */
{ "ultrasparc3", PROCESSOR_ULTRASPARC3, MASK_ISA, MASK_V9|MASK_DEPRECATED_V8_INSNS},
+ /* sparc-leon */
+ { "leon", PROCESSOR_LEON, MASK_ISA, MASK_FPU },
+ { "fhleon", PROCESSOR_LEON, MASK_ISA, MASK_FPU },
+ { "fhleonv8", PROCESSOR_LEON, MASK_ISA & ~(MASK_V8), MASK_V8|MASK_FPU },
+ { "sfleon", PROCESSOR_LEON, MASK_ISA | MASK_FPU, 0 },
+ { "sfleonv8", PROCESSOR_LEON, (MASK_ISA | MASK_FPU) & ~(MASK_V8), MASK_V8 },
+ { "ut699", PROCESSOR_LEON, (MASK_ISA), MASK_V8|MASK_FPU },
+ { "socc3", PROCESSOR_LEON, (MASK_ISA & (~MASK_V8)), 0 },
/* UltraSPARC T1 */
{ "niagara", PROCESSOR_NIAGARA, MASK_ISA, MASK_V9|MASK_DEPRECATED_V8_INSNS},
{ "niagara2", PROCESSOR_NIAGARA, MASK_ISA, MASK_V9},
@@ -746,6 +791,9 @@
gcc_assert (def->name);
sparc_select[0].string = def->name;
+ /* enable always fsmuld suppression */
+ target_flags |= MASK_NO_FSMULD ;
+
for (sel = &sparc_select[0]; sel->name; ++sel)
{
if (sel->string)
@@ -753,6 +801,18 @@
for (cpu = &cpu_table[0]; cpu->name; ++cpu)
if (! strcmp (sel->string, cpu->name))
{
+ if (! strcmp (sel->string, "ut699")) {
+ if (debug_patch_divsqrt) {
+ fprintf(stderr, "ut699: enable -fstore-after-divsqrt -fno-fsmuld -fno-sf-divsqrt\n");
+ }
+ target_flags |= MASK_STORE_AFTER_DIVSQRT | MASK_NO_FSMULD | MASK_NO_SF_DIVSQRT;
+
+ } else if (! strcmp (sel->string, "socc3")) {
+ if (debug_patch_divsqrt) {
+ fprintf(stderr, "socc3: enable -fstore-after-divsqrt -fno-fsmuld \n");
+ }
+ target_flags |= MASK_STORE_AFTER_DIVSQRT | MASK_NO_FSMULD ;
+ } else {
if (sel->set_tune_p)
sparc_cpu = cpu->processor;
@@ -761,6 +821,7 @@
target_flags &= ~cpu->disable;
target_flags |= cpu->enable;
}
+ }
break;
}
@@ -774,6 +835,9 @@
if (fpu_option_set)
target_flags = (target_flags & ~MASK_FPU) | fpu;
+ if (mv8_option_set)
+ target_flags |= MASK_V8;
+
/* Don't allow -mvis if FPU is disabled. */
if (! TARGET_FPU)
target_flags &= ~MASK_VIS;
@@ -827,10 +891,14 @@
switch (sparc_cpu)
{
+ case PROCESSOR_LEON:
+ sparc_costs = &leon_costs;
+ break;
case PROCESSOR_V7:
case PROCESSOR_CYPRESS:
sparc_costs = &cypress_costs;
break;
+ break;
case PROCESSOR_V8:
case PROCESSOR_SPARCLITE:
case PROCESSOR_SUPERSPARC:
@@ -7508,6 +7576,7 @@
case PROCESSOR_SUPERSPARC:
cost = supersparc_adjust_cost (insn, link, dep, cost);
break;
+ case PROCESSOR_LEON:
case PROCESSOR_HYPERSPARC:
case PROCESSOR_SPARCLITE86X:
cost = hypersparc_adjust_cost (insn, link, dep, cost);
@@ -7528,7 +7597,7 @@
static int
sparc_use_sched_lookahead (void)
{
- if (sparc_cpu == PROCESSOR_NIAGARA
+ if (sparc_cpu == PROCESSOR_LEON || sparc_cpu == PROCESSOR_NIAGARA
|| sparc_cpu == PROCESSOR_NIAGARA2)
return 0;
if (sparc_cpu == PROCESSOR_ULTRASPARC
@@ -9014,4 +9083,197 @@
emit_move_insn (result, gen_lowpart (GET_MODE (result), res));
}
+/**************************** handle fdivd ****************************/
+char *
+output_divdf3 (rtx op0, rtx op1, rtx dest, rtx scratch)
+{
+ static char string[128];
+ if (debug_patch_divsqrt) {
+ fprintf(stderr, "debug_patch_divsqrt:\n");
+ debug_rtx(op0);
+ debug_rtx(op1);
+ debug_rtx(dest);
+ fprintf(stderr, "scratch: 0x%x\n",(int)scratch);
+ }
+ sprintf(string,"fdivd\t%%1, %%2, %%0; std %%0, %%3 !!!");
+ return string;
+}
+
+void
+output_divdf3_emit (rtx dest, rtx op0, rtx op1, rtx scratch)
+{
+ rtx slot0, div, divsave;
+
+ if (debug_patch_divsqrt) {
+ fprintf(stderr, "output_divdf3_emit:\n");
+ debug_rtx(op0);
+ debug_rtx(op1);
+ debug_rtx(dest);
+ fprintf(stderr, "scratch: 0x%x\n",(int)scratch);
+ }
+
+ div = gen_rtx_SET (VOIDmode,
+ dest,
+ gen_rtx_DIV (DFmode,
+ op0,
+ op1));
+
+ if (TARGET_STORE_AFTER_DIVSQRT) {
+ slot0 = assign_stack_local (DFmode, 8, 8);
+ divsave = gen_rtx_SET (VOIDmode, slot0, dest);
+ emit_insn(divsave);
+ emit_insn (gen_rtx_PARALLEL(VOIDmode,
+ gen_rtvec (2,
+ div,
+ gen_rtx_CLOBBER (SImode,
+ slot0))));
+ } else {
+ emit_insn(div);
+ }
+}
+
+/**************************** handle fdivs ****************************/
+char *
+output_divsf3 (rtx op0, rtx op1, rtx dest, rtx scratch)
+{
+ static char string[128];
+ if (debug_patch_divsqrt) {
+ fprintf(stderr, "debug_patch_divsqrt:\n");
+ debug_rtx(op0);
+ debug_rtx(op1);
+ debug_rtx(dest);
+ fprintf(stderr, "scratch: 0x%x\n",(int)scratch);
+ }
+ sprintf(string,"fdivs\t%%1, %%2, %%0; st %%0, %%3 !!!");
+ return string;
+}
+
+void
+output_divsf3_emit (rtx dest, rtx op0, rtx op1, rtx scratch)
+{
+ rtx slot0, div, divsave;
+
+ if (debug_patch_divsqrt) {
+ fprintf(stderr, "output_divsf3_emit:\n");
+ debug_rtx(op0);
+ debug_rtx(op1);
+ debug_rtx(dest);
+ fprintf(stderr, "scratch: 0x%x\n",(int)scratch);
+ }
+
+ div = gen_rtx_SET (VOIDmode,
+ dest,
+ gen_rtx_DIV (SFmode,
+ op0,
+ op1));
+
+ if (TARGET_STORE_AFTER_DIVSQRT) {
+ slot0 = assign_stack_local (SFmode, 4, 4);
+ divsave = gen_rtx_SET (VOIDmode, slot0, dest);
+ emit_insn(divsave);
+ emit_insn (gen_rtx_PARALLEL(VOIDmode,
+ gen_rtvec (2,
+ div,
+ gen_rtx_CLOBBER (SImode,
+ slot0))));
+ } else {
+ emit_insn(div);
+ }
+}
+
+/**************************** handle sqrtdf2 ****************************/
+
+char *
+output_sqrtdf2 (rtx dest, rtx op0, rtx scratch)
+{
+ static char string[50];
+ if (debug_patch_divsqrt) {
+ fprintf(stderr, "output_sqrtdf2:\n");
+ debug_rtx(dest);
+ debug_rtx(op0);
+ fprintf(stderr, "scratch: 0x%x\n",(int)scratch);
+ }
+ sprintf(string,"fsqrtd\t%%1, %%0; std %%0, %%2 !!!");
+ return string;
+}
+
+
+void
+output_sqrtdf2_emit (rtx dest, rtx op0, rtx scratch)
+{
+ rtx slot0, sqrt, sqrtsave;
+ if (debug_patch_divsqrt) {
+ fprintf(stderr, "output_sqrtdf2_emit:\n");
+ debug_rtx(dest);
+ debug_rtx(op0);
+ fprintf(stderr, "scratch: 0x%x\n",(int)scratch);
+ }
+
+ sqrt = gen_rtx_SET (VOIDmode,
+ dest,
+ gen_rtx_SQRT (DFmode,
+ op0));
+
+ if (TARGET_STORE_AFTER_DIVSQRT) {
+ slot0 = assign_stack_local (DFmode, 8, 8);
+ sqrtsave = gen_rtx_SET (VOIDmode, slot0, dest);
+ emit_insn(sqrtsave);
+ emit_insn (gen_rtx_PARALLEL(VOIDmode,
+ gen_rtvec (2,
+ sqrt,
+ gen_rtx_CLOBBER (SImode,
+ slot0))));
+ } else {
+ emit_insn(sqrt);
+ }
+
+}
+
+/**************************** handle sqrtsf2 ****************************/
+
+char *
+output_sqrtsf2 (rtx dest, rtx op0, rtx scratch)
+{
+ static char string[50];
+ if (debug_patch_divsqrt) {
+ fprintf(stderr, "output_sqrtsf2:\n");
+ debug_rtx(dest);
+ debug_rtx(op0);
+ fprintf(stderr, "scratch: 0x%x\n",(int)scratch);
+ }
+ sprintf(string,"fsqrts\t%%1, %%0; st %%0, %%2 !!!");
+ return string;
+}
+
+void
+output_sqrtsf2_emit (rtx dest, rtx op0, rtx scratch)
+{
+ rtx slot0, sqrt, sqrtsave;
+ if (debug_patch_divsqrt) {
+ fprintf(stderr, "output_sqrtsf2_emit:\n");
+ debug_rtx(dest);
+ debug_rtx(op0);
+ fprintf(stderr, "scratch: 0x%x\n",(int)scratch);
+ }
+
+ sqrt = gen_rtx_SET (VOIDmode,
+ dest,
+ gen_rtx_SQRT (SFmode,
+ op0));
+
+ if (TARGET_STORE_AFTER_DIVSQRT) {
+ slot0 = assign_stack_local (SFmode, 4, 4);
+ sqrtsave = gen_rtx_SET (VOIDmode, slot0, dest);
+ emit_insn(sqrtsave);
+ emit_insn (gen_rtx_PARALLEL(VOIDmode,
+ gen_rtvec (2,
+ sqrt,
+ gen_rtx_CLOBBER (SImode,
+ slot0))));
+ } else {
+ emit_insn(sqrt);
+ }
+
+}
+
#include "gt-sparc.h"
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/sparc.h gcc-4.4.7/gcc/config/sparc/sparc.h
--- gcc-4.4.7.orig/gcc/config/sparc/sparc.h 2012-03-13 14:42:03.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/sparc.h 2012-03-13 15:08:57.000000000 -0500
@@ -243,6 +243,11 @@
#define TARGET_CPU_ultrasparc3 9
#define TARGET_CPU_niagara 10
#define TARGET_CPU_niagara2 11
+#define TARGET_CPU_leon 12
+#define TARGET_CPU_fhleon 13
+#define TARGET_CPU_fhleonv8 14
+#define TARGET_CPU_sfleon 15
+#define TARGET_CPU_sfleonv8 16
#if TARGET_CPU_DEFAULT == TARGET_CPU_v9 \
|| TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc \
@@ -294,6 +299,31 @@
#define ASM_CPU32_DEFAULT_SPEC "-Asparclet"
#endif
+#if TARGET_CPU_DEFAULT == TARGET_CPU_leon
+#define CPP_CPU32_DEFAULT_SPEC "-D__leonbare__"
+#define ASM_CPU32_DEFAULT_SPEC ""
+#endif
+
+#if TARGET_CPU_DEFAULT == TARGET_CPU_fhleon
+#define CPP_CPU32_DEFAULT_SPEC "-D__leonbare__"
+#define ASM_CPU32_DEFAULT_SPEC ""
+#endif
+
+#if TARGET_CPU_DEFAULT == TARGET_CPU_fhleonv8
+#define CPP_CPU32_DEFAULT_SPEC "-D__leonbare__ -D__sparc_v8__"
+#define ASM_CPU32_DEFAULT_SPEC ""
+#endif
+
+#if TARGET_CPU_DEFAULT == TARGET_CPU_sfleon
+#define CPP_CPU32_DEFAULT_SPEC "-D__leonbare__ -D_SOFT_FLOAT"
+#define ASM_CPU32_DEFAULT_SPEC ""
+#endif
+
+#if TARGET_CPU_DEFAULT == TARGET_CPU_sfleonv8
+#define CPP_CPU32_DEFAULT_SPEC "-D__leonbare__ -D__sparc_v8__ -D_SOFT_FLOAT"
+#define ASM_CPU32_DEFAULT_SPEC ""
+#endif
+
#if TARGET_CPU_DEFAULT == TARGET_CPU_sparclite
#define CPP_CPU32_DEFAULT_SPEC "-D__sparclite__"
#define ASM_CPU32_DEFAULT_SPEC "-Asparclite"
@@ -352,6 +382,7 @@
for handling -mcpu=xxx switches. */
#define CPP_CPU_SPEC "\
%{msoft-float:-D_SOFT_FLOAT} \
+%{mflat: -D_FLAT} \
%{mcypress:} \
%{msparclite:-D__sparclite__} \
%{mf930:-D__sparclite__} %{mf934:-D__sparclite__} \
@@ -369,6 +400,9 @@
%{mcpu=ultrasparc3:-D__sparc_v9__} \
%{mcpu=niagara:-D__sparc_v9__} \
%{mcpu=niagara2:-D__sparc_v9__} \
+%{mcpu=fhleonv8:-D__sparc_v8__} \
+%{mcpu=sfleonv8:-D__sparc_v8__ -D_SOFT_FLOAT} \
+%{mcpu=sfleon:-D_SOFT_FLOAT} \
%{!mcpu*:%{!mcypress:%{!msparclite:%{!mf930:%{!mf934:%{!mv8:%{!msupersparc:%(cpp_cpu_default)}}}}}}} \
"
#define CPP_ARCH32_SPEC ""
@@ -403,9 +437,9 @@
%{sun4:} %{target:} \
%{mcypress:-mcpu=cypress} \
%{msparclite:-mcpu=sparclite} %{mf930:-mcpu=f930} %{mf934:-mcpu=f934} \
-%{mv8:-mcpu=v8} %{msupersparc:-mcpu=supersparc} \
+ %{msupersparc:-mcpu=supersparc} \
"
-
+/*%{mv8:-mcpu=v8}*/
/* Override in target specific files. */
#define ASM_CPU_SPEC "\
%{mcpu=sparclet:-Asparclet} %{mcpu=tsc701:-Asparclet} \
@@ -532,6 +566,7 @@
enum processor_type {
PROCESSOR_V7,
PROCESSOR_CYPRESS,
+ PROCESSOR_LEON,
PROCESSOR_V8,
PROCESSOR_SUPERSPARC,
PROCESSOR_SPARCLITE,
@@ -941,6 +976,8 @@
/* The stack bias (amount by which the hardware register is offset by). */
#define SPARC_STACK_BIAS ((TARGET_ARCH64 && TARGET_STACK_BIAS) ? 2047 : 0)
+extern int debug_patch_divsqrt;
+
/* Actual top-of-stack address is 92/176 greater than the contents of the
stack pointer register for !v9/v9. That is:
- !v9: 64 bytes for the in and local registers, 4 bytes for structure return
@@ -2002,7 +2039,7 @@
/* If a memory-to-memory move would take MOVE_RATIO or more simple
move-instruction pairs, we will do a movmem or libcall instead. */
-#define MOVE_RATIO(speed) ((speed) ? 8 : 3)
+#define MOVE_RATIO(speed) ((speed) ? (TARGET_V8 ? 16 : 8) : 3)
/* Define if operations between registers always perform the operation
on the full register even if a narrower mode is specified. */
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/sparcleon-ci.S gcc-4.4.7/gcc/config/sparc/sparcleon-ci.S
--- gcc-4.4.7.orig/gcc/config/sparc/sparcleon-ci.S 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/sparcleon-ci.S 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,69 @@
+! crti.s for solaris 2.0.
+
+! Copyright (C) 1992 Free Software Foundation, Inc.
+! Written By David Vinayak Henkel-Wallace, June 1992
+!
+! This file is free software; you can redistribute it and/or modify it
+! under the terms of the GNU General Public License as published by the
+! Free Software Foundation; either version 2, or (at your option) any
+! later version.
+!
+! In addition to the permissions in the GNU General Public License, the
+! Free Software Foundation gives you unlimited permission to link the
+! compiled version of this file with other programs, and to distribute
+! those programs without any restriction coming from the use of this
+! file. (The General Public License restrictions do apply in other
+! respects; for example, they cover modification of the file, and
+! distribution when not linked into another program.)
+!
+! This file is distributed in the hope that it will be useful, but
+! WITHOUT ANY WARRANTY; without even the implied warranty of
+! MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+! General Public License for more details.
+!
+! You should have received a copy of the GNU General Public License
+! along with this program; see the file COPYING. If not, write to
+! the Free Software Foundation, 59 Temple Place - Suite 330,
+! Boston, MA 02111-1307, USA.
+!
+! As a special exception, if you link this library with files
+! compiled with GCC to produce an executable, this does not cause
+! the resulting executable to be covered by the GNU General Public License.
+! This exception does not however invalidate any other reasons why
+! the executable file might be covered by the GNU General Public License.
+!
+
+! This file just make a stack frame for the contents of the .fini and
+! .init sections. Users may put any desired instructions in those
+! sections.
+
+! This file is linked in before the Values-Xx.o files and also before
+! crtbegin, with which perhaps it should be merged.
+
+ .section ".init"
+ .global _init
+ .type _init,#function
+ .align 4
+_init:
+#ifndef _FLAT
+ save %sp, -96, %sp
+#else
+ add %sp, -96, %sp
+ st %o7, [%sp + 64]
+#endif
+
+ .section ".fini"
+ .global _fini
+ .type _fini,#function
+ .align 4
+_fini:
+#ifndef _FLAT
+ save %sp, -96, %sp
+#else
+ add %sp, -96, %sp
+ st %o7, [%sp + 64]
+#endif
+
+
+
+
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/sparcleon-cn.S gcc-4.4.7/gcc/config/sparc/sparcleon-cn.S
--- gcc-4.4.7.orig/gcc/config/sparc/sparcleon-cn.S 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/sparcleon-cn.S 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,63 @@
+! crtn.s for solaris 2.0.
+
+! Copyright (C) 1992 Free Software Foundation, Inc.
+! Written By David Vinayak Henkel-Wallace, June 1992
+!
+! This file is free software; you can redistribute it and/or modify it
+! under the terms of the GNU General Public License as published by the
+! Free Software Foundation; either version 2, or (at your option) any
+! later version.
+!
+! In addition to the permissions in the GNU General Public License, the
+! Free Software Foundation gives you unlimited permission to link the
+! compiled version of this file with other programs, and to distribute
+! those programs without any restriction coming from the use of this
+! file. (The General Public License restrictions do apply in other
+! respects; for example, they cover modification of the file, and
+! distribution when not linked into another program.)
+!
+! This file is distributed in the hope that it will be useful, but
+! WITHOUT ANY WARRANTY; without even the implied warranty of
+! MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+! General Public License for more details.
+!
+! You should have received a copy of the GNU General Public License
+! along with this program; see the file COPYING. If not, write to
+! the Free Software Foundation, 59 Temple Place - Suite 330,
+! Boston, MA 02111-1307, USA.
+!
+! As a special exception, if you link this library with files
+! compiled with GCC to produce an executable, this does not cause
+! the resulting executable to be covered by the GNU General Public License.
+! This exception does not however invalidate any other reasons why
+! the executable file might be covered by the GNU General Public License.
+!
+
+! This file just makes sure that the .fini and .init sections do in
+! fact return. Users may put any desired instructions in those sections.
+! This file is the last thing linked into any executable.
+
+ .file "crtn.s"
+
+ .section ".init"
+ .align 4
+#ifndef _FLAT
+ ret
+ restore
+#else
+ ld [%sp+64], %o7
+ retl
+ add %sp, 96, %sp
+#endif
+
+ .section ".fini"
+ .align 4
+
+#ifndef _FLAT
+ ret
+ restore
+#else
+ ld [%sp+64], %o7
+ retl
+ add %sp, 96, %sp
+#endif
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/sparc.md gcc-4.4.7/gcc/config/sparc/sparc.md
--- gcc-4.4.7.orig/gcc/config/sparc/sparc.md 2012-03-13 14:42:03.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/sparc.md 2012-03-13 15:08:57.000000000 -0500
@@ -85,9 +85,10 @@
;; Attribute for cpu type.
;; These must match the values for enum processor_type in sparc.h.
-(define_attr "cpu"
+(define_attr "cpu"
"v7,
cypress,
+ leon,
v8,
supersparc,
sparclite,f930,f934,
@@ -311,6 +312,7 @@
;; Include SPARC DFA schedulers
+(automata_option "v")
(include "cypress.md")
(include "supersparc.md")
@@ -320,7 +322,7 @@
(include "ultra3.md")
(include "niagara.md")
(include "niagara2.md")
-
+(include "leon.md")
;; Operand and operator predicates and constraints
@@ -5921,7 +5923,7 @@
[(set (match_operand:DF 0 "register_operand" "=e")
(mult:DF (float_extend:DF (match_operand:SF 1 "register_operand" "f"))
(float_extend:DF (match_operand:SF 2 "register_operand" "f"))))]
- "(TARGET_V8 || TARGET_V9) && TARGET_FPU"
+ "(TARGET_V8 || TARGET_V9) && TARGET_FPU && (!TARGET_NO_FSMULD)"
"fsmuld\t%1, %2, %0"
[(set_attr "type" "fpmul")
(set_attr "fptype" "double")])
@@ -5950,22 +5952,79 @@
"fdivq\t%1, %2, %0"
[(set_attr "type" "fpdivd")])
-(define_insn "divdf3"
+;;;;;;;;;;;;;;;;;; handle divdf3 ;;;;;;;;;;;;;;;;
+(define_expand "divdf3"
+ [(parallel [(set (match_operand:DF 0 "register_operand" "=e")
+ (div:DF (match_operand:DF 1 "register_operand" "e")
+ (match_operand:DF 2 "register_operand" "e")))
+ (clobber (match_scratch:SI 3 ""))])]
+ "TARGET_FPU"
+ "{
+ output_divdf3_emit (operands[0], operands[1], operands[2], operands[3]);
+ DONE;
+ }")
+
+(define_insn "divdf3_store"
+ [(set (match_operand:DF 0 "register_operand" "=e")
+ (div:DF (match_operand:DF 1 "register_operand" "e")
+ (match_operand:DF 2 "register_operand" "e")))
+ (clobber (match_operand:DF 3 "memory_operand" "" ))]
+ "TARGET_FPU && TARGET_STORE_AFTER_DIVSQRT"
+ {
+ return output_divdf3 (operands[0], operands[1], operands[2], operands[3]);
+ }
+ [(set_attr "type" "multi")
+ (set_attr "fptype" "double")
+ (set_attr "length" "2")])
+
+;;(set_attr "type" "fpdivd")
+
+(define_insn "divdf3_nostore"
[(set (match_operand:DF 0 "register_operand" "=e")
(div:DF (match_operand:DF 1 "register_operand" "e")
(match_operand:DF 2 "register_operand" "e")))]
- "TARGET_FPU"
+ "TARGET_FPU && (!TARGET_STORE_AFTER_DIVSQRT)"
"fdivd\t%1, %2, %0"
[(set_attr "type" "fpdivd")
(set_attr "fptype" "double")])
+
-(define_insn "divsf3"
+;;;;;;;;;;;;;;;;;; handle divsf3 ;;;;;;;;;;;;;;;;
+(define_expand "divsf3"
+ [(parallel [(set (match_operand:SF 0 "register_operand" "=f")
+ (div:SF (match_operand:SF 1 "register_operand" "f")
+ (match_operand:SF 2 "register_operand" "f")))
+ (clobber (match_scratch:SI 3 ""))])]
+ "TARGET_FPU && (!TARGET_NO_SF_DIVSQRT)"
+ "{
+ output_divsf3_emit (operands[0], operands[1], operands[2], operands[3]);
+ DONE;
+ }")
+
+(define_insn "divsf3_store"
+ [(set (match_operand:SF 0 "register_operand" "=f")
+ (div:SF (match_operand:SF 1 "register_operand" "f")
+ (match_operand:SF 2 "register_operand" "f")))
+ (clobber (match_operand:SF 3 "memory_operand" "" ))]
+ "TARGET_FPU && TARGET_STORE_AFTER_DIVSQRT && (!TARGET_NO_SF_DIVSQRT)"
+ {
+ return output_divsf3 (operands[0], operands[1], operands[2], operands[3]);
+ }
+ [(set_attr "type" "multi")
+ (set_attr "length" "2")
+ ])
+
+;;(set_attr "type" "fpdivs")
+
+(define_insn "divsf3_nostore"
[(set (match_operand:SF 0 "register_operand" "=f")
(div:SF (match_operand:SF 1 "register_operand" "f")
(match_operand:SF 2 "register_operand" "f")))]
- "TARGET_FPU"
+ "TARGET_FPU && (!TARGET_STORE_AFTER_DIVSQRT) && (!TARGET_NO_SF_DIVSQRT)"
"fdivs\t%1, %2, %0"
[(set_attr "type" "fpdivs")])
+
+;;;;;;;;;;;;;;;;;;
(define_expand "negtf2"
[(set (match_operand:TF 0 "register_operand" "=e,e")
@@ -5973,6 +6032,7 @@
"TARGET_FPU"
"")
+
(define_insn_and_split "*negtf2_notv9"
[(set (match_operand:TF 0 "register_operand" "=e,e")
(neg:TF (match_operand:TF 1 "register_operand" "0,e")))]
@@ -6164,21 +6224,72 @@
"fsqrtq\t%1, %0"
[(set_attr "type" "fpsqrtd")])
-(define_insn "sqrtdf2"
+
+;;;;;;;;;;;;;;;;;; handle sqrtdf2 ;;;;;;;;;;;;;;;;
+(define_expand "sqrtdf2"
+ [(parallel [(set (match_operand:DF 0 "register_operand" "=e")
+ (sqrt:DF (match_operand:DF 1 "register_operand" "e")))
+ (clobber (match_scratch:SI 2 ""))])]
+ "TARGET_FPU"
+ "{
+ output_sqrtdf2_emit (operands[0], operands[1], operands[2]);
+ DONE;
+ }")
+
+(define_insn "sqrtdf2_store"
+ [(set (match_operand:DF 0 "register_operand" "=e")
+ (sqrt:DF (match_operand:DF 1 "register_operand" "e")))
+ (clobber (match_operand:DF 2 "memory_operand" "" ))]
+ "TARGET_FPU && TARGET_STORE_AFTER_DIVSQRT"
+ {
+ return output_sqrtdf2 (operands[0], operands[1], operands[2]);
+ }
+ [(set_attr "type" "multi")
+ (set_attr "fptype" "double")
+ (set_attr "length" "2")])
+
+;;(set_attr "type" "fpsqrtd")
+
+(define_insn "sqrtdf2_nostore"
[(set (match_operand:DF 0 "register_operand" "=e")
(sqrt:DF (match_operand:DF 1 "register_operand" "e")))]
- "TARGET_FPU"
+ "TARGET_FPU && (!TARGET_STORE_AFTER_DIVSQRT)"
"fsqrtd\t%1, %0"
[(set_attr "type" "fpsqrtd")
(set_attr "fptype" "double")])
-(define_insn "sqrtsf2"
+;;;;;;;;;;;;;;;;;; handle sqrtsf2 ;;;;;;;;;;;;;;;;
+(define_expand "sqrtsf2"
+ [(parallel [(set (match_operand:SF 0 "register_operand" "=f")
+ (sqrt:SF (match_operand:SF 1 "register_operand" "f")))
+ (clobber (match_scratch:SI 2 ""))])]
+ "TARGET_FPU && (!TARGET_NO_SF_DIVSQRT)"
+ "{
+ output_sqrtsf2_emit (operands[0], operands[1], operands[2]);
+ DONE;
+ }")
+
+(define_insn "sqrtsf2_store"
+ [(set (match_operand:SF 0 "register_operand" "=f")
+ (sqrt:SF (match_operand:SF 1 "register_operand" "f")))
+ (clobber (match_operand:SF 2 "memory_operand" "" ))]
+ "TARGET_FPU && TARGET_STORE_AFTER_DIVSQRT && (!TARGET_NO_SF_DIVSQRT)"
+ {
+ return output_sqrtsf2 (operands[0], operands[1], operands[2]);
+ }
+ [(set_attr "type" "multi")
+ (set_attr "length" "2")])
+
+;;(set_attr "type" "fpsqrts")
+
+(define_insn "sqrtsf2_nostore"
[(set (match_operand:SF 0 "register_operand" "=f")
(sqrt:SF (match_operand:SF 1 "register_operand" "f")))]
- "TARGET_FPU"
+ "TARGET_FPU && (!TARGET_STORE_AFTER_DIVSQRT) && (!TARGET_NO_SF_DIVSQRT)"
"fsqrts\t%1, %0"
[(set_attr "type" "fpsqrts")])
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Arithmetic shift instructions.
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/sparc.opt gcc-4.4.7/gcc/config/sparc/sparc.opt
--- gcc-4.4.7.orig/gcc/config/sparc/sparc.opt 2012-03-13 14:42:03.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/sparc.opt 2012-03-13 15:08:57.000000000 -0500
@@ -22,6 +22,10 @@
Target Report Mask(FPU)
Use hardware FP
+mv8
+Target Report Mask(V8)
+Use hardware smul/sdiv
+
mhard-float
Target RejectNegative Mask(FPU) MaskExists
Use hardware FP
@@ -114,7 +118,7 @@
Mask(SPARCLET)
;; Generate code for SPARClet
-Mask(V8)
+;;Mask(V8)
;; Generate code for SPARC-V8
Mask(V9)
@@ -123,3 +127,19 @@
Mask(DEPRECATED_V8_INSNS)
;; Generate code that uses the V8 instructions deprecated
;; in the V9 architecture.
+
+mstore-after-divsqrt
+Target Report RejectNegative Mask(STORE_AFTER_DIVSQRT)
+Emit a store after fdivs/fsqrts/fdivd/fsqrtd
+
+mno-fsmuld
+Target Report RejectNegative Mask(NO_FSMULD)
+Avoid generation of fsmuld
+
+mno-sf-divsqrt
+Target Report RejectNegative Mask(NO_SF_DIVSQRT)
+Avoid generation of fdivs/fsqrts, use fdivd/fsqrtd instead
+
+mdebug-patch-divsqrt
+Target Report RejectNegative Var(debug_patch_divsqrt)
+Print debug output for fpu fixes
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/sparc-protos.h gcc-4.4.7/gcc/config/sparc/sparc-protos.h
--- gcc-4.4.7.orig/gcc/config/sparc/sparc-protos.h 2012-03-13 14:42:03.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/sparc-protos.h 2012-03-13 15:08:57.000000000 -0500
@@ -79,6 +79,14 @@
extern void sparc_emit_set_symbolic_const64 (rtx, rtx, rtx);
extern int sparc_splitdi_legitimate (rtx, rtx);
extern int sparc_absnegfloat_split_legitimate (rtx, rtx);
+extern char *output_divdf3 (rtx , rtx , rtx , rtx );
+extern void output_divdf3_emit (rtx , rtx , rtx , rtx );
+extern char *output_divsf3 (rtx , rtx , rtx , rtx );
+extern void output_divsf3_emit (rtx , rtx , rtx , rtx );
+extern char *output_sqrtdf2 (rtx , rtx , rtx );
+extern char *output_sqrtsf2 (rtx , rtx , rtx );
+extern void output_sqrtdf2_emit (rtx , rtx , rtx );
+extern void output_sqrtsf2_emit (rtx , rtx , rtx );
extern const char *output_ubranch (rtx, int, rtx);
extern const char *output_cbranch (rtx, rtx, int, int, int, rtx);
extern const char *output_return (rtx);
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/t-elf gcc-4.4.7/gcc/config/sparc/t-elf
--- gcc-4.4.7.orig/gcc/config/sparc/t-elf 2012-03-13 14:42:03.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/t-elf 2012-03-13 15:08:57.000000000 -0500
@@ -15,15 +15,27 @@
# MULTILIB_OPTIONS should have msparclite too, but we'd have to make
# gas build...
-MULTILIB_OPTIONS = msoft-float mcpu=v8
-MULTILIB_DIRNAMES = soft v8
-MULTILIB_MATCHES = msoft-float=mno-fpu mcpu?v8=mv8
+ifeq ($(with_leon_cpu),)
+MULTILIB_OPTIONS = msoft-float mv8 mtune=ut699
+MULTILIB_DIRNAMES = soft v8 ut699
+MULTILIB_MATCHES = msoft-float=mno-fpu
+MULTILIB_EXCEPTIONS += msoft-float/mtune=ut699
+MULTILIB_EXCLUSIONS += msoft-float/mtune=ut699
+else
+MULTILIB_OPTIONS =
+MULTILIB_DIRNAMES =
+MULTILIB_MATCHES =
+MULTILIB_EXCEPTIONS +=
+MULTILIB_EXCLUSIONS +=
+endif
LIBGCC = stmp-multilib
INSTALL_LIBGCC = install-multilib
+ifneq ($(with_cpu),leon)
# Assemble startup files.
$(T)crti.o: $(srcdir)/config/sparc/sol2-ci.asm $(GCC_PASSES)
$(GCC_FOR_TARGET) -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/sparc/sol2-ci.asm
$(T)crtn.o: $(srcdir)/config/sparc/sol2-cn.asm $(GCC_PASSES)
$(GCC_FOR_TARGET) -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/sparc/sol2-cn.asm
+endif
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/t-fhleon gcc-4.4.7/gcc/config/sparc/t-fhleon
--- gcc-4.4.7.orig/gcc/config/sparc/t-fhleon 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/t-fhleon 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1 @@
+with_leon_cpu=fhleon
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/t-fhleonv8 gcc-4.4.7/gcc/config/sparc/t-fhleonv8
--- gcc-4.4.7.orig/gcc/config/sparc/t-fhleonv8 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/t-fhleonv8 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1 @@
+with_leon_cpu=fhleonv8
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/t-leon gcc-4.4.7/gcc/config/sparc/t-leon
--- gcc-4.4.7.orig/gcc/config/sparc/t-leon 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/t-leon 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,18 @@
+# to make t-elf not compile leon crti/n
+with_cpu=leon
+
+EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o
+
+ifneq ($(with_cpu_os),leon_linux)
+ifneq ($(with_cpu_os),leon_uclinux)
+EXTRA_MULTILIB_PARTS += crti.o crtn.o
+# Assemble startup files.
+$(T)crti.o: $(srcdir)/config/sparc/sparcleon-ci.S $(GCC_PASSES)
+ $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(LIBGCC2_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
+ -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/sparc/sparcleon-ci.S
+
+$(T)crtn.o: $(srcdir)/config/sparc/sparcleon-cn.S $(GCC_PASSES)
+ $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(LIBGCC2_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
+ -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/sparc/sparcleon-cn.S
+endif
+endif
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/t-leon-linux gcc-4.4.7/gcc/config/sparc/t-leon-linux
--- gcc-4.4.7.orig/gcc/config/sparc/t-leon-linux 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/t-leon-linux 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,2 @@
+with_cpu_os=leon_linux
+
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/t-leon-uclinux gcc-4.4.7/gcc/config/sparc/t-leon-uclinux
--- gcc-4.4.7.orig/gcc/config/sparc/t-leon-uclinux 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/t-leon-uclinux 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,2 @@
+with_cpu_os=leon_uclinux
+
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/t-sfleon gcc-4.4.7/gcc/config/sparc/t-sfleon
--- gcc-4.4.7.orig/gcc/config/sparc/t-sfleon 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/t-sfleon 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,7 @@
+with_leon_cpu=sfleon
+
+#TPBIT = tp-bit.c
+#
+#tp-bit.c: $(srcdir)/config/fp-bit.c
+# echo '# define TFLOAT' > tp-bit.c
+# cat $(srcdir)/config/fp-bit.c >> tp-bit.c
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/t-sfleonv8 gcc-4.4.7/gcc/config/sparc/t-sfleonv8
--- gcc-4.4.7.orig/gcc/config/sparc/t-sfleonv8 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/t-sfleonv8 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,7 @@
+with_leon_cpu=sfleonv8
+
+#TPBIT = tp-bit.c
+#
+#tp-bit.c: $(srcdir)/config/fp-bit.c
+# echo '# define TFLOAT' > tp-bit.c
+# cat $(srcdir)/config/fp-bit.c >> tp-bit.c
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/t-sparcbare gcc-4.4.7/gcc/config/sparc/t-sparcbare
--- gcc-4.4.7.orig/gcc/config/sparc/t-sparcbare 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/t-sparcbare 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,31 @@
+# configuration file for a bare sparc cpu
+
+LIB1ASMSRC = sparc/lb1spc.asm
+LIB1ASMFUNCS = _mulsi3 _divsi3 _modsi3
+
+# We want fine grained libraries, so use the new code to build the
+# floating point emulation libraries.
+FPBIT = fp-bit.c
+DPBIT = dp-bit.c
+
+dp-bit.c: $(srcdir)/config/fp-bit.c
+ cat $(srcdir)/config/fp-bit.c > dp-bit.c
+
+fp-bit.c: $(srcdir)/config/fp-bit.c
+ echo '#define FLOAT' > fp-bit.c
+ cat $(srcdir)/config/fp-bit.c >> fp-bit.c
+
+# MULTILIB_OPTIONS should have msparclite too, but we'd have to make
+# gas build...
+ifeq ($(with_leon_cpu),)
+MULTILIB_OPTIONS = msoft-float mcpu=v8
+MULTILIB_DIRNAMES = soft v8
+MULTILIB_MATCHES = msoft-float=mno-fpu mcpu?v8=mv8
+else
+MULTILIB_OPTIONS =
+MULTILIB_DIRNAMES =
+MULTILIB_MATCHES =
+endif
+
+LIBGCC = stmp-multilib
+INSTALL_LIBGCC = install-multilib
diff -Naur gcc-4.4.7.orig/gcc/config/sparc/uclinux.h gcc-4.4.7/gcc/config/sparc/uclinux.h
--- gcc-4.4.7.orig/gcc/config/sparc/uclinux.h 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/gcc/config/sparc/uclinux.h 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,181 @@
+/* Definitions for SPARC running Linux-based GNU systems with ELF.
+ Copyright (C) 1996, 1997, 1998, 1999, 2000, 2002, 2003, 2004, 2005, 2006,
+ 2007, 2008, 2009 Free Software Foundation, Inc.
+ Contributed by Eddie C. Dost (ecd@skynet.be)
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3. If not see
+. */
+
+#define TARGET_OS_CPP_BUILTINS() \
+ do \
+ { \
+ LINUX_TARGET_OS_CPP_BUILTINS(); \
+ if (TARGET_LONG_DOUBLE_128) \
+ builtin_define ("__LONG_DOUBLE_128__"); \
+ } \
+ while (0)
+
+#undef STARTFILE_SPEC
+#define STARTFILE_SPEC "crt1.o%s crti.o%s crtbegin.o%s"
+
+/* Provide a ENDFILE_SPEC appropriate for GNU/Linux. Here we tack on
+ the GNU/Linux magical crtend.o file (see crtstuff.c) which
+ provides part of the support for getting C++ file-scope static
+ object constructed before entering `main', followed by a normal
+ GNU/Linux "finalizer" file, `crtn.o'. */
+
+#undef ENDFILE_SPEC
+#define ENDFILE_SPEC \
+ "%{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s\
+ %{ffast-math|funsafe-math-optimizations:crtfastmath.o%s}"
+
+/* This is for -profile to use -lc_p instead of -lc. */
+#undef CC1_SPEC
+#define CC1_SPEC "%{profile:-p} \
+%{sun4:} %{target:} \
+%{mcypress:-mcpu=cypress} \
+%{msparclite:-mcpu=sparclite} %{mf930:-mcpu=f930} %{mf934:-mcpu=f934} \
+%{mv8:-mcpu=v8} %{msupersparc:-mcpu=supersparc} \
+"
+
+#undef TARGET_VERSION
+#define TARGET_VERSION fprintf (stderr, " (sparc GNU/Linux with ELF)");
+
+#undef SIZE_TYPE
+#define SIZE_TYPE "unsigned int"
+
+#undef PTRDIFF_TYPE
+#define PTRDIFF_TYPE "int"
+
+#undef WCHAR_TYPE
+#define WCHAR_TYPE "int"
+
+#undef WCHAR_TYPE_SIZE
+#define WCHAR_TYPE_SIZE 32
+
+#undef CPP_SUBTARGET_SPEC
+#define CPP_SUBTARGET_SPEC \
+"%{posix:-D_POSIX_SOURCE} %{pthread:-D_REENTRANT}"
+
+/* Provide a LINK_SPEC appropriate for GNU/Linux. Here we provide support
+ for the special GCC options -static and -shared, which allow us to
+ link things in one of these three modes by applying the appropriate
+ combinations of options at link-time. We like to support here for
+ as many of the other GNU linker options as possible. But I don't
+ have the time to search for those flags. I am sure how to add
+ support for -soname shared_object_name. H.J.
+
+ I took out %{v:%{!V:-V}}. It is too much :-(. They can use
+ -Wl,-V.
+
+ When the -shared link option is used a final link is not being
+ done. */
+
+/* If ELF is the default format, we should not use /lib/elf. */
+
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
+
+#undef LINK_SPEC
+#define LINK_SPEC "-m elf32_sparc -Y P,/usr/lib %{shared:-shared} \
+ %{!mno-relax:%{!r:-relax}} \
+ %{!shared: \
+ %{!ibcs: \
+ %{!static: \
+ %{rdynamic:-export-dynamic} \
+ %{!dynamic-linker:-dynamic-linker " LINUX_DYNAMIC_LINKER "}} \
+ %{static:-static}}}"
+
+/* The sun bundled assembler doesn't accept -Yd, (and neither does gas).
+ It's safe to pass -s always, even if -g is not used. */
+#undef ASM_SPEC
+#define ASM_SPEC \
+ "%{V} %{v:%{!V:-V}} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Wa,*:%*} -s \
+ %{fpic|fPIC|fpie|fPIE:-K PIC} %(asm_cpu) %(asm_relax)"
+
+#undef ASM_OUTPUT_ALIGNED_LOCAL
+#define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
+do { \
+ fputs ("\t.local\t", (FILE)); \
+ assemble_name ((FILE), (NAME)); \
+ putc ('\n', (FILE)); \
+ ASM_OUTPUT_ALIGNED_COMMON (FILE, NAME, SIZE, ALIGN); \
+} while (0)
+
+#undef COMMON_ASM_OP
+#define COMMON_ASM_OP "\t.common\t"
+
+#undef LOCAL_LABEL_PREFIX
+#define LOCAL_LABEL_PREFIX "."
+
+/* This is how to store into the string LABEL
+ the symbol_ref name of an internal numbered label where
+ PREFIX is the class of label and NUM is the number within the class.
+ This is suitable for output with `assemble_name'. */
+
+#undef ASM_GENERATE_INTERNAL_LABEL
+#define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
+ sprintf (LABEL, "*.L%s%ld", PREFIX, (long)(NUM))
+
+
+/* Define for support of TFmode long double.
+ SPARC ABI says that long double is 4 words. */
+#undef LONG_DOUBLE_TYPE_SIZE
+#define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
+
+/* Define this to set long double type size to use in libgcc2.c, which can
+ not depend on target_flags. */
+#ifdef __LONG_DOUBLE_128__
+#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128
+#else
+#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
+#endif
+
+#undef DITF_CONVERSION_LIBFUNCS
+#define DITF_CONVERSION_LIBFUNCS 1
+
+#ifdef HAVE_AS_TLS
+#undef TARGET_SUN_TLS
+#undef TARGET_GNU_TLS
+#define TARGET_SUN_TLS 0
+#define TARGET_GNU_TLS 1
+#endif
+
+/* We use GNU ld so undefine this so that attribute((init_priority)) works. */
+#undef CTORS_SECTION_ASM_OP
+#undef DTORS_SECTION_ASM_OP
+
+#define MD_UNWIND_SUPPORT "config/sparc/linux-unwind.h"
+
+/* Linux currently uses RMO in uniprocessor mode, which is equivalent to
+ TMO, and TMO in multiprocessor mode. But they reserve the right to
+ change their minds. */
+#undef SPARC_RELAXED_ORDERING
+#define SPARC_RELAXED_ORDERING true
+
+#undef NEED_INDICATE_EXEC_STACK
+#define NEED_INDICATE_EXEC_STACK 1
+
+#ifdef TARGET_LIBC_PROVIDES_SSP
+/* sparc glibc provides __stack_chk_guard in [%g7 + 0x14]. */
+#define TARGET_THREAD_SSP_OFFSET 0x14
+#endif
+
+/* Define if long doubles should be mangled as 'g'. */
+#define TARGET_ALTERNATE_LONG_DOUBLE_MANGLING
+
+/* We use glibc _mcount for profiling. */
+#undef NO_PROFILE_COUNTERS
+#define NO_PROFILE_COUNTERS 1
diff -Naur gcc-4.4.7.orig/gcc/config.gcc gcc-4.4.7/gcc/config.gcc
--- gcc-4.4.7.orig/gcc/config.gcc 2012-03-13 14:42:03.000000000 -0500
+++ gcc-4.4.7/gcc/config.gcc 2012-03-13 15:08:57.000000000 -0500
@@ -1574,6 +1574,11 @@
tmake_file="${tmake_file} mips/t-linux64 mips/t-libgcc-mips16"
tm_defines="${tm_defines} MIPS_ABI_DEFAULT=ABI_N32"
case ${target} in
+ mips64-nlm-linux-gnu)
+ tm_file="${tm_file} mips/linux64nlm.h"
+ tmake_file="${tmake_file} mips/t-linux64-nlm"
+ tm_defines="${tm_defines} MIPS_CPU_STRING_DEFAULT=\\\"xlp\\\" MIPS_ISA_DEFAULT=65"
+ ;;
mips64el-st-linux-gnu)
tm_file="${tm_file} mips/st.h"
tmake_file="${tmake_file} mips/t-st"
@@ -1646,6 +1651,14 @@
;;
esac
;;
+mips64*-nlm-elf*)
+ tm_file="elfos.h ${tm_file} mips/elf.h mips/elfnlm.h"
+ tmake_file="mips/t-elf mips/t-nlm"
+ tm_defines="${tm_defines} MIPS_ISA_DEFAULT=65 MIPS_ABI_DEFAULT=ABI_32 MIPS_CPU_STRING_DEFAULT=\\\"xlp\\\""
+ extra_parts="crtbeginT.o"
+ target_cpu_default="MASK_64BIT|MASK_FLOAT64"
+ use_fixproto=yes
+ ;;
mipsisa32-*-elf* | mipsisa32el-*-elf* | \
mipsisa32r2-*-elf* | mipsisa32r2el-*-elf* | \
mipsisa64-*-elf* | mipsisa64el-*-elf* | \
@@ -2198,6 +2211,16 @@
gas=yes gnu_ld=yes
with_cpu=ultrasparc
;;
+sparc-*-uclinux*) # sparc running uClinux with uClibc
+ tm_file="${tm_file} dbxelf.h elfos.h svr4.h sparc/sysv4.h sparc/sp-elf.h sparc/uclinux.h linux.h "
+ tm_defines="${tm_defines} UCLIBC_DEFAULT=1"
+ #tm_file="${tm_file} dbxelf.h elfos.h svr4.h sparc/sysv4.h sol2.h sparc/sol2.h sparc/sol2-gld.h sparc/elf.h"
+ tmake_file="sparc/t-elf sparc/t-crtfm "
+ extra_parts=" crtbegin.o crtend.o"
+ extra_options="${extra_options} linux.opt"
+ use_fixproto=yes
+ #use_fixproto=no
+ ;;
sparc-*-elf*)
tm_file="${tm_file} dbxelf.h elfos.h svr4.h sparc/sysv4.h sparc/sp-elf.h"
tmake_file="sparc/t-elf sparc/t-crtfm"
@@ -3003,6 +3026,27 @@
| v9 | ultrasparc | ultrasparc3 | niagara | niagara2)
# OK
;;
+ leon*|sfleon*|fhleon*)
+ echo "Using leon cpu for ${target}" 1>&2
+ tmake_file="sparc/t-leon ${tmake_file} " # build lib for softfloat with option -msoft-float
+ case "${target}" in
+ sparc*-elf*)
+ echo "Using leon spec file" 1>&2
+ tm_file="${tm_file} sparc/leon.h"
+ ;;
+ sparc*-linux-*)
+ tmake_file="sparc/t-leon-linux sparc/t-${val} ${tmake_file} sparc/t-sparcbare" # build lib for softfloat with option -msoft-float
+ echo "Adding multilib sparc/t-leon-linux,sparc/t-sparcbare to leon-sparc-linux: ${tmake_file} " 1>&2
+ ;;
+ sparc*-uclinux*)
+ tmake_file="sparc/t-leon-uclinux ${tmake_file} " # build lib for softfloat with option -msoft-float
+ echo "Adding multilib sparc/t-leon-uclinux to leon-sparc-linux: ${tmake_file} " 1>&2
+ ;;
+ *)
+ ;;
+ esac
+ target_cpu_default2=TARGET_CPU_"`echo $machine | sed 's/-.*$//'`"
+ ;;
*)
echo "Unknown cpu used in --with-$which=$val" 1>&2
exit 1
@@ -3139,6 +3183,7 @@
;;
sparc*-*-*)
+
# Some standard aliases.
case x$with_cpu in
xsparc)
@@ -3165,6 +3210,7 @@
;;
esac
+
t=
all_defaults="abi cpu cpu_32 cpu_64 arch arch_32 arch_64 tune tune_32 tune_64 schedule float mode fpu divide llsc mips-plt"
for option in $all_defaults
@@ -3181,11 +3227,19 @@
;;
esac
- if test "x$t" = x
- then
- t="{ \"$option\", \"$val\" }"
+ if [ "x$option" = xcpu ] && [ "x$val" = xleon -o \
+ "x$val" = xfhleon -o \
+ "x$val" = xfhleonv8 -o \
+ "x$val" = xsfleon -o \
+ "x$val" = xsfleonv8 ]; then
+ echo "Getting cpu=$val, not registering it as mcpu option" 2>&1
else
- t="${t}, { \"$option\", \"$val\" }"
+ if test "x$t" = x
+ then
+ t="{ \"$option\", \"$val\" }"
+ else
+ t="${t}, { \"$option\", \"$val\" }"
+ fi
fi
fi
done
diff -Naur gcc-4.4.7.orig/gcc/configure gcc-4.4.7/gcc/configure
--- gcc-4.4.7.orig/gcc/configure 2012-03-13 14:42:03.000000000 -0500
+++ gcc-4.4.7/gcc/configure 2012-03-13 15:08:57.000000000 -0500
@@ -24411,7 +24411,11 @@
if test "${gcc_cv_libc_provides_ssp+set}" = set; then
echo $ECHO_N "(cached) $ECHO_C" >&6
else
- gcc_cv_libc_provides_ssp=no
+ gcc_cv_libc_provides_ssp=no
+# case $with_cpu in
+# sfleon*|fhleon*)
+# gcc_cv_libc_provides_ssp=yes;;
+# esac
case "$target" in
*-*-linux* | *-*-kfreebsd*-gnu | *-*-knetbsd*-gnu)
if test x$host != x$target || test "x$TARGET_SYSTEM_ROOT" != x; then
diff -Naur gcc-4.4.7.orig/libgcc/config.host gcc-4.4.7/libgcc/config.host
--- gcc-4.4.7.orig/libgcc/config.host 2012-03-13 14:44:32.000000000 -0500
+++ gcc-4.4.7/libgcc/config.host 2012-03-13 15:08:57.000000000 -0500
@@ -527,8 +527,12 @@
;;
sparc-*-elf*)
;;
+sparc-*-uclinux*)
+ extra_parts=" crtbegin.o crtend.o crtfastmath.o"
+ tmake_file="${tmake_file} sparc/t-crtfm sparc/t-crtfm-uclibc"
+ ;;
sparc-*-linux*) # SPARC's running GNU/Linux, libc6
- extra_parts="$extra_parts crtfastmath.o"
+ extra_parts="$extra_parts crtfastmath.o "
tmake_file="${tmake_file} sparc/t-crtfm"
;;
sparc-*-rtems*)
diff -Naur gcc-4.4.7.orig/libstdc++-v3/configure gcc-4.4.7/libstdc++-v3/configure
--- gcc-4.4.7.orig/libstdc++-v3/configure 2012-03-13 14:44:11.000000000 -0500
+++ gcc-4.4.7/libstdc++-v3/configure 2012-03-13 15:08:57.000000000 -0500
@@ -2866,6 +2866,9 @@
}
_ACEOF
# FIXME: Cleanup?
+
+echo "leon: do_link" >&5
+
if { (eval echo "$as_me:$LINENO: \"$ac_link\"") >&5
(eval $ac_link) 2>&5
ac_status=$?
diff -Naur gcc-4.4.7.orig/libstdc++-v3/libsupc++/vterminate.cc gcc-4.4.7/libstdc++-v3/libsupc++/vterminate.cc
--- gcc-4.4.7.orig/libstdc++-v3/libsupc++/vterminate.cc 2012-03-13 14:44:11.000000000 -0500
+++ gcc-4.4.7/libstdc++-v3/libsupc++/vterminate.cc 2012-03-13 15:08:57.000000000 -0500
@@ -41,56 +41,56 @@
// stderr.
void __verbose_terminate_handler()
{
- static bool terminating;
- if (terminating)
- {
- fputs("terminate called recursively\n", stderr);
- abort ();
- }
- terminating = true;
-
- // Make sure there was an exception; terminate is also called for an
- // attempt to rethrow when there is no suitable exception.
- type_info *t = __cxa_current_exception_type();
- if (t)
- {
- // Note that "name" is the mangled name.
- char const *name = t->name();
- {
- int status = -1;
- char *dem = 0;
+// static bool terminating;
+// if (terminating)
+// {
+// fputs("terminate called recursively\n", stderr);
+// abort ();
+// }
+// terminating = true;
+
+// // Make sure there was an exception; terminate is also called for an
+// // attempt to rethrow when there is no suitable exception.
+// type_info *t = __cxa_current_exception_type();
+// if (t)
+// {
+// // Note that "name" is the mangled name.
+// char const *name = t->name();
+// {
+// int status = -1;
+// char *dem = 0;
- dem = __cxa_demangle(name, 0, 0, &status);
+// dem = __cxa_demangle(name, 0, 0, &status);
- fputs("terminate called after throwing an instance of '", stderr);
- if (status == 0)
- fputs(dem, stderr);
- else
- fputs(name, stderr);
- fputs("'\n", stderr);
-
- if (status == 0)
- free(dem);
- }
-
- // If the exception is derived from std::exception, we can
- // give more information.
- try { __throw_exception_again; }
-#ifdef __EXCEPTIONS
- catch (exception &exc)
- {
- char const *w = exc.what();
- fputs(" what(): ", stderr);
- fputs(w, stderr);
- fputs("\n", stderr);
- }
-#endif
- catch (...) { }
- }
- else
- fputs("terminate called without an active exception\n", stderr);
+// fputs("terminate called after throwing an instance of '", stderr);
+// if (status == 0)
+// fputs(dem, stderr);
+// else
+// fputs(name, stderr);
+// fputs("'\n", stderr);
+
+// if (status == 0)
+// free(dem);
+// }
+
+// // If the exception is derived from std::exception, we can
+// // give more information.
+// try { __throw_exception_again; }
+// #ifdef __EXCEPTIONS
+// catch (exception &exc)
+// {
+// char const *w = exc.what();
+// fputs(" what(): ", stderr);
+// fputs(w, stderr);
+// fputs("\n", stderr);
+// }
+// #endif
+// catch (...) { }
+// }
+// else
+// fputs("terminate called without an active exception\n", stderr);
- abort();
+// abort();
}
_GLIBCXX_END_NAMESPACE
diff -Naur gcc-4.4.7.orig/nlm/nlm_linuxtarget_gcc_reqd.patch gcc-4.4.7/nlm/nlm_linuxtarget_gcc_reqd.patch
--- gcc-4.4.7.orig/nlm/nlm_linuxtarget_gcc_reqd.patch 1969-12-31 19:00:00.000000000 -0500
+++ gcc-4.4.7/nlm/nlm_linuxtarget_gcc_reqd.patch 2012-03-13 15:08:57.000000000 -0500
@@ -0,0 +1,363 @@
+Index: libstdc++-v3/configure
+===================================================================
+--- libstdc++-v3/configure (revision 58)
++++ libstdc++-v3/configure (working copy)
+@@ -1521,6 +1521,118 @@ echo "$as_me: error: run \`make distclea
+ { (exit 1); exit 1; }; }
+ fi
+
++hasabi32=`echo "$CC" | grep 'mabi=32'`
++hasabi64=`echo "$CC" | grep 'mabi=64'`
++hasxlr=`echo "$CC" | grep 'march=xlr'`
++hasel=`echo "$CC" | grep '\-EL'`
++
++# The top-level condition checks are for the ABIs
++
++if [ "$hasabi32" = "$CC" ];
++then
++ if [ "$hasxlr" = "$CC" ];
++ then
++ if [ "$hasel" = "$CC" ];
++ then
++ CC=`echo "$CC" | sed 's/lib\//xlr\/lib\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib\//xlr\/lib\/el\//'`
++ CC=`echo "$CC" | sed 's/lib64\//xlr\/lib\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib64\//xlr\/lib\/el\//'`
++ CC=`echo "$CC" | sed 's/lib32\//xlr\/lib\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib32\//xlr\/lib\/el\//'`
++ else
++ CC=`echo "$CC" | sed 's/lib\//xlr\/lib\//'`
++ CXX=`echo "$CC" | sed 's/lib\//xlr\/lib\//'`
++ CC=`echo "$CC" | sed 's/lib32\//xlr\/lib\//'`
++ CXX=`echo "$CC" | sed 's/lib32\//xlr\/lib\//'`
++ CC=`echo "$CC" | sed 's/lib64\//xlr\/lib\//'`
++ CXX=`echo "$CC" | sed 's/lib64\//xlr\/lib\//'`
++ fi
++ else
++ if [ "$hasel" = "$CC" ];
++ then
++ CC=`echo "$CC" | sed 's/lib\//lib\/el\//'`
++ CC=`echo "$CC" | sed 's/lib32\//lib\/el\//'`
++ CC=`echo "$CC" | sed 's/lib64\//lib\/el\//'`
++ CXX=`echo "$CC"`
++ else
++ CC=`echo "$CC" | sed 's/lib32\//lib\//'`
++ CC=`echo "$CC" | sed 's/lib64\//lib\//'`
++ CXX=`echo "$CC" | sed 's/lib32\//lib\//'`
++ CXX=`echo "$CC" | sed 's/lib64\//lib\//'`
++ fi
++ fi
++else
++if [ "$hasabi64" = "$CC" ];
++then
++ if [ "$hasxlr" = "$CC" ];
++ then
++ if [ "$hasel" = "$CC" ];
++ then
++ CC=`echo "$CC" | sed 's/lib64\//xlr\/lib64\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib64\//xlr\/lib64\/el\//'`
++ CC=`echo "$CC" | sed 's/lib\//xlr\/lib64\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib\//xlr\/lib64\/el\//'`
++ CC=`echo "$CC" | sed 's/lib32\//xlr\/lib64\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib32\//xlr\/lib64\/el\//'`
++ else
++ CC=`echo "$CC" | sed 's/lib64\//xlr\/lib64\//'`
++ CXX=`echo "$CC" | sed 's/lib64\//xlr\/lib64\//'`
++ CC=`echo "$CC" | sed 's/lib\//xlr\/lib64\//'`
++ CXX=`echo "$CC" | sed 's/lib\//xlr\/lib64\//'`
++ CC=`echo "$CC" | sed 's/lib32\//xlr\/lib64\//'`
++ CXX=`echo "$CC" | sed 's/lib32\//xlr\/lib64\//'`
++ fi
++ else
++ if [ "$hasel" = "$CC" ];
++ then
++ CC=`echo "$CC" | sed 's/lib64\//lib64\/el\//'`
++ CC=`echo "$CC" | sed 's/lib\//lib64\/el\//'`
++ CC=`echo "$CC" | sed 's/lib32\//lib64\/el\//'`
++ CXX=`echo "$CC"`
++ else
++ CC=`echo "$CC" | sed 's/lib\//lib64\//'`
++ CC=`echo "$CC" | sed 's/lib32\//lib64\//'`
++ CXX=`echo "$CC" | sed 's/lib\//lib64\//'`
++ CXX=`echo "$CC" | sed 's/lib32\//lib64\//'`
++ fi
++ fi
++else
++ if [ "$hasxlr" = "$CC" ];
++ then
++ if [ "$hasel" = "$CC" ];
++ then
++ CC=`echo "$CC" | sed 's/lib32\//xlr\/lib32\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib32\//xlr\/lib32\/el\//'`
++ CC=`echo "$CC" | sed 's/lib\//xlr\/lib32\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib\//xlr\/lib32\/el\//'`
++ CC=`echo "$CC" | sed 's/lib64\//xlr\/lib32\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib64\//xlr\/lib32\/el\//'`
++ else
++ CC=`echo "$CC" | sed 's/lib32\//xlr\/lib32\//'`
++ CXX=`echo "$CC" | sed 's/lib32\//xlr\/lib32\//'`
++ CC=`echo "$CC" | sed 's/lib\//xlr\/lib32\//'`
++ CXX=`echo "$CC" | sed 's/lib\//xlr\/lib32\//'`
++ CC=`echo "$CC" | sed 's/lib64\//xlr\/lib32\//'`
++ CXX=`echo "$CC" | sed 's/lib64\//xlr\/lib32\//'`
++ fi
++ else
++ if [ "$hasel" = "$CC" ];
++ then
++ CC=`echo "$CC" | sed 's/lib32\//lib32\/el\//'`
++ CC=`echo "$CC" | sed 's/lib\//lib32\/el\//'`
++ CC=`echo "$CC" | sed 's/lib64\//lib32\/el\//'`
++ CXX=`echo "$CC"`
++ else
++ CC=`echo "$CC" | sed 's/lib\//lib32\//'`
++ CC=`echo "$CC" | sed 's/lib64\//lib32\//'`
++ CXX=`echo "$CC" | sed 's/lib\//lib32\//'`
++ CXX=`echo "$CC" | sed 's/lib64\//lib32\//'`
++ fi
++ fi
++fi
++fi
++
+ ac_ext=c
+ ac_cpp='$CPP $CPPFLAGS'
+ ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+Index: libstdc++-v3/Makefile.in
+===================================================================
+--- libstdc++-v3/Makefile.in (revision 58)
++++ libstdc++-v3/Makefile.in (working copy)
+@@ -327,6 +327,52 @@ ACLOCAL_AMFLAGS = -I . -I .. -I ../confi
+ # Multilib support.
+ MAKEOVERRIDES =
+
++ifeq ($(MULTIDIR),32)
++ GCC_FOR_TARGET := $(subst lib,lib,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),64)
++ GCC_FOR_TARGET := $(subst lib,lib64,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),xlr/32)
++ GCC_FOR_TARGET := $(subst lib,xlr/lib,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),xlr/64)
++ GCC_FOR_TARGET := $(subst lib,xlr/lib64,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),xlr)
++ GCC_FOR_TARGET := $(subst lib,xlr/lib32,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),el)
++ GCC_FOR_TARGET := $(subst lib,lib32/el,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),32/el)
++ GCC_FOR_TARGET := $(subst lib,lib/el,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),64/el)
++ GCC_FOR_TARGET := $(subst lib,lib64/el,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),xlr/el)
++ GCC_FOR_TARGET := $(subst lib,xlr/lib32/el,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),xlr/32/el)
++ GCC_FOR_TARGET := $(subst lib,xlr/lib/el,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),xlr/64/el)
++ GCC_FOR_TARGET := $(subst lib,xlr/lib64/el,$(GCC_FOR_TARGET))
++else
++ GCC_FOR_TARGET := $(subst lib,lib32,$(GCC_FOR_TARGET))
++endif
++endif
++endif
++endif
++endif
++endif
++endif
++endif
++endif
++endif
++endif
++
+ # Work around what appears to be a GNU make bug handling MAKEFLAGS
+ # values defined in terms of make variables, as is the case for CC and
+ # friends when we are called from the top level Makefile.
+Index: libiberty/configure
+===================================================================
+--- libiberty/configure (revision 58)
++++ libiberty/configure (working copy)
+@@ -1294,6 +1294,121 @@ echo "$as_me: error: run \`make distclea
+ { (exit 1); exit 1; }; }
+ fi
+
++hasabi32=`echo "$CC" | grep 'mabi=32'`
++hasabi64=`echo "$CC" | grep 'mabi=64'`
++hasxlr=`echo "$CC" | grep 'march=xlr'`
++hasel=`echo "$CC" | grep '\-EL'`
++
++# The top-level condition checks are for the ABIs
++
++if [ "$hasabi32" = "$CC" ];
++then
++ if [ "$hasxlr" = "$CC" ];
++ then
++ if [ "$hasel" = "$CC" ];
++ then
++ CC=`echo "$CC" | sed 's/lib\//xlr\/lib\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib\//xlr\/lib\/el\//'`
++ CC=`echo "$CC" | sed 's/lib64\//xlr\/lib\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib64\//xlr\/lib\/el\//'`
++ CC=`echo "$CC" | sed 's/lib32\//xlr\/lib\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib32\//xlr\/lib\/el\//'`
++ else
++ CC=`echo "$CC" | sed 's/lib\//xlr\/lib\//'`
++ CXX=`echo "$CC" | sed 's/lib\//xlr\/lib\//'`
++ CC=`echo "$CC" | sed 's/lib32\//xlr\/lib\//'`
++ CXX=`echo "$CC" | sed 's/lib32\//xlr\/lib\//'`
++ CC=`echo "$CC" | sed 's/lib64\//xlr\/lib\//'`
++ CXX=`echo "$CC" | sed 's/lib64\//xlr\/lib\//'`
++ fi
++ else
++ if [ "$hasel" = "$CC" ];
++ then
++ CC=`echo "$CC" | sed 's/lib\//lib\/el\//'`
++ CC=`echo "$CC" | sed 's/lib32\//lib\/el\//'`
++ CC=`echo "$CC" | sed 's/lib64\//lib\/el\//'`
++ CXX=`echo "$CC"`
++ else
++ CC=`echo "$CC" | sed 's/lib32\//lib\//'`
++ CC=`echo "$CC" | sed 's/lib64\//lib\//'`
++ CXX=`echo "$CC" | sed 's/lib32\//lib\//'`
++ CXX=`echo "$CC" | sed 's/lib64\//lib\//'`
++ fi
++ fi
++else
++if [ "$hasabi64" = "$CC" ];
++then
++ if [ "$hasxlr" = "$CC" ];
++ then
++ if [ "$hasel" = "$CC" ];
++ then
++ CC=`echo "$CC" | sed 's/lib64\//xlr\/lib64\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib64\//xlr\/lib64\/el\//'`
++ CC=`echo "$CC" | sed 's/lib\//xlr\/lib64\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib\//xlr\/lib64\/el\//'`
++ CC=`echo "$CC" | sed 's/lib32\//xlr\/lib64\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib32\//xlr\/lib64\/el\//'`
++ else
++ CC=`echo "$CC" | sed 's/lib64\//xlr\/lib64\//'`
++ CXX=`echo "$CC" | sed 's/lib64\//xlr\/lib64\//'`
++ CC=`echo "$CC" | sed 's/lib\//xlr\/lib64\//'`
++ CXX=`echo "$CC" | sed 's/lib\//xlr\/lib64\//'`
++ CC=`echo "$CC" | sed 's/lib32\//xlr\/lib64\//'`
++ CXX=`echo "$CC" | sed 's/lib32\//xlr\/lib64\//'`
++ fi
++ else
++ if [ "$hasel" = "$CC" ];
++ then
++ CC=`echo "$CC" | sed 's/lib64\//lib64\/el\//'`
++ CC=`echo "$CC" | sed 's/lib\//lib64\/el\//'`
++ CC=`echo "$CC" | sed 's/lib32\//lib64\/el\//'`
++ CXX=`echo "$CC"`
++ else
++ CC=`echo "$CC" | sed 's/lib\//lib64\//'`
++ CC=`echo "$CC" | sed 's/lib32\//lib64\//'`
++ CXX=`echo "$CC" | sed 's/lib\//lib64\//'`
++ CXX=`echo "$CC" | sed 's/lib32\//lib64\//'`
++ fi
++ fi
++else
++ if [ "$hasxlr" = "$CC" ];
++ then
++ if [ "$hasel" = "$CC" ];
++ then
++ CC=`echo "$CC" | sed 's/lib32\//xlr\/lib32\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib32\//xlr\/lib32\/el\//'`
++ CC=`echo "$CC" | sed 's/lib\//xlr\/lib32\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib\//xlr\/lib32\/el\//'`
++ CC=`echo "$CC" | sed 's/lib64\//xlr\/lib32\/el\//'`
++ CXX=`echo "$CC" | sed 's/lib64\//xlr\/lib32\/el\//'`
++ else
++ CC=`echo "$CC" | sed 's/lib32\//xlr\/lib32\//'`
++ CXX=`echo "$CC" | sed 's/lib32\//xlr\/lib32\//'`
++ CC=`echo "$CC" | sed 's/lib\//xlr\/lib32\//'`
++ CXX=`echo "$CC" | sed 's/lib\//xlr\/lib32\//'`
++ CC=`echo "$CC" | sed 's/lib64\//xlr\/lib32\//'`
++ CXX=`echo "$CC" | sed 's/lib64\//xlr\/lib32\//'`
++ fi
++ else
++ if [ "$hasel" = "$CC" ];
++ then
++ CC=`echo "$CC" | sed 's/lib32\//lib32\/el\//'`
++ CC=`echo "$CC" | sed 's/lib\//lib32\/el\//'`
++ CC=`echo "$CC" | sed 's/lib64\//lib32\/el\//'`
++ CXX=`echo "$CC"`
++ else
++ CC=`echo "$CC" | sed 's/lib\//lib32\//'`
++ CC=`echo "$CC" | sed 's/lib64\//lib32\//'`
++ CXX=`echo "$CC" | sed 's/lib\//lib32\//'`
++ CXX=`echo "$CC" | sed 's/lib64\//lib32\//'`
++ fi
++ fi
++fi
++fi
++
++ac_env_CC_value=$CC
++ac_cv_env_CC_value=$CC
++
+ ac_ext=c
+ ac_cpp='$CPP $CPPFLAGS'
+ ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5'
+Index: libgcc/Makefile.in
+===================================================================
+--- libgcc/Makefile.in (revision 58)
++++ libgcc/Makefile.in (working copy)
+@@ -777,6 +777,52 @@ libgcc_s$(SHLIB_EXT): libgcc.map
+ mapfile = libgcc.map
+ endif
+
++ifeq ($(MULTIDIR),32)
++ GCC_FOR_TARGET := $(subst lib,lib,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),64)
++ GCC_FOR_TARGET := $(subst lib,lib64,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),xlr/32)
++ GCC_FOR_TARGET := $(subst lib,xlr/lib,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),xlr/64)
++ GCC_FOR_TARGET := $(subst lib,xlr/lib64,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),xlr)
++ GCC_FOR_TARGET := $(subst lib,xlr/lib32,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),el)
++ GCC_FOR_TARGET := $(subst lib,lib32/el,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),32/el)
++ GCC_FOR_TARGET := $(subst lib,lib/el,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),64/el)
++ GCC_FOR_TARGET := $(subst lib,lib64/el,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),xlr/el)
++ GCC_FOR_TARGET := $(subst lib,xlr/lib32/el,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),xlr/32/el)
++ GCC_FOR_TARGET := $(subst lib,xlr/lib/el,$(GCC_FOR_TARGET))
++else
++ifeq ($(MULTIDIR),xlr/64/el)
++ GCC_FOR_TARGET := $(subst lib,xlr/lib64/el,$(GCC_FOR_TARGET))
++else
++ GCC_FOR_TARGET := $(subst lib,lib32,$(GCC_FOR_TARGET))
++endif
++endif
++endif
++endif
++endif
++endif
++endif
++endif
++endif
++endif
++endif
++
+ libgcc_s$(SHLIB_EXT): $(libgcc-s-objects) $(extra-parts)
+ # @multilib_flags@ is still needed because this may use
+ # $(GCC_FOR_TARGET) and $(LIBGCC2_CFLAGS) directly.